From: Craig Topper <craig.topper@intel.com>
Date: Sun, 10 Dec 2017 17:42:42 +0000 (+0000)
Subject: [X86] Add VPMULLWZ256 to the skylake server scheduler model
X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=992aa46c43e34258c47a4ea74329e4fb3e2577d7;p=llvm

[X86] Add VPMULLWZ256 to the skylake server scheduler model

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@320318 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/Target/X86/X86SchedSkylakeServer.td b/lib/Target/X86/X86SchedSkylakeServer.td
index eea553168a3..041d1309ff6 100755
--- a/lib/Target/X86/X86SchedSkylakeServer.td
+++ b/lib/Target/X86/X86SchedSkylakeServer.td
@@ -2837,6 +2837,7 @@ def: InstRW<[SKXWriteResGroup50], (instregex "VPMULHWZrr(b?)(k?)(z?)")>;
 def: InstRW<[SKXWriteResGroup50], (instregex "VPMULHWrr")>;
 def: InstRW<[SKXWriteResGroup50], (instregex "VPMULLWYrr")>;
 def: InstRW<[SKXWriteResGroup50], (instregex "VPMULLWZ128rr(b?)(k?)(z?)")>;
+def: InstRW<[SKXWriteResGroup50], (instregex "VPMULLWZ256rr(b?)(k?)(z?)")>;
 def: InstRW<[SKXWriteResGroup50], (instregex "VPMULLWZrr(b?)(k?)(z?)")>;
 def: InstRW<[SKXWriteResGroup50], (instregex "VPMULLWrr")>;
 def: InstRW<[SKXWriteResGroup50], (instregex "VPMULUDQYrr")>;
@@ -5943,6 +5944,7 @@ def: InstRW<[SKXWriteResGroup161], (instregex "VPMULHWYrm")>;
 def: InstRW<[SKXWriteResGroup161], (instregex "VPMULHWZ256rm(b?)(k?)(z?)")>;
 def: InstRW<[SKXWriteResGroup161], (instregex "VPMULHWZrm(b?)(k?)(z?)")>;
 def: InstRW<[SKXWriteResGroup161], (instregex "VPMULLWYrm")>;
+def: InstRW<[SKXWriteResGroup161], (instregex "VPMULLWZ256rm(b?)(k?)(z?)")>;
 def: InstRW<[SKXWriteResGroup161], (instregex "VPMULLWZrm(b?)(k?)(z?)")>;
 def: InstRW<[SKXWriteResGroup161], (instregex "VPMULUDQYrm")>;
 def: InstRW<[SKXWriteResGroup161], (instregex "VPMULUDQZ256rm(b?)(k?)(z?)")>;