From: Alex Bradbury <asb@lowrisc.org>
Date: Sat, 9 Mar 2019 11:16:27 +0000 (+0000)
Subject: [RISCV][NFC] Minor refactoring of CC_RISCV
X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=92108e3add77194b5372c669f4b30308f35e7497;p=llvm

[RISCV][NFC] Minor refactoring of CC_RISCV

Immediately check if we need to early-exit as we have a return value that
can't be returned directly. Also tweak following if/else.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355773 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/Target/RISCV/RISCVISelLowering.cpp b/lib/Target/RISCV/RISCVISelLowering.cpp
index 37a91acdd1e..60041da0694 100644
--- a/lib/Target/RISCV/RISCVISelLowering.cpp
+++ b/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -940,20 +940,20 @@ static bool CC_RISCV(const DataLayout &DL, unsigned ValNo, MVT ValVT, MVT LocVT,
   unsigned XLen = DL.getLargestLegalIntTypeSizeInBits();
   assert(XLen == 32 || XLen == 64);
   MVT XLenVT = XLen == 32 ? MVT::i32 : MVT::i64;
+
+  // Any return value split in to more than two values can't be returned
+  // directly.
+  if (IsRet && ValNo > 1)
+    return true;
+
   if (ValVT == MVT::f32) {
     LocVT = XLenVT;
     LocInfo = CCValAssign::BCvt;
-  }
-  if (XLen == 64 && ValVT == MVT::f64) {
+  } else if (XLen == 64 && ValVT == MVT::f64) {
     LocVT = MVT::i64;
     LocInfo = CCValAssign::BCvt;
   }
 
-  // Any return value split in to more than two values can't be returned
-  // directly.
-  if (IsRet && ValNo > 1)
-    return true;
-
   // If this is a variadic argument, the RISC-V calling convention requires
   // that it is assigned an 'even' or 'aligned' register if it has 8-byte
   // alignment (RV32) or 16-byte alignment (RV64). An aligned register should