From: Sanjay Patel <spatel@rotateright.com>
Date: Wed, 30 Jan 2019 15:07:49 +0000 (+0000)
Subject: [InstCombine][x86] add tests for addcarry intrinsic; NFC
X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=8f97b230d8489cd8944c57dd3e89b55ba9367125;p=llvm

[InstCombine][x86] add tests for addcarry intrinsic; NFC


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352627 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/test/Transforms/InstCombine/X86/addcarry.ll b/test/Transforms/InstCombine/X86/addcarry.ll
new file mode 100644
index 00000000000..5f5fc045272
--- /dev/null
+++ b/test/Transforms/InstCombine/X86/addcarry.ll
@@ -0,0 +1,36 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt < %s -instcombine -S | FileCheck %s
+
+declare { i8, i32 } @llvm.x86.addcarry.32(i8, i32, i32)
+declare { i8, i64 } @llvm.x86.addcarry.64(i8, i64, i64)
+
+define i32 @no_carryin_i32(i32 %x, i32 %y, i8* %p) {
+; CHECK-LABEL: @no_carryin_i32(
+; CHECK-NEXT:    [[S:%.*]] = call { i8, i32 } @llvm.x86.addcarry.32(i8 0, i32 [[X:%.*]], i32 [[Y:%.*]])
+; CHECK-NEXT:    [[OV:%.*]] = extractvalue { i8, i32 } [[S]], 0
+; CHECK-NEXT:    store i8 [[OV]], i8* [[P:%.*]], align 1
+; CHECK-NEXT:    [[R:%.*]] = extractvalue { i8, i32 } [[S]], 1
+; CHECK-NEXT:    ret i32 [[R]]
+;
+  %s = call { i8, i32 } @llvm.x86.addcarry.32(i8 0, i32 %x, i32 %y)
+  %ov = extractvalue { i8, i32 } %s, 0
+  store i8 %ov, i8* %p
+  %r = extractvalue { i8, i32 } %s, 1
+  ret i32 %r
+}
+
+define i64 @no_carryin_i64(i64 %x, i64 %y, i8* %p) {
+; CHECK-LABEL: @no_carryin_i64(
+; CHECK-NEXT:    [[S:%.*]] = call { i8, i64 } @llvm.x86.addcarry.64(i8 0, i64 [[X:%.*]], i64 [[Y:%.*]])
+; CHECK-NEXT:    [[OV:%.*]] = extractvalue { i8, i64 } [[S]], 0
+; CHECK-NEXT:    store i8 [[OV]], i8* [[P:%.*]], align 1
+; CHECK-NEXT:    [[R:%.*]] = extractvalue { i8, i64 } [[S]], 1
+; CHECK-NEXT:    ret i64 [[R]]
+;
+  %s = call { i8, i64 } @llvm.x86.addcarry.64(i8 0, i64 %x, i64 %y)
+  %ov = extractvalue { i8, i64 } %s, 0
+  store i8 %ov, i8* %p
+  %r = extractvalue { i8, i64 } %s, 1
+  ret i64 %r
+}
+