From: Simon Pilgrim <llvm-dev@redking.me.uk>
Date: Wed, 19 Jun 2019 17:42:37 +0000 (+0000)
Subject: [X86][SSE] combineToExtendVectorInReg - add ANY_EXTEND support TODO. NFCI.
X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=8de78e2cc4fdfae95648855ccfdd8f29c89c2d19;p=llvm

[X86][SSE] combineToExtendVectorInReg - add ANY_EXTEND support TODO. NFCI.

So I don't forget - there's a load of yak shaving to do first.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363847 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp
index 2affaa78b87..2beec981f09 100644
--- a/lib/Target/X86/X86ISelLowering.cpp
+++ b/lib/Target/X86/X86ISelLowering.cpp
@@ -41345,6 +41345,7 @@ static SDValue combineToExtendVectorInReg(SDNode *N, SelectionDAG &DAG,
     return SDValue();
 
   unsigned Opcode = N->getOpcode();
+  // TODO - add ANY_EXTEND support.
   if (Opcode != ISD::SIGN_EXTEND && Opcode != ISD::ZERO_EXTEND)
     return SDValue();
   if (!DCI.isBeforeLegalizeOps())