From: Simon Pilgrim Date: Sun, 7 May 2017 20:58:55 +0000 (+0000) Subject: [X86][AVX1] Improve 256-bit vector costs for integer unary intrinsics. X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=8d84aa2ccea9f910453f7796b856e33bf4623c1b;p=llvm [X86][AVX1] Improve 256-bit vector costs for integer unary intrinsics. Account for subvector extraction/insertion, helps prevent the vectorizers from selecting 256-bit vectors that will have to be split anyhow on AVX1 targets. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302378 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/Target/X86/X86TargetTransformInfo.cpp b/lib/Target/X86/X86TargetTransformInfo.cpp index b742fb47237..f3b619a2956 100644 --- a/lib/Target/X86/X86TargetTransformInfo.cpp +++ b/lib/Target/X86/X86TargetTransformInfo.cpp @@ -1426,25 +1426,25 @@ int X86TTIImpl::getIntrinsicInstrCost(Intrinsic::ID IID, Type *RetTy, { ISD::FSQRT, MVT::v4f64, 28 }, // Haswell from http://www.agner.org/ }; static const CostTblEntry AVX1CostTbl[] = { - { ISD::BITREVERSE, MVT::v4i64, 10 }, - { ISD::BITREVERSE, MVT::v8i32, 10 }, - { ISD::BITREVERSE, MVT::v16i16, 10 }, - { ISD::BITREVERSE, MVT::v32i8, 10 }, + { ISD::BITREVERSE, MVT::v4i64, 12 }, // 2 x 128-bit Op + extract/insert + { ISD::BITREVERSE, MVT::v8i32, 12 }, // 2 x 128-bit Op + extract/insert + { ISD::BITREVERSE, MVT::v16i16, 12 }, // 2 x 128-bit Op + extract/insert + { ISD::BITREVERSE, MVT::v32i8, 12 }, // 2 x 128-bit Op + extract/insert { ISD::BSWAP, MVT::v4i64, 4 }, { ISD::BSWAP, MVT::v8i32, 4 }, { ISD::BSWAP, MVT::v16i16, 4 }, - { ISD::CTLZ, MVT::v4i64, 46 }, - { ISD::CTLZ, MVT::v8i32, 36 }, - { ISD::CTLZ, MVT::v16i16, 28 }, - { ISD::CTLZ, MVT::v32i8, 18 }, - { ISD::CTPOP, MVT::v4i64, 14 }, - { ISD::CTPOP, MVT::v8i32, 22 }, - { ISD::CTPOP, MVT::v16i16, 18 }, - { ISD::CTPOP, MVT::v32i8, 12 }, - { ISD::CTTZ, MVT::v4i64, 20 }, - { ISD::CTTZ, MVT::v8i32, 28 }, - { ISD::CTTZ, MVT::v16i16, 24 }, - { ISD::CTTZ, MVT::v32i8, 18 }, + { ISD::CTLZ, MVT::v4i64, 48 }, // 2 x 128-bit Op + extract/insert + { ISD::CTLZ, MVT::v8i32, 38 }, // 2 x 128-bit Op + extract/insert + { ISD::CTLZ, MVT::v16i16, 30 }, // 2 x 128-bit Op + extract/insert + { ISD::CTLZ, MVT::v32i8, 20 }, // 2 x 128-bit Op + extract/insert + { ISD::CTPOP, MVT::v4i64, 16 }, // 2 x 128-bit Op + extract/insert + { ISD::CTPOP, MVT::v8i32, 24 }, // 2 x 128-bit Op + extract/insert + { ISD::CTPOP, MVT::v16i16, 20 }, // 2 x 128-bit Op + extract/insert + { ISD::CTPOP, MVT::v32i8, 14 }, // 2 x 128-bit Op + extract/insert + { ISD::CTTZ, MVT::v4i64, 22 }, // 2 x 128-bit Op + extract/insert + { ISD::CTTZ, MVT::v8i32, 30 }, // 2 x 128-bit Op + extract/insert + { ISD::CTTZ, MVT::v16i16, 26 }, // 2 x 128-bit Op + extract/insert + { ISD::CTTZ, MVT::v32i8, 20 }, // 2 x 128-bit Op + extract/insert { ISD::FSQRT, MVT::f32, 14 }, // SNB from http://www.agner.org/ { ISD::FSQRT, MVT::v4f32, 14 }, // SNB from http://www.agner.org/ { ISD::FSQRT, MVT::v8f32, 28 }, // SNB from http://www.agner.org/ diff --git a/test/Analysis/CostModel/X86/bitreverse.ll b/test/Analysis/CostModel/X86/bitreverse.ll index 2eb63babdc3..8d5e1421eb8 100644 --- a/test/Analysis/CostModel/X86/bitreverse.ll +++ b/test/Analysis/CostModel/X86/bitreverse.ll @@ -79,7 +79,7 @@ define <4 x i64> @var_bitreverse_v4i64(<4 x i64> %a) { ; CHECK: 'Cost Model Analysis' for function 'var_bitreverse_v4i64': ; SSE2: Found an estimated cost of 58 for instruction: %bitreverse ; SSE42: Found an estimated cost of 10 for instruction: %bitreverse -; AVX: Found an estimated cost of 10 for instruction: %bitreverse +; AVX: Found an estimated cost of 12 for instruction: %bitreverse ; AVX2: Found an estimated cost of 5 for instruction: %bitreverse ; XOP: Found an estimated cost of 4 for instruction: %bitreverse %bitreverse = call <4 x i64> @llvm.bitreverse.v4i64(<4 x i64> %a) @@ -101,7 +101,7 @@ define <8 x i32> @var_bitreverse_v8i32(<8 x i32> %a) { ; CHECK: 'Cost Model Analysis' for function 'var_bitreverse_v8i32': ; SSE2: Found an estimated cost of 54 for instruction: %bitreverse ; SSE42: Found an estimated cost of 10 for instruction: %bitreverse -; AVX: Found an estimated cost of 10 for instruction: %bitreverse +; AVX: Found an estimated cost of 12 for instruction: %bitreverse ; AVX2: Found an estimated cost of 5 for instruction: %bitreverse ; XOP: Found an estimated cost of 4 for instruction: %bitreverse %bitreverse = call <8 x i32> @llvm.bitreverse.v8i32(<8 x i32> %a) @@ -123,7 +123,7 @@ define <16 x i16> @var_bitreverse_v16i16(<16 x i16> %a) { ; CHECK: 'Cost Model Analysis' for function 'var_bitreverse_v16i16': ; SSE2: Found an estimated cost of 54 for instruction: %bitreverse ; SSE42: Found an estimated cost of 10 for instruction: %bitreverse -; AVX: Found an estimated cost of 10 for instruction: %bitreverse +; AVX: Found an estimated cost of 12 for instruction: %bitreverse ; AVX2: Found an estimated cost of 5 for instruction: %bitreverse ; XOP: Found an estimated cost of 4 for instruction: %bitreverse %bitreverse = call <16 x i16> @llvm.bitreverse.v16i16(<16 x i16> %a) @@ -145,7 +145,7 @@ define <32 x i8> @var_bitreverse_v32i8(<32 x i8> %a) { ; CHECK: 'Cost Model Analysis' for function 'var_bitreverse_v32i8': ; SSE2: Found an estimated cost of 40 for instruction: %bitreverse ; SSE42: Found an estimated cost of 10 for instruction: %bitreverse -; AVX: Found an estimated cost of 10 for instruction: %bitreverse +; AVX: Found an estimated cost of 12 for instruction: %bitreverse ; AVX2: Found an estimated cost of 5 for instruction: %bitreverse ; XOP: Found an estimated cost of 4 for instruction: %bitreverse %bitreverse = call <32 x i8> @llvm.bitreverse.v32i8(<32 x i8> %a) diff --git a/test/Analysis/CostModel/X86/ctbits-cost.ll b/test/Analysis/CostModel/X86/ctbits-cost.ll index 8c7fa9d7315..aaf092c7b1d 100644 --- a/test/Analysis/CostModel/X86/ctbits-cost.ll +++ b/test/Analysis/CostModel/X86/ctbits-cost.ll @@ -69,7 +69,7 @@ define <4 x i64> @var_ctpop_v4i64(<4 x i64> %a) { ; CHECK: 'Cost Model Analysis' for function 'var_ctpop_v4i64': ; SSE2: Found an estimated cost of 24 for instruction: %ctpop ; SSE42: Found an estimated cost of 14 for instruction: %ctpop -; AVX1: Found an estimated cost of 14 for instruction: %ctpop +; AVX1: Found an estimated cost of 16 for instruction: %ctpop ; AVX2: Found an estimated cost of 7 for instruction: %ctpop %ctpop = call <4 x i64> @llvm.ctpop.v4i64(<4 x i64> %a) ret <4 x i64> %ctpop @@ -88,7 +88,7 @@ define <8 x i32> @var_ctpop_v8i32(<8 x i32> %a) { ; CHECK: 'Cost Model Analysis' for function 'var_ctpop_v8i32': ; SSE2: Found an estimated cost of 30 for instruction: %ctpop ; SSE42: Found an estimated cost of 22 for instruction: %ctpop -; AVX1: Found an estimated cost of 22 for instruction: %ctpop +; AVX1: Found an estimated cost of 24 for instruction: %ctpop ; AVX2: Found an estimated cost of 11 for instruction: %ctpop %ctpop = call <8 x i32> @llvm.ctpop.v8i32(<8 x i32> %a) ret <8 x i32> %ctpop @@ -107,7 +107,7 @@ define <16 x i16> @var_ctpop_v16i16(<16 x i16> %a) { ; CHECK: 'Cost Model Analysis' for function 'var_ctpop_v16i16': ; SSE2: Found an estimated cost of 26 for instruction: %ctpop ; SSE42: Found an estimated cost of 18 for instruction: %ctpop -; AVX1: Found an estimated cost of 18 for instruction: %ctpop +; AVX1: Found an estimated cost of 20 for instruction: %ctpop ; AVX2: Found an estimated cost of 9 for instruction: %ctpop %ctpop = call <16 x i16> @llvm.ctpop.v16i16(<16 x i16> %a) ret <16 x i16> %ctpop @@ -126,7 +126,7 @@ define <32 x i8> @var_ctpop_v32i8(<32 x i8> %a) { ; CHECK: 'Cost Model Analysis' for function 'var_ctpop_v32i8': ; SSE2: Found an estimated cost of 20 for instruction: %ctpop ; SSE42: Found an estimated cost of 12 for instruction: %ctpop -; AVX1: Found an estimated cost of 12 for instruction: %ctpop +; AVX1: Found an estimated cost of 14 for instruction: %ctpop ; AVX2: Found an estimated cost of 6 for instruction: %ctpop %ctpop = call <32 x i8> @llvm.ctpop.v32i8(<32 x i8> %a) ret <32 x i8> %ctpop @@ -229,7 +229,7 @@ define <4 x i64> @var_ctlz_v4i64(<4 x i64> %a) { ; CHECK: 'Cost Model Analysis' for function 'var_ctlz_v4i64': ; SSE2: Found an estimated cost of 50 for instruction: %ctlz ; SSE42: Found an estimated cost of 46 for instruction: %ctlz -; AVX1: Found an estimated cost of 46 for instruction: %ctlz +; AVX1: Found an estimated cost of 48 for instruction: %ctlz ; AVX2: Found an estimated cost of 23 for instruction: %ctlz %ctlz = call <4 x i64> @llvm.ctlz.v4i64(<4 x i64> %a, i1 0) ret <4 x i64> %ctlz @@ -239,7 +239,7 @@ define <4 x i64> @var_ctlz_v4i64u(<4 x i64> %a) { ; CHECK: 'Cost Model Analysis' for function 'var_ctlz_v4i64u': ; SSE2: Found an estimated cost of 50 for instruction: %ctlz ; SSE42: Found an estimated cost of 46 for instruction: %ctlz -; AVX1: Found an estimated cost of 46 for instruction: %ctlz +; AVX1: Found an estimated cost of 48 for instruction: %ctlz ; AVX2: Found an estimated cost of 23 for instruction: %ctlz %ctlz = call <4 x i64> @llvm.ctlz.v4i64(<4 x i64> %a, i1 1) ret <4 x i64> %ctlz @@ -267,7 +267,7 @@ define <8 x i32> @var_ctlz_v8i32(<8 x i32> %a) { ; CHECK: 'Cost Model Analysis' for function 'var_ctlz_v8i32': ; SSE2: Found an estimated cost of 52 for instruction: %ctlz ; SSE42: Found an estimated cost of 36 for instruction: %ctlz -; AVX1: Found an estimated cost of 36 for instruction: %ctlz +; AVX1: Found an estimated cost of 38 for instruction: %ctlz ; AVX2: Found an estimated cost of 18 for instruction: %ctlz %ctlz = call <8 x i32> @llvm.ctlz.v8i32(<8 x i32> %a, i1 0) ret <8 x i32> %ctlz @@ -277,7 +277,7 @@ define <8 x i32> @var_ctlz_v8i32u(<8 x i32> %a) { ; CHECK: 'Cost Model Analysis' for function 'var_ctlz_v8i32u': ; SSE2: Found an estimated cost of 52 for instruction: %ctlz ; SSE42: Found an estimated cost of 36 for instruction: %ctlz -; AVX1: Found an estimated cost of 36 for instruction: %ctlz +; AVX1: Found an estimated cost of 38 for instruction: %ctlz ; AVX2: Found an estimated cost of 18 for instruction: %ctlz %ctlz = call <8 x i32> @llvm.ctlz.v8i32(<8 x i32> %a, i1 1) ret <8 x i32> %ctlz @@ -305,7 +305,7 @@ define <16 x i16> @var_ctlz_v16i16(<16 x i16> %a) { ; CHECK: 'Cost Model Analysis' for function 'var_ctlz_v16i16': ; SSE2: Found an estimated cost of 40 for instruction: %ctlz ; SSE42: Found an estimated cost of 28 for instruction: %ctlz -; AVX1: Found an estimated cost of 28 for instruction: %ctlz +; AVX1: Found an estimated cost of 30 for instruction: %ctlz ; AVX2: Found an estimated cost of 14 for instruction: %ctlz %ctlz = call <16 x i16> @llvm.ctlz.v16i16(<16 x i16> %a, i1 0) ret <16 x i16> %ctlz @@ -315,7 +315,7 @@ define <16 x i16> @var_ctlz_v16i16u(<16 x i16> %a) { ; CHECK: 'Cost Model Analysis' for function 'var_ctlz_v16i16u': ; SSE2: Found an estimated cost of 40 for instruction: %ctlz ; SSE42: Found an estimated cost of 28 for instruction: %ctlz -; AVX1: Found an estimated cost of 28 for instruction: %ctlz +; AVX1: Found an estimated cost of 30 for instruction: %ctlz ; AVX2: Found an estimated cost of 14 for instruction: %ctlz %ctlz = call <16 x i16> @llvm.ctlz.v16i16(<16 x i16> %a, i1 1) ret <16 x i16> %ctlz @@ -343,7 +343,7 @@ define <32 x i8> @var_ctlz_v32i8(<32 x i8> %a) { ; CHECK: 'Cost Model Analysis' for function 'var_ctlz_v32i8': ; SSE2: Found an estimated cost of 34 for instruction: %ctlz ; SSE42: Found an estimated cost of 18 for instruction: %ctlz -; AVX1: Found an estimated cost of 18 for instruction: %ctlz +; AVX1: Found an estimated cost of 20 for instruction: %ctlz ; AVX2: Found an estimated cost of 9 for instruction: %ctlz %ctlz = call <32 x i8> @llvm.ctlz.v32i8(<32 x i8> %a, i1 0) ret <32 x i8> %ctlz @@ -353,7 +353,7 @@ define <32 x i8> @var_ctlz_v32i8u(<32 x i8> %a) { ; CHECK: 'Cost Model Analysis' for function 'var_ctlz_v32i8u': ; SSE2: Found an estimated cost of 34 for instruction: %ctlz ; SSE42: Found an estimated cost of 18 for instruction: %ctlz -; AVX1: Found an estimated cost of 18 for instruction: %ctlz +; AVX1: Found an estimated cost of 20 for instruction: %ctlz ; AVX2: Found an estimated cost of 9 for instruction: %ctlz %ctlz = call <32 x i8> @llvm.ctlz.v32i8(<32 x i8> %a, i1 1) ret <32 x i8> %ctlz @@ -456,7 +456,7 @@ define <4 x i64> @var_cttz_v4i64(<4 x i64> %a) { ; CHECK: 'Cost Model Analysis' for function 'var_cttz_v4i64': ; SSE2: Found an estimated cost of 28 for instruction: %cttz ; SSE42: Found an estimated cost of 20 for instruction: %cttz -; AVX1: Found an estimated cost of 20 for instruction: %cttz +; AVX1: Found an estimated cost of 22 for instruction: %cttz ; AVX2: Found an estimated cost of 10 for instruction: %cttz %cttz = call <4 x i64> @llvm.cttz.v4i64(<4 x i64> %a, i1 0) ret <4 x i64> %cttz @@ -466,7 +466,7 @@ define <4 x i64> @var_cttz_v4i64u(<4 x i64> %a) { ; CHECK: 'Cost Model Analysis' for function 'var_cttz_v4i64u': ; SSE2: Found an estimated cost of 28 for instruction: %cttz ; SSE42: Found an estimated cost of 20 for instruction: %cttz -; AVX1: Found an estimated cost of 20 for instruction: %cttz +; AVX1: Found an estimated cost of 22 for instruction: %cttz ; AVX2: Found an estimated cost of 10 for instruction: %cttz %cttz = call <4 x i64> @llvm.cttz.v4i64(<4 x i64> %a, i1 1) ret <4 x i64> %cttz @@ -494,7 +494,7 @@ define <8 x i32> @var_cttz_v8i32(<8 x i32> %a) { ; CHECK: 'Cost Model Analysis' for function 'var_cttz_v8i32': ; SSE2: Found an estimated cost of 36 for instruction: %cttz ; SSE42: Found an estimated cost of 28 for instruction: %cttz -; AVX1: Found an estimated cost of 28 for instruction: %cttz +; AVX1: Found an estimated cost of 30 for instruction: %cttz ; AVX2: Found an estimated cost of 14 for instruction: %cttz %cttz = call <8 x i32> @llvm.cttz.v8i32(<8 x i32> %a, i1 0) ret <8 x i32> %cttz @@ -504,7 +504,7 @@ define <8 x i32> @var_cttz_v8i32u(<8 x i32> %a) { ; CHECK: 'Cost Model Analysis' for function 'var_cttz_v8i32u': ; SSE2: Found an estimated cost of 36 for instruction: %cttz ; SSE42: Found an estimated cost of 28 for instruction: %cttz -; AVX1: Found an estimated cost of 28 for instruction: %cttz +; AVX1: Found an estimated cost of 30 for instruction: %cttz ; AVX2: Found an estimated cost of 14 for instruction: %cttz %cttz = call <8 x i32> @llvm.cttz.v8i32(<8 x i32> %a, i1 1) ret <8 x i32> %cttz @@ -532,7 +532,7 @@ define <16 x i16> @var_cttz_v16i16(<16 x i16> %a) { ; CHECK: 'Cost Model Analysis' for function 'var_cttz_v16i16': ; SSE2: Found an estimated cost of 32 for instruction: %cttz ; SSE42: Found an estimated cost of 24 for instruction: %cttz -; AVX1: Found an estimated cost of 24 for instruction: %cttz +; AVX1: Found an estimated cost of 26 for instruction: %cttz ; AVX2: Found an estimated cost of 12 for instruction: %cttz %cttz = call <16 x i16> @llvm.cttz.v16i16(<16 x i16> %a, i1 0) ret <16 x i16> %cttz @@ -542,7 +542,7 @@ define <16 x i16> @var_cttz_v16i16u(<16 x i16> %a) { ; CHECK: 'Cost Model Analysis' for function 'var_cttz_v16i16u': ; SSE2: Found an estimated cost of 32 for instruction: %cttz ; SSE42: Found an estimated cost of 24 for instruction: %cttz -; AVX1: Found an estimated cost of 24 for instruction: %cttz +; AVX1: Found an estimated cost of 26 for instruction: %cttz ; AVX2: Found an estimated cost of 12 for instruction: %cttz %cttz = call <16 x i16> @llvm.cttz.v16i16(<16 x i16> %a, i1 1) ret <16 x i16> %cttz @@ -570,7 +570,7 @@ define <32 x i8> @var_cttz_v32i8(<32 x i8> %a) { ; CHECK: 'Cost Model Analysis' for function 'var_cttz_v32i8': ; SSE2: Found an estimated cost of 26 for instruction: %cttz ; SSE42: Found an estimated cost of 18 for instruction: %cttz -; AVX1: Found an estimated cost of 18 for instruction: %cttz +; AVX1: Found an estimated cost of 20 for instruction: %cttz ; AVX2: Found an estimated cost of 9 for instruction: %cttz %cttz = call <32 x i8> @llvm.cttz.v32i8(<32 x i8> %a, i1 0) ret <32 x i8> %cttz @@ -580,7 +580,7 @@ define <32 x i8> @var_cttz_v32i8u(<32 x i8> %a) { ; CHECK: 'Cost Model Analysis' for function 'var_cttz_v32i8u': ; SSE2: Found an estimated cost of 26 for instruction: %cttz ; SSE42: Found an estimated cost of 18 for instruction: %cttz -; AVX1: Found an estimated cost of 18 for instruction: %cttz +; AVX1: Found an estimated cost of 20 for instruction: %cttz ; AVX2: Found an estimated cost of 9 for instruction: %cttz %cttz = call <32 x i8> @llvm.cttz.v32i8(<32 x i8> %a, i1 1) ret <32 x i8> %cttz