From: Simon Pilgrim <llvm-dev@redking.me.uk>
Date: Sat, 6 Jul 2019 18:46:09 +0000 (+0000)
Subject: [X86] SimplifyDemandedVectorEltsForTargetNode - fix shadow variable warning. NFCI.
X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=8cab40f23fd66a51bf044afbfddb0f235bda62a2;p=llvm

[X86] SimplifyDemandedVectorEltsForTargetNode - fix shadow variable warning. NFCI.

Fixes cppcheck warning.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365271 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp
index 475731fc057..d9eecaea7df 100644
--- a/lib/Target/X86/X86ISelLowering.cpp
+++ b/lib/Target/X86/X86ISelLowering.cpp
@@ -33908,9 +33908,9 @@ bool X86TargetLowering::SimplifyDemandedVectorEltsForTargetNode(
     // If we reuse the shift amount just for sse shift amounts then we know that
     // only the bottom 64-bits are only ever used.
     bool AssumeSingleUse = llvm::all_of(Amt->uses(), [&Amt](SDNode *Use) {
-      unsigned Opc = Use->getOpcode();
-      return (Opc == X86ISD::VSHL || Opc == X86ISD::VSRL ||
-              Opc == X86ISD::VSRA) &&
+      unsigned UseOpc = Use->getOpcode();
+      return (UseOpc == X86ISD::VSHL || UseOpc == X86ISD::VSRL ||
+              UseOpc == X86ISD::VSRA) &&
              Use->getOperand(0) != Amt;
     });