From: Tim Renouf <tim.renouf@amd.com>
Date: Mon, 11 Sep 2017 08:31:32 +0000 (+0000)
Subject: AMDGPU: trivial comment change
X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=8b9e95cb8776ec45eb3f2b26c9766a90b320475b;p=llvm

AMDGPU: trivial comment change

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312900 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp b/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
index b372082868b..029943519c0 100644
--- a/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
+++ b/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
@@ -253,7 +253,7 @@ bool SIMachineFunctionInfo::allocateSGPRSpillToVGPR(MachineFunction &MF,
     if (VGPRIndex == 0) {
       LaneVGPR = TRI->findUnusedRegister(MRI, &AMDGPU::VGPR_32RegClass, MF);
       if (LaneVGPR == AMDGPU::NoRegister) {
-        // We have no VGPRs left for spilling SGPRs. Reset because we won't
+        // We have no VGPRs left for spilling SGPRs. Reset because we will not
         // partially spill the SGPR to VGPRs.
         SGPRToVGPRSpills.erase(FI);
         NumVGPRSpillLanes -= I;