From: Michael J. Spencer Date: Fri, 15 Apr 2011 15:07:13 +0000 (+0000) Subject: Add 3DNow! Intrinsics. X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=8b36a9ee7fe7204b30a85b95b11850aeb4b63ee3;p=clang Add 3DNow! Intrinsics. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@129570 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/include/clang/Basic/BuiltinsX86.def b/include/clang/Basic/BuiltinsX86.def index 1584498888..ce376dd3d7 100644 --- a/include/clang/Basic/BuiltinsX86.def +++ b/include/clang/Basic/BuiltinsX86.def @@ -24,6 +24,37 @@ // FIXME: Are these nothrow/const? +// 3DNow! +// +BUILTIN(__builtin_ia32_pavgusb, "V8cV8cV8c", "nc") +BUILTIN(__builtin_ia32_pf2id, "V2iV2f", "nc") +BUILTIN(__builtin_ia32_pfacc, "V2fV2fV2f", "nc") +BUILTIN(__builtin_ia32_pfadd, "V2fV2fV2f", "nc") +BUILTIN(__builtin_ia32_pfcmpeq, "V2iV2fV2f", "nc") +BUILTIN(__builtin_ia32_pfcmpge, "V2iV2fV2f", "nc") +BUILTIN(__builtin_ia32_pfcmpgt, "V2iV2fV2f", "nc") +BUILTIN(__builtin_ia32_pfmax, "V2fV2fV2f", "nc") +BUILTIN(__builtin_ia32_pfmin, "V2fV2fV2f", "nc") +BUILTIN(__builtin_ia32_pfmul, "V2fV2fV2f", "nc") +BUILTIN(__builtin_ia32_pfrcp, "V2fV2f", "nc") +BUILTIN(__builtin_ia32_pfrcpit1, "V2fV2fV2f", "nc") +BUILTIN(__builtin_ia32_pfrcpit2, "V2fV2fV2f", "nc") +BUILTIN(__builtin_ia32_pfrsqrt, "V2fV2f", "nc") +BUILTIN(__builtin_ia32_pfrsqit1, "V2fV2fV2f", "nc") +// GCC has pfrsqrtit1, even though this is not the name of the instruction. +BUILTIN(__builtin_ia32_pfrsqrtit1, "V2fV2fV2f", "nc") +BUILTIN(__builtin_ia32_pfsub, "V2fV2fV2f", "nc") +BUILTIN(__builtin_ia32_pfsubr, "V2fV2fV2f", "nc") +BUILTIN(__builtin_ia32_pi2fd, "V2fV2i", "nc") +BUILTIN(__builtin_ia32_pmulhrw, "V4sV4sV4s", "nc") +// 3DNow! Extensions. +BUILTIN(__builtin_ia32_pf2iw, "V2iV2f", "nc") +BUILTIN(__builtin_ia32_pfnacc, "V2fV2fV2f", "nc") +BUILTIN(__builtin_ia32_pfpnacc, "V2fV2fV2f", "nc") +BUILTIN(__builtin_ia32_pi2fw, "V2fV2i", "nc") +BUILTIN(__builtin_ia32_pswapdsf, "V2fV2f", "nc") +BUILTIN(__builtin_ia32_pswapdsi, "V2iV2i", "nc") + // MMX // // FIXME: All MMX instructions will be generated via builtins. Any MMX vector diff --git a/lib/CodeGen/CGBuiltin.cpp b/lib/CodeGen/CGBuiltin.cpp index 72a8ef8a5d..97b93d5030 100644 --- a/lib/CodeGen/CGBuiltin.cpp +++ b/lib/CodeGen/CGBuiltin.cpp @@ -2103,6 +2103,138 @@ Value *CodeGenFunction::EmitX86BuiltinExpr(unsigned BuiltinID, LI->setAlignment(1); // Unaligned load. return Builder.CreateBitCast(LI, VecTy, "loadu.cast"); } + // 3DNow! + case X86::BI__builtin_ia32_pavgusb: + case X86::BI__builtin_ia32_pf2id: + case X86::BI__builtin_ia32_pfacc: + case X86::BI__builtin_ia32_pfadd: + case X86::BI__builtin_ia32_pfcmpeq: + case X86::BI__builtin_ia32_pfcmpge: + case X86::BI__builtin_ia32_pfcmpgt: + case X86::BI__builtin_ia32_pfmax: + case X86::BI__builtin_ia32_pfmin: + case X86::BI__builtin_ia32_pfmul: + case X86::BI__builtin_ia32_pfrcp: + case X86::BI__builtin_ia32_pfrcpit1: + case X86::BI__builtin_ia32_pfrcpit2: + case X86::BI__builtin_ia32_pfrsqrt: + case X86::BI__builtin_ia32_pfrsqit1: + case X86::BI__builtin_ia32_pfrsqrtit1: + case X86::BI__builtin_ia32_pfsub: + case X86::BI__builtin_ia32_pfsubr: + case X86::BI__builtin_ia32_pi2fd: + case X86::BI__builtin_ia32_pmulhrw: + case X86::BI__builtin_ia32_pf2iw: + case X86::BI__builtin_ia32_pfnacc: + case X86::BI__builtin_ia32_pfpnacc: + case X86::BI__builtin_ia32_pi2fw: + case X86::BI__builtin_ia32_pswapdsf: + case X86::BI__builtin_ia32_pswapdsi: { + const char *name = 0; + Intrinsic::ID ID = Intrinsic::not_intrinsic; + switch(BuiltinID) { + case X86::BI__builtin_ia32_pavgusb: + name = "pavgusb"; + ID = Intrinsic::x86_3dnow_pavgusb; + break; + case X86::BI__builtin_ia32_pf2id: + name = "pf2id"; + ID = Intrinsic::x86_3dnow_pf2id; + break; + case X86::BI__builtin_ia32_pfacc: + name = "pfacc"; + ID = Intrinsic::x86_3dnow_pfacc; + break; + case X86::BI__builtin_ia32_pfadd: + name = "pfadd"; + ID = Intrinsic::x86_3dnow_pfadd; + break; + case X86::BI__builtin_ia32_pfcmpeq: + name = "pfcmpeq"; + ID = Intrinsic::x86_3dnow_pfcmpeq; + break; + case X86::BI__builtin_ia32_pfcmpge: + name = "pfcmpge"; + ID = Intrinsic::x86_3dnow_pfcmpge; + break; + case X86::BI__builtin_ia32_pfcmpgt: + name = "pfcmpgt"; + ID = Intrinsic::x86_3dnow_pfcmpgt; + break; + case X86::BI__builtin_ia32_pfmax: + name = "pfmax"; + ID = Intrinsic::x86_3dnow_pfmax; + break; + case X86::BI__builtin_ia32_pfmin: + name = "pfmin"; + ID = Intrinsic::x86_3dnow_pfmin; + break; + case X86::BI__builtin_ia32_pfmul: + name = "pfmul"; + ID = Intrinsic::x86_3dnow_pfmul; + break; + case X86::BI__builtin_ia32_pfrcp: + name = "pfrcp"; + ID = Intrinsic::x86_3dnow_pfrcp; + break; + case X86::BI__builtin_ia32_pfrcpit1: + name = "pfrcpit1"; + ID = Intrinsic::x86_3dnow_pfrcpit1; + break; + case X86::BI__builtin_ia32_pfrcpit2: + name = "pfrcpit2"; + ID = Intrinsic::x86_3dnow_pfrcpit2; + break; + case X86::BI__builtin_ia32_pfrsqrt: + name = "pfrsqrt"; + ID = Intrinsic::x86_3dnow_pfrsqrt; + break; + case X86::BI__builtin_ia32_pfrsqit1: + case X86::BI__builtin_ia32_pfrsqrtit1: + name = "pfrsqit1"; + ID = Intrinsic::x86_3dnow_pfrsqit1; + break; + case X86::BI__builtin_ia32_pfsub: + name = "pfsub"; + ID = Intrinsic::x86_3dnow_pfsub; + break; + case X86::BI__builtin_ia32_pfsubr: + name = "pfsubr"; + ID = Intrinsic::x86_3dnow_pfsubr; + break; + case X86::BI__builtin_ia32_pi2fd: + name = "pi2fd"; + ID = Intrinsic::x86_3dnow_pi2fd; + break; + case X86::BI__builtin_ia32_pmulhrw: + name = "pmulhrw"; + ID = Intrinsic::x86_3dnow_pmulhrw; + break; + case X86::BI__builtin_ia32_pf2iw: + name = "pf2iw"; + ID = Intrinsic::x86_3dnowa_pf2iw; + break; + case X86::BI__builtin_ia32_pfnacc: + name = "pfnacc"; + ID = Intrinsic::x86_3dnowa_pfnacc; + break; + case X86::BI__builtin_ia32_pfpnacc: + name = "pfpnacc"; + ID = Intrinsic::x86_3dnowa_pfpnacc; + break; + case X86::BI__builtin_ia32_pi2fw: + name = "pi2fw"; + ID = Intrinsic::x86_3dnowa_pi2fw; + break; + case X86::BI__builtin_ia32_pswapdsf: + case X86::BI__builtin_ia32_pswapdsi: + name = "pswapd"; + ID = Intrinsic::x86_3dnowa_pswapd; + break; + } + llvm::Function *F = CGM.getIntrinsic(ID); + return Builder.CreateCall(F, &Ops[0], &Ops[0] + Ops.size(), name); + } } } diff --git a/test/CodeGen/builtins-x86.c b/test/CodeGen/builtins-x86.c index 6813996c18..bb63048b61 100644 --- a/test/CodeGen/builtins-x86.c +++ b/test/CodeGen/builtins-x86.c @@ -479,4 +479,33 @@ void f0() { __builtin_ia32_maskstoreps(tmp_V4fp, tmp_V4f, tmp_V4f); __builtin_ia32_maskstorepd256(tmp_V4dp, tmp_V4d, tmp_V4d); __builtin_ia32_maskstoreps256(tmp_V8fp, tmp_V8f, tmp_V8f); + +#ifdef USE_3DNOW + tmp_V8c = __builtin_ia32_pavgusb(tmp_V8c, tmp_V8c); + tmp_V2i = __builtin_ia32_pf2id(tmp_V2f); + tmp_V2f = __builtin_ia32_pfacc(tmp_V2f, tmp_V2f); + tmp_V2f = __builtin_ia32_pfadd(tmp_V2f, tmp_V2f); + tmp_V2i = __builtin_ia32_pfcmpeq(tmp_V2f, tmp_V2f); + tmp_V2i = __builtin_ia32_pfcmpge(tmp_V2f, tmp_V2f); + tmp_V2i = __builtin_ia32_pfcmpgt(tmp_V2f, tmp_V2f); + tmp_V2f = __builtin_ia32_pfmax(tmp_V2f, tmp_V2f); + tmp_V2f = __builtin_ia32_pfmin(tmp_V2f, tmp_V2f); + tmp_V2f = __builtin_ia32_pfmul(tmp_V2f, tmp_V2f); + tmp_V2f = __builtin_ia32_pfrcp(tmp_V2f); + tmp_V2f = __builtin_ia32_pfrcpit1(tmp_V2f, tmp_V2f); + tmp_V2f = __builtin_ia32_pfrcpit2(tmp_V2f, tmp_V2f); + tmp_V2f = __builtin_ia32_pfrsqrt(tmp_V2f); + tmp_V2f = __builtin_ia32_pfrsqit1(tmp_V2f, tmp_V2f); + tmp_V2f = __builtin_ia32_pfrsqrtit1(tmp_V2f, tmp_V2f); + tmp_V2f = __builtin_ia32_pfsub(tmp_V2f, tmp_V2f); + tmp_V2f = __builtin_ia32_pfsubr(tmp_V2f, tmp_V2f); + tmp_V2f = __builtin_ia32_pi2fd(tmp_V2i); + tmp_V4s = __builtin_ia32_pmulhrw(tmp_V4s, tmp_V4s); + tmp_V2i = __builtin_ia32_pf2iw(tmp_V2f); + tmp_V2f = __builtin_ia32_pfnacc(tmp_V2f, tmp_V2f); + tmp_V2f = __builtin_ia32_pfpnacc(tmp_V2f, tmp_V2f); + tmp_V2f = __builtin_ia32_pi2fw(tmp_V2i); + tmp_V2f = __builtin_ia32_pswapdsf(tmp_V2f); + tmp_V2i = __builtin_ia32_pswapdsi(tmp_V2i); +#endif }