From: Matt Arsenault Date: Mon, 21 Nov 2016 22:56:42 +0000 (+0000) Subject: DAG: Ignore call site attributes when emitting target intrinsic X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=8b1782955d287f41f866ae9bd0e59cfb7de7c594;p=llvm DAG: Ignore call site attributes when emitting target intrinsic A target intrinsic may be defined as possibly reading memory, but the call site may have additional knowledge that it doesn't read memory. The intrinsic lowering will expect the pessimistic assumption of the intrinsic definition, so the chain should still be used. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287593 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp index 4bb3cd2055e..4594f92317c 100644 --- a/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp +++ b/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp @@ -4061,8 +4061,12 @@ void SelectionDAGBuilder::visitAtomicStore(const StoreInst &I) { /// node. void SelectionDAGBuilder::visitTargetIntrinsic(const CallInst &I, unsigned Intrinsic) { - bool HasChain = !I.doesNotAccessMemory(); - bool OnlyLoad = HasChain && I.onlyReadsMemory(); + // Ignore the callsite's attributes. A specific call site may be marked with + // readnone, but the lowering code will expect the chain based on the + // definition. + const Function *F = I.getCalledFunction(); + bool HasChain = !F->doesNotAccessMemory(); + bool OnlyLoad = HasChain && F->onlyReadsMemory(); // Build the operand list. SmallVector Ops; diff --git a/test/CodeGen/AMDGPU/llvm.amdgcn.s.getreg.ll b/test/CodeGen/AMDGPU/llvm.amdgcn.s.getreg.ll index 251eec656ed..4304398182a 100644 --- a/test/CodeGen/AMDGPU/llvm.amdgcn.s.getreg.ll +++ b/test/CodeGen/AMDGPU/llvm.amdgcn.s.getreg.ll @@ -1,11 +1,21 @@ -; RUN: llc -march=amdgcn -mcpu=tahiti -verify-machineinstrs < %s | FileCheck %s -; RUN: llc -mtriple=amdgcn--amdhsa -mcpu=kaveri -verify-machineinstrs < %s | FileCheck %s -; RUN: llc -mtriple=amdgcn--amdhsa -mcpu=fiji -verify-machineinstrs < %s | FileCheck %s +; RUN: llc -march=amdgcn -mcpu=tahiti -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s +; RUN: llc -mtriple=amdgcn--amdhsa -mcpu=kaveri -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s +; RUN: llc -mtriple=amdgcn--amdhsa -mcpu=fiji -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s -; FUNC-LABEL: {{^}}s_getreg_test: -; CHECK: s_getreg_b32 s{{[0-9]+}}, hwreg(HW_REG_LDS_ALLOC, 8, 23) +; GCN-LABEL: {{^}}s_getreg_test: +; GCN: s_getreg_b32 s{{[0-9]+}}, hwreg(HW_REG_LDS_ALLOC, 8, 23) define void @s_getreg_test(i32 addrspace(1)* %out) { ; simm16=45574 for lds size. - %lds_size_64dwords = call i32 @llvm.amdgcn.s.getreg(i32 45574) #0 + %lds_size_64dwords = call i32 @llvm.amdgcn.s.getreg(i32 45574) + %lds_size_bytes = shl i32 %lds_size_64dwords, 8 + store i32 %lds_size_bytes, i32 addrspace(1)* %out + ret void +} + +; Call site has additional readnone knowledge. +; GCN-LABEL: {{^}}readnone_s_getreg_test: +; GCN: s_getreg_b32 s{{[0-9]+}}, hwreg(HW_REG_LDS_ALLOC, 8, 23) +define void @readnone_s_getreg_test(i32 addrspace(1)* %out) { ; simm16=45574 for lds size. + %lds_size_64dwords = call i32 @llvm.amdgcn.s.getreg(i32 45574) #1 %lds_size_bytes = shl i32 %lds_size_64dwords, 8 store i32 %lds_size_bytes, i32 addrspace(1)* %out ret void @@ -13,4 +23,5 @@ define void @s_getreg_test(i32 addrspace(1)* %out) { ; simm16=45574 for lds size declare i32 @llvm.amdgcn.s.getreg(i32) #0 -attributes #0 = { nounwind readonly} +attributes #0 = { nounwind readonly } +attributes #1 = { nounwind readnone }