From: Craig Topper Date: Wed, 9 Nov 2016 05:31:53 +0000 (+0000) Subject: [AVX-512] Add test cases to demonstrate PR30947. We accidentally use 32 byte aligned... X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=89f0495611df29d8468d78d489d89b36ab3d5448;p=llvm [AVX-512] Add test cases to demonstrate PR30947. We accidentally use 32 byte aligned store instructions when the original store was only 16 byte aligned if the store is from the lower bits of a subvector extract. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286341 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/test/CodeGen/X86/avx512-extract-subvector.ll b/test/CodeGen/X86/avx512-extract-subvector.ll index 21419bd0296..61f8299983f 100644 --- a/test/CodeGen/X86/avx512-extract-subvector.ll +++ b/test/CodeGen/X86/avx512-extract-subvector.ll @@ -285,6 +285,30 @@ entry: ret void } +define void @extract_subvector512_v4f64_store_lo_align_16(double* nocapture %addr, <8 x double> %a) nounwind uwtable ssp { +; SKX-LABEL: extract_subvector512_v4f64_store_lo_align_16: +; SKX: ## BB#0: ## %entry +; SKX-NEXT: vmovaps %ymm0, (%rdi) +; SKX-NEXT: retq +entry: + %0 = shufflevector <8 x double> %a, <8 x double> undef, <4 x i32> + %1 = bitcast double* %addr to <4 x double>* + store <4 x double> %0, <4 x double>* %1, align 16 + ret void +} + +define void @extract_subvector512_v4f64_store_lo_align_32(double* nocapture %addr, <8 x double> %a) nounwind uwtable ssp { +; SKX-LABEL: extract_subvector512_v4f64_store_lo_align_32: +; SKX: ## BB#0: ## %entry +; SKX-NEXT: vmovaps %ymm0, (%rdi) +; SKX-NEXT: retq +entry: + %0 = shufflevector <8 x double> %a, <8 x double> undef, <4 x i32> + %1 = bitcast double* %addr to <4 x double>* + store <4 x double> %0, <4 x double>* %1, align 32 + ret void +} + define void @extract_subvector512_v8f32_store_lo(float* nocapture %addr, <16 x float> %a) nounwind uwtable ssp { ; SKX-LABEL: extract_subvector512_v8f32_store_lo: ; SKX: ## BB#0: ## %entry @@ -297,6 +321,30 @@ entry: ret void } +define void @extract_subvector512_v8f32_store_lo_align_16(float* nocapture %addr, <16 x float> %a) nounwind uwtable ssp { +; SKX-LABEL: extract_subvector512_v8f32_store_lo_align_16: +; SKX: ## BB#0: ## %entry +; SKX-NEXT: vmovaps %ymm0, (%rdi) +; SKX-NEXT: retq +entry: + %0 = shufflevector <16 x float> %a, <16 x float> undef, <8 x i32> + %1 = bitcast float* %addr to <8 x float>* + store <8 x float> %0, <8 x float>* %1, align 16 + ret void +} + +define void @extract_subvector512_v8f32_store_lo_align_32(float* nocapture %addr, <16 x float> %a) nounwind uwtable ssp { +; SKX-LABEL: extract_subvector512_v8f32_store_lo_align_32: +; SKX: ## BB#0: ## %entry +; SKX-NEXT: vmovaps %ymm0, (%rdi) +; SKX-NEXT: retq +entry: + %0 = shufflevector <16 x float> %a, <16 x float> undef, <8 x i32> + %1 = bitcast float* %addr to <8 x float>* + store <8 x float> %0, <8 x float>* %1, align 32 + ret void +} + define void @extract_subvector512_v4i64_store_lo(i64* nocapture %addr, <8 x i64> %a) nounwind uwtable ssp { ; SKX-LABEL: extract_subvector512_v4i64_store_lo: ; SKX: ## BB#0: ## %entry @@ -309,6 +357,30 @@ entry: ret void } +define void @extract_subvector512_v4i64_store_lo_align_16(i64* nocapture %addr, <8 x i64> %a) nounwind uwtable ssp { +; SKX-LABEL: extract_subvector512_v4i64_store_lo_align_16: +; SKX: ## BB#0: ## %entry +; SKX-NEXT: vmovaps %ymm0, (%rdi) +; SKX-NEXT: retq +entry: + %0 = shufflevector <8 x i64> %a, <8 x i64> undef, <4 x i32> + %1 = bitcast i64* %addr to <4 x i64>* + store <4 x i64> %0, <4 x i64>* %1, align 16 + ret void +} + +define void @extract_subvector512_v4i64_store_lo_align_32(i64* nocapture %addr, <8 x i64> %a) nounwind uwtable ssp { +; SKX-LABEL: extract_subvector512_v4i64_store_lo_align_32: +; SKX: ## BB#0: ## %entry +; SKX-NEXT: vmovaps %ymm0, (%rdi) +; SKX-NEXT: retq +entry: + %0 = shufflevector <8 x i64> %a, <8 x i64> undef, <4 x i32> + %1 = bitcast i64* %addr to <4 x i64>* + store <4 x i64> %0, <4 x i64>* %1, align 32 + ret void +} + define void @extract_subvector512_v8i32_store_lo(i32* nocapture %addr, <16 x i32> %a) nounwind uwtable ssp { ; SKX-LABEL: extract_subvector512_v8i32_store_lo: ; SKX: ## BB#0: ## %entry @@ -321,6 +393,30 @@ entry: ret void } +define void @extract_subvector512_v8i32_store_lo_align_16(i32* nocapture %addr, <16 x i32> %a) nounwind uwtable ssp { +; SKX-LABEL: extract_subvector512_v8i32_store_lo_align_16: +; SKX: ## BB#0: ## %entry +; SKX-NEXT: vmovaps %ymm0, (%rdi) +; SKX-NEXT: retq +entry: + %0 = shufflevector <16 x i32> %a, <16 x i32> undef, <8 x i32> + %1 = bitcast i32* %addr to <8 x i32>* + store <8 x i32> %0, <8 x i32>* %1, align 16 + ret void +} + +define void @extract_subvector512_v8i32_store_lo_align_32(i32* nocapture %addr, <16 x i32> %a) nounwind uwtable ssp { +; SKX-LABEL: extract_subvector512_v8i32_store_lo_align_32: +; SKX: ## BB#0: ## %entry +; SKX-NEXT: vmovaps %ymm0, (%rdi) +; SKX-NEXT: retq +entry: + %0 = shufflevector <16 x i32> %a, <16 x i32> undef, <8 x i32> + %1 = bitcast i32* %addr to <8 x i32>* + store <8 x i32> %0, <8 x i32>* %1, align 32 + ret void +} + define void @extract_subvector512_v16i16_store_lo(i16* nocapture %addr, <32 x i16> %a) nounwind uwtable ssp { ; SKX-LABEL: extract_subvector512_v16i16_store_lo: ; SKX: ## BB#0: ## %entry @@ -333,6 +429,30 @@ entry: ret void } +define void @extract_subvector512_v16i16_store_lo_align_16(i16* nocapture %addr, <32 x i16> %a) nounwind uwtable ssp { +; SKX-LABEL: extract_subvector512_v16i16_store_lo_align_16: +; SKX: ## BB#0: ## %entry +; SKX-NEXT: vmovaps %ymm0, (%rdi) +; SKX-NEXT: retq +entry: + %0 = shufflevector <32 x i16> %a, <32 x i16> undef, <16 x i32> + %1 = bitcast i16* %addr to <16 x i16>* + store <16 x i16> %0, <16 x i16>* %1, align 16 + ret void +} + +define void @extract_subvector512_v16i16_store_lo_align_32(i16* nocapture %addr, <32 x i16> %a) nounwind uwtable ssp { +; SKX-LABEL: extract_subvector512_v16i16_store_lo_align_32: +; SKX: ## BB#0: ## %entry +; SKX-NEXT: vmovaps %ymm0, (%rdi) +; SKX-NEXT: retq +entry: + %0 = shufflevector <32 x i16> %a, <32 x i16> undef, <16 x i32> + %1 = bitcast i16* %addr to <16 x i16>* + store <16 x i16> %0, <16 x i16>* %1, align 32 + ret void +} + define void @extract_subvector512_v32i8_store_lo(i8* nocapture %addr, <64 x i8> %a) nounwind uwtable ssp { ; SKX-LABEL: extract_subvector512_v32i8_store_lo: ; SKX: ## BB#0: ## %entry @@ -345,6 +465,30 @@ entry: ret void } +define void @extract_subvector512_v32i8_store_lo_align_16(i8* nocapture %addr, <64 x i8> %a) nounwind uwtable ssp { +; SKX-LABEL: extract_subvector512_v32i8_store_lo_align_16: +; SKX: ## BB#0: ## %entry +; SKX-NEXT: vmovaps %ymm0, (%rdi) +; SKX-NEXT: retq +entry: + %0 = shufflevector <64 x i8> %a, <64 x i8> undef, <32 x i32> + %1 = bitcast i8* %addr to <32 x i8>* + store <32 x i8> %0, <32 x i8>* %1, align 16 + ret void +} + +define void @extract_subvector512_v32i8_store_lo_align_32(i8* nocapture %addr, <64 x i8> %a) nounwind uwtable ssp { +; SKX-LABEL: extract_subvector512_v32i8_store_lo_align_32: +; SKX: ## BB#0: ## %entry +; SKX-NEXT: vmovaps %ymm0, (%rdi) +; SKX-NEXT: retq +entry: + %0 = shufflevector <64 x i8> %a, <64 x i8> undef, <32 x i32> + %1 = bitcast i8* %addr to <32 x i8>* + store <32 x i8> %0, <32 x i8>* %1, align 32 + ret void +} + define <4 x double> @test_mm512_mask_extractf64x4_pd(<4 x double> %__W, i8 %__U, <8 x double> %__A) { ; SKX-LABEL: test_mm512_mask_extractf64x4_pd: ; SKX: ## BB#0: ## %entry