From: Matt Arsenault <Matthew.Arsenault@amd.com>
Date: Mon, 16 Sep 2019 00:33:00 +0000 (+0000)
Subject: AMDGPU/GlobalISel: Set type on vgpr live in special arguments
X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=8917673a2f78325f71ee6818f29b7d4fabe6cd09;p=llvm

AMDGPU/GlobalISel: Set type on vgpr live in special arguments

Fixes assertion with workitem ID intrinsics used in non-kernel
functions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371951 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/Target/AMDGPU/SIISelLowering.cpp b/lib/Target/AMDGPU/SIISelLowering.cpp
index 73aa5cd0666..6607b1a4c66 100644
--- a/lib/Target/AMDGPU/SIISelLowering.cpp
+++ b/lib/Target/AMDGPU/SIISelLowering.cpp
@@ -1671,7 +1671,8 @@ static ArgDescriptor allocateVGPR32Input(CCState &CCInfo, unsigned Mask = ~0u,
   assert(Reg != AMDGPU::NoRegister);
 
   MachineFunction &MF = CCInfo.getMachineFunction();
-  MF.addLiveIn(Reg, &AMDGPU::VGPR_32RegClass);
+  Register LiveInVReg = MF.addLiveIn(Reg, &AMDGPU::VGPR_32RegClass);
+  MF.getRegInfo().setType(LiveInVReg, LLT::scalar(32));
   return ArgDescriptor::createRegister(Reg, Mask);
 }
 
diff --git a/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.workitem.id.ll b/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.workitem.id.ll
index 5d59c58afd1..fb5f881ad85 100644
--- a/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.workitem.id.ll
+++ b/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.workitem.id.ll
@@ -88,5 +88,32 @@ bb2:
   ret void
 }
 
+; ALL-LABEL: {{^}}test_workitem_id_x_func:
+; ALL: v_lshrrev_b32_e32 v2, 0, v2
+; ALL-NEXT: v_and_b32_e32 v2, 0x3ff, v2
+define void @test_workitem_id_x_func(i32 addrspace(1)* %out) #1 {
+  %id = call i32 @llvm.amdgcn.workitem.id.x()
+  store i32 %id, i32 addrspace(1)* %out
+  ret void
+}
+
+; ALL-LABEL: {{^}}test_workitem_id_y_func:
+; ALL: v_lshrrev_b32_e32 v2, 10, v2
+; ALL-NEXT: v_and_b32_e32 v2, 0x3ff, v2
+define void @test_workitem_id_y_func(i32 addrspace(1)* %out) #1 {
+  %id = call i32 @llvm.amdgcn.workitem.id.y()
+  store i32 %id, i32 addrspace(1)* %out
+  ret void
+}
+
+; ALL-LABEL: {{^}}test_workitem_id_z_func:
+; ALL: v_lshrrev_b32_e32 v2, 20, v2
+; ALL-NEXT: v_and_b32_e32 v2, 0x3ff, v2
+define void @test_workitem_id_z_func(i32 addrspace(1)* %out) #1 {
+  %id = call i32 @llvm.amdgcn.workitem.id.z()
+  store i32 %id, i32 addrspace(1)* %out
+  ret void
+}
+
 attributes #0 = { nounwind readnone }
 attributes #1 = { nounwind }