From: Serge Guelton <sguelton@quarkslab.com>
Date: Thu, 30 Nov 2017 11:06:22 +0000 (+0000)
Subject: Support generic lowering of vector bswap
X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=86e196b704afc668bc375d869890ec1775542da6;p=llvm

Support generic lowering of vector bswap


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319419 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/CodeGen/IntrinsicLowering.cpp b/lib/CodeGen/IntrinsicLowering.cpp
index c6cc909e25d..65d9592e506 100644
--- a/lib/CodeGen/IntrinsicLowering.cpp
+++ b/lib/CodeGen/IntrinsicLowering.cpp
@@ -164,9 +164,9 @@ void IntrinsicLowering::AddPrototypes(Module &M) {
 /// LowerBSWAP - Emit the code to lower bswap of V before the specified
 /// instruction IP.
 static Value *LowerBSWAP(LLVMContext &Context, Value *V, Instruction *IP) {
-  assert(V->getType()->isIntegerTy() && "Can't bswap a non-integer type!");
+  assert(V->getType()->isIntOrIntVectorTy() && "Can't bswap a non-integer type!");
 
-  unsigned BitSize = V->getType()->getPrimitiveSizeInBits();
+  unsigned BitSize = V->getType()->getScalarSizeInBits();
 
   IRBuilder<> Builder(IP);
 
@@ -190,10 +190,10 @@ static Value *LowerBSWAP(LLVMContext &Context, Value *V, Instruction *IP) {
     Value *Tmp1 = Builder.CreateLShr(V,ConstantInt::get(V->getType(), 24),
                                      "bswap.1");
     Tmp3 = Builder.CreateAnd(Tmp3,
-                         ConstantInt::get(Type::getInt32Ty(Context), 0xFF0000),
+                         ConstantInt::get(V->getType(), 0xFF0000),
                              "bswap.and3");
     Tmp2 = Builder.CreateAnd(Tmp2,
-                           ConstantInt::get(Type::getInt32Ty(Context), 0xFF00),
+                           ConstantInt::get(V->getType(), 0xFF00),
                              "bswap.and2");
     Tmp4 = Builder.CreateOr(Tmp4, Tmp3, "bswap.or1");
     Tmp2 = Builder.CreateOr(Tmp2, Tmp1, "bswap.or2");
@@ -221,27 +221,27 @@ static Value *LowerBSWAP(LLVMContext &Context, Value *V, Instruction *IP) {
                                      ConstantInt::get(V->getType(), 56),
                                      "bswap.1");
     Tmp7 = Builder.CreateAnd(Tmp7,
-                             ConstantInt::get(Type::getInt64Ty(Context),
+                             ConstantInt::get(V->getType(),
                                               0xFF000000000000ULL),
                              "bswap.and7");
     Tmp6 = Builder.CreateAnd(Tmp6,
-                             ConstantInt::get(Type::getInt64Ty(Context),
+                             ConstantInt::get(V->getType(),
                                               0xFF0000000000ULL),
                              "bswap.and6");
     Tmp5 = Builder.CreateAnd(Tmp5,
-                        ConstantInt::get(Type::getInt64Ty(Context),
+                        ConstantInt::get(V->getType(),
                              0xFF00000000ULL),
                              "bswap.and5");
     Tmp4 = Builder.CreateAnd(Tmp4,
-                        ConstantInt::get(Type::getInt64Ty(Context),
+                        ConstantInt::get(V->getType(),
                              0xFF000000ULL),
                              "bswap.and4");
     Tmp3 = Builder.CreateAnd(Tmp3,
-                             ConstantInt::get(Type::getInt64Ty(Context),
+                             ConstantInt::get(V->getType(),
                              0xFF0000ULL),
                              "bswap.and3");
     Tmp2 = Builder.CreateAnd(Tmp2,
-                             ConstantInt::get(Type::getInt64Ty(Context),
+                             ConstantInt::get(V->getType(),
                              0xFF00ULL),
                              "bswap.and2");
     Tmp8 = Builder.CreateOr(Tmp8, Tmp7, "bswap.or1");
diff --git a/test/CodeGen/Generic/bswap.ll b/test/CodeGen/Generic/bswap.ll
new file mode 100644
index 00000000000..bd4f02be2b1
--- /dev/null
+++ b/test/CodeGen/Generic/bswap.ll
@@ -0,0 +1,50 @@
+; tests lowering of vector bswap
+; RUN: lli -force-interpreter %s | FileCheck %s
+
+; CHECK: 0x100
+; CHECK: 0x10000
+; CHECK: 0x1001000000000000
+; CHECK: 0x100
+; CHECK: 0x10000
+; CHECK: 0x1001000000000000
+
+
+
+target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
+
+declare i16 @llvm.bswap.i16(i16);
+declare i32 @llvm.bswap.i32(i32);
+declare i64 @llvm.bswap.i64(i64);
+declare <4 x i16> @llvm.bswap.v4i16(<4 x i16>);
+declare <4 x i32> @llvm.bswap.v4i32(<4 x i32>);
+declare <4 x i64> @llvm.bswap.v4i64(<4 x i64>);
+declare i32 @printf(i8* nocapture readonly, ...);
+
+@.str = private unnamed_addr constant [5 x i8] c"%#x\0A\00", align 1
+@.strs = private unnamed_addr constant [6 x i8] c"%#hx\0A\00", align 1
+@.strl = private unnamed_addr constant [6 x i8] c"%#lx\0A\00", align 1
+
+define i32 @main() local_unnamed_addr {
+  %ra = tail call i16 @llvm.bswap.i16(i16 1)
+  %pa = tail call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.strs, i64 0, i64 0), i16 %ra)
+
+  %rb = tail call i32 @llvm.bswap.i32(i32 256)
+  %pb = tail call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 %rb)
+
+  %rc = tail call i64 @llvm.bswap.i64(i64 272)
+  %pc = tail call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.strl, i64 0, i64 0), i64 %rc)
+
+  %r0 = tail call <4 x i16> @llvm.bswap.v4i16(<4 x i16> <i16 1, i16 1, i16 1, i16 1>)
+  %e0 = extractelement <4 x i16> %r0, i8 0
+  %p0 = tail call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.strs, i64 0, i64 0), i16 %e0)
+
+  %r1 = tail call <4 x i32> @llvm.bswap.v4i32(<4 x i32> <i32 256, i32 256, i32 256, i32 256>)
+  %e1 = extractelement <4 x i32> %r1, i8 1
+  %p1 = tail call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 %e1)
+
+  %r2 = tail call <4 x i64> @llvm.bswap.v4i64(<4 x i64> <i64 272, i64 272, i64 272, i64 272>)
+  %e2 = extractelement <4 x i64> %r2, i8 2
+  %p2 = tail call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.strl, i64 0, i64 0), i64 %e2)
+
+  ret i32 0
+}