From: Craig Topper Date: Fri, 13 Oct 2017 06:07:10 +0000 (+0000) Subject: [X86] Remove patterns that select unmasked vbroadcastf2x32/vbroadcasti2x32. Prefer... X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=84540f4d964154f29b577371550146c65bb1b888;p=llvm [X86] Remove patterns that select unmasked vbroadcastf2x32/vbroadcasti2x32. Prefer vbroadcastsd/vpbroadcastq instead. There's no advantage to using these instructions when they aren't masked. This enables some additional execution domain switching without needing to update the table. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315674 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/Target/X86/X86InstrAVX512.td b/lib/Target/X86/X86InstrAVX512.td index 499440ea48f..bfb91702c3a 100644 --- a/lib/Target/X86/X86InstrAVX512.td +++ b/lib/Target/X86/X86InstrAVX512.td @@ -1110,17 +1110,29 @@ multiclass avx512_broadcast_scalar opc, string OpcodeStr, multiclass avx512_broadcast_rm_split opc, string OpcodeStr, X86VectorVTInfo MaskInfo, X86VectorVTInfo DestInfo, - X86VectorVTInfo SrcInfo> { - let ExeDomain = DestInfo.ExeDomain in { - defm r : AVX512_maskable { + let ExeDomain = DestInfo.ExeDomain, hasSideEffects = 0 in { + defm r : AVX512_maskable_split, T8PD, EVEX; - defm m : AVX512_maskable opc, string OpcodeStr, def : Pat<(MaskInfo.VT (bitconvert - (DestInfo.VT (X86VBroadcast + (DestInfo.VT (UnmaskedOp (SrcInfo.VT (scalar_to_vector (SrcInfo.ScalarLdFrag addr:$src))))))), (!cast(NAME#MaskInfo.ZSuffix#m) addr:$src)>; @@ -1486,11 +1498,11 @@ multiclass avx512_common_broadcast_32x2 opc, string OpcodeStr, AVX512VLVectorVTInfo _Dst, AVX512VLVectorVTInfo _Src> { let Predicates = [HasDQI] in defm Z : avx512_broadcast_rm_split, + _Src.info512, _Src.info128, null_frag>, EVEX_V512; let Predicates = [HasDQI, HasVLX] in defm Z256 : avx512_broadcast_rm_split, + _Src.info256, _Src.info128, null_frag>, EVEX_V256; } @@ -1500,7 +1512,7 @@ multiclass avx512_common_broadcast_i32x2 opc, string OpcodeStr, let Predicates = [HasDQI, HasVLX] in defm Z128 : avx512_broadcast_rm_split, + _Src.info128, _Src.info128, null_frag>, EVEX_V128; } diff --git a/test/CodeGen/X86/avx512-shuffles/broadcast-vector-fp.ll b/test/CodeGen/X86/avx512-shuffles/broadcast-vector-fp.ll index f6229b1f8c6..35f6b2a127b 100644 --- a/test/CodeGen/X86/avx512-shuffles/broadcast-vector-fp.ll +++ b/test/CodeGen/X86/avx512-shuffles/broadcast-vector-fp.ll @@ -108,7 +108,7 @@ define <8 x float> @test_masked_z_2xfloat_to_8xfloat_mask3(<8 x float> %vec) { define <16 x float> @test_2xfloat_to_16xfloat(<16 x float> %vec) { ; CHECK-LABEL: test_2xfloat_to_16xfloat: ; CHECK: # BB#0: -; CHECK-NEXT: vbroadcastf32x2 {{.*#+}} zmm0 = xmm0[0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1] +; CHECK-NEXT: vbroadcastsd %xmm0, %zmm0 ; CHECK-NEXT: retq %res = shufflevector <16 x float> %vec, <16 x float> undef, <16 x i32> ret <16 x float> %res @@ -658,7 +658,7 @@ define <16 x float> @test_2xfloat_to_16xfloat_mem(<2 x float>* %vp) { ; CHECK-LABEL: test_2xfloat_to_16xfloat_mem: ; CHECK: # BB#0: ; CHECK-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero -; CHECK-NEXT: vbroadcastf32x2 {{.*#+}} zmm0 = xmm0[0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1] +; CHECK-NEXT: vbroadcastsd %xmm0, %zmm0 ; CHECK-NEXT: retq %vec = load <2 x float>, <2 x float>* %vp %res = shufflevector <2 x float> %vec, <2 x float> undef, <16 x i32> diff --git a/test/CodeGen/X86/avx512-shuffles/broadcast-vector-int.ll b/test/CodeGen/X86/avx512-shuffles/broadcast-vector-int.ll index 13cc877a8fd..f1e693ba0a1 100644 --- a/test/CodeGen/X86/avx512-shuffles/broadcast-vector-int.ll +++ b/test/CodeGen/X86/avx512-shuffles/broadcast-vector-int.ll @@ -110,7 +110,7 @@ define <4 x i32> @test_masked_z_2xi32_to_4xi32_mask3(<4 x i32> %vec) { define <8 x i32> @test_2xi32_to_8xi32(<8 x i32> %vec) { ; CHECK-LABEL: test_2xi32_to_8xi32: ; CHECK: # BB#0: -; CHECK-NEXT: vpbroadcastq %xmm0, %ymm0 +; CHECK-NEXT: vbroadcastsd %xmm0, %ymm0 ; CHECK-NEXT: retq %res = shufflevector <8 x i32> %vec, <8 x i32> undef, <8 x i32> ret <8 x i32> %res @@ -214,7 +214,7 @@ define <8 x i32> @test_masked_z_2xi32_to_8xi32_mask3(<8 x i32> %vec) { define <16 x i32> @test_2xi32_to_16xi32(<16 x i32> %vec) { ; CHECK-LABEL: test_2xi32_to_16xi32: ; CHECK: # BB#0: -; CHECK-NEXT: vbroadcasti32x2 {{.*#+}} zmm0 = xmm0[0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1] +; CHECK-NEXT: vbroadcastsd %xmm0, %zmm0 ; CHECK-NEXT: retq %res = shufflevector <16 x i32> %vec, <16 x i32> undef, <16 x i32> ret <16 x i32> %res diff --git a/test/CodeGen/X86/vector-shuffle-256-v8.ll b/test/CodeGen/X86/vector-shuffle-256-v8.ll index b6c996e8f38..b95e7cf008a 100644 --- a/test/CodeGen/X86/vector-shuffle-256-v8.ll +++ b/test/CodeGen/X86/vector-shuffle-256-v8.ll @@ -1120,17 +1120,11 @@ define <8 x i32> @shuffle_v8i32_08080808(<8 x i32> %a, <8 x i32> %b) { ; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0 ; AVX1-NEXT: retq ; -; AVX2-LABEL: shuffle_v8i32_08080808: -; AVX2: # BB#0: -; AVX2-NEXT: vunpcklps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] -; AVX2-NEXT: vbroadcastsd %xmm0, %ymm0 -; AVX2-NEXT: retq -; -; AVX512VL-LABEL: shuffle_v8i32_08080808: -; AVX512VL: # BB#0: -; AVX512VL-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] -; AVX512VL-NEXT: vpbroadcastq %xmm0, %ymm0 -; AVX512VL-NEXT: retq +; AVX2OR512VL-LABEL: shuffle_v8i32_08080808: +; AVX2OR512VL: # BB#0: +; AVX2OR512VL-NEXT: vunpcklps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] +; AVX2OR512VL-NEXT: vbroadcastsd %xmm0, %ymm0 +; AVX2OR512VL-NEXT: retq %shuffle = shufflevector <8 x i32> %a, <8 x i32> %b, <8 x i32> ret <8 x i32> %shuffle }