From: Craig Topper <craig.topper@intel.com>
Date: Mon, 14 May 2018 04:05:06 +0000 (+0000)
Subject: [X86] Use __builtin_convertvector to implement _mm512_cvtps_pd.
X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=81862986fc98ff7726081c0d77ee79e05d7c2215;p=clang

[X86] Use __builtin_convertvector to implement _mm512_cvtps_pd.

If we're using default rounding mode we can let __builtin_convertvector to generate an fpextend. This matches 128 and 256 bit.

If we're using the version that takes an explicit rounding mode argument we would need to look at the immediate to see if its CUR_DIRECTION.

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@332210 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/Headers/avx512fintrin.h b/lib/Headers/avx512fintrin.h
index 7592bc098c..01f764d886 100644
--- a/lib/Headers/avx512fintrin.h
+++ b/lib/Headers/avx512fintrin.h
@@ -9311,11 +9311,7 @@ _mm512_maskz_expand_epi32 (__mmask16 __U, __m512i __A)
 static __inline__ __m512d __DEFAULT_FN_ATTRS
 _mm512_cvtps_pd (__m256 __A)
 {
-  return (__m512d) __builtin_ia32_cvtps2pd512_mask ((__v8sf) __A,
-                (__v8df)
-                _mm512_undefined_pd (),
-                (__mmask8) -1,
-                _MM_FROUND_CUR_DIRECTION);
+  return (__m512d) __builtin_convertvector((__v8sf)__A, __v8df);
 }
 
 static __inline__ __m512d __DEFAULT_FN_ATTRS
diff --git a/test/CodeGen/avx512f-builtins.c b/test/CodeGen/avx512f-builtins.c
index c97a42f82f..3bef19211f 100644
--- a/test/CodeGen/avx512f-builtins.c
+++ b/test/CodeGen/avx512f-builtins.c
@@ -6630,14 +6630,14 @@ __m512d test_mm512_maskz_cvt_roundps_pd(__mmask8 __U, __m256 __A) {
 
 __m512d test_mm512_cvtps_pd(__m256 __A) {
   // CHECK-LABEL: @test_mm512_cvtps_pd
-  // CHECK: @llvm.x86.avx512.mask.cvtps2pd.512
+  // CHECK: fpext <8 x float> %{{.*}} to <8 x double>
   return _mm512_cvtps_pd(__A); 
 }
 
 __m512d test_mm512_cvtpslo_pd(__m512 __A) {
   // CHECK-LABEL: @test_mm512_cvtpslo_pd
   // CHECK: shufflevector <16 x float> %{{.*}}, <16 x float> %{{.*}}, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
-  // CHECK: @llvm.x86.avx512.mask.cvtps2pd.512
+  // CHECK: fpext <8 x float> %{{.*}} to <8 x double>
   return _mm512_cvtpslo_pd(__A);
 }