From: Peter Johnson Date: Fri, 12 May 2006 02:12:19 +0000 (-0000) Subject: * x86id.c: Add support for 64-bit far jmp/call. These are not listed in the X-Git-Tag: v0.5.0~8^2 X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=807084d3ffc507a2b0f932e1ee83c8f94bd8a07a;p=yasm * x86id.c: Add support for 64-bit far jmp/call. These are not listed in the AMD64 ISA reference but are in the Intel EM64T reference. * x86arch.h: Add CPU_EM64T flag. * x86parse.gap: Add CPU_EM64T as feature and enable it as part of "prescott". * far64.asm: Test for 64-bit far jmp/call. svn path=/trunk/yasm/; revision=1540 --- diff --git a/modules/arch/x86/tests/Makefile.inc b/modules/arch/x86/tests/Makefile.inc index ac154bd3..037ec822 100644 --- a/modules/arch/x86/tests/Makefile.inc +++ b/modules/arch/x86/tests/Makefile.inc @@ -39,6 +39,9 @@ EXTRA_DIST += modules/arch/x86/tests/effaddr.hex EXTRA_DIST += modules/arch/x86/tests/enter.asm EXTRA_DIST += modules/arch/x86/tests/enter.errwarn EXTRA_DIST += modules/arch/x86/tests/enter.hex +EXTRA_DIST += modules/arch/x86/tests/far64.asm +EXTRA_DIST += modules/arch/x86/tests/far64.errwarn +EXTRA_DIST += modules/arch/x86/tests/far64.hex EXTRA_DIST += modules/arch/x86/tests/farbasic.asm EXTRA_DIST += modules/arch/x86/tests/farbasic.errwarn EXTRA_DIST += modules/arch/x86/tests/farbasic.hex diff --git a/modules/arch/x86/tests/far64.asm b/modules/arch/x86/tests/far64.asm new file mode 100644 index 00000000..4456b88d --- /dev/null +++ b/modules/arch/x86/tests/far64.asm @@ -0,0 +1,7 @@ +[bits 64] +call far dword [0] +call far qword [0] +call far [0] +jmp far dword [0] +jmp far qword [0] +jmp far [0] diff --git a/modules/arch/x86/tests/far64.errwarn b/modules/arch/x86/tests/far64.errwarn new file mode 100644 index 00000000..e69de29b diff --git a/modules/arch/x86/tests/far64.hex b/modules/arch/x86/tests/far64.hex new file mode 100644 index 00000000..88bdcd75 --- /dev/null +++ b/modules/arch/x86/tests/far64.hex @@ -0,0 +1,44 @@ +ff +1c +25 +00 +00 +00 +00 +48 +ff +1c +25 +00 +00 +00 +00 +ff +1c +25 +00 +00 +00 +00 +ff +2c +25 +00 +00 +00 +00 +48 +ff +2c +25 +00 +00 +00 +00 +ff +2c +25 +00 +00 +00 +00 diff --git a/modules/arch/x86/x86arch.h b/modules/arch/x86/x86arch.h index f419d030..88ed771d 100644 --- a/modules/arch/x86/x86arch.h +++ b/modules/arch/x86/x86arch.h @@ -57,6 +57,7 @@ #define CPU_Priv (1UL<<24) /* Priveleged instruction */ #define CPU_SVM (1UL<<25) /* Secure Virtual Machine instruction */ #define CPU_PadLock (1UL<<25) /* VIA PadLock instruction */ +#define CPU_EM64T (1UL<<26) /* Intel EM64T or better */ /* Technically not CPU capabilities, they do affect what instructions are * available. These are tested against BITS==64. diff --git a/modules/arch/x86/x86id.c b/modules/arch/x86/x86id.c index 9dd2ac88..03770ae2 100644 --- a/modules/arch/x86/x86id.c +++ b/modules/arch/x86/x86id.c @@ -1186,6 +1186,8 @@ static const x86_insn_info call_insn[] = { {OPT_Mem|OPS_16|OPTM_Far|OPA_EA, 0, 0} }, { CPU_386, 0, 32, 0, 0, 1, {0xFF, 0, 0}, 3, 1, {OPT_Mem|OPS_32|OPTM_Far|OPA_EA, 0, 0} }, + { CPU_EM64T|CPU_64, 0, 64, 0, 0, 1, {0xFF, 0, 0}, 3, 1, + {OPT_Mem|OPS_64|OPTM_Far|OPA_EA, 0, 0} }, { CPU_Any, 0, 0, 0, 0, 1, {0xFF, 0, 0}, 3, 1, {OPT_Mem|OPS_Any|OPTM_Far|OPA_EA, 0, 0} } }; @@ -1238,6 +1240,8 @@ static const x86_insn_info jmp_insn[] = { {OPT_Mem|OPS_16|OPTM_Far|OPA_EA, 0, 0} }, { CPU_386, 0, 32, 0, 0, 1, {0xFF, 0, 0}, 5, 1, {OPT_Mem|OPS_32|OPTM_Far|OPA_EA, 0, 0} }, + { CPU_EM64T|CPU_64, 0, 64, 0, 0, 1, {0xFF, 0, 0}, 5, 1, + {OPT_Mem|OPS_64|OPTM_Far|OPA_EA, 0, 0} }, { CPU_Any, 0, 0, 0, 0, 1, {0xFF, 0, 0}, 5, 1, {OPT_Mem|OPS_Any|OPTM_Far|OPA_EA, 0, 0} } }; diff --git a/modules/arch/x86/x86parse.gap b/modules/arch/x86/x86parse.gap index b483841a..ffcc9bcb 100644 --- a/modules/arch/x86/x86parse.gap +++ b/modules/arch/x86/x86parse.gap @@ -880,7 +880,7 @@ CPU_ALIAS opteron hammer CPU_ALIAS athlon64 hammer CPU_ALIAS athlon-64 hammer CPU prescott CPU_186|CPU_286|CPU_386|CPU_486|CPU_586|CPU_686|\ - CPU_K6|CPU_Athlon|CPU_Hammer|CPU_FPU|CPU_MMX|\ + CPU_K6|CPU_Athlon|CPU_Hammer|CPU_EM64T|CPU_FPU|CPU_MMX|\ CPU_SSE|CPU_SSE2|CPU_SSE3|CPU_3DNow|CPU_SMM|\ CPU_Prot|CPU_Priv @@ -903,6 +903,7 @@ CPU_FEATURE obs CPU_Obs CPU_FEATURE priv CPU_Priv CPU_FEATURE svm CPU_SVM CPU_FEATURE padlock CPU_PadLock +CPU_FEATURE em64t CPU_EM64T # TARGETMOD parameters: