From: Daniel Sanders Date: Mon, 16 Oct 2017 05:39:30 +0000 (+0000) Subject: [aarch64][globalisel] Fix a crash in selectAddrModeIndexed() caused by incorrect... X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=7f013c8a95db47ac066f18beb5aad865db76d1c9;p=llvm [aarch64][globalisel] Fix a crash in selectAddrModeIndexed() caused by incorrect G_FRAME_INDEX handling The wrong operand was being rendered to the result instruction. The crash was detected by Bitcode/simd_ops/AArch64_halide_runtime.bc git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315890 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/Target/AArch64/AArch64InstructionSelector.cpp b/lib/Target/AArch64/AArch64InstructionSelector.cpp index 622bf995147..9fb005bb50b 100644 --- a/lib/Target/AArch64/AArch64InstructionSelector.cpp +++ b/lib/Target/AArch64/AArch64InstructionSelector.cpp @@ -1497,7 +1497,11 @@ AArch64InstructionSelector::selectAddrModeIndexed(MachineOperand &Root, unsigned Scale = Log2_32(Size); if ((RHSC & (Size - 1)) == 0 && RHSC >= 0 && RHSC < (0x1000 << Scale)) { if (LHSDef->getOpcode() == TargetOpcode::G_FRAME_INDEX) - LHSDef = MRI.getVRegDef(LHSDef->getOperand(1).getReg()); + return {{ + [=](MachineInstrBuilder &MIB) { MIB.add(LHSDef->getOperand(1)); }, + [=](MachineInstrBuilder &MIB) { MIB.addImm(RHSC >> Scale); }, + }}; + return {{ [=](MachineInstrBuilder &MIB) { MIB.add(LHS); }, [=](MachineInstrBuilder &MIB) { MIB.addImm(RHSC >> Scale); },