From: Craig Topper <craig.topper@intel.com>
Date: Sun, 8 Oct 2017 01:33:42 +0000 (+0000)
Subject: [X86] Simplify some code in getInsertVINSERTImmediate and getExtractVEXTRACTImmediate... 
X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=7e5d086d1e5ede0d73f51fca55dd1fdd6adfc796;p=llvm

[X86] Simplify some code in getInsertVINSERTImmediate and getExtractVEXTRACTImmediate. NFC

Replace one of the divides with a multiply.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315162 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/Target/X86/X86ISelDAGToDAG.cpp b/lib/Target/X86/X86ISelDAGToDAG.cpp
index eb0107a5fa4..3aa3244a706 100644
--- a/lib/Target/X86/X86ISelDAGToDAG.cpp
+++ b/lib/Target/X86/X86ISelDAGToDAG.cpp
@@ -371,8 +371,7 @@ namespace {
       assert((VecWidth == 128 || VecWidth == 256) && "Unexpected vector width");
       uint64_t Index = N->getConstantOperandVal(1);
       MVT VecVT = N->getOperand(0).getSimpleValueType();
-      unsigned NumElemsPerChunk = VecWidth / VecVT.getScalarSizeInBits();
-      return getI8Imm(Index / NumElemsPerChunk, DL);
+      return getI8Imm((Index * VecVT.getScalarSizeInBits()) / VecWidth, DL);
     }
 
     SDValue getInsertVINSERTImmediate(SDNode *N, unsigned VecWidth,
@@ -380,8 +379,7 @@ namespace {
       assert((VecWidth == 128 || VecWidth == 256) && "Unexpected vector width");
       uint64_t Index = N->getConstantOperandVal(2);
       MVT VecVT = N->getSimpleValueType(0);
-      unsigned NumElemsPerChunk = VecWidth / VecVT.getScalarSizeInBits();
-      return getI8Imm(Index / NumElemsPerChunk, DL);
+      return getI8Imm((Index * VecVT.getScalarSizeInBits()) / VecWidth, DL);
     }
 
     /// Return an SDNode that returns the value of the global base register.