From: Krzysztof Parzyszek Date: Mon, 16 Oct 2017 19:08:41 +0000 (+0000) Subject: Add iterator range MachineRegisterInfo::liveins(), adopt users, NFC X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=7b72f3902c24202cf1e73916698c0af6f23ba2e3;p=llvm Add iterator range MachineRegisterInfo::liveins(), adopt users, NFC git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315927 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/include/llvm/CodeGen/MachineRegisterInfo.h b/include/llvm/CodeGen/MachineRegisterInfo.h index 74fd81c1439..3f8dcfe76cc 100644 --- a/include/llvm/CodeGen/MachineRegisterInfo.h +++ b/include/llvm/CodeGen/MachineRegisterInfo.h @@ -841,6 +841,9 @@ public: livein_iterator livein_begin() const { return LiveIns.begin(); } livein_iterator livein_end() const { return LiveIns.end(); } bool livein_empty() const { return LiveIns.empty(); } + iterator_range liveins() const { + return make_range(livein_begin(), livein_end()); + } bool isLiveIn(unsigned Reg) const; diff --git a/lib/CodeGen/MIRPrinter.cpp b/lib/CodeGen/MIRPrinter.cpp index ae1bb36c6aa..528140234ee 100644 --- a/lib/CodeGen/MIRPrinter.cpp +++ b/lib/CodeGen/MIRPrinter.cpp @@ -297,11 +297,11 @@ void MIRPrinter::convert(yaml::MachineFunction &MF, } // Print the live ins. - for (auto I = RegInfo.livein_begin(), E = RegInfo.livein_end(); I != E; ++I) { + for (std::pair LI : RegInfo.liveins()) { yaml::MachineFunctionLiveIn LiveIn; - printReg(I->first, LiveIn.Register, TRI); - if (I->second) - printReg(I->second, LiveIn.VirtualRegister, TRI); + printReg(LI.first, LiveIn.Register, TRI); + if (LI.second) + printReg(LI.second, LiveIn.VirtualRegister, TRI); MF.LiveIns.push_back(LiveIn); } diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp index 1f3023b307c..5311ef437e9 100644 --- a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp +++ b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp @@ -494,10 +494,9 @@ bool SelectionDAGISel::runOnMachineFunction(MachineFunction &mf) { DenseMap LiveInMap; if (!FuncInfo->ArgDbgValues.empty()) - for (MachineRegisterInfo::livein_iterator LI = RegInfo->livein_begin(), - E = RegInfo->livein_end(); LI != E; ++LI) - if (LI->second) - LiveInMap.insert(std::make_pair(LI->first, LI->second)); + for (std::pair LI : RegInfo->liveins()) + if (LI.second) + LiveInMap.insert(LI); // Insert DBG_VALUE instructions for function arguments to the entry block. for (unsigned i = 0, e = FuncInfo->ArgDbgValues.size(); i != e; ++i) { diff --git a/lib/Target/AMDGPU/R600InstrInfo.cpp b/lib/Target/AMDGPU/R600InstrInfo.cpp index c5da5e40420..15dcf650d9a 100644 --- a/lib/Target/AMDGPU/R600InstrInfo.cpp +++ b/lib/Target/AMDGPU/R600InstrInfo.cpp @@ -1186,10 +1186,8 @@ int R600InstrInfo::getIndirectIndexBegin(const MachineFunction &MF) const { } const TargetRegisterClass *IndirectRC = getIndirectAddrRegClass(); - for (MachineRegisterInfo::livein_iterator LI = MRI.livein_begin(), - LE = MRI.livein_end(); - LI != LE; ++LI) { - unsigned Reg = LI->first; + for (std::pair LI : MRI.liveins()) { + unsigned Reg = LI.first; if (TargetRegisterInfo::isVirtualRegister(Reg) || !IndirectRC->contains(Reg)) continue; diff --git a/lib/Target/Hexagon/HexagonBitTracker.cpp b/lib/Target/Hexagon/HexagonBitTracker.cpp index e62e006e40c..c8927ec713a 100644 --- a/lib/Target/Hexagon/HexagonBitTracker.cpp +++ b/lib/Target/Hexagon/HexagonBitTracker.cpp @@ -1248,11 +1248,8 @@ unsigned HexagonEvaluator::getNextPhysReg(unsigned PReg, unsigned Width) const { } unsigned HexagonEvaluator::getVirtRegFor(unsigned PReg) const { - using iterator = MachineRegisterInfo::livein_iterator; - - for (iterator I = MRI.livein_begin(), E = MRI.livein_end(); I != E; ++I) { - if (I->first == PReg) - return I->second; - } + for (std::pair P : MRI.liveins()) + if (P.first == PReg) + return P.second; return 0; } diff --git a/lib/Target/Hexagon/RDFGraph.cpp b/lib/Target/Hexagon/RDFGraph.cpp index ea47b01fcc4..de58ddff339 100644 --- a/lib/Target/Hexagon/RDFGraph.cpp +++ b/lib/Target/Hexagon/RDFGraph.cpp @@ -913,8 +913,8 @@ void DataFlowGraph::build(unsigned Options) { MachineRegisterInfo &MRI = MF.getRegInfo(); MachineBasicBlock &EntryB = *EA.Addr->getCode(); assert(EntryB.pred_empty() && "Function entry block has predecessors"); - for (auto I = MRI.livein_begin(), E = MRI.livein_end(); I != E; ++I) - LiveIns.insert(RegisterRef(I->first)); + for (std::pair P : MRI.liveins()) + LiveIns.insert(RegisterRef(P.first)); if (MRI.tracksLiveness()) { for (auto I : EntryB.liveins()) LiveIns.insert(RegisterRef(I.PhysReg, I.LaneMask)); diff --git a/lib/Target/PowerPC/PPCFrameLowering.cpp b/lib/Target/PowerPC/PPCFrameLowering.cpp index 756e35a6e6c..0a01fdf9e67 100644 --- a/lib/Target/PowerPC/PPCFrameLowering.cpp +++ b/lib/Target/PowerPC/PPCFrameLowering.cpp @@ -312,11 +312,9 @@ static void HandleVRSaveUpdate(MachineInstr &MI, const TargetInstrInfo &TII) { // Live in and live out values already must be in the mask, so don't bother // marking them. - for (MachineRegisterInfo::livein_iterator - I = MF->getRegInfo().livein_begin(), - E = MF->getRegInfo().livein_end(); I != E; ++I) { - unsigned RegNo = TRI->getEncodingValue(I->first); - if (VRRegNo[RegNo] == I->first) // If this really is a vector reg. + for (std::pair LI : MF->getRegInfo().liveins()) { + unsigned RegNo = TRI->getEncodingValue(LI.first); + if (VRRegNo[RegNo] == LI.first) // If this really is a vector reg. UsedRegMask &= ~(1 << (31-RegNo)); // Doesn't need to be marked. } diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index 6baef042872..a8900b04f06 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -3235,9 +3235,9 @@ SDValue X86TargetLowering::LowerFormalArguments( if (CallConv == CallingConv::X86_RegCall || Fn->hasFnAttribute("no_caller_saved_registers")) { - const MachineRegisterInfo &MRI = MF.getRegInfo(); - for (const auto &Pair : make_range(MRI.livein_begin(), MRI.livein_end())) - MF.getRegInfo().disableCalleeSavedRegister(Pair.first); + MachineRegisterInfo &MRI = MF.getRegInfo(); + for (std::pair Pair : MRI.liveins()) + MRI.disableCalleeSavedRegister(Pair.first); } return Chain; diff --git a/lib/Target/X86/X86VZeroUpper.cpp b/lib/Target/X86/X86VZeroUpper.cpp index 0ea787ee6f5..fb8c2a71c9a 100644 --- a/lib/Target/X86/X86VZeroUpper.cpp +++ b/lib/Target/X86/X86VZeroUpper.cpp @@ -132,9 +132,8 @@ static bool isYmmOrZmmReg(unsigned Reg) { } static bool checkFnHasLiveInYmmOrZmm(MachineRegisterInfo &MRI) { - for (MachineRegisterInfo::livein_iterator I = MRI.livein_begin(), - E = MRI.livein_end(); I != E; ++I) - if (isYmmOrZmmReg(I->first)) + for (std::pair LI : MRI.liveins()) + if (isYmmOrZmmReg(LI.first)) return true; return false;