From: Mandeep Singh Grang Date: Tue, 28 Nov 2017 20:48:10 +0000 (+0000) Subject: [Hexagon] Use stable sort for HexagonShuffler to remove non-deterministic ordering X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=7affb6d9e61055c03afdde894a6bb6f333ea449b;p=llvm [Hexagon] Use stable sort for HexagonShuffler to remove non-deterministic ordering Summary: This fixes failures in the following tests uncovered by D39245: LLVM :: CodeGen/Hexagon/args.ll LLVM :: CodeGen/Hexagon/constp-extract.ll LLVM :: CodeGen/Hexagon/expand-condsets-basic.ll LLVM :: CodeGen/Hexagon/gp-rel.ll LLVM :: CodeGen/Hexagon/packetize_cond_inst.ll LLVM :: CodeGen/Hexagon/simple_addend.ll LLVM :: CodeGen/Hexagon/swp-stages4.ll LLVM :: CodeGen/Hexagon/swp-vmult.ll LLVM :: CodeGen/Hexagon/swp-vsum.ll LLVM :: MC/Hexagon/align.s LLVM :: MC/Hexagon/asmMap.s LLVM :: MC/Hexagon/dis-duplex-p0.s LLVM :: MC/Hexagon/double-vector-producer.s LLVM :: MC/Hexagon/inst_select.ll LLVM :: MC/Hexagon/instructions/j.s Reviewers: colinl, kparzysz, adasgupt, slarin Reviewed By: kparzysz Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D40227 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319223 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/Target/Hexagon/MCTargetDesc/HexagonShuffler.cpp b/lib/Target/Hexagon/MCTargetDesc/HexagonShuffler.cpp index cdf1cabe65c..375a0bde32c 100644 --- a/lib/Target/Hexagon/MCTargetDesc/HexagonShuffler.cpp +++ b/lib/Target/Hexagon/MCTargetDesc/HexagonShuffler.cpp @@ -465,7 +465,7 @@ bool HexagonShuffler::check() { foundBranches[1]->Core.setUnits(jumpSlots[i].second); HexagonUnitAuction AuctionCore(reservedSlots); - std::sort(begin(), end(), HexagonInstr::lessCore); + std::stable_sort(begin(), end(), HexagonInstr::lessCore); // see if things ok with that instruction being pinned to slot "slotJump" bool bFail = false; @@ -495,7 +495,7 @@ bool HexagonShuffler::check() { slot3ISJ->Core.setUnits(saveUnits & slotThree); HexagonUnitAuction AuctionCore(reservedSlots); - std::sort(begin(), end(), HexagonInstr::lessCore); + std::stable_sort(begin(), end(), HexagonInstr::lessCore); // see if things ok with that instruction being pinned to slot #3 bool bFail = false; @@ -519,7 +519,7 @@ bool HexagonShuffler::check() { if (validateSlots) { HexagonUnitAuction AuctionCore(reservedSlots); - std::sort(begin(), end(), HexagonInstr::lessCore); + std::stable_sort(begin(), end(), HexagonInstr::lessCore); for (iterator I = begin(); I != end(); ++I) if (!AuctionCore.bid(I->Core.getUnits())) { @@ -528,7 +528,7 @@ bool HexagonShuffler::check() { } } // Verify the CVI slot subscriptions. - std::sort(begin(), end(), HexagonInstr::lessCVI); + std::stable_sort(begin(), end(), HexagonInstr::lessCVI); // create vector of hvx instructions to check HVXInstsT hvxInsts; hvxInsts.clear(); @@ -584,7 +584,7 @@ bool HexagonShuffler::shuffle() { if (slotWeight) // Sort the packet, favoring source order, // beginning after the previous slot. - std::sort(ISJ, Packet.end()); + std::stable_sort(ISJ, Packet.end()); else // Skip unused slot. ++emptySlots;