From: Craig Topper <craig.topper@intel.com>
Date: Mon, 14 Aug 2017 15:32:40 +0000 (+0000)
Subject: [X86] Fix a place that was mishandling X86ISD::UMUL.
X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=7ae78366d539b19ab91a1eebae5c196124907c9d;p=llvm

[X86] Fix a place that was mishandling X86ISD::UMUL.

According to the X86ISelLowering.h, UMUL results are low, high, and flags. But this place was treating result 1 or 2 as flags.

Differential Revision: https://reviews.llvm.org/D36654

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310846 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp
index afe9ae3b6bd..16473fc5593 100644
--- a/lib/Target/X86/X86ISelLowering.cpp
+++ b/lib/Target/X86/X86ISelLowering.cpp
@@ -17604,7 +17604,7 @@ static bool isX86LogicalCmp(SDValue Op) {
     return true;
   if (Op.getResNo() == 1 &&
       (Opc == X86ISD::ADD || Opc == X86ISD::SUB || Opc == X86ISD::ADC ||
-       Opc == X86ISD::SBB || Opc == X86ISD::SMUL || Opc == X86ISD::UMUL ||
+       Opc == X86ISD::SBB || Opc == X86ISD::SMUL ||
        Opc == X86ISD::INC || Opc == X86ISD::DEC || Opc == X86ISD::OR ||
        Opc == X86ISD::XOR || Opc == X86ISD::AND))
     return true;