From: Angie Chiang Date: Tue, 9 Feb 2016 23:38:27 +0000 (-0800) Subject: Remove C99 struct init syle in fwd/inv config X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=7a8c7853c10b14f1158a56fbb53def735cc82f37;p=libvpx Remove C99 struct init syle in fwd/inv config Change-Id: Ieeb458353af6c903445518eef60328c62ca5c741 --- diff --git a/vp10/common/vp10_fwd_txfm2d_cfg.h b/vp10/common/vp10_fwd_txfm2d_cfg.h index 93fee6f17..5c2b4ca10 100644 --- a/vp10/common/vp10_fwd_txfm2d_cfg.h +++ b/vp10/common/vp10_fwd_txfm2d_cfg.h @@ -11,357 +11,354 @@ #ifndef VP10_FWD_TXFM2D_CFG_H_ #define VP10_FWD_TXFM2D_CFG_H_ #include "vp10/common/vp10_fwd_txfm1d.h" - // ---------------- config fwd_dct_dct_4 ---------------- -static int8_t fwd_shift_dct_dct_4[3] = {4, 0, -2}; -static int8_t fwd_stage_range_col_dct_dct_4[4] = {15, 16, 17, 17}; -static int8_t fwd_stage_range_row_dct_dct_4[4] = {17, 18, 18, 18}; -static int8_t fwd_cos_bit_col_dct_dct_4[4] = {15, 15, 15, 15}; -static int8_t fwd_cos_bit_row_dct_dct_4[4] = {15, 14, 14, 14}; +static const int8_t fwd_shift_dct_dct_4[3] = {4, 0, -2}; +static const int8_t fwd_stage_range_col_dct_dct_4[4] = {15, 16, 17, 17}; +static const int8_t fwd_stage_range_row_dct_dct_4[4] = {17, 18, 18, 18}; +static const int8_t fwd_cos_bit_col_dct_dct_4[4] = {15, 15, 15, 15}; +static const int8_t fwd_cos_bit_row_dct_dct_4[4] = {15, 14, 14, 14}; static const TXFM_2D_CFG fwd_txfm_2d_cfg_dct_dct_4 = { - .txfm_size = 4, - .stage_num_col = 4, - .stage_num_row = 4, - - .shift = fwd_shift_dct_dct_4, - .stage_range_col = fwd_stage_range_col_dct_dct_4, - .stage_range_row = fwd_stage_range_row_dct_dct_4, - .cos_bit_col = fwd_cos_bit_col_dct_dct_4, - .cos_bit_row = fwd_cos_bit_row_dct_dct_4, - .txfm_func_col = vp10_fdct4_new, - .txfm_func_row = vp10_fdct4_new}; + 4, // .txfm_size + 4, // .stage_num_col + 4, // .stage_num_row + fwd_shift_dct_dct_4, // .shift + fwd_stage_range_col_dct_dct_4, // .stage_range_col + fwd_stage_range_row_dct_dct_4, // .stage_range_row + fwd_cos_bit_col_dct_dct_4, // .cos_bit_col + fwd_cos_bit_row_dct_dct_4, // .cos_bit_row + vp10_fdct4_new, // .txfm_func_col + vp10_fdct4_new}; // .txfm_func_row; // ---------------- config fwd_dct_dct_8 ---------------- -static int8_t fwd_shift_dct_dct_8[3] = {5, -3, -1}; -static int8_t fwd_stage_range_col_dct_dct_8[6] = {16, 17, 18, 19, 19, 19}; -static int8_t fwd_stage_range_row_dct_dct_8[6] = {16, 17, 18, 18, 18, 18}; -static int8_t fwd_cos_bit_col_dct_dct_8[6] = {15, 15, 14, 13, 13, 13}; -static int8_t fwd_cos_bit_row_dct_dct_8[6] = {15, 15, 14, 14, 14, 14}; +static const int8_t fwd_shift_dct_dct_8[3] = {5, -3, -1}; +static const int8_t fwd_stage_range_col_dct_dct_8[6] = {16, 17, 18, 19, 19, 19}; +static const int8_t fwd_stage_range_row_dct_dct_8[6] = {16, 17, 18, 18, 18, 18}; +static const int8_t fwd_cos_bit_col_dct_dct_8[6] = {15, 15, 14, 13, 13, 13}; +static const int8_t fwd_cos_bit_row_dct_dct_8[6] = {15, 15, 14, 14, 14, 14}; static const TXFM_2D_CFG fwd_txfm_2d_cfg_dct_dct_8 = { - .txfm_size = 8, - .stage_num_col = 6, - .stage_num_row = 6, - - .shift = fwd_shift_dct_dct_8, - .stage_range_col = fwd_stage_range_col_dct_dct_8, - .stage_range_row = fwd_stage_range_row_dct_dct_8, - .cos_bit_col = fwd_cos_bit_col_dct_dct_8, - .cos_bit_row = fwd_cos_bit_row_dct_dct_8, - .txfm_func_col = vp10_fdct8_new, - .txfm_func_row = vp10_fdct8_new}; + 8, // .txfm_size + 6, // .stage_num_col + 6, // .stage_num_row + fwd_shift_dct_dct_8, // .shift + fwd_stage_range_col_dct_dct_8, // .stage_range_col + fwd_stage_range_row_dct_dct_8, // .stage_range_row + fwd_cos_bit_col_dct_dct_8, // .cos_bit_col + fwd_cos_bit_row_dct_dct_8, // .cos_bit_row + vp10_fdct8_new, // .txfm_func_col + vp10_fdct8_new}; // .txfm_func_row; // ---------------- config fwd_dct_dct_16 ---------------- -static int8_t fwd_shift_dct_dct_16[3] = {4, -3, -1}; -static int8_t fwd_stage_range_col_dct_dct_16[8] = {15, 16, 17, 18, - 19, 19, 19, 19}; -static int8_t fwd_stage_range_row_dct_dct_16[8] = {16, 17, 18, 19, - 19, 19, 19, 19}; -static int8_t fwd_cos_bit_col_dct_dct_16[8] = {15, 15, 15, 14, 13, 13, 13, 13}; -static int8_t fwd_cos_bit_row_dct_dct_16[8] = {15, 15, 14, 13, 13, 13, 13, 13}; +static const int8_t fwd_shift_dct_dct_16[3] = {4, -3, -1}; +static const int8_t fwd_stage_range_col_dct_dct_16[8] = {15, 16, 17, 18, + 19, 19, 19, 19}; +static const int8_t fwd_stage_range_row_dct_dct_16[8] = {16, 17, 18, 19, + 19, 19, 19, 19}; +static const int8_t fwd_cos_bit_col_dct_dct_16[8] = {15, 15, 15, 14, + 13, 13, 13, 13}; +static const int8_t fwd_cos_bit_row_dct_dct_16[8] = {15, 15, 14, 13, + 13, 13, 13, 13}; static const TXFM_2D_CFG fwd_txfm_2d_cfg_dct_dct_16 = { - .txfm_size = 16, - .stage_num_col = 8, - .stage_num_row = 8, - - .shift = fwd_shift_dct_dct_16, - .stage_range_col = fwd_stage_range_col_dct_dct_16, - .stage_range_row = fwd_stage_range_row_dct_dct_16, - .cos_bit_col = fwd_cos_bit_col_dct_dct_16, - .cos_bit_row = fwd_cos_bit_row_dct_dct_16, - .txfm_func_col = vp10_fdct16_new, - .txfm_func_row = vp10_fdct16_new}; + 16, // .txfm_size + 8, // .stage_num_col + 8, // .stage_num_row + fwd_shift_dct_dct_16, // .shift + fwd_stage_range_col_dct_dct_16, // .stage_range_col + fwd_stage_range_row_dct_dct_16, // .stage_range_row + fwd_cos_bit_col_dct_dct_16, // .cos_bit_col + fwd_cos_bit_row_dct_dct_16, // .cos_bit_row + vp10_fdct16_new, // .txfm_func_col + vp10_fdct16_new}; // .txfm_func_row; // ---------------- config fwd_dct_dct_32 ---------------- -static int8_t fwd_shift_dct_dct_32[3] = {3, -3, -1}; -static int8_t fwd_stage_range_col_dct_dct_32[10] = {14, 15, 16, 17, 18, - 19, 19, 19, 19, 19}; -static int8_t fwd_stage_range_row_dct_dct_32[10] = {16, 17, 18, 19, 20, - 20, 20, 20, 20, 20}; -static int8_t fwd_cos_bit_col_dct_dct_32[10] = {15, 15, 15, 15, 14, - 13, 13, 13, 13, 13}; -static int8_t fwd_cos_bit_row_dct_dct_32[10] = {15, 15, 14, 13, 12, - 12, 12, 12, 12, 12}; +static const int8_t fwd_shift_dct_dct_32[3] = {3, -3, -1}; +static const int8_t fwd_stage_range_col_dct_dct_32[10] = {14, 15, 16, 17, 18, + 19, 19, 19, 19, 19}; +static const int8_t fwd_stage_range_row_dct_dct_32[10] = {16, 17, 18, 19, 20, + 20, 20, 20, 20, 20}; +static const int8_t fwd_cos_bit_col_dct_dct_32[10] = {15, 15, 15, 15, 14, + 13, 13, 13, 13, 13}; +static const int8_t fwd_cos_bit_row_dct_dct_32[10] = {15, 15, 14, 13, 12, + 12, 12, 12, 12, 12}; static const TXFM_2D_CFG fwd_txfm_2d_cfg_dct_dct_32 = { - .txfm_size = 32, - .stage_num_col = 10, - .stage_num_row = 10, - - .shift = fwd_shift_dct_dct_32, - .stage_range_col = fwd_stage_range_col_dct_dct_32, - .stage_range_row = fwd_stage_range_row_dct_dct_32, - .cos_bit_col = fwd_cos_bit_col_dct_dct_32, - .cos_bit_row = fwd_cos_bit_row_dct_dct_32, - .txfm_func_col = vp10_fdct32_new, - .txfm_func_row = vp10_fdct32_new}; + 32, // .txfm_size + 10, // .stage_num_col + 10, // .stage_num_row + fwd_shift_dct_dct_32, // .shift + fwd_stage_range_col_dct_dct_32, // .stage_range_col + fwd_stage_range_row_dct_dct_32, // .stage_range_row + fwd_cos_bit_col_dct_dct_32, // .cos_bit_col + fwd_cos_bit_row_dct_dct_32, // .cos_bit_row + vp10_fdct32_new, // .txfm_func_col + vp10_fdct32_new}; // .txfm_func_row; // ---------------- config fwd_dct_adst_4 ---------------- -static int8_t fwd_shift_dct_adst_4[3] = {5, -2, -1}; -static int8_t fwd_stage_range_col_dct_adst_4[4] = {16, 17, 18, 18}; -static int8_t fwd_stage_range_row_dct_adst_4[6] = {16, 16, 16, 17, 17, 17}; -static int8_t fwd_cos_bit_col_dct_adst_4[4] = {15, 15, 14, 14}; -static int8_t fwd_cos_bit_row_dct_adst_4[6] = {15, 15, 15, 15, 15, 15}; +static const int8_t fwd_shift_dct_adst_4[3] = {5, -2, -1}; +static const int8_t fwd_stage_range_col_dct_adst_4[4] = {16, 17, 18, 18}; +static const int8_t fwd_stage_range_row_dct_adst_4[6] = {16, 16, 16, + 17, 17, 17}; +static const int8_t fwd_cos_bit_col_dct_adst_4[4] = {15, 15, 14, 14}; +static const int8_t fwd_cos_bit_row_dct_adst_4[6] = {15, 15, 15, 15, 15, 15}; static const TXFM_2D_CFG fwd_txfm_2d_cfg_dct_adst_4 = { - .txfm_size = 4, - .stage_num_col = 4, - .stage_num_row = 6, - - .shift = fwd_shift_dct_adst_4, - .stage_range_col = fwd_stage_range_col_dct_adst_4, - .stage_range_row = fwd_stage_range_row_dct_adst_4, - .cos_bit_col = fwd_cos_bit_col_dct_adst_4, - .cos_bit_row = fwd_cos_bit_row_dct_adst_4, - .txfm_func_col = vp10_fdct4_new, - .txfm_func_row = vp10_fadst4_new}; + 4, // .txfm_size + 4, // .stage_num_col + 6, // .stage_num_row + fwd_shift_dct_adst_4, // .shift + fwd_stage_range_col_dct_adst_4, // .stage_range_col + fwd_stage_range_row_dct_adst_4, // .stage_range_row + fwd_cos_bit_col_dct_adst_4, // .cos_bit_col + fwd_cos_bit_row_dct_adst_4, // .cos_bit_row + vp10_fdct4_new, // .txfm_func_col + vp10_fadst4_new}; // .txfm_func_row; // ---------------- config fwd_dct_adst_8 ---------------- -static int8_t fwd_shift_dct_adst_8[3] = {7, -3, -3}; -static int8_t fwd_stage_range_col_dct_adst_8[6] = {18, 19, 20, 21, 21, 21}; -static int8_t fwd_stage_range_row_dct_adst_8[8] = {18, 18, 18, 19, - 19, 20, 20, 20}; -static int8_t fwd_cos_bit_col_dct_adst_8[6] = {14, 13, 12, 11, 11, 11}; -static int8_t fwd_cos_bit_row_dct_adst_8[8] = {14, 14, 14, 13, 13, 12, 12, 12}; +static const int8_t fwd_shift_dct_adst_8[3] = {7, -3, -3}; +static const int8_t fwd_stage_range_col_dct_adst_8[6] = {18, 19, 20, + 21, 21, 21}; +static const int8_t fwd_stage_range_row_dct_adst_8[8] = {18, 18, 18, 19, + 19, 20, 20, 20}; +static const int8_t fwd_cos_bit_col_dct_adst_8[6] = {14, 13, 12, 11, 11, 11}; +static const int8_t fwd_cos_bit_row_dct_adst_8[8] = {14, 14, 14, 13, + 13, 12, 12, 12}; static const TXFM_2D_CFG fwd_txfm_2d_cfg_dct_adst_8 = { - .txfm_size = 8, - .stage_num_col = 6, - .stage_num_row = 8, - - .shift = fwd_shift_dct_adst_8, - .stage_range_col = fwd_stage_range_col_dct_adst_8, - .stage_range_row = fwd_stage_range_row_dct_adst_8, - .cos_bit_col = fwd_cos_bit_col_dct_adst_8, - .cos_bit_row = fwd_cos_bit_row_dct_adst_8, - .txfm_func_col = vp10_fdct8_new, - .txfm_func_row = vp10_fadst8_new}; + 8, // .txfm_size + 6, // .stage_num_col + 8, // .stage_num_row + fwd_shift_dct_adst_8, // .shift + fwd_stage_range_col_dct_adst_8, // .stage_range_col + fwd_stage_range_row_dct_adst_8, // .stage_range_row + fwd_cos_bit_col_dct_adst_8, // .cos_bit_col + fwd_cos_bit_row_dct_adst_8, // .cos_bit_row + vp10_fdct8_new, // .txfm_func_col + vp10_fadst8_new}; // .txfm_func_row; // ---------------- config fwd_dct_adst_16 ---------------- -static int8_t fwd_shift_dct_adst_16[3] = {4, -1, -3}; -static int8_t fwd_stage_range_col_dct_adst_16[8] = {15, 16, 17, 18, - 19, 19, 19, 19}; -static int8_t fwd_stage_range_row_dct_adst_16[10] = {18, 18, 18, 19, 19, - 20, 20, 21, 21, 21}; -static int8_t fwd_cos_bit_col_dct_adst_16[8] = {15, 15, 15, 14, 13, 13, 13, 13}; -static int8_t fwd_cos_bit_row_dct_adst_16[10] = {14, 14, 14, 13, 13, - 12, 12, 11, 11, 11}; +static const int8_t fwd_shift_dct_adst_16[3] = {4, -1, -3}; +static const int8_t fwd_stage_range_col_dct_adst_16[8] = {15, 16, 17, 18, + 19, 19, 19, 19}; +static const int8_t fwd_stage_range_row_dct_adst_16[10] = {18, 18, 18, 19, 19, + 20, 20, 21, 21, 21}; +static const int8_t fwd_cos_bit_col_dct_adst_16[8] = {15, 15, 15, 14, + 13, 13, 13, 13}; +static const int8_t fwd_cos_bit_row_dct_adst_16[10] = {14, 14, 14, 13, 13, + 12, 12, 11, 11, 11}; static const TXFM_2D_CFG fwd_txfm_2d_cfg_dct_adst_16 = { - .txfm_size = 16, - .stage_num_col = 8, - .stage_num_row = 10, - - .shift = fwd_shift_dct_adst_16, - .stage_range_col = fwd_stage_range_col_dct_adst_16, - .stage_range_row = fwd_stage_range_row_dct_adst_16, - .cos_bit_col = fwd_cos_bit_col_dct_adst_16, - .cos_bit_row = fwd_cos_bit_row_dct_adst_16, - .txfm_func_col = vp10_fdct16_new, - .txfm_func_row = vp10_fadst16_new}; + 16, // .txfm_size + 8, // .stage_num_col + 10, // .stage_num_row + fwd_shift_dct_adst_16, // .shift + fwd_stage_range_col_dct_adst_16, // .stage_range_col + fwd_stage_range_row_dct_adst_16, // .stage_range_row + fwd_cos_bit_col_dct_adst_16, // .cos_bit_col + fwd_cos_bit_row_dct_adst_16, // .cos_bit_row + vp10_fdct16_new, // .txfm_func_col + vp10_fadst16_new}; // .txfm_func_row; // ---------------- config fwd_dct_adst_32 ---------------- -static int8_t fwd_shift_dct_adst_32[3] = {3, -1, -3}; -static int8_t fwd_stage_range_col_dct_adst_32[10] = {14, 15, 16, 17, 18, - 19, 19, 19, 19, 19}; -static int8_t fwd_stage_range_row_dct_adst_32[12] = {18, 18, 18, 19, 19, 20, - 20, 21, 21, 22, 22, 22}; -static int8_t fwd_cos_bit_col_dct_adst_32[10] = {15, 15, 15, 15, 14, - 13, 13, 13, 13, 13}; -static int8_t fwd_cos_bit_row_dct_adst_32[12] = {14, 14, 14, 13, 13, 12, - 12, 11, 11, 10, 10, 10}; +static const int8_t fwd_shift_dct_adst_32[3] = {3, -1, -3}; +static const int8_t fwd_stage_range_col_dct_adst_32[10] = {14, 15, 16, 17, 18, + 19, 19, 19, 19, 19}; +static const int8_t fwd_stage_range_row_dct_adst_32[12] = { + 18, 18, 18, 19, 19, 20, 20, 21, 21, 22, 22, 22}; +static const int8_t fwd_cos_bit_col_dct_adst_32[10] = {15, 15, 15, 15, 14, + 13, 13, 13, 13, 13}; +static const int8_t fwd_cos_bit_row_dct_adst_32[12] = {14, 14, 14, 13, 13, 12, + 12, 11, 11, 10, 10, 10}; static const TXFM_2D_CFG fwd_txfm_2d_cfg_dct_adst_32 = { - .txfm_size = 32, - .stage_num_col = 10, - .stage_num_row = 12, - - .shift = fwd_shift_dct_adst_32, - .stage_range_col = fwd_stage_range_col_dct_adst_32, - .stage_range_row = fwd_stage_range_row_dct_adst_32, - .cos_bit_col = fwd_cos_bit_col_dct_adst_32, - .cos_bit_row = fwd_cos_bit_row_dct_adst_32, - .txfm_func_col = vp10_fdct32_new, - .txfm_func_row = vp10_fadst32_new}; + 32, // .txfm_size + 10, // .stage_num_col + 12, // .stage_num_row + fwd_shift_dct_adst_32, // .shift + fwd_stage_range_col_dct_adst_32, // .stage_range_col + fwd_stage_range_row_dct_adst_32, // .stage_range_row + fwd_cos_bit_col_dct_adst_32, // .cos_bit_col + fwd_cos_bit_row_dct_adst_32, // .cos_bit_row + vp10_fdct32_new, // .txfm_func_col + vp10_fadst32_new}; // .txfm_func_row; // ---------------- config fwd_adst_adst_4 ---------------- -static int8_t fwd_shift_adst_adst_4[3] = {6, 1, -5}; -static int8_t fwd_stage_range_col_adst_adst_4[6] = {17, 17, 18, 19, 19, 19}; -static int8_t fwd_stage_range_row_adst_adst_4[6] = {20, 20, 20, 21, 21, 21}; -static int8_t fwd_cos_bit_col_adst_adst_4[6] = {15, 15, 14, 13, 13, 13}; -static int8_t fwd_cos_bit_row_adst_adst_4[6] = {12, 12, 12, 11, 11, 11}; +static const int8_t fwd_shift_adst_adst_4[3] = {6, 1, -5}; +static const int8_t fwd_stage_range_col_adst_adst_4[6] = {17, 17, 18, + 19, 19, 19}; +static const int8_t fwd_stage_range_row_adst_adst_4[6] = {20, 20, 20, + 21, 21, 21}; +static const int8_t fwd_cos_bit_col_adst_adst_4[6] = {15, 15, 14, 13, 13, 13}; +static const int8_t fwd_cos_bit_row_adst_adst_4[6] = {12, 12, 12, 11, 11, 11}; static const TXFM_2D_CFG fwd_txfm_2d_cfg_adst_adst_4 = { - .txfm_size = 4, - .stage_num_col = 6, - .stage_num_row = 6, - - .shift = fwd_shift_adst_adst_4, - .stage_range_col = fwd_stage_range_col_adst_adst_4, - .stage_range_row = fwd_stage_range_row_adst_adst_4, - .cos_bit_col = fwd_cos_bit_col_adst_adst_4, - .cos_bit_row = fwd_cos_bit_row_adst_adst_4, - .txfm_func_col = vp10_fadst4_new, - .txfm_func_row = vp10_fadst4_new}; + 4, // .txfm_size + 6, // .stage_num_col + 6, // .stage_num_row + fwd_shift_adst_adst_4, // .shift + fwd_stage_range_col_adst_adst_4, // .stage_range_col + fwd_stage_range_row_adst_adst_4, // .stage_range_row + fwd_cos_bit_col_adst_adst_4, // .cos_bit_col + fwd_cos_bit_row_adst_adst_4, // .cos_bit_row + vp10_fadst4_new, // .txfm_func_col + vp10_fadst4_new}; // .txfm_func_row; // ---------------- config fwd_adst_adst_8 ---------------- -static int8_t fwd_shift_adst_adst_8[3] = {3, -1, -1}; -static int8_t fwd_stage_range_col_adst_adst_8[8] = {14, 14, 15, 16, - 16, 17, 17, 17}; -static int8_t fwd_stage_range_row_adst_adst_8[8] = {16, 16, 16, 17, - 17, 18, 18, 18}; -static int8_t fwd_cos_bit_col_adst_adst_8[8] = {15, 15, 15, 15, 15, 15, 15, 15}; -static int8_t fwd_cos_bit_row_adst_adst_8[8] = {15, 15, 15, 15, 15, 14, 14, 14}; +static const int8_t fwd_shift_adst_adst_8[3] = {3, -1, -1}; +static const int8_t fwd_stage_range_col_adst_adst_8[8] = {14, 14, 15, 16, + 16, 17, 17, 17}; +static const int8_t fwd_stage_range_row_adst_adst_8[8] = {16, 16, 16, 17, + 17, 18, 18, 18}; +static const int8_t fwd_cos_bit_col_adst_adst_8[8] = {15, 15, 15, 15, + 15, 15, 15, 15}; +static const int8_t fwd_cos_bit_row_adst_adst_8[8] = {15, 15, 15, 15, + 15, 14, 14, 14}; static const TXFM_2D_CFG fwd_txfm_2d_cfg_adst_adst_8 = { - .txfm_size = 8, - .stage_num_col = 8, - .stage_num_row = 8, - - .shift = fwd_shift_adst_adst_8, - .stage_range_col = fwd_stage_range_col_adst_adst_8, - .stage_range_row = fwd_stage_range_row_adst_adst_8, - .cos_bit_col = fwd_cos_bit_col_adst_adst_8, - .cos_bit_row = fwd_cos_bit_row_adst_adst_8, - .txfm_func_col = vp10_fadst8_new, - .txfm_func_row = vp10_fadst8_new}; + 8, // .txfm_size + 8, // .stage_num_col + 8, // .stage_num_row + fwd_shift_adst_adst_8, // .shift + fwd_stage_range_col_adst_adst_8, // .stage_range_col + fwd_stage_range_row_adst_adst_8, // .stage_range_row + fwd_cos_bit_col_adst_adst_8, // .cos_bit_col + fwd_cos_bit_row_adst_adst_8, // .cos_bit_row + vp10_fadst8_new, // .txfm_func_col + vp10_fadst8_new}; // .txfm_func_row; // ---------------- config fwd_adst_adst_16 ---------------- -static int8_t fwd_shift_adst_adst_16[3] = {2, 0, -2}; -static int8_t fwd_stage_range_col_adst_adst_16[10] = {13, 13, 14, 15, 15, - 16, 16, 17, 17, 17}; -static int8_t fwd_stage_range_row_adst_adst_16[10] = {17, 17, 17, 18, 18, - 19, 19, 20, 20, 20}; -static int8_t fwd_cos_bit_col_adst_adst_16[10] = {15, 15, 15, 15, 15, - 15, 15, 15, 15, 15}; -static int8_t fwd_cos_bit_row_adst_adst_16[10] = {15, 15, 15, 14, 14, - 13, 13, 12, 12, 12}; +static const int8_t fwd_shift_adst_adst_16[3] = {2, 0, -2}; +static const int8_t fwd_stage_range_col_adst_adst_16[10] = {13, 13, 14, 15, 15, + 16, 16, 17, 17, 17}; +static const int8_t fwd_stage_range_row_adst_adst_16[10] = {17, 17, 17, 18, 18, + 19, 19, 20, 20, 20}; +static const int8_t fwd_cos_bit_col_adst_adst_16[10] = {15, 15, 15, 15, 15, + 15, 15, 15, 15, 15}; +static const int8_t fwd_cos_bit_row_adst_adst_16[10] = {15, 15, 15, 14, 14, + 13, 13, 12, 12, 12}; static const TXFM_2D_CFG fwd_txfm_2d_cfg_adst_adst_16 = { - .txfm_size = 16, - .stage_num_col = 10, - .stage_num_row = 10, - - .shift = fwd_shift_adst_adst_16, - .stage_range_col = fwd_stage_range_col_adst_adst_16, - .stage_range_row = fwd_stage_range_row_adst_adst_16, - .cos_bit_col = fwd_cos_bit_col_adst_adst_16, - .cos_bit_row = fwd_cos_bit_row_adst_adst_16, - .txfm_func_col = vp10_fadst16_new, - .txfm_func_row = vp10_fadst16_new}; + 16, // .txfm_size + 10, // .stage_num_col + 10, // .stage_num_row + fwd_shift_adst_adst_16, // .shift + fwd_stage_range_col_adst_adst_16, // .stage_range_col + fwd_stage_range_row_adst_adst_16, // .stage_range_row + fwd_cos_bit_col_adst_adst_16, // .cos_bit_col + fwd_cos_bit_row_adst_adst_16, // .cos_bit_row + vp10_fadst16_new, // .txfm_func_col + vp10_fadst16_new}; // .txfm_func_row; // ---------------- config fwd_adst_adst_32 ---------------- -static int8_t fwd_shift_adst_adst_32[3] = {4, -2, -3}; -static int8_t fwd_stage_range_col_adst_adst_32[12] = {15, 15, 16, 17, 17, 18, - 18, 19, 19, 20, 20, 20}; -static int8_t fwd_stage_range_row_adst_adst_32[12] = {18, 18, 18, 19, 19, 20, - 20, 21, 21, 22, 22, 22}; -static int8_t fwd_cos_bit_col_adst_adst_32[12] = {15, 15, 15, 15, 15, 14, - 14, 13, 13, 12, 12, 12}; -static int8_t fwd_cos_bit_row_adst_adst_32[12] = {14, 14, 14, 13, 13, 12, - 12, 11, 11, 10, 10, 10}; +static const int8_t fwd_shift_adst_adst_32[3] = {4, -2, -3}; +static const int8_t fwd_stage_range_col_adst_adst_32[12] = { + 15, 15, 16, 17, 17, 18, 18, 19, 19, 20, 20, 20}; +static const int8_t fwd_stage_range_row_adst_adst_32[12] = { + 18, 18, 18, 19, 19, 20, 20, 21, 21, 22, 22, 22}; +static const int8_t fwd_cos_bit_col_adst_adst_32[12] = {15, 15, 15, 15, 15, 14, + 14, 13, 13, 12, 12, 12}; +static const int8_t fwd_cos_bit_row_adst_adst_32[12] = {14, 14, 14, 13, 13, 12, + 12, 11, 11, 10, 10, 10}; static const TXFM_2D_CFG fwd_txfm_2d_cfg_adst_adst_32 = { - .txfm_size = 32, - .stage_num_col = 12, - .stage_num_row = 12, - - .shift = fwd_shift_adst_adst_32, - .stage_range_col = fwd_stage_range_col_adst_adst_32, - .stage_range_row = fwd_stage_range_row_adst_adst_32, - .cos_bit_col = fwd_cos_bit_col_adst_adst_32, - .cos_bit_row = fwd_cos_bit_row_adst_adst_32, - .txfm_func_col = vp10_fadst32_new, - .txfm_func_row = vp10_fadst32_new}; + 32, // .txfm_size + 12, // .stage_num_col + 12, // .stage_num_row + fwd_shift_adst_adst_32, // .shift + fwd_stage_range_col_adst_adst_32, // .stage_range_col + fwd_stage_range_row_adst_adst_32, // .stage_range_row + fwd_cos_bit_col_adst_adst_32, // .cos_bit_col + fwd_cos_bit_row_adst_adst_32, // .cos_bit_row + vp10_fadst32_new, // .txfm_func_col + vp10_fadst32_new}; // .txfm_func_row; // ---------------- config fwd_adst_dct_4 ---------------- -static int8_t fwd_shift_adst_dct_4[3] = {5, -4, 1}; -static int8_t fwd_stage_range_col_adst_dct_4[6] = {16, 16, 17, 18, 18, 18}; -static int8_t fwd_stage_range_row_adst_dct_4[4] = {14, 15, 15, 15}; -static int8_t fwd_cos_bit_col_adst_dct_4[6] = {15, 15, 15, 14, 14, 14}; -static int8_t fwd_cos_bit_row_adst_dct_4[4] = {15, 15, 15, 15}; +static const int8_t fwd_shift_adst_dct_4[3] = {5, -4, 1}; +static const int8_t fwd_stage_range_col_adst_dct_4[6] = {16, 16, 17, + 18, 18, 18}; +static const int8_t fwd_stage_range_row_adst_dct_4[4] = {14, 15, 15, 15}; +static const int8_t fwd_cos_bit_col_adst_dct_4[6] = {15, 15, 15, 14, 14, 14}; +static const int8_t fwd_cos_bit_row_adst_dct_4[4] = {15, 15, 15, 15}; static const TXFM_2D_CFG fwd_txfm_2d_cfg_adst_dct_4 = { - .txfm_size = 4, - .stage_num_col = 6, - .stage_num_row = 4, - - .shift = fwd_shift_adst_dct_4, - .stage_range_col = fwd_stage_range_col_adst_dct_4, - .stage_range_row = fwd_stage_range_row_adst_dct_4, - .cos_bit_col = fwd_cos_bit_col_adst_dct_4, - .cos_bit_row = fwd_cos_bit_row_adst_dct_4, - .txfm_func_col = vp10_fadst4_new, - .txfm_func_row = vp10_fdct4_new}; + 4, // .txfm_size + 6, // .stage_num_col + 4, // .stage_num_row + fwd_shift_adst_dct_4, // .shift + fwd_stage_range_col_adst_dct_4, // .stage_range_col + fwd_stage_range_row_adst_dct_4, // .stage_range_row + fwd_cos_bit_col_adst_dct_4, // .cos_bit_col + fwd_cos_bit_row_adst_dct_4, // .cos_bit_row + vp10_fadst4_new, // .txfm_func_col + vp10_fdct4_new}; // .txfm_func_row; // ---------------- config fwd_adst_dct_8 ---------------- -static int8_t fwd_shift_adst_dct_8[3] = {5, 1, -5}; -static int8_t fwd_stage_range_col_adst_dct_8[8] = {16, 16, 17, 18, - 18, 19, 19, 19}; -static int8_t fwd_stage_range_row_adst_dct_8[6] = {20, 21, 22, 22, 22, 22}; -static int8_t fwd_cos_bit_col_adst_dct_8[8] = {15, 15, 15, 14, 14, 13, 13, 13}; -static int8_t fwd_cos_bit_row_adst_dct_8[6] = {12, 11, 10, 10, 10, 10}; +static const int8_t fwd_shift_adst_dct_8[3] = {5, 1, -5}; +static const int8_t fwd_stage_range_col_adst_dct_8[8] = {16, 16, 17, 18, + 18, 19, 19, 19}; +static const int8_t fwd_stage_range_row_adst_dct_8[6] = {20, 21, 22, + 22, 22, 22}; +static const int8_t fwd_cos_bit_col_adst_dct_8[8] = {15, 15, 15, 14, + 14, 13, 13, 13}; +static const int8_t fwd_cos_bit_row_adst_dct_8[6] = {12, 11, 10, 10, 10, 10}; static const TXFM_2D_CFG fwd_txfm_2d_cfg_adst_dct_8 = { - .txfm_size = 8, - .stage_num_col = 8, - .stage_num_row = 6, - - .shift = fwd_shift_adst_dct_8, - .stage_range_col = fwd_stage_range_col_adst_dct_8, - .stage_range_row = fwd_stage_range_row_adst_dct_8, - .cos_bit_col = fwd_cos_bit_col_adst_dct_8, - .cos_bit_row = fwd_cos_bit_row_adst_dct_8, - .txfm_func_col = vp10_fadst8_new, - .txfm_func_row = vp10_fdct8_new}; + 8, // .txfm_size + 8, // .stage_num_col + 6, // .stage_num_row + fwd_shift_adst_dct_8, // .shift + fwd_stage_range_col_adst_dct_8, // .stage_range_col + fwd_stage_range_row_adst_dct_8, // .stage_range_row + fwd_cos_bit_col_adst_dct_8, // .cos_bit_col + fwd_cos_bit_row_adst_dct_8, // .cos_bit_row + vp10_fadst8_new, // .txfm_func_col + vp10_fdct8_new}; // .txfm_func_row; // ---------------- config fwd_adst_dct_16 ---------------- -static int8_t fwd_shift_adst_dct_16[3] = {4, -3, -1}; -static int8_t fwd_stage_range_col_adst_dct_16[10] = {15, 15, 16, 17, 17, - 18, 18, 19, 19, 19}; -static int8_t fwd_stage_range_row_adst_dct_16[8] = {16, 17, 18, 19, - 19, 19, 19, 19}; -static int8_t fwd_cos_bit_col_adst_dct_16[10] = {15, 15, 15, 15, 15, - 14, 14, 13, 13, 13}; -static int8_t fwd_cos_bit_row_adst_dct_16[8] = {15, 15, 14, 13, 13, 13, 13, 13}; +static const int8_t fwd_shift_adst_dct_16[3] = {4, -3, -1}; +static const int8_t fwd_stage_range_col_adst_dct_16[10] = {15, 15, 16, 17, 17, + 18, 18, 19, 19, 19}; +static const int8_t fwd_stage_range_row_adst_dct_16[8] = {16, 17, 18, 19, + 19, 19, 19, 19}; +static const int8_t fwd_cos_bit_col_adst_dct_16[10] = {15, 15, 15, 15, 15, + 14, 14, 13, 13, 13}; +static const int8_t fwd_cos_bit_row_adst_dct_16[8] = {15, 15, 14, 13, + 13, 13, 13, 13}; static const TXFM_2D_CFG fwd_txfm_2d_cfg_adst_dct_16 = { - .txfm_size = 16, - .stage_num_col = 10, - .stage_num_row = 8, - - .shift = fwd_shift_adst_dct_16, - .stage_range_col = fwd_stage_range_col_adst_dct_16, - .stage_range_row = fwd_stage_range_row_adst_dct_16, - .cos_bit_col = fwd_cos_bit_col_adst_dct_16, - .cos_bit_row = fwd_cos_bit_row_adst_dct_16, - .txfm_func_col = vp10_fadst16_new, - .txfm_func_row = vp10_fdct16_new}; + 16, // .txfm_size + 10, // .stage_num_col + 8, // .stage_num_row + fwd_shift_adst_dct_16, // .shift + fwd_stage_range_col_adst_dct_16, // .stage_range_col + fwd_stage_range_row_adst_dct_16, // .stage_range_row + fwd_cos_bit_col_adst_dct_16, // .cos_bit_col + fwd_cos_bit_row_adst_dct_16, // .cos_bit_row + vp10_fadst16_new, // .txfm_func_col + vp10_fdct16_new}; // .txfm_func_row; // ---------------- config fwd_adst_dct_32 ---------------- -static int8_t fwd_shift_adst_dct_32[3] = {5, -4, -2}; -static int8_t fwd_stage_range_col_adst_dct_32[12] = {16, 16, 17, 18, 18, 19, - 19, 20, 20, 21, 21, 21}; -static int8_t fwd_stage_range_row_adst_dct_32[10] = {17, 18, 19, 20, 21, - 21, 21, 21, 21, 21}; -static int8_t fwd_cos_bit_col_adst_dct_32[12] = {15, 15, 15, 14, 14, 13, - 13, 12, 12, 11, 11, 11}; -static int8_t fwd_cos_bit_row_adst_dct_32[10] = {15, 14, 13, 12, 11, - 11, 11, 11, 11, 11}; +static const int8_t fwd_shift_adst_dct_32[3] = {5, -4, -2}; +static const int8_t fwd_stage_range_col_adst_dct_32[12] = { + 16, 16, 17, 18, 18, 19, 19, 20, 20, 21, 21, 21}; +static const int8_t fwd_stage_range_row_adst_dct_32[10] = {17, 18, 19, 20, 21, + 21, 21, 21, 21, 21}; +static const int8_t fwd_cos_bit_col_adst_dct_32[12] = {15, 15, 15, 14, 14, 13, + 13, 12, 12, 11, 11, 11}; +static const int8_t fwd_cos_bit_row_adst_dct_32[10] = {15, 14, 13, 12, 11, + 11, 11, 11, 11, 11}; static const TXFM_2D_CFG fwd_txfm_2d_cfg_adst_dct_32 = { - .txfm_size = 32, - .stage_num_col = 12, - .stage_num_row = 10, - - .shift = fwd_shift_adst_dct_32, - .stage_range_col = fwd_stage_range_col_adst_dct_32, - .stage_range_row = fwd_stage_range_row_adst_dct_32, - .cos_bit_col = fwd_cos_bit_col_adst_dct_32, - .cos_bit_row = fwd_cos_bit_row_adst_dct_32, - .txfm_func_col = vp10_fadst32_new, - .txfm_func_row = vp10_fdct32_new}; + 32, // .txfm_size + 12, // .stage_num_col + 10, // .stage_num_row + fwd_shift_adst_dct_32, // .shift + fwd_stage_range_col_adst_dct_32, // .stage_range_col + fwd_stage_range_row_adst_dct_32, // .stage_range_row + fwd_cos_bit_col_adst_dct_32, // .cos_bit_col + fwd_cos_bit_row_adst_dct_32, // .cos_bit_row + vp10_fadst32_new, // .txfm_func_col + vp10_fdct32_new}; // .txfm_func_row; #endif // VP10_FWD_TXFM2D_CFG_H_ diff --git a/vp10/common/vp10_inv_txfm2d_cfg.h b/vp10/common/vp10_inv_txfm2d_cfg.h index 8cd76b520..fc552fe49 100644 --- a/vp10/common/vp10_inv_txfm2d_cfg.h +++ b/vp10/common/vp10_inv_txfm2d_cfg.h @@ -20,17 +20,16 @@ static const int8_t inv_cos_bit_col_dct_dct_4[4] = {15, 15, 15, 15}; static const int8_t inv_cos_bit_row_dct_dct_4[4] = {15, 15, 15, 15}; static const TXFM_2D_CFG inv_txfm_2d_cfg_dct_dct_4 = { - .txfm_size = 4, - .stage_num_col = 4, - .stage_num_row = 4, - - .shift = inv_shift_dct_dct_4, - .stage_range_col = inv_stage_range_col_dct_dct_4, - .stage_range_row = inv_stage_range_row_dct_dct_4, - .cos_bit_col = inv_cos_bit_col_dct_dct_4, - .cos_bit_row = inv_cos_bit_row_dct_dct_4, - .txfm_func_col = vp10_idct4_new, - .txfm_func_row = vp10_idct4_new}; + 4, // .txfm_size + 4, // .stage_num_col + 4, // .stage_num_row + inv_shift_dct_dct_4, // .shift + inv_stage_range_col_dct_dct_4, // .stage_range_col + inv_stage_range_row_dct_dct_4, // .stage_range_row + inv_cos_bit_col_dct_dct_4, // .cos_bit_col + inv_cos_bit_row_dct_dct_4, // .cos_bit_row + vp10_idct4_new, // .txfm_func_col + vp10_idct4_new}; // .txfm_func_row; // ---------------- config inv_dct_dct_8 ---------------- static const int8_t inv_shift_dct_dct_8[2] = {0, -5}; @@ -40,17 +39,16 @@ static const int8_t inv_cos_bit_col_dct_dct_8[6] = {15, 15, 15, 15, 15, 15}; static const int8_t inv_cos_bit_row_dct_dct_8[6] = {15, 15, 15, 15, 15, 15}; static const TXFM_2D_CFG inv_txfm_2d_cfg_dct_dct_8 = { - .txfm_size = 8, - .stage_num_col = 6, - .stage_num_row = 6, - - .shift = inv_shift_dct_dct_8, - .stage_range_col = inv_stage_range_col_dct_dct_8, - .stage_range_row = inv_stage_range_row_dct_dct_8, - .cos_bit_col = inv_cos_bit_col_dct_dct_8, - .cos_bit_row = inv_cos_bit_row_dct_dct_8, - .txfm_func_col = vp10_idct8_new, - .txfm_func_row = vp10_idct8_new}; + 8, // .txfm_size + 6, // .stage_num_col + 6, // .stage_num_row + inv_shift_dct_dct_8, // .shift + inv_stage_range_col_dct_dct_8, // .stage_range_col + inv_stage_range_row_dct_dct_8, // .stage_range_row + inv_cos_bit_col_dct_dct_8, // .cos_bit_col + inv_cos_bit_row_dct_dct_8, // .cos_bit_row + vp10_idct8_new, // .txfm_func_col + vp10_idct8_new}; // .txfm_func_row; // ---------------- config inv_dct_dct_16 ---------------- static const int8_t inv_shift_dct_dct_16[2] = {0, -6}; @@ -64,17 +62,16 @@ static const int8_t inv_cos_bit_row_dct_dct_16[8] = {14, 14, 14, 14, 14, 14, 14, 14}; static const TXFM_2D_CFG inv_txfm_2d_cfg_dct_dct_16 = { - .txfm_size = 16, - .stage_num_col = 8, - .stage_num_row = 8, - - .shift = inv_shift_dct_dct_16, - .stage_range_col = inv_stage_range_col_dct_dct_16, - .stage_range_row = inv_stage_range_row_dct_dct_16, - .cos_bit_col = inv_cos_bit_col_dct_dct_16, - .cos_bit_row = inv_cos_bit_row_dct_dct_16, - .txfm_func_col = vp10_idct16_new, - .txfm_func_row = vp10_idct16_new}; + 16, // .txfm_size + 8, // .stage_num_col + 8, // .stage_num_row + inv_shift_dct_dct_16, // .shift + inv_stage_range_col_dct_dct_16, // .stage_range_col + inv_stage_range_row_dct_dct_16, // .stage_range_row + inv_cos_bit_col_dct_dct_16, // .cos_bit_col + inv_cos_bit_row_dct_dct_16, // .cos_bit_row + vp10_idct16_new, // .txfm_func_col + vp10_idct16_new}; // .txfm_func_row; // ---------------- config inv_dct_dct_32 ---------------- static const int8_t inv_shift_dct_dct_32[2] = {-1, -6}; @@ -88,17 +85,16 @@ static const int8_t inv_cos_bit_row_dct_dct_32[10] = {13, 13, 13, 13, 13, 13, 13, 13, 13, 13}; static const TXFM_2D_CFG inv_txfm_2d_cfg_dct_dct_32 = { - .txfm_size = 32, - .stage_num_col = 10, - .stage_num_row = 10, - - .shift = inv_shift_dct_dct_32, - .stage_range_col = inv_stage_range_col_dct_dct_32, - .stage_range_row = inv_stage_range_row_dct_dct_32, - .cos_bit_col = inv_cos_bit_col_dct_dct_32, - .cos_bit_row = inv_cos_bit_row_dct_dct_32, - .txfm_func_col = vp10_idct32_new, - .txfm_func_row = vp10_idct32_new}; + 32, // .txfm_size + 10, // .stage_num_col + 10, // .stage_num_row + inv_shift_dct_dct_32, // .shift + inv_stage_range_col_dct_dct_32, // .stage_range_col + inv_stage_range_row_dct_dct_32, // .stage_range_row + inv_cos_bit_col_dct_dct_32, // .cos_bit_col + inv_cos_bit_row_dct_dct_32, // .cos_bit_row + vp10_idct32_new, // .txfm_func_col + vp10_idct32_new}; // .txfm_func_row; // ---------------- config inv_dct_adst_4 ---------------- static const int8_t inv_shift_dct_adst_4[2] = {1, -5}; @@ -109,17 +105,16 @@ static const int8_t inv_cos_bit_col_dct_adst_4[4] = {15, 15, 15, 15}; static const int8_t inv_cos_bit_row_dct_adst_4[6] = {15, 15, 15, 15, 15, 15}; static const TXFM_2D_CFG inv_txfm_2d_cfg_dct_adst_4 = { - .txfm_size = 4, - .stage_num_col = 4, - .stage_num_row = 6, - - .shift = inv_shift_dct_adst_4, - .stage_range_col = inv_stage_range_col_dct_adst_4, - .stage_range_row = inv_stage_range_row_dct_adst_4, - .cos_bit_col = inv_cos_bit_col_dct_adst_4, - .cos_bit_row = inv_cos_bit_row_dct_adst_4, - .txfm_func_col = vp10_idct4_new, - .txfm_func_row = vp10_iadst4_new}; + 4, // .txfm_size + 4, // .stage_num_col + 6, // .stage_num_row + inv_shift_dct_adst_4, // .shift + inv_stage_range_col_dct_adst_4, // .stage_range_col + inv_stage_range_row_dct_adst_4, // .stage_range_row + inv_cos_bit_col_dct_adst_4, // .cos_bit_col + inv_cos_bit_row_dct_adst_4, // .cos_bit_row + vp10_idct4_new, // .txfm_func_col + vp10_iadst4_new}; // .txfm_func_row; // ---------------- config inv_dct_adst_8 ---------------- static const int8_t inv_shift_dct_adst_8[2] = {-1, -4}; @@ -132,17 +127,16 @@ static const int8_t inv_cos_bit_row_dct_adst_8[8] = {15, 15, 15, 15, 15, 15, 15, 15}; static const TXFM_2D_CFG inv_txfm_2d_cfg_dct_adst_8 = { - .txfm_size = 8, - .stage_num_col = 6, - .stage_num_row = 8, - - .shift = inv_shift_dct_adst_8, - .stage_range_col = inv_stage_range_col_dct_adst_8, - .stage_range_row = inv_stage_range_row_dct_adst_8, - .cos_bit_col = inv_cos_bit_col_dct_adst_8, - .cos_bit_row = inv_cos_bit_row_dct_adst_8, - .txfm_func_col = vp10_idct8_new, - .txfm_func_row = vp10_iadst8_new}; + 8, // .txfm_size + 6, // .stage_num_col + 8, // .stage_num_row + inv_shift_dct_adst_8, // .shift + inv_stage_range_col_dct_adst_8, // .stage_range_col + inv_stage_range_row_dct_adst_8, // .stage_range_row + inv_cos_bit_col_dct_adst_8, // .cos_bit_col + inv_cos_bit_row_dct_adst_8, // .cos_bit_row + vp10_idct8_new, // .txfm_func_col + vp10_iadst8_new}; // .txfm_func_row; // ---------------- config inv_dct_adst_16 ---------------- static const int8_t inv_shift_dct_adst_16[2] = {1, -7}; @@ -156,17 +150,16 @@ static const int8_t inv_cos_bit_row_dct_adst_16[10] = {14, 14, 14, 14, 14, 14, 14, 14, 14, 14}; static const TXFM_2D_CFG inv_txfm_2d_cfg_dct_adst_16 = { - .txfm_size = 16, - .stage_num_col = 8, - .stage_num_row = 10, - - .shift = inv_shift_dct_adst_16, - .stage_range_col = inv_stage_range_col_dct_adst_16, - .stage_range_row = inv_stage_range_row_dct_adst_16, - .cos_bit_col = inv_cos_bit_col_dct_adst_16, - .cos_bit_row = inv_cos_bit_row_dct_adst_16, - .txfm_func_col = vp10_idct16_new, - .txfm_func_row = vp10_iadst16_new}; + 16, // .txfm_size + 8, // .stage_num_col + 10, // .stage_num_row + inv_shift_dct_adst_16, // .shift + inv_stage_range_col_dct_adst_16, // .stage_range_col + inv_stage_range_row_dct_adst_16, // .stage_range_row + inv_cos_bit_col_dct_adst_16, // .cos_bit_col + inv_cos_bit_row_dct_adst_16, // .cos_bit_row + vp10_idct16_new, // .txfm_func_col + vp10_iadst16_new}; // .txfm_func_row; // ---------------- config inv_dct_adst_32 ---------------- static const int8_t inv_shift_dct_adst_32[2] = {-1, -6}; @@ -180,17 +173,16 @@ static const int8_t inv_cos_bit_row_dct_adst_32[12] = {13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13}; static const TXFM_2D_CFG inv_txfm_2d_cfg_dct_adst_32 = { - .txfm_size = 32, - .stage_num_col = 10, - .stage_num_row = 12, - - .shift = inv_shift_dct_adst_32, - .stage_range_col = inv_stage_range_col_dct_adst_32, - .stage_range_row = inv_stage_range_row_dct_adst_32, - .cos_bit_col = inv_cos_bit_col_dct_adst_32, - .cos_bit_row = inv_cos_bit_row_dct_adst_32, - .txfm_func_col = vp10_idct32_new, - .txfm_func_row = vp10_iadst32_new}; + 32, // .txfm_size + 10, // .stage_num_col + 12, // .stage_num_row + inv_shift_dct_adst_32, // .shift + inv_stage_range_col_dct_adst_32, // .stage_range_col + inv_stage_range_row_dct_adst_32, // .stage_range_row + inv_cos_bit_col_dct_adst_32, // .cos_bit_col + inv_cos_bit_row_dct_adst_32, // .cos_bit_row + vp10_idct32_new, // .txfm_func_col + vp10_iadst32_new}; // .txfm_func_row; // ---------------- config inv_adst_adst_4 ---------------- static const int8_t inv_shift_adst_adst_4[2] = {0, -4}; @@ -202,17 +194,16 @@ static const int8_t inv_cos_bit_col_adst_adst_4[6] = {15, 15, 15, 15, 15, 15}; static const int8_t inv_cos_bit_row_adst_adst_4[6] = {15, 15, 15, 15, 15, 15}; static const TXFM_2D_CFG inv_txfm_2d_cfg_adst_adst_4 = { - .txfm_size = 4, - .stage_num_col = 6, - .stage_num_row = 6, - - .shift = inv_shift_adst_adst_4, - .stage_range_col = inv_stage_range_col_adst_adst_4, - .stage_range_row = inv_stage_range_row_adst_adst_4, - .cos_bit_col = inv_cos_bit_col_adst_adst_4, - .cos_bit_row = inv_cos_bit_row_adst_adst_4, - .txfm_func_col = vp10_iadst4_new, - .txfm_func_row = vp10_iadst4_new}; + 4, // .txfm_size + 6, // .stage_num_col + 6, // .stage_num_row + inv_shift_adst_adst_4, // .shift + inv_stage_range_col_adst_adst_4, // .stage_range_col + inv_stage_range_row_adst_adst_4, // .stage_range_row + inv_cos_bit_col_adst_adst_4, // .cos_bit_col + inv_cos_bit_row_adst_adst_4, // .cos_bit_row + vp10_iadst4_new, // .txfm_func_col + vp10_iadst4_new}; // .txfm_func_row; // ---------------- config inv_adst_adst_8 ---------------- static const int8_t inv_shift_adst_adst_8[2] = {-1, -4}; @@ -226,17 +217,16 @@ static const int8_t inv_cos_bit_row_adst_adst_8[8] = {15, 15, 15, 15, 15, 15, 15, 15}; static const TXFM_2D_CFG inv_txfm_2d_cfg_adst_adst_8 = { - .txfm_size = 8, - .stage_num_col = 8, - .stage_num_row = 8, - - .shift = inv_shift_adst_adst_8, - .stage_range_col = inv_stage_range_col_adst_adst_8, - .stage_range_row = inv_stage_range_row_adst_adst_8, - .cos_bit_col = inv_cos_bit_col_adst_adst_8, - .cos_bit_row = inv_cos_bit_row_adst_adst_8, - .txfm_func_col = vp10_iadst8_new, - .txfm_func_row = vp10_iadst8_new}; + 8, // .txfm_size + 8, // .stage_num_col + 8, // .stage_num_row + inv_shift_adst_adst_8, // .shift + inv_stage_range_col_adst_adst_8, // .stage_range_col + inv_stage_range_row_adst_adst_8, // .stage_range_row + inv_cos_bit_col_adst_adst_8, // .cos_bit_col + inv_cos_bit_row_adst_adst_8, // .cos_bit_row + vp10_iadst8_new, // .txfm_func_col + vp10_iadst8_new}; // .txfm_func_row; // ---------------- config inv_adst_adst_16 ---------------- static const int8_t inv_shift_adst_adst_16[2] = {0, -6}; @@ -250,17 +240,16 @@ static const int8_t inv_cos_bit_row_adst_adst_16[10] = {14, 14, 14, 14, 14, 14, 14, 14, 14, 14}; static const TXFM_2D_CFG inv_txfm_2d_cfg_adst_adst_16 = { - .txfm_size = 16, - .stage_num_col = 10, - .stage_num_row = 10, - - .shift = inv_shift_adst_adst_16, - .stage_range_col = inv_stage_range_col_adst_adst_16, - .stage_range_row = inv_stage_range_row_adst_adst_16, - .cos_bit_col = inv_cos_bit_col_adst_adst_16, - .cos_bit_row = inv_cos_bit_row_adst_adst_16, - .txfm_func_col = vp10_iadst16_new, - .txfm_func_row = vp10_iadst16_new}; + 16, // .txfm_size + 10, // .stage_num_col + 10, // .stage_num_row + inv_shift_adst_adst_16, // .shift + inv_stage_range_col_adst_adst_16, // .stage_range_col + inv_stage_range_row_adst_adst_16, // .stage_range_row + inv_cos_bit_col_adst_adst_16, // .cos_bit_col + inv_cos_bit_row_adst_adst_16, // .cos_bit_row + vp10_iadst16_new, // .txfm_func_col + vp10_iadst16_new}; // .txfm_func_row; // ---------------- config inv_adst_adst_32 ---------------- static const int8_t inv_shift_adst_adst_32[2] = {-1, -6}; @@ -274,104 +263,103 @@ static const int8_t inv_cos_bit_row_adst_adst_32[12] = {13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13}; static const TXFM_2D_CFG inv_txfm_2d_cfg_adst_adst_32 = { - .txfm_size = 32, - .stage_num_col = 12, - .stage_num_row = 12, - - .shift = inv_shift_adst_adst_32, - .stage_range_col = inv_stage_range_col_adst_adst_32, - .stage_range_row = inv_stage_range_row_adst_adst_32, - .cos_bit_col = inv_cos_bit_col_adst_adst_32, - .cos_bit_row = inv_cos_bit_row_adst_adst_32, - .txfm_func_col = vp10_iadst32_new, - .txfm_func_row = vp10_iadst32_new}; + 32, // .txfm_size + 12, // .stage_num_col + 12, // .stage_num_row + inv_shift_adst_adst_32, // .shift + inv_stage_range_col_adst_adst_32, // .stage_range_col + inv_stage_range_row_adst_adst_32, // .stage_range_row + inv_cos_bit_col_adst_adst_32, // .cos_bit_col + inv_cos_bit_row_adst_adst_32, // .cos_bit_row + vp10_iadst32_new, // .txfm_func_col + vp10_iadst32_new}; // .txfm_func_row; // ---------------- config inv_adst_dct_4 ---------------- static const int8_t inv_shift_adst_dct_4[2] = {1, -5}; -static const int8_t inv_stage_range_col_adst_dct_4[6] = {17, 17, 17, 17, 16, 16}; +static const int8_t inv_stage_range_col_adst_dct_4[6] = {17, 17, 17, + 17, 16, 16}; static const int8_t inv_stage_range_row_adst_dct_4[4] = {16, 16, 16, 16}; static const int8_t inv_cos_bit_col_adst_dct_4[6] = {15, 15, 15, 15, 15, 15}; static const int8_t inv_cos_bit_row_adst_dct_4[4] = {15, 15, 15, 15}; static const TXFM_2D_CFG inv_txfm_2d_cfg_adst_dct_4 = { - .txfm_size = 4, - .stage_num_col = 6, - .stage_num_row = 4, - - .shift = inv_shift_adst_dct_4, - .stage_range_col = inv_stage_range_col_adst_dct_4, - .stage_range_row = inv_stage_range_row_adst_dct_4, - .cos_bit_col = inv_cos_bit_col_adst_dct_4, - .cos_bit_row = inv_cos_bit_row_adst_dct_4, - .txfm_func_col = vp10_iadst4_new, - .txfm_func_row = vp10_idct4_new}; + 4, // .txfm_size + 6, // .stage_num_col + 4, // .stage_num_row + inv_shift_adst_dct_4, // .shift + inv_stage_range_col_adst_dct_4, // .stage_range_col + inv_stage_range_row_adst_dct_4, // .stage_range_row + inv_cos_bit_col_adst_dct_4, // .cos_bit_col + inv_cos_bit_row_adst_dct_4, // .cos_bit_row + vp10_iadst4_new, // .txfm_func_col + vp10_idct4_new}; // .txfm_func_row; // ---------------- config inv_adst_dct_8 ---------------- static const int8_t inv_shift_adst_dct_8[2] = {-1, -4}; static const int8_t inv_stage_range_col_adst_dct_8[8] = {16, 16, 16, 16, - 16, 16, 15, 15}; -static const int8_t inv_stage_range_row_adst_dct_8[6] = {17, 17, 17, 17, 17, 17}; -static const int8_t inv_cos_bit_col_adst_dct_8[8] = {15, 15, 15, 15, 15, 15, 15, 15}; + 16, 16, 15, 15}; +static const int8_t inv_stage_range_row_adst_dct_8[6] = {17, 17, 17, + 17, 17, 17}; +static const int8_t inv_cos_bit_col_adst_dct_8[8] = {15, 15, 15, 15, + 15, 15, 15, 15}; static const int8_t inv_cos_bit_row_adst_dct_8[6] = {15, 15, 15, 15, 15, 15}; static const TXFM_2D_CFG inv_txfm_2d_cfg_adst_dct_8 = { - .txfm_size = 8, - .stage_num_col = 8, - .stage_num_row = 6, - - .shift = inv_shift_adst_dct_8, - .stage_range_col = inv_stage_range_col_adst_dct_8, - .stage_range_row = inv_stage_range_row_adst_dct_8, - .cos_bit_col = inv_cos_bit_col_adst_dct_8, - .cos_bit_row = inv_cos_bit_row_adst_dct_8, - .txfm_func_col = vp10_iadst8_new, - .txfm_func_row = vp10_idct8_new}; + 8, // .txfm_size + 8, // .stage_num_col + 6, // .stage_num_row + inv_shift_adst_dct_8, // .shift + inv_stage_range_col_adst_dct_8, // .stage_range_col + inv_stage_range_row_adst_dct_8, // .stage_range_row + inv_cos_bit_col_adst_dct_8, // .cos_bit_col + inv_cos_bit_row_adst_dct_8, // .cos_bit_row + vp10_iadst8_new, // .txfm_func_col + vp10_idct8_new}; // .txfm_func_row; // ---------------- config inv_adst_dct_16 ---------------- static const int8_t inv_shift_adst_dct_16[2] = {-1, -5}; static const int8_t inv_stage_range_col_adst_dct_16[10] = {17, 17, 17, 17, 17, - 17, 17, 17, 16, 16}; + 17, 17, 17, 16, 16}; static const int8_t inv_stage_range_row_adst_dct_16[8] = {18, 18, 18, 18, - 18, 18, 18, 18}; + 18, 18, 18, 18}; static const int8_t inv_cos_bit_col_adst_dct_16[10] = {15, 15, 15, 15, 15, - 15, 15, 15, 15, 15}; -static const int8_t inv_cos_bit_row_adst_dct_16[8] = {14, 14, 14, 14, 14, 14, 14, 14}; + 15, 15, 15, 15, 15}; +static const int8_t inv_cos_bit_row_adst_dct_16[8] = {14, 14, 14, 14, + 14, 14, 14, 14}; static const TXFM_2D_CFG inv_txfm_2d_cfg_adst_dct_16 = { - .txfm_size = 16, - .stage_num_col = 10, - .stage_num_row = 8, - - .shift = inv_shift_adst_dct_16, - .stage_range_col = inv_stage_range_col_adst_dct_16, - .stage_range_row = inv_stage_range_row_adst_dct_16, - .cos_bit_col = inv_cos_bit_col_adst_dct_16, - .cos_bit_row = inv_cos_bit_row_adst_dct_16, - .txfm_func_col = vp10_iadst16_new, - .txfm_func_row = vp10_idct16_new}; + 16, // .txfm_size + 10, // .stage_num_col + 8, // .stage_num_row + inv_shift_adst_dct_16, // .shift + inv_stage_range_col_adst_dct_16, // .stage_range_col + inv_stage_range_row_adst_dct_16, // .stage_range_row + inv_cos_bit_col_adst_dct_16, // .cos_bit_col + inv_cos_bit_row_adst_dct_16, // .cos_bit_row + vp10_iadst16_new, // .txfm_func_col + vp10_idct16_new}; // .txfm_func_row; // ---------------- config inv_adst_dct_32 ---------------- static const int8_t inv_shift_adst_dct_32[2] = {-1, -6}; -static const int8_t inv_stage_range_col_adst_dct_32[12] = {18, 18, 18, 18, 18, 18, - 18, 18, 18, 18, 17, 17}; +static const int8_t inv_stage_range_col_adst_dct_32[12] = { + 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 17, 17}; static const int8_t inv_stage_range_row_adst_dct_32[10] = {19, 19, 19, 19, 19, - 19, 19, 19, 19, 19}; + 19, 19, 19, 19, 19}; static const int8_t inv_cos_bit_col_adst_dct_32[12] = {14, 14, 14, 14, 14, 14, - 14, 14, 14, 14, 14, 15}; + 14, 14, 14, 14, 14, 15}; static const int8_t inv_cos_bit_row_adst_dct_32[10] = {13, 13, 13, 13, 13, - 13, 13, 13, 13, 13}; + 13, 13, 13, 13, 13}; static const TXFM_2D_CFG inv_txfm_2d_cfg_adst_dct_32 = { - .txfm_size = 32, - .stage_num_col = 12, - .stage_num_row = 10, - - .shift = inv_shift_adst_dct_32, - .stage_range_col = inv_stage_range_col_adst_dct_32, - .stage_range_row = inv_stage_range_row_adst_dct_32, - .cos_bit_col = inv_cos_bit_col_adst_dct_32, - .cos_bit_row = inv_cos_bit_row_adst_dct_32, - .txfm_func_col = vp10_iadst32_new, - .txfm_func_row = vp10_idct32_new}; + 32, // .txfm_size + 12, // .stage_num_col + 10, // .stage_num_row + inv_shift_adst_dct_32, // .shift + inv_stage_range_col_adst_dct_32, // .stage_range_col + inv_stage_range_row_adst_dct_32, // .stage_range_row + inv_cos_bit_col_adst_dct_32, // .cos_bit_col + inv_cos_bit_row_adst_dct_32, // .cos_bit_row + vp10_iadst32_new, // .txfm_func_col + vp10_idct32_new}; // .txfm_func_row; #endif // VP10_INV_TXFM2D_CFG_H_