From: Krzysztof Parzyszek Date: Thu, 6 Oct 2016 13:05:13 +0000 (+0000) Subject: [RDF] Replace potentially unclear autos with real types X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=78f1992816b549f4922f82e23ecc71e32348ccf2;p=llvm [RDF] Replace potentially unclear autos with real types git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@283445 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/Target/Hexagon/RDFGraph.cpp b/lib/Target/Hexagon/RDFGraph.cpp index d4ced066b57..a051a580114 100644 --- a/lib/Target/Hexagon/RDFGraph.cpp +++ b/lib/Target/Hexagon/RDFGraph.cpp @@ -254,12 +254,12 @@ raw_ostream &operator<< (raw_ostream &OS, template<> raw_ostream &operator<< (raw_ostream &OS, const Print> &P) { - auto *BB = P.Obj.Addr->getCode(); + MachineBasicBlock *BB = P.Obj.Addr->getCode(); unsigned NP = BB->pred_size(); std::vector Ns; auto PrintBBs = [&OS,&P] (std::vector Ns) -> void { unsigned N = Ns.size(); - for (auto I : Ns) { + for (int I : Ns) { OS << "BB#" << I; if (--N) OS << ", "; @@ -268,15 +268,15 @@ raw_ostream &operator<< (raw_ostream &OS, OS << Print(P.Obj.Id, P.G) << ": --- BB#" << BB->getNumber() << " --- preds(" << NP << "): "; - for (auto I : BB->predecessors()) - Ns.push_back(I->getNumber()); + for (MachineBasicBlock *B : BB->predecessors()) + Ns.push_back(B->getNumber()); PrintBBs(Ns); unsigned NS = BB->succ_size(); OS << " succs(" << NS << "): "; Ns.clear(); - for (auto I : BB->successors()) - Ns.push_back(I->getNumber()); + for (MachineBasicBlock *B : BB->successors()) + Ns.push_back(B->getNumber()); PrintBBs(Ns); OS << '\n'; @@ -468,7 +468,7 @@ NodeAddr CodeNode::getLastMember(const DataFlowGraph &G) const { // Add node NA at the end of the member list of the given code node. void CodeNode::addMember(NodeAddr NA, const DataFlowGraph &G) { - auto ML = getLastMember(G); + NodeAddr ML = getLastMember(G); if (ML.Id != 0) { ML.Addr->append(NA); } else { @@ -489,7 +489,7 @@ void CodeNode::addMemberAfter(NodeAddr MA, NodeAddr NA, // Remove member node NA from the given code node. void CodeNode::removeMember(NodeAddr NA, const DataFlowGraph &G) { - auto MA = getFirstMember(G); + NodeAddr MA = getFirstMember(G); assert(MA.Id != 0); // Special handling if the member to remove is the first member. @@ -540,7 +540,7 @@ NodeAddr InstrNode::getOwner(const DataFlowGraph &G) { // Add the phi node PA to the given block node. void BlockNode::addPhi(NodeAddr PA, const DataFlowGraph &G) { - auto M = getFirstMember(G); + NodeAddr M = getFirstMember(G); if (M.Id == 0) { addMember(PA, G); return; @@ -613,7 +613,7 @@ bool TargetOperandInfo::isFixedReg(const MachineInstr &In, unsigned OpNum) return true; // Check for a tail call. if (In.isBranch()) - for (auto &O : In.operands()) + for (const MachineOperand &O : In.operands()) if (O.isGlobal() || O.isSymbol()) return true; @@ -709,7 +709,7 @@ RegisterAggr &RegisterAggr::insert(RegisterRef RR) { } RegisterAggr &RegisterAggr::insert(const RegisterAggr &RG) { - for (auto P : RG.Masks) + for (std::pair P : RG.Masks) setMaskRaw(P.first, P.second); return *this; } @@ -978,10 +978,10 @@ void DataFlowGraph::build(unsigned Options) { if (MF.empty()) return; - for (auto &B : MF) { - auto BA = newBlock(Func, &B); + for (MachineBasicBlock &B : MF) { + NodeAddr BA = newBlock(Func, &B); BlockNodes.insert(std::make_pair(&B, BA)); - for (auto &I : B) { + for (MachineInstr &I : B) { if (I.isDebugValue()) continue; buildStmt(BA, I); @@ -1111,7 +1111,7 @@ void DataFlowGraph::pushDefs(NodeAddr IA, DefStackMap &DefM) { // Assert if the register is defined in two or more unrelated defs. // This could happen if there are two or more def operands defining it. if (!Defined.insert(RR).second) { - auto *MI = NodeAddr(IA).Addr->getCode(); + MachineInstr *MI = NodeAddr(IA).Addr->getCode(); dbgs() << "Multiple definitions of register: " << Print(RR, *this) << " in\n " << *MI << "in BB#" << MI->getParent()->getNumber() << '\n'; @@ -1313,14 +1313,14 @@ NodeAddr DataFlowGraph::getNextShadow(NodeAddr IA, // Create a new statement node in the block node BA that corresponds to // the machine instruction MI. void DataFlowGraph::buildStmt(NodeAddr BA, MachineInstr &In) { - auto SA = newStmt(BA, &In); + NodeAddr SA = newStmt(BA, &In); auto isCall = [] (const MachineInstr &In) -> bool { if (In.isCall()) return true; // Is tail call? if (In.isBranch()) - for (auto &Op : In.operands()) + for (const MachineOperand &Op : In.operands()) if (Op.isGlobal() || Op.isSymbol()) return true; return false; @@ -1474,14 +1474,9 @@ void DataFlowGraph::recordDefsForDF(BlockRefsMap &PhiM, BlockRefsMap &RefM, // This is done to make sure that each defined reference gets only one // phi node, even if it is defined multiple times. RegisterSet Defs; - for (auto I : BA.Addr->members(*this)) { - assert(I.Addr->getType() == NodeAttrs::Code); - assert(I.Addr->getKind() == NodeAttrs::Phi || - I.Addr->getKind() == NodeAttrs::Stmt); - NodeAddr IA = I; + for (NodeAddr IA : BA.Addr->members(*this)) for (NodeAddr RA : IA.Addr->members_if(IsDef, *this)) Defs.insert(RA.Addr->getRegRef()); - } // Calculate the iterated dominance frontier of BB. const MachineDominanceFrontier::DomSetType &DF = DFLoc->second; @@ -1523,19 +1518,19 @@ void DataFlowGraph::buildPhis(BlockRefsMap &PhiM, BlockRefsMap &RefM, // are not covered by another ref (i.e. maximal with respect to covering). auto MaxCoverIn = [this] (RegisterRef RR, RegisterSet &RRs) -> RegisterRef { - for (auto I : RRs) + for (RegisterRef I : RRs) if (I != RR && RegisterAggr::isCoverOf(I, RR, LMI, TRI)) RR = I; return RR; }; RegisterSet MaxDF; - for (auto I : HasDF->second) + for (RegisterRef I : HasDF->second) MaxDF.insert(MaxCoverIn(I, HasDF->second)); std::vector MaxRefs; - auto &RefB = RefM[BA.Id]; - for (auto I : MaxDF) + RegisterSet &RefB = RefM[BA.Id]; + for (RegisterRef I : MaxDF) MaxRefs.push_back(MaxCoverIn(I, RefB)); // Now, for each R in MaxRefs, get the alias closure of R. If the closure @@ -1550,7 +1545,7 @@ void DataFlowGraph::buildPhis(BlockRefsMap &PhiM, BlockRefsMap &RefM, auto Aliased = [this,&MaxRefs](RegisterRef RR, std::vector &Closure) -> bool { - for (auto I : Closure) + for (unsigned I : Closure) if (alias(RR, MaxRefs[I])) return true; return false; @@ -1559,7 +1554,7 @@ void DataFlowGraph::buildPhis(BlockRefsMap &PhiM, BlockRefsMap &RefM, // Prepare a list of NodeIds of the block's predecessors. NodeList Preds; const MachineBasicBlock *MBB = BA.Addr->getCode(); - for (auto PB : MBB->predecessors()) + for (MachineBasicBlock *PB : MBB->predecessors()) Preds.push_back(findBlock(PB)); while (!MaxRefs.empty()) { @@ -1614,7 +1609,7 @@ void DataFlowGraph::removeUnusedPhis() { } static auto HasUsedDef = [](NodeList &Ms) -> bool { - for (auto M : Ms) { + for (NodeAddr M : Ms) { if (M.Addr->getKind() != NodeAttrs::Def) continue; NodeAddr DA = M; @@ -1751,7 +1746,7 @@ void DataFlowGraph::linkBlockRefs(DefStackMap &DefM, NodeAddr BA) { MachineDomTreeNode *N = MDT.getNode(BA.Addr->getCode()); for (auto I : *N) { MachineBasicBlock *SB = I->getBlock(); - auto SBA = findBlock(SB); + NodeAddr SBA = findBlock(SB); linkBlockRefs(DefM, SBA); } @@ -1767,7 +1762,7 @@ void DataFlowGraph::linkBlockRefs(DefStackMap &DefM, NodeAddr BA) { RegisterSet EHLiveIns = getLandingPadLiveIns(); MachineBasicBlock *MBB = BA.Addr->getCode(); - for (auto SB : MBB->successors()) { + for (MachineBasicBlock *SB : MBB->successors()) { bool IsEHPad = SB->isEHPad(); NodeAddr SBA = findBlock(SB); for (NodeAddr IA : SBA.Addr->members_if(IsPhi, *this)) { diff --git a/lib/Target/Hexagon/RDFLiveness.cpp b/lib/Target/Hexagon/RDFLiveness.cpp index 55248899b5f..27808e23258 100644 --- a/lib/Target/Hexagon/RDFLiveness.cpp +++ b/lib/Target/Hexagon/RDFLiveness.cpp @@ -124,14 +124,14 @@ NodeList Liveness::getAllReachingDefs(RegisterRef RefRR, // Get the next level of reaching defs. This will include multiple // reaching defs for shadows. for (auto S : DFG.getRelatedRefs(TA.Addr->getOwner(DFG), TA)) - if (auto RD = NodeAddr(S).Addr->getReachingDef()) + if (NodeId RD = NodeAddr(S).Addr->getReachingDef()) DefQ.insert(RD); } // Remove all non-phi defs that are not aliased to RefRR, and collect // the owners of the remaining defs. SetVector Defs; - for (auto N : DefQ) { + for (NodeId N : DefQ) { auto TA = DFG.addr(N); bool IsPhi = TA.Addr->getFlags() & NodeAttrs::PhiRef; if (!IsPhi && !DFG.alias(RefRR, TA.Addr->getRegRef())) @@ -163,8 +163,8 @@ NodeList Liveness::getAllReachingDefs(RegisterRef RefRR, if (StmtA) { if (!StmtB) // OB is a phi and phis dominate statements. return true; - auto CA = NodeAddr(OA).Addr->getCode(); - auto CB = NodeAddr(OB).Addr->getCode(); + MachineInstr *CA = NodeAddr(OA).Addr->getCode(); + MachineInstr *CB = NodeAddr(OB).Addr->getCode(); // The order must be linear, so tie-break such equalities. if (CA == CB) return A < B; @@ -202,14 +202,14 @@ NodeList Liveness::getAllReachingDefs(RegisterRef RefRR, return TA.Addr->getKind() == NodeAttrs::Def && Defs.count(TA.Id); }; - for (auto T : Tmp) { + for (NodeId T : Tmp) { if (!FullChain && RRs.hasCoverOf(RefRR)) break; auto TA = DFG.addr(T); bool IsPhi = DFG.IsCode(TA); NodeList Ds; for (NodeAddr DA : TA.Addr->members_if(DefInSet, DFG)) { - auto QR = DA.Addr->getRegRef(); + RegisterRef QR = DA.Addr->getRegRef(); // Add phi defs even if they are covered by subsequent defs. This is // for cases where the reached use is not covered by any of the defs // encountered so far: the phi def is needed to expose the liveness @@ -252,13 +252,13 @@ NodeSet Liveness::getAllReachingDefsRec(RegisterRef RefRR, DefRRs.insert(DA.Addr->getRegRef()); } - auto RDs = getAllReachingDefs(RefRR, RefA, true, DefRRs); + NodeList RDs = getAllReachingDefs(RefRR, RefA, true, DefRRs); if (RDs.empty()) return Defs; // Make a copy of the preexisting definitions and add the newly found ones. NodeSet TmpDefs = Defs; - for (auto R : RDs) + for (NodeAddr R : RDs) TmpDefs.insert(R.Id); NodeSet Result = Defs; @@ -298,7 +298,7 @@ NodeSet Liveness::getAllReachedUses(RegisterRef RefRR, while (U != 0) { auto UA = DFG.addr(U); if (!(UA.Addr->getFlags() & NodeAttrs::Undef)) { - auto UR = UA.Addr->getRegRef(); + RegisterRef UR = UA.Addr->getRegRef(); if (DFG.alias(RefRR, UR) && !DefRRs.hasCoverOf(UR)) Uses.insert(U); } @@ -309,7 +309,7 @@ NodeSet Liveness::getAllReachedUses(RegisterRef RefRR, for (NodeId D = DefA.Addr->getReachedDef(), NextD; D != 0; D = NextD) { auto DA = DFG.addr(D); NextD = DA.Addr->getSibling(); - auto DR = DA.Addr->getRegRef(); + RegisterRef DR = DA.Addr->getRegRef(); // If this def is already covered, it cannot reach anything new. // Similarly, skip it if it is not aliased to the interesting register. if (DefRRs.hasCoverOf(DR) || !DFG.alias(RefRR, DR)) @@ -334,7 +334,7 @@ void Liveness::computePhiInfo() { NodeList Phis; NodeAddr FA = DFG.getFunc(); - auto Blocks = FA.Addr->members(DFG); + NodeList Blocks = FA.Addr->members(DFG); for (NodeAddr BA : Blocks) { auto Ps = BA.Addr->members_if(DFG.IsCode, DFG); Phis.insert(Phis.end(), Ps.begin(), Ps.end()); @@ -517,8 +517,7 @@ void Liveness::computePhiInfo() { NodeList PUs = PA.Addr->members_if(DFG.IsRef, DFG); RefMap &RUM = RealUseMap[PA.Id]; - for (auto U : PUs) { - NodeAddr UA = U; + for (NodeAddr UA : PUs) { std::map &PUM = PhiUp[UA.Id]; for (const std::pair &P : PUM) { bool Changed = false; @@ -540,7 +539,7 @@ void Liveness::computePhiInfo() { // Update the set PRUs of real uses reached by the upward phi P with // the actual set of uses (UpReached) that the P phi reaches. RefMap &PRUs = RealUseMap[P.first]; - for (auto R : UpReached) { + for (RegisterRef R : UpReached) { unsigned Z = PRUs[R].size(); PRUs[R].insert(RUM[R].begin(), RUM[R].end()); Changed |= (PRUs[R].size() != Z); @@ -586,7 +585,7 @@ void Liveness::computeLiveIns() { // Compute IDF first, then the inverse. decltype(IIDF) IDF; - for (auto &B : MF) { + for (MachineBasicBlock &B : MF) { auto F1 = MDF.find(&B); if (F1 == MDF.end()) continue; @@ -608,14 +607,14 @@ void Liveness::computeLiveIns() { computePhiInfo(); NodeAddr FA = DFG.getFunc(); - auto Blocks = FA.Addr->members(DFG); + NodeList Blocks = FA.Addr->members(DFG); // Build the phi live-on-entry map. for (NodeAddr BA : Blocks) { MachineBasicBlock *MB = BA.Addr->getCode(); - auto &LON = PhiLON[MB]; + RefMap &LON = PhiLON[MB]; for (auto P : BA.Addr->members_if(DFG.IsCode, DFG)) - for (auto S : RealUseMap[P.Id]) + for (RefMap::value_type S : RealUseMap[P.Id]) LON[S.first].insert(S.second.begin(), S.second.end()); } @@ -630,9 +629,9 @@ void Liveness::computeLiveIns() { // "real" uses. Propagate this set backwards into the block predecessors // through the reaching defs of the corresponding phi uses. for (NodeAddr BA : Blocks) { - auto Phis = BA.Addr->members_if(DFG.IsCode, DFG); + NodeList Phis = BA.Addr->members_if(DFG.IsCode, DFG); for (NodeAddr PA : Phis) { - auto &RUs = RealUseMap[PA.Id]; + RefMap &RUs = RealUseMap[PA.Id]; if (RUs.empty()) continue; @@ -645,8 +644,8 @@ void Liveness::computeLiveIns() { // predecessor. // Remap all the RUs so that they have a correct reaching def. auto PrA = DFG.addr(UA.Addr->getPredecessor()); - auto &LOX = PhiLOX[PrA.Addr->getCode()]; - for (auto R : RUs) { + RefMap &LOX = PhiLOX[PrA.Addr->getCode()]; + for (RefMap::value_type R : RUs) { RegisterRef RR = R.first; if (UA.Addr->getFlags() & NodeAttrs::Shadow) RR = getRestrictedRegRef(UA); @@ -655,7 +654,7 @@ void Liveness::computeLiveIns() { // is not the one that carries this reference, so skip it. if (!DFG.alias(R.first, RR)) continue; - for (auto D : getAllReachingDefs(RR, UA)) + for (NodeAddr D : getAllReachingDefs(RR, UA)) LOX[RR].insert(D.Id); } } // for U : phi uses @@ -679,7 +678,7 @@ void Liveness::computeLiveIns() { if (Trace) { // Dump the liveness map - for (auto &B : MF) { + for (MachineBasicBlock &B : MF) { BitVector LV(TRI.getNumRegs()); for (auto I = B.livein_begin(), E = B.livein_end(); I != E; ++I) LV.set(I->PhysReg); @@ -939,7 +938,7 @@ void Liveness::traverse(MachineBasicBlock *B, RefMap &LiveIn) { RegisterRef RR = UA.Addr->getRegRef(); if (UA.Addr->getFlags() & NodeAttrs::Undef) continue; - for (auto D : getAllReachingDefs(UA)) + for (NodeAddr D : getAllReachingDefs(UA)) if (getBlockWithRef(D.Id) != B) LiveIn[RR].insert(D.Id); } @@ -953,8 +952,8 @@ void Liveness::traverse(MachineBasicBlock *B, RefMap &LiveIn) { // Phi uses should not be propagated up the dominator tree, since they // are not dominated by their corresponding reaching defs. - auto &Local = LiveMap[B]; - auto &LON = PhiLON[B]; + RegisterSet &Local = LiveMap[B]; + RefMap &LON = PhiLON[B]; for (auto R : LON) Local.insert(R.first);