From: Krzysztof Parzyszek Date: Wed, 8 Feb 2017 16:31:00 +0000 (+0000) Subject: [Hexagon] Fix decoding conflict between A2_zxtb and A4_ext X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=7679180cbf6d27b4bf5bc1ca4b906eac3aa38e6e;p=llvm [Hexagon] Fix decoding conflict between A2_zxtb and A4_ext git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294472 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/Target/Hexagon/HexagonInstrAlias.td b/lib/Target/Hexagon/HexagonInstrAlias.td index 7283d94ee75..b1bcbdef11f 100644 --- a/lib/Target/Hexagon/HexagonInstrAlias.td +++ b/lib/Target/Hexagon/HexagonInstrAlias.td @@ -436,6 +436,8 @@ def : InstAlias<"$Pd=cmp.ltu($Rs, $Rt)", // Rd=neg(Rs) is aliased to Rd=sub(#0,Rs) def : InstAlias<"$Rd = neg($Rs)", (A2_subri IntRegs:$Rd, 0, IntRegs:$Rs), 0>; +def : InstAlias<"$Rd=zxtb($Rs)", + (A2_andir IntRegs:$Rd, IntRegs:$Rs, 255)>; def : InstAlias<"m0 = $Rs", (A2_tfrrcr C6, IntRegs:$Rs)>; def : InstAlias<"$Rd = m0", (A2_tfrcrr IntRegs:$Rd, C6)>; diff --git a/lib/Target/Hexagon/HexagonInstrInfo.td b/lib/Target/Hexagon/HexagonInstrInfo.td index dcb231307dc..ece8e3b5cd3 100644 --- a/lib/Target/Hexagon/HexagonInstrInfo.td +++ b/lib/Target/Hexagon/HexagonInstrInfo.td @@ -706,7 +706,7 @@ defm zxth : ALU32_2op_base<"zxth", 0b110>, PredNewRel; // handle 'mapped' instructions, we need to encode 'zxtb' same as 'and' where // immediate operand is set to '255'. -let hasNewValue = 1, opNewValue = 0 in +let hasNewValue = 1, opNewValue = 0, isPseudo = 1, isCodeGenOnly = 1 in class T_ZXTB: ALU32Inst < (outs IntRegs:$Rd), (ins IntRegs:$Rs), "$Rd=zxtb($Rs)", [] >;