From: Tim Northover Date: Mon, 5 Dec 2016 22:20:32 +0000 (+0000) Subject: GlobalISel: handle pointer arguments that get assigned to the stack. X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=75dfa0e7c6a110bea4d3ea60d3177c3fe791e092;p=llvm GlobalISel: handle pointer arguments that get assigned to the stack. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@288717 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/CodeGen/GlobalISel/CallLowering.cpp b/lib/CodeGen/GlobalISel/CallLowering.cpp index 0e37ee61f4f..0cb14261405 100644 --- a/lib/CodeGen/GlobalISel/CallLowering.cpp +++ b/lib/CodeGen/GlobalISel/CallLowering.cpp @@ -107,6 +107,7 @@ bool CallLowering::handleAssignments(MachineIRBuilder &MIRBuilder, ValueHandler &Handler) const { MachineFunction &MF = MIRBuilder.getMF(); const Function &F = *MF.getFunction(); + const DataLayout &DL = F.getParent()->getDataLayout(); SmallVector ArgLocs; CCState CCInfo(F.getCallingConv(), F.isVarArg(), MF, ArgLocs, F.getContext()); @@ -124,7 +125,9 @@ bool CallLowering::handleAssignments(MachineIRBuilder &MIRBuilder, if (VA.isRegLoc()) Handler.assignValueToReg(Args[i].Reg, VA.getLocReg(), VA); else if (VA.isMemLoc()) { - unsigned Size = VA.getValVT().getSizeInBits() / 8; + unsigned Size = VA.getValVT() == MVT::iPTR + ? DL.getPointerSize() + : VA.getValVT().getSizeInBits() / 8; unsigned Offset = VA.getLocMemOffset(); MachinePointerInfo MPO; unsigned StackAddr = Handler.getStackAddress(Size, Offset, MPO); diff --git a/test/CodeGen/AArch64/GlobalISel/call-translator.ll b/test/CodeGen/AArch64/GlobalISel/call-translator.ll index 0b5ed4a00c3..65001a48d97 100644 --- a/test/CodeGen/AArch64/GlobalISel/call-translator.ll +++ b/test/CodeGen/AArch64/GlobalISel/call-translator.ll @@ -146,20 +146,25 @@ define zeroext i8 @test_abi_zext_ret(i8* %addr) { ; CHECK: fixedStack: ; CHECK-DAG: - { id: [[STACK0:[0-9]+]], offset: 0, size: 8 ; CHECK-DAG: - { id: [[STACK8:[0-9]+]], offset: 8, size: 8 +; CHECK-DAG: - { id: [[STACK16:[0-9]+]], offset: 16, size: 8 ; CHECK: [[LHS_ADDR:%[0-9]+]](p0) = G_FRAME_INDEX %fixed-stack.[[STACK0]] ; CHECK: [[LHS:%[0-9]+]](s64) = G_LOAD [[LHS_ADDR]](p0) :: (invariant load 8 from %fixed-stack.[[STACK0]], align 0) ; CHECK: [[RHS_ADDR:%[0-9]+]](p0) = G_FRAME_INDEX %fixed-stack.[[STACK8]] ; CHECK: [[RHS:%[0-9]+]](s64) = G_LOAD [[RHS_ADDR]](p0) :: (invariant load 8 from %fixed-stack.[[STACK8]], align 0) +; CHECK: [[ADDR_ADDR:%[0-9]+]](p0) = G_FRAME_INDEX %fixed-stack.[[STACK16]] +; CHECK: [[ADDR:%[0-9]+]](p0) = G_LOAD [[ADDR_ADDR]](p0) :: (invariant load 8 from %fixed-stack.[[STACK16]], align 0) ; CHECK: [[SUM:%[0-9]+]](s64) = G_ADD [[LHS]], [[RHS]] -; CHECK: %x0 = COPY [[SUM]](s64) -define i64 @test_stack_slots([8 x i64], i64 %lhs, i64 %rhs) { +; CHECK: G_STORE [[SUM]](s64), [[ADDR]](p0) +define void @test_stack_slots([8 x i64], i64 %lhs, i64 %rhs, i64* %addr) { %sum = add i64 %lhs, %rhs - ret i64 %sum + store i64 %sum, i64* %addr + ret void } ; CHECK-LABEL: name: test_call_stack ; CHECK: [[C42:%[0-9]+]](s64) = G_CONSTANT i64 42 ; CHECK: [[C12:%[0-9]+]](s64) = G_CONSTANT i64 12 +; CHECK: [[PTR:%[0-9]+]](p0) = G_CONSTANT i64 0 ; CHECK: [[SP:%[0-9]+]](p0) = COPY %sp ; CHECK: [[C42_OFFS:%[0-9]+]](s64) = G_CONSTANT i64 0 ; CHECK: [[C42_LOC:%[0-9]+]](p0) = G_GEP [[SP]], [[C42_OFFS]](s64) @@ -168,8 +173,12 @@ define i64 @test_stack_slots([8 x i64], i64 %lhs, i64 %rhs) { ; CHECK: [[C12_OFFS:%[0-9]+]](s64) = G_CONSTANT i64 8 ; CHECK: [[C12_LOC:%[0-9]+]](p0) = G_GEP [[SP]], [[C12_OFFS]](s64) ; CHECK: G_STORE [[C12]](s64), [[C12_LOC]](p0) :: (store 8 into stack + 8, align 0) +; CHECK: [[SP:%[0-9]+]](p0) = COPY %sp +; CHECK: [[PTR_OFFS:%[0-9]+]](s64) = G_CONSTANT i64 16 +; CHECK: [[PTR_LOC:%[0-9]+]](p0) = G_GEP [[SP]], [[PTR_OFFS]](s64) +; CHECK: G_STORE [[PTR]](p0), [[PTR_LOC]](p0) :: (store 8 into stack + 16, align 0) ; CHECK: BL @test_stack_slots define void @test_call_stack() { - call i64 @test_stack_slots([8 x i64] undef, i64 42, i64 12) + call void @test_stack_slots([8 x i64] undef, i64 42, i64 12, i64* null) ret void }