From: Ivan Grokhotkov <ivan@espressif.com>
Date: Wed, 14 Jun 2017 09:56:32 +0000 (+0800)
Subject: bootloader: workaround for clock switching bug in ESP32 rev. 0
X-Git-Tag: v2.1-rc1~26^2~6
X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=75658ee29b67712e0c91d987865e306a89dca0f1;p=esp-idf

bootloader: workaround for clock switching bug in ESP32 rev. 0

In ESP32 rev. 0, switching between 240MHz and 80MHz (even via an
intermediate frequency of 40MHz) may cause the chip to lock up.
The bootloader used to enable 80MHz CPU clock at startup, which could
cause lock up after software reset. With this change, if 240MHz CPU
clock is enabled in menuconfig, bootloader will also use 240MHz to avoid
lock-up.
---

diff --git a/components/bootloader/src/main/bootloader_start.c b/components/bootloader/src/main/bootloader_start.c
index de038d4bc4..fd062a5f91 100644
--- a/components/bootloader/src/main/bootloader_start.c
+++ b/components/bootloader/src/main/bootloader_start.c
@@ -701,10 +701,23 @@ void print_flash_info(const esp_image_header_t* phdr)
 static void clock_configure(void)
 {
     /* Set CPU to 80MHz. Keep other clocks unmodified. */
+    rtc_cpu_freq_t cpu_freq = RTC_CPU_FREQ_80M;
+
+    /* On ESP32 rev 0, switching to 80MHz if clock was previously set to
+     * 240 MHz may cause the chip to lock up (see section 3.5 of the errata
+     * document). For rev. 0, switch to 240 instead if it was chosen in
+     * menuconfig.
+     */
+    uint32_t chip_ver_reg = REG_READ(EFUSE_BLK0_RDATA3_REG);
+    if ((chip_ver_reg & EFUSE_RD_CHIP_VER_REV1_M) == 0 &&
+            CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ == 240) {
+        cpu_freq = RTC_CPU_FREQ_240M;
+    }
+
     uart_tx_wait_idle(0);
     rtc_clk_config_t clk_cfg = RTC_CLK_CONFIG_DEFAULT();
     clk_cfg.xtal_freq = CONFIG_ESP32_XTAL_FREQ;
-    clk_cfg.cpu_freq = RTC_CPU_FREQ_80M;
+    clk_cfg.cpu_freq = cpu_freq;
     clk_cfg.slow_freq = rtc_clk_slow_freq_get();
     clk_cfg.fast_freq = rtc_clk_fast_freq_get();
     rtc_clk_init(clk_cfg);