From: Matt Arsenault <Matthew.Arsenault@amd.com>
Date: Mon, 16 Sep 2019 04:21:10 +0000 (+0000)
Subject: AMDGPU/GlobalISel: Remove illegal select tests
X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=7511280318b8c8f5de3cf54ac6cfb52ba1eae9ae;p=llvm

AMDGPU/GlobalISel: Remove illegal select tests

These fail in a release build.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371955 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-constant.mir b/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-constant.mir
index 9c09ac4698e..23c01d3339c 100644
--- a/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-constant.mir
+++ b/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-constant.mir
@@ -196,43 +196,6 @@ body: |
 
 ---
 
-name: load_constant_v3s32
-legalized:       true
-regBankSelected: true
-tracksRegLiveness: true
-
-body: |
-  bb.0:
-    liveins:  $sgpr0_sgpr1
-
-    ; GFX6-LABEL: name: load_constant_v3s32
-    ; GFX6: liveins: $sgpr0_sgpr1
-    ; GFX6: [[COPY:%[0-9]+]]:sgpr(p4) = COPY $sgpr0_sgpr1
-    ; GFX6: [[LOAD:%[0-9]+]]:sreg_96(<3 x s32>) = G_LOAD [[COPY]](p4) :: (load 12, align 4, addrspace 4)
-    ; GFX6: $sgpr0_sgpr1_sgpr2 = COPY [[LOAD]](<3 x s32>)
-    ; GFX7-LABEL: name: load_constant_v3s32
-    ; GFX7: liveins: $sgpr0_sgpr1
-    ; GFX7: [[COPY:%[0-9]+]]:sgpr(p4) = COPY $sgpr0_sgpr1
-    ; GFX7: [[LOAD:%[0-9]+]]:sreg_96(<3 x s32>) = G_LOAD [[COPY]](p4) :: (load 12, align 4, addrspace 4)
-    ; GFX7: $sgpr0_sgpr1_sgpr2 = COPY [[LOAD]](<3 x s32>)
-    ; GFX8-LABEL: name: load_constant_v3s32
-    ; GFX8: liveins: $sgpr0_sgpr1
-    ; GFX8: [[COPY:%[0-9]+]]:sgpr(p4) = COPY $sgpr0_sgpr1
-    ; GFX8: [[LOAD:%[0-9]+]]:sreg_96(<3 x s32>) = G_LOAD [[COPY]](p4) :: (load 12, align 4, addrspace 4)
-    ; GFX8: $sgpr0_sgpr1_sgpr2 = COPY [[LOAD]](<3 x s32>)
-    ; GFX10-LABEL: name: load_constant_v3s32
-    ; GFX10: liveins: $sgpr0_sgpr1
-    ; GFX10: [[COPY:%[0-9]+]]:sgpr(p4) = COPY $sgpr0_sgpr1
-    ; GFX10: [[LOAD:%[0-9]+]]:sreg_96(<3 x s32>) = G_LOAD [[COPY]](p4) :: (load 12, align 4, addrspace 4)
-    ; GFX10: $sgpr0_sgpr1_sgpr2 = COPY [[LOAD]](<3 x s32>)
-    %0:sgpr(p4) = COPY $sgpr0_sgpr1
-    %1:sgpr(<3 x  s32>) = G_LOAD %0 :: (load 12, align 4, addrspace 4)
-    $sgpr0_sgpr1_sgpr2 = COPY %1
-
-...
-
----
-
 name: load_constant_v4s32_align4
 legalized:       true
 regBankSelected: true
@@ -422,43 +385,6 @@ body: |
 
 ---
 
-name: load_constant_s96
-legalized:       true
-regBankSelected: true
-tracksRegLiveness: true
-
-body: |
-  bb.0:
-    liveins:  $sgpr0_sgpr1
-
-    ; GFX6-LABEL: name: load_constant_s96
-    ; GFX6: liveins: $sgpr0_sgpr1
-    ; GFX6: [[COPY:%[0-9]+]]:sgpr(p4) = COPY $sgpr0_sgpr1
-    ; GFX6: [[LOAD:%[0-9]+]]:sgpr(s96) = G_LOAD [[COPY]](p4) :: (load 12, align 4, addrspace 4)
-    ; GFX6: $sgpr0_sgpr1_sgpr2 = COPY [[LOAD]](s96)
-    ; GFX7-LABEL: name: load_constant_s96
-    ; GFX7: liveins: $sgpr0_sgpr1
-    ; GFX7: [[COPY:%[0-9]+]]:sgpr(p4) = COPY $sgpr0_sgpr1
-    ; GFX7: [[LOAD:%[0-9]+]]:sreg_96(s96) = G_LOAD [[COPY]](p4) :: (load 12, align 4, addrspace 4)
-    ; GFX7: $sgpr0_sgpr1_sgpr2 = COPY [[LOAD]](s96)
-    ; GFX8-LABEL: name: load_constant_s96
-    ; GFX8: liveins: $sgpr0_sgpr1
-    ; GFX8: [[COPY:%[0-9]+]]:sgpr(p4) = COPY $sgpr0_sgpr1
-    ; GFX8: [[LOAD:%[0-9]+]]:sreg_96(s96) = G_LOAD [[COPY]](p4) :: (load 12, align 4, addrspace 4)
-    ; GFX8: $sgpr0_sgpr1_sgpr2 = COPY [[LOAD]](s96)
-    ; GFX10-LABEL: name: load_constant_s96
-    ; GFX10: liveins: $sgpr0_sgpr1
-    ; GFX10: [[COPY:%[0-9]+]]:sgpr(p4) = COPY $sgpr0_sgpr1
-    ; GFX10: [[LOAD:%[0-9]+]]:sreg_96(s96) = G_LOAD [[COPY]](p4) :: (load 12, align 4, addrspace 4)
-    ; GFX10: $sgpr0_sgpr1_sgpr2 = COPY [[LOAD]](s96)
-    %0:sgpr(p4) = COPY $sgpr0_sgpr1
-    %1:sgpr(s96) = G_LOAD %0 :: (load 12, align 4, addrspace 4)
-    $sgpr0_sgpr1_sgpr2 = COPY %1
-
-...
-
----
-
 name: load_constant_s128_align4
 legalized:       true
 regBankSelected: true