From: Simon Pilgrim <llvm-dev@redking.me.uk>
Date: Sun, 12 Feb 2017 20:53:44 +0000 (+0000)
Subject: [X86] Fix typo in function name. NFCI.
X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=7096a2fa24a456b89b2abef7ea3d56805b8926c7;p=llvm

[X86] Fix typo in function name. NFCI.

convertBitVectorToUnsiged - convertBitVectorToUnsigned

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294914 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp
index 4331225fc1a..cb002e44580 100644
--- a/lib/Target/X86/X86ISelLowering.cpp
+++ b/lib/Target/X86/X86ISelLowering.cpp
@@ -8189,7 +8189,7 @@ static SDValue getMaskNode(SDValue Mask, MVT MaskVT,
 // Function convertBitVectorToUnsigned - The function gets SmallBitVector
 // as argument and convert him to unsigned.
 // The output of the function is not(zeroable)
-static unsigned convertBitVectorToUnsiged(const SmallBitVector &Zeroable) {
+static unsigned convertBitVectorToUnsigned(const SmallBitVector &Zeroable) {
   unsigned convertBit = 0;
   for (int i = 0, e = Zeroable.size(); i < e; i++)
     convertBit |= !(Zeroable[i]) << i;
@@ -8206,7 +8206,7 @@ static SDValue lowerVectorShuffleToEXPAND(const SDLoc &DL, MVT VT,
   if (!isNonZeroElementsInOrder(Zeroable, Mask, V1.getValueType(),
                                 IsLeftZeroSide))
     return SDValue();
-  unsigned VEXPANDMask = convertBitVectorToUnsiged(Zeroable);
+  unsigned VEXPANDMask = convertBitVectorToUnsigned(Zeroable);
   MVT IntegerType =
       MVT::getIntegerVT(std::max((int)VT.getVectorNumElements(), 8));
   SDValue MaskNode = DAG.getConstant(VEXPANDMask, DL, IntegerType);