From: Daniel Jasper <djasper@google.com>
Date: Tue, 7 Feb 2017 08:57:50 +0000 (+0000)
Subject: Revert "[DAGCombiner] (add X, (adde Y, 0, Carry)) -> (adde X, Y, Carry)"
X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=7085bdc3ceb69147d80399ff08db4833bb41c212;p=llvm

Revert "[DAGCombiner] (add X, (adde Y, 0, Carry)) -> (adde X, Y, Carry)"

This reverts commit r294186.

On an internal test, this triggers an out-of-memory error on PPC,
presumably because there is another dagcombine that does the exact
opposite triggering and endless loop consuming more and more memory.

Chandler has started at creating a reduced test case and we'll attach it
as soon as possible.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294288 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index 97ec5d6b2d7..91f462d2d41 100644
--- a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -1834,12 +1834,6 @@ SDValue DAGCombiner::visitADDLike(SDValue N0, SDValue N1, SDNode *LocReference)
     }
   }
 
-  // (add X, (adde Y, 0, Carry)) -> (adde X, Y, Carry)
-  if (N1.getOpcode() == ISD::ADDE && N1->hasOneUse() &&
-      isNullConstant(N1.getOperand(1)))
-    return DAG.getNode(ISD::ADDE, DL, DAG.getVTList(VT, MVT::Glue),
-                       N0, N1->getOperand(0), N1->getOperand(2));
-
   return SDValue();
 }
 
diff --git a/test/CodeGen/X86/adde-carry.ll b/test/CodeGen/X86/adde-carry.ll
index 62e7e7f8124..e111f683dd3 100644
--- a/test/CodeGen/X86/adde-carry.ll
+++ b/test/CodeGen/X86/adde-carry.ll
@@ -93,16 +93,17 @@ define %scalar @pr31719(%scalar* nocapture readonly %this, %scalar %arg.b) {
 ; CHECK-NEXT:    sbbq %r10, %r10
 ; CHECK-NEXT:    andl $1, %r10d
 ; CHECK-NEXT:    addq 8(%rsi), %rcx
+; CHECK-NEXT:    sbbq %r11, %r11
+; CHECK-NEXT:    andl $1, %r11d
+; CHECK-NEXT:    addq %r10, %rcx
+; CHECK-NEXT:    adcq $0, %r11
+; CHECK-NEXT:    addq 16(%rsi), %r8
 ; CHECK-NEXT:    sbbq %rax, %rax
 ; CHECK-NEXT:    andl $1, %eax
-; CHECK-NEXT:    addq %r10, %rcx
+; CHECK-NEXT:    addq %r11, %r8
 ; CHECK-NEXT:    adcq $0, %rax
-; CHECK-NEXT:    addq 16(%rsi), %r8
-; CHECK-NEXT:    sbbq %r10, %r10
-; CHECK-NEXT:    andl $1, %r10d
 ; CHECK-NEXT:    addq 24(%rsi), %r9
-; CHECK-NEXT:    addq %rax, %r8
-; CHECK-NEXT:    adcq %r10, %r9
+; CHECK-NEXT:    addq %rax, %r9
 ; CHECK-NEXT:    movq %rdx, (%rdi)
 ; CHECK-NEXT:    movq %rcx, 8(%rdi)
 ; CHECK-NEXT:    movq %r8, 16(%rdi)