From: David Green Date: Thu, 27 Jun 2019 16:56:41 +0000 (+0000) Subject: [ARM] Move low overhead loop codegen tests into a separate file. NFC X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=704b871cc4114b405e3b1ae09bd3909a3f9bfa33;p=llvm [ARM] Move low overhead loop codegen tests into a separate file. NFC git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364565 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/test/Transforms/HardwareLoops/ARM/calls-codegen.ll b/test/Transforms/HardwareLoops/ARM/calls-codegen.ll new file mode 100644 index 00000000000..85160ced319 --- /dev/null +++ b/test/Transforms/HardwareLoops/ARM/calls-codegen.ll @@ -0,0 +1,58 @@ +; RUN: llc -mtriple=thumbv8.1m.main-arm-none-eabi -mattr=+lob,+mve.fp -disable-arm-loloops=false %s -o - | FileCheck %s + +; CHECK-LABEL: test_target_specific: +; CHECK: mov.w lr, #50 +; CHECK: dls lr, lr +; CHECK-NOT: mov lr, +; CHECK: [[LOOP_HEADER:\.LBB[0-9_]+]]: +; CHECK: le lr, [[LOOP_HEADER]] +; CHECK-NOT: b . +; CHECK: @ %exit + +define i32 @test_target_specific(i32* %a, i32* %b) { +entry: + br label %loop +loop: + %acc = phi i32 [ 0, %entry ], [ %res, %loop ] + %count = phi i32 [ 0, %entry ], [ %count.next, %loop ] + %addr.a = getelementptr i32, i32* %a, i32 %count + %addr.b = getelementptr i32, i32* %b, i32 %count + %load.a = load i32, i32* %addr.a + %load.b = load i32, i32* %addr.b + %res = call i32 @llvm.arm.smlad(i32 %load.a, i32 %load.b, i32 %acc) + %count.next = add nuw i32 %count, 2 + %cmp = icmp ne i32 %count.next, 100 + br i1 %cmp, label %loop, label %exit +exit: + ret i32 %res +} + +; CHECK-LABEL: test_fabs: +; CHECK: mov.w lr, #100 +; CHECK: dls lr, lr +; CHECK-NOT: mov lr, +; CHECK: [[LOOP_HEADER:\.LBB[0-9_]+]]: +; CHECK-NOT: bl +; CHECK: le lr, [[LOOP_HEADER]] +; CHECK-NOT: b . +; CHECK: @ %exit + +define float @test_fabs(float* %a) { +entry: + br label %loop +loop: + %acc = phi float [ 0.0, %entry ], [ %res, %loop ] + %count = phi i32 [ 0, %entry ], [ %count.next, %loop ] + %addr.a = getelementptr float, float* %a, i32 %count + %load.a = load float, float* %addr.a + %abs = call float @llvm.fabs.f32(float %load.a) + %res = fadd float %abs, %acc + %count.next = add nuw i32 %count, 1 + %cmp = icmp ne i32 %count.next, 100 + br i1 %cmp, label %loop, label %exit +exit: + ret float %res +} + +declare i32 @llvm.arm.smlad(i32, i32, i32) +declare float @llvm.fabs.f32(float) diff --git a/test/Transforms/HardwareLoops/ARM/calls.ll b/test/Transforms/HardwareLoops/ARM/calls.ll index d9018b8730d..d2cce5c3814 100644 --- a/test/Transforms/HardwareLoops/ARM/calls.ll +++ b/test/Transforms/HardwareLoops/ARM/calls.ll @@ -3,7 +3,6 @@ ; RUN: opt -mtriple=thumbv8.1m.main-arm-none-eabi -mattr=+fp-armv8,+fullfp16 -hardware-loops -disable-arm-loloops=false %s -S -o - | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-FP64 ; RUN: opt -mtriple=thumbv8.1m.main-arm-none-eabi -mattr=+mve -hardware-loops -disable-arm-loloops=false %s -S -o - | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-MVE ; RUN: opt -mtriple=thumbv8.1m.main-arm-none-eabi -mattr=+mve.fp -hardware-loops -disable-arm-loloops=false %s -S -o - | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-MVEFP -; RUN: llc -mtriple=thumbv8.1m.main-arm-none-eabi -mattr=+lob,+mve.fp -disable-arm-loloops=false %s -o - | FileCheck %s --check-prefix=CHECK-LLC ; CHECK-LABEL: skip_call ; CHECK-NOT: call void @llvm.set.loop.iterations @@ -41,15 +40,6 @@ while.end: ; CHECK: [[CMP:%[^ ]+]] = icmp ne i32 [[LOOP_DEC]], 0 ; CHECK: br i1 [[CMP]], label %loop, label %exit -; CHECK-LLC-LABEL: test_target_specific: -; CHECK-LLC: mov.w lr, #50 -; CHECK-LLC: dls lr, lr -; CHECK-LLC-NOT: mov lr, -; CHECK-LLC: [[LOOP_HEADER:\.LBB[0-9_]+]]: -; CHECK-LLC: le lr, [[LOOP_HEADER]] -; CHECK-LLC-NOT: b . -; CHECK-LLC: @ %exit - define i32 @test_target_specific(i32* %a, i32* %b) { entry: br label %loop @@ -96,16 +86,6 @@ exit: ; CHECK-FP: call void @llvm.set.loop.iterations.i32(i32 100) ; CHECK-MVEFP: call void @llvm.set.loop.iterations.i32(i32 100) -; CHECK-LLC-LABEL: test_fabs: -; CHECK-LLC: mov.w lr, #100 -; CHECK-LLC: dls lr, lr -; CHECK-LLC-NOT: mov lr, -; CHECK-LLC: [[LOOP_HEADER:\.LBB[0-9_]+]]: -; CHECK-LLC-NOT: bl -; CHECK-LLC: le lr, [[LOOP_HEADER]] -; CHECK-LLC-NOT: b . -; CHECK-LLC: @ %exit - define float @test_fabs(float* %a) { entry: br label %loop