From: Krzysztof Parzyszek <kparzysz@codeaurora.org>
Date: Tue, 14 Mar 2017 15:21:33 +0000 (+0000)
Subject: [Hexagon] Fix a condition in HexagonEarlyIfConv.cpp
X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=702396c9dc871145eec4e675ee6a8f8f62793e07;p=llvm

[Hexagon] Fix a condition in HexagonEarlyIfConv.cpp

This fixes llvm.org/PR32265.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@297745 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/Target/Hexagon/HexagonEarlyIfConv.cpp b/lib/Target/Hexagon/HexagonEarlyIfConv.cpp
index 4418b57f6a0..ccce8c136c3 100644
--- a/lib/Target/Hexagon/HexagonEarlyIfConv.cpp
+++ b/lib/Target/Hexagon/HexagonEarlyIfConv.cpp
@@ -482,7 +482,7 @@ unsigned HexagonEarlyIfConversion::computePhiCost(const MachineBasicBlock *B,
     const MachineOperand &RB = MI.getOperand(3);
     assert(RA.isReg() && RB.isReg());
     // Must have a MUX if the phi uses a subregister.
-    if (RA.getSubReg() != 0 || RA.getSubReg() != 0) {
+    if (RA.getSubReg() != 0 || RB.getSubReg() != 0) {
       Cost++;
       continue;
     }