From: Sumanth Gundapaneni <sgundapa@codeaurora.org>
Date: Fri, 30 Jun 2017 20:21:48 +0000 (+0000)
Subject: [Hexagon] Emit jump tables in text section based on a flag
X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=7005a5a0471a6e99204d0f7639ea297cacc94a9f;p=llvm

[Hexagon] Emit jump tables in text section based on a flag

This patch adds a new LLVM flag -hexagon-emit-jt-text which is defaulted to
"false". The value "true" emits the switch generated jump tables in text section.
Differential Revision: https://reviews.llvm.org/D34820


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306872 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/Target/Hexagon/HexagonTargetObjectFile.cpp b/lib/Target/Hexagon/HexagonTargetObjectFile.cpp
index 4dacb150139..34df2ebcc52 100644
--- a/lib/Target/Hexagon/HexagonTargetObjectFile.cpp
+++ b/lib/Target/Hexagon/HexagonTargetObjectFile.cpp
@@ -49,6 +49,10 @@ static cl::opt<bool> TraceGVPlacement("trace-gv-placement",
   cl::Hidden, cl::init(false),
   cl::desc("Trace global value placement"));
 
+static cl::opt<bool>
+    EmitJtInText("hexagon-emit-jt-text", cl::Hidden, cl::init(false),
+                 cl::desc("Emit hexagon jump tables in function section"));
+
 // TraceGVPlacement controls messages for all builds. For builds with assertions
 // (debug or release), messages are also controlled by the usual debug flags
 // (e.g. -debug and -debug-only=globallayout)
@@ -256,6 +260,11 @@ unsigned HexagonTargetObjectFile::getSmallDataSize() const {
   return SmallDataThreshold;
 }
 
+bool HexagonTargetObjectFile::shouldPutJumpTableInFunctionSection(
+    bool UsesLabelDifference, const Function &F) const {
+  return EmitJtInText;
+}
+
 /// Descends any type down to "elementary" components,
 /// discovering the smallest addressable one.
 /// If zero is returned, declaration will not be modified.
diff --git a/lib/Target/Hexagon/HexagonTargetObjectFile.h b/lib/Target/Hexagon/HexagonTargetObjectFile.h
index 58dff2b95e1..373d850b53b 100644
--- a/lib/Target/Hexagon/HexagonTargetObjectFile.h
+++ b/lib/Target/Hexagon/HexagonTargetObjectFile.h
@@ -33,6 +33,9 @@ namespace llvm {
 
     unsigned getSmallDataSize() const;
 
+    bool shouldPutJumpTableInFunctionSection(bool UsesLabelDifference,
+                                             const Function &F) const override;
+
   private:
     MCSectionELF *SmallDataSection;
     MCSectionELF *SmallBSSSection;
diff --git a/test/CodeGen/Hexagon/jt-in-text.ll b/test/CodeGen/Hexagon/jt-in-text.ll
new file mode 100644
index 00000000000..62b5caef6aa
--- /dev/null
+++ b/test/CodeGen/Hexagon/jt-in-text.ll
@@ -0,0 +1,57 @@
+; RUN: llc -hexagon-emit-jt-text=true < %s | FileCheck %s
+target datalayout = "e-m:e-p:32:32:32-a:0-n16:32-i64:64:64-i32:32:32-i16:16:16-i1:8:8-f32:32:32-f64:64:64-v32:32:32-v64:64:64-v512:512:512-v1024:1024:1024-v2048:2048:2048"
+target triple = "hexagon-unknown--elf"
+
+; CHECK: .text
+; CHECK-NOT: .rodata
+; CHECK: .word
+
+@lane0_pwr_st = global i32 0, align 4
+@lane1_pwr_st = global i32 0, align 4
+@lane2_pwr_st = global i32 0, align 4
+@lane3_pwr_st = global i32 0, align 4
+
+; Function Attrs: noinline nounwind
+define void @test2(i32 %lane_id, i32 %rx_pwr_st) #0 {
+entry:
+  %lane_id.addr = alloca i32, align 4
+  %rx_pwr_st.addr = alloca i32, align 4
+  store i32 %lane_id, i32* %lane_id.addr, align 4
+  store i32 %rx_pwr_st, i32* %rx_pwr_st.addr, align 4
+  %0 = load i32, i32* %lane_id.addr, align 4
+  switch i32 %0, label %sw.epilog [
+    i32 0, label %sw.bb
+    i32 1, label %sw.bb1
+    i32 2, label %sw.bb2
+    i32 3, label %sw.bb3
+    i32 15, label %sw.bb4
+  ]
+
+sw.bb:                                            ; preds = %entry
+  store i32 1, i32* @lane0_pwr_st, align 4
+  br label %sw.epilog
+
+sw.bb1:                                           ; preds = %entry
+  store i32 1, i32* @lane1_pwr_st, align 4
+  br label %sw.epilog
+
+sw.bb2:                                           ; preds = %entry
+  store i32 1, i32* @lane2_pwr_st, align 4
+  br label %sw.epilog
+
+sw.bb3:                                           ; preds = %entry
+  store i32 1, i32* @lane3_pwr_st, align 4
+  br label %sw.epilog
+
+sw.bb4:                                           ; preds = %entry
+  store i32 1, i32* @lane0_pwr_st, align 4
+  store i32 1, i32* @lane1_pwr_st, align 4
+  store i32 1, i32* @lane2_pwr_st, align 4
+  store i32 1, i32* @lane3_pwr_st, align 4
+  br label %sw.epilog
+
+sw.epilog:                                        ; preds = %entry, %sw.bb4, %sw.bb3, %sw.bb2, %sw.bb1, %sw.bb
+  ret void
+}
+
+attributes #0 = { noinline nounwind "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="hexagonv60" "target-features"="-hvx-double,-long-calls" "unsafe-fp-math"="false" "use-soft-float"="false" }