From: Simon Pilgrim <llvm-dev@redking.me.uk>
Date: Sun, 8 Sep 2019 12:44:22 +0000 (+0000)
Subject: [X86][SSE] Fix out of range shift introduced in D67070/rL371328
X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=6d5347c31262a7ebf9da226e5dc46e28335a86b8;p=llvm

[X86][SSE] Fix out of range shift introduced in D67070/rL371328

Use APInt to create the comparison mask instead.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371330 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp
index f5c9971a3c5..5e5ec5c6c8b 100644
--- a/lib/Target/X86/X86ISelLowering.cpp
+++ b/lib/Target/X86/X86ISelLowering.cpp
@@ -35944,7 +35944,8 @@ static SDValue combineHorizontalPredicateResult(SDNode *Extract,
     CondCode = ISD::CondCode::SETNE;
   } else {
     // all_of -> MOVMSK == ((1 << NumElts) - 1)
-    CmpC = DAG.getConstant((1ULL << NumElts) - 1, DL, CmpVT);
+    CmpC = DAG.getConstant(APInt::getLowBitsSet(CmpVT.getSizeInBits(), NumElts),
+                           DL, CmpVT);
     CondCode = ISD::CondCode::SETEQ;
   }
 
diff --git a/test/CodeGen/X86/vector-reduce-and-bool.ll b/test/CodeGen/X86/vector-reduce-and-bool.ll
index b9cdb2f0225..49add302bf4 100644
--- a/test/CodeGen/X86/vector-reduce-and-bool.ll
+++ b/test/CodeGen/X86/vector-reduce-and-bool.ll
@@ -866,7 +866,7 @@ define i1 @trunc_v64i8_v64i1(<64 x i8>) {
 ; AVX512BW-NEXT:    vpsllw $7, %zmm0, %zmm0
 ; AVX512BW-NEXT:    vpmovb2m %zmm0, %k0
 ; AVX512BW-NEXT:    kortestq %k0, %k0
-; AVX512BW-NEXT:    sete %al
+; AVX512BW-NEXT:    setb %al
 ; AVX512BW-NEXT:    vzeroupper
 ; AVX512BW-NEXT:    retq
 ;
@@ -875,7 +875,7 @@ define i1 @trunc_v64i8_v64i1(<64 x i8>) {
 ; AVX512VL-NEXT:    vpsllw $7, %zmm0, %zmm0
 ; AVX512VL-NEXT:    vpmovb2m %zmm0, %k0
 ; AVX512VL-NEXT:    kortestq %k0, %k0
-; AVX512VL-NEXT:    sete %al
+; AVX512VL-NEXT:    setb %al
 ; AVX512VL-NEXT:    vzeroupper
 ; AVX512VL-NEXT:    retq
   %a = trunc <64 x i8> %0 to <64 x i1>
@@ -1744,7 +1744,7 @@ define i1 @icmp_v64i8_v64i1(<64 x i8>) {
 ; AVX512BW:       # %bb.0:
 ; AVX512BW-NEXT:    vptestnmb %zmm0, %zmm0, %k0
 ; AVX512BW-NEXT:    kortestq %k0, %k0
-; AVX512BW-NEXT:    sete %al
+; AVX512BW-NEXT:    setb %al
 ; AVX512BW-NEXT:    vzeroupper
 ; AVX512BW-NEXT:    retq
 ;
@@ -1752,7 +1752,7 @@ define i1 @icmp_v64i8_v64i1(<64 x i8>) {
 ; AVX512VL:       # %bb.0:
 ; AVX512VL-NEXT:    vptestnmb %zmm0, %zmm0, %k0
 ; AVX512VL-NEXT:    kortestq %k0, %k0
-; AVX512VL-NEXT:    sete %al
+; AVX512VL-NEXT:    setb %al
 ; AVX512VL-NEXT:    vzeroupper
 ; AVX512VL-NEXT:    retq
   %a = icmp eq <64 x i8> %0, zeroinitializer