From: Quentin Colombet Date: Thu, 13 Oct 2016 18:46:38 +0000 (+0000) Subject: [AArch64][RegisterBankInfo] Switch to fully static opds mapping for G_BITCAST. X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=68e8f618d9e6291eacb1b68089cb4ba847943d7e;p=llvm [AArch64][RegisterBankInfo] Switch to fully static opds mapping for G_BITCAST. NFC. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284146 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/Target/AArch64/AArch64RegisterBankInfo.cpp b/lib/Target/AArch64/AArch64RegisterBankInfo.cpp index 04a2083e1b7..962c4c79ae2 100644 --- a/lib/Target/AArch64/AArch64RegisterBankInfo.cpp +++ b/lib/Target/AArch64/AArch64RegisterBankInfo.cpp @@ -477,10 +477,16 @@ AArch64RegisterBankInfo::getInstrMapping(const MachineInstr &MI) const { case TargetOpcode::G_BITCAST: { LLT DstTy = MRI.getType(MI.getOperand(0).getReg()); LLT SrcTy = MRI.getType(MI.getOperand(1).getReg()); - // If we are on the same bank, we can use the "same kind" mapping. - if (DstTy.isVector() == SrcTy.isVector()) - return getSameKindOfOperandsMapping(MI); - break; + unsigned Size = DstTy.getSizeInBits(); + bool DstIsGPR = !DstTy.isVector(); + bool SrcIsGPR = !SrcTy.isVector(); + const RegisterBank &DstRB = + DstIsGPR ? AArch64::GPRRegBank : AArch64::FPRRegBank; + const RegisterBank &SrcRB = + SrcIsGPR ? AArch64::GPRRegBank : AArch64::FPRRegBank; + return InstructionMapping{DefaultMappingID, copyCost(DstRB, SrcRB, Size), + AArch64::getCopyMapping(DstIsGPR, SrcIsGPR, Size), + /*NumOperands*/ 2}; } default: break;