From: Sanjay Patel <spatel@rotateright.com>
Date: Tue, 28 Nov 2017 19:13:23 +0000 (+0000)
Subject: [InstCombine] auto-generate complete test checks; NFC
X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=67b235da2e83aaaacd5f6cb3ef570690cf9e9f52;p=llvm

[InstCombine] auto-generate complete test checks; NFC


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319205 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/test/Transforms/InstCombine/bswap.ll b/test/Transforms/InstCombine/bswap.ll
index 39102bb3171..5312c08e573 100644
--- a/test/Transforms/InstCombine/bswap.ll
+++ b/test/Transforms/InstCombine/bswap.ll
@@ -1,10 +1,12 @@
-target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128-n8:16:32"
-
 ; RUN: opt < %s -instcombine -S | FileCheck %s
 
-; CHECK-LABEL: @test1
-; CHECK: call i32 @llvm.bswap.i32(i32 %i)
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128-n8:16:32"
+
 define i32 @test1(i32 %i) {
+; CHECK-LABEL: @test1(
+; CHECK-NEXT:    [[TMP12:%.*]] = call i32 @llvm.bswap.i32(i32 %i)
+; CHECK-NEXT:    ret i32 [[TMP12]]
+;
   %tmp1 = lshr i32 %i, 24
   %tmp3 = lshr i32 %i, 8
   %tmp4 = and i32 %tmp3, 65280
@@ -17,9 +19,11 @@ define i32 @test1(i32 %i) {
   ret i32 %tmp12
 }
 
-; CHECK-LABEL: @test2
-; CHECK: call i32 @llvm.bswap.i32(i32 %arg)
 define i32 @test2(i32 %arg) {
+; CHECK-LABEL: @test2(
+; CHECK-NEXT:    [[TMP14:%.*]] = call i32 @llvm.bswap.i32(i32 %arg)
+; CHECK-NEXT:    ret i32 [[TMP14]]
+;
   %tmp2 = shl i32 %arg, 24
   %tmp4 = shl i32 %arg, 8
   %tmp5 = and i32 %tmp4, 16711680
@@ -32,27 +36,33 @@ define i32 @test2(i32 %arg) {
   ret i32 %tmp14
 }
 
-; CHECK-LABEL: @test3
-; CHECK: call i16 @llvm.bswap.i16(i16 %s)
 define i16 @test3(i16 %s) {
+; CHECK-LABEL: @test3(
+; CHECK-NEXT:    [[TMP5:%.*]] = call i16 @llvm.bswap.i16(i16 %s)
+; CHECK-NEXT:    ret i16 [[TMP5]]
+;
   %tmp2 = lshr i16 %s, 8
   %tmp4 = shl i16 %s, 8
   %tmp5 = or i16 %tmp2, %tmp4
   ret i16 %tmp5
 }
 
-; CHECK-LABEL: @test4
-; CHECK: call i16 @llvm.bswap.i16(i16 %s)
 define i16 @test4(i16 %s) {
+; CHECK-LABEL: @test4(
+; CHECK-NEXT:    [[TMP5:%.*]] = call i16 @llvm.bswap.i16(i16 %s)
+; CHECK-NEXT:    ret i16 [[TMP5]]
+;
   %tmp2 = lshr i16 %s, 8
   %tmp4 = shl i16 %s, 8
   %tmp5 = or i16 %tmp4, %tmp2
   ret i16 %tmp5
 }
 
-; CHECK-LABEL: @test5
-; CHECK: call i16 @llvm.bswap.i16(i16 %a)
 define i16 @test5(i16 %a) {
+; CHECK-LABEL: @test5(
+; CHECK-NEXT:    [[TMP_UPGRD_3:%.*]] = call i16 @llvm.bswap.i16(i16 %a)
+; CHECK-NEXT:    ret i16 [[TMP_UPGRD_3]]
+;
   %tmp = zext i16 %a to i32
   %tmp1 = and i32 %tmp, 65280
   %tmp2 = ashr i32 %tmp1, 8
@@ -68,9 +78,11 @@ define i16 @test5(i16 %a) {
 }
 
 ; PR2842
-; CHECK-LABEL: @test6
-; CHECK: call i32 @llvm.bswap.i32(i32 %x)
 define i32 @test6(i32 %x) nounwind readnone {
+; CHECK-LABEL: @test6(
+; CHECK-NEXT:    [[TMP7:%.*]] = call i32 @llvm.bswap.i32(i32 %x)
+; CHECK-NEXT:    ret i32 [[TMP7]]
+;
   %tmp = shl i32 %x, 16
   %x.mask = and i32 %x, 65280
   %tmp1 = lshr i32 %x, 16
@@ -84,9 +96,11 @@ define i32 @test6(i32 %x) nounwind readnone {
 }
 
 ; PR23863
-; CHECK-LABEL: @test7
-; CHECK: call i32 @llvm.bswap.i32(i32 %x)
 define i32 @test7(i32 %x) {
+; CHECK-LABEL: @test7(
+; CHECK-NEXT:    [[OR6:%.*]] = call i32 @llvm.bswap.i32(i32 %x)
+; CHECK-NEXT:    ret i32 [[OR6]]
+;
   %shl = shl i32 %x, 16
   %shr = lshr i32 %x, 16
   %or = or i32 %shl, %shr
@@ -98,10 +112,11 @@ define i32 @test7(i32 %x) {
   ret i32 %or6
 }
 
-; CHECK-LABEL: @test8
-; CHECK: call i16 @llvm.bswap.i16(i16 %a)
 define i16 @test8(i16 %a) {
-entry:
+; CHECK-LABEL: @test8(
+; CHECK-NEXT:    [[REV:%.*]] = call i16 @llvm.bswap.i16(i16 %a)
+; CHECK-NEXT:    ret i16 [[REV]]
+;
   %conv = zext i16 %a to i32
   %shr = lshr i16 %a, 8
   %shl = shl i32 %conv, 8
@@ -111,10 +126,11 @@ entry:
   ret i16 %conv2
 }
 
-; CHECK-LABEL: @test9
-; CHECK: call i16 @llvm.bswap.i16(i16 %a)
 define i16 @test9(i16 %a) {
-entry:
+; CHECK-LABEL: @test9(
+; CHECK-NEXT:    [[REV:%.*]] = call i16 @llvm.bswap.i16(i16 %a)
+; CHECK-NEXT:    ret i16 [[REV]]
+;
   %conv = zext i16 %a to i32
   %shr = lshr i32 %conv, 8
   %shl = shl i32 %conv, 8
@@ -123,10 +139,12 @@ entry:
   ret i16 %conv2
 }
 
-; CHECK-LABEL: @test10
-; CHECK: trunc i32 %a to i16
-; CHECK: call i16 @llvm.bswap.i16(i16 %trunc)
 define i16 @test10(i32 %a) {
+; CHECK-LABEL: @test10(
+; CHECK-NEXT:    [[TRUNC:%.*]] = trunc i32 %a to i16
+; CHECK-NEXT:    [[REV:%.*]] = call i16 @llvm.bswap.i16(i16 [[TRUNC]])
+; CHECK-NEXT:    ret i16 [[REV]]
+;
   %shr1 = lshr i32 %a, 8
   %and1 = and i32 %shr1, 255
   %and2 = shl i32 %a, 8
@@ -135,3 +153,4 @@ define i16 @test10(i32 %a) {
   %conv = trunc i32 %or to i16
   ret i16 %conv
 }
+