From: Matt Arsenault Date: Fri, 22 Feb 2019 19:16:52 +0000 (+0000) Subject: CodeGen: Make RegAllocRegistry a template class X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=664a45f97eda052882b4b2d0896b29e69eafd71b;p=llvm CodeGen: Make RegAllocRegistry a template class Will allow re-using the machinery for independent sets of register allocators. This will allow AMDGPU to use separate command line options for the allocator to use for SGPRs separate from VGPRs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354687 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/include/llvm/CodeGen/RegAllocRegistry.h b/include/llvm/CodeGen/RegAllocRegistry.h index 7077aa30450..9a63674689b 100644 --- a/include/llvm/CodeGen/RegAllocRegistry.h +++ b/include/llvm/CodeGen/RegAllocRegistry.h @@ -22,29 +22,30 @@ class FunctionPass; //===----------------------------------------------------------------------===// /// -/// RegisterRegAlloc class - Track the registration of register allocators. +/// RegisterRegAllocBase class - Track the registration of register allocators. /// //===----------------------------------------------------------------------===// -class RegisterRegAlloc : public MachinePassRegistryNode { +template +class RegisterRegAllocBase : public MachinePassRegistryNode { public: using FunctionPassCtor = FunctionPass *(*)(); static MachinePassRegistry Registry; - RegisterRegAlloc(const char *N, const char *D, FunctionPassCtor C) + RegisterRegAllocBase(const char *N, const char *D, FunctionPassCtor C) : MachinePassRegistryNode(N, D, C) { Registry.Add(this); } - ~RegisterRegAlloc() { Registry.Remove(this); } + ~RegisterRegAllocBase() { Registry.Remove(this); } // Accessors. - RegisterRegAlloc *getNext() const { - return (RegisterRegAlloc *)MachinePassRegistryNode::getNext(); + SubClass *getNext() const { + return static_cast(MachinePassRegistryNode::getNext()); } - static RegisterRegAlloc *getList() { - return (RegisterRegAlloc *)Registry.getList(); + static SubClass *getList() { + return static_cast(Registry.getList()); } static FunctionPassCtor getDefault() { return Registry.getDefault(); } @@ -56,6 +57,17 @@ public: } }; +class RegisterRegAlloc : public RegisterRegAllocBase { +public: + RegisterRegAlloc(const char *N, const char *D, FunctionPassCtor C) + : RegisterRegAllocBase(N, D, C) {} +}; + +/// RegisterRegAlloc's global Registry tracks allocator registration. +template +MachinePassRegistry +RegisterRegAllocBase::Registry; + } // end namespace llvm #endif // LLVM_CODEGEN_REGALLOCREGISTRY_H diff --git a/lib/CodeGen/TargetPassConfig.cpp b/lib/CodeGen/TargetPassConfig.cpp index 85c00119114..399f69680af 100644 --- a/lib/CodeGen/TargetPassConfig.cpp +++ b/lib/CodeGen/TargetPassConfig.cpp @@ -1038,10 +1038,6 @@ bool TargetPassConfig::getOptimizeRegAlloc() const { llvm_unreachable("Invalid optimize-regalloc state"); } -/// RegisterRegAlloc's global Registry tracks allocator registration. -MachinePassRegistry - RegisterRegAlloc::Registry; - /// A dummy default pass factory indicates whether the register allocator is /// overridden on the command line. static llvm::once_flag InitializeDefaultRegisterAllocatorFlag;