From: Simon Pilgrim <llvm-dev@redking.me.uk>
Date: Wed, 15 Feb 2017 14:06:17 +0000 (+0000)
Subject: [X86] Regenerate i64 ext-load on 32-bit target tests
X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=64bd85693fb39262e8fb58f464b402f5a6413ef6;p=llvm

[X86] Regenerate i64 ext-load on 32-bit target tests

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295177 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/test/CodeGen/X86/2012-07-10-extload64.ll b/test/CodeGen/X86/2012-07-10-extload64.ll
index a366102fbd7..a41123e40a5 100644
--- a/test/CodeGen/X86/2012-07-10-extload64.ll
+++ b/test/CodeGen/X86/2012-07-10-extload64.ll
@@ -1,32 +1,42 @@
-; RUN: llc < %s -march=x86 -mcpu=corei7 -mtriple=i686-pc-win32 | FileCheck %s
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=i686-pc-win32 -mcpu=corei7 | FileCheck %s
 
-; CHECK: load_store
 define void @load_store(<4 x i16>* %in) {
+; CHECK-LABEL: load_store:
+; CHECK:       # BB#0: # %entry
+; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; CHECK-NEXT:    pmovzxwd {{.*#+}} xmm0 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero
+; CHECK-NEXT:    paddw %xmm0, %xmm0
+; CHECK-NEXT:    pshufb {{.*#+}} xmm0 = xmm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
+; CHECK-NEXT:    movq %xmm0, (%eax)
+; CHECK-NEXT:    retl
 entry:
-; CHECK: pmovzxwd
   %A27 = load <4 x i16>, <4 x i16>* %in, align 4
   %A28 = add <4 x i16> %A27, %A27
-; CHECK: movq
   store <4 x i16> %A28, <4 x i16>* %in, align 4
   ret void
-; CHECK: ret
 }
 
 ; Make sure that we store a 64bit value, even on 32bit systems.
-;CHECK-LABEL: store_64:
 define void @store_64(<2 x i32>* %ptr) {
+; CHECK-LABEL: store_64:
+; CHECK:       # BB#0: # %BB
+; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; CHECK-NEXT:    xorps %xmm0, %xmm0
+; CHECK-NEXT:    movlps %xmm0, (%eax)
+; CHECK-NEXT:    retl
 BB:
   store <2 x i32> zeroinitializer, <2 x i32>* %ptr
   ret void
-;CHECK: movlps
-;CHECK: ret
 }
 
-;CHECK-LABEL: load_64:
 define <2 x i32> @load_64(<2 x i32>* %ptr) {
+; CHECK-LABEL: load_64:
+; CHECK:       # BB#0: # %BB
+; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; CHECK-NEXT:    pmovzxdq {{.*#+}} xmm0 = mem[0],zero,mem[1],zero
+; CHECK-NEXT:    retl
 BB:
   %t = load <2 x i32>, <2 x i32>* %ptr
   ret <2 x i32> %t
-;CHECK: pmovzxdq
-;CHECK: ret
 }