From: Simon Pilgrim Date: Wed, 11 Jan 2017 16:38:20 +0000 (+0000) Subject: Remove trailing whitespace. NFCI. X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=62a30b4d3b7994ffce1c0a3b933102c8e4ab7f9e;p=llvm Remove trailing whitespace. NFCI. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291680 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index 8c8810a4c3d..24749eb2487 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -12845,7 +12845,7 @@ static SDValue lowerV4X128VectorShuffle(const SDLoc &DL, MVT VT, /// \brief Handle lowering of 8-lane 64-bit floating point shuffles. static SDValue lowerV8F64VectorShuffle(const SDLoc &DL, ArrayRef Mask, - const SmallBitVector &Zeroable, + const SmallBitVector &Zeroable, SDValue V1, SDValue V2, const X86Subtarget &Subtarget, SelectionDAG &DAG) { @@ -12897,7 +12897,7 @@ static SDValue lowerV8F64VectorShuffle(const SDLoc &DL, ArrayRef Mask, /// \brief Handle lowering of 16-lane 32-bit floating point shuffles. static SDValue lowerV16F32VectorShuffle(SDLoc DL, ArrayRef Mask, - const SmallBitVector &Zeroable, + const SmallBitVector &Zeroable, SDValue V1, SDValue V2, const X86Subtarget &Subtarget, SelectionDAG &DAG) { @@ -31220,7 +31220,7 @@ static SDValue foldVectorXorShiftIntoCmp(SDNode *N, SelectionDAG &DAG, return DAG.getNode(X86ISD::PCMPGT, SDLoc(N), VT, Shift.getOperand(0), Ones); } -/// Check if truncation with saturation form type \p SrcVT to \p DstVT +/// Check if truncation with saturation form type \p SrcVT to \p DstVT /// is valid for the given \p Subtarget. static bool isSATValidOnAVX512Subtarget(EVT SrcVT, EVT DstVT, const X86Subtarget &Subtarget) {