From: Simon Pilgrim Date: Sun, 25 Jun 2017 17:04:58 +0000 (+0000) Subject: [X86][SSE] Remove unused memopfsf32_128/memopfsf64_128 scalar memops X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=61b5c7bb8bedc962478589fef019da31fe5e9f34;p=llvm [X86][SSE] Remove unused memopfsf32_128/memopfsf64_128 scalar memops The 'scalar' simd bitops were dropped a while ago git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306248 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/Target/X86/X86InstrFragmentsSIMD.td b/lib/Target/X86/X86InstrFragmentsSIMD.td index a6fcd57377e..8b5bbf24f6f 100644 --- a/lib/Target/X86/X86InstrFragmentsSIMD.td +++ b/lib/Target/X86/X86InstrFragmentsSIMD.td @@ -754,16 +754,6 @@ def memopv4f32 : PatFrag<(ops node:$ptr), (v4f32 (memop node:$ptr))>; def memopv2f64 : PatFrag<(ops node:$ptr), (v2f64 (memop node:$ptr))>; def memopv2i64 : PatFrag<(ops node:$ptr), (v2i64 (memop node:$ptr))>; -// These are needed to match a scalar memop that is used in a vector-only -// math instruction such as the FP logical ops: andps, andnps, orps, xorps. -// The memory operand is required to be a 128-bit load, so it must be converted -// from a vector to a scalar. -def memopfsf32_128 : PatFrag<(ops node:$ptr), - (f32 (extractelt (memopv4f32 node:$ptr), (iPTR 0)))>; -def memopfsf64_128 : PatFrag<(ops node:$ptr), - (f64 (extractelt (memopv2f64 node:$ptr), (iPTR 0)))>; - - // SSSE3 uses MMX registers for some instructions. They aren't aligned on a // 16-byte boundary. // FIXME: 8 byte alignment for mmx reads is not required