From: Logan Chien <tzuhsiang.chien@gmail.com>
Date: Thu, 3 Apr 2014 13:12:44 +0000 (+0000)
Subject: Code cleanup (re-indent)
X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=5fdd7751b7138de87245ac49ad68bd44aff11d5b;p=clang

Code cleanup (re-indent)


git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@205536 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/Driver/Tools.cpp b/lib/Driver/Tools.cpp
index fe79150884..6acc3d5f58 100644
--- a/lib/Driver/Tools.cpp
+++ b/lib/Driver/Tools.cpp
@@ -839,13 +839,13 @@ void Clang::AddARMTargetArgs(const ArgList &Args,
                     true))
     CmdArgs.push_back("-no-implicit-float");
 
-    // llvm does not support reserving registers in general. There is support
-    // for reserving r9 on ARM though (defined as a platform-specific register
-    // in ARM EABI).
-    if (Args.hasArg(options::OPT_ffixed_r9)) {
-      CmdArgs.push_back("-backend-option");
-      CmdArgs.push_back("-arm-reserve-r9");
-    }
+  // llvm does not support reserving registers in general. There is support
+  // for reserving r9 on ARM though (defined as a platform-specific register
+  // in ARM EABI).
+  if (Args.hasArg(options::OPT_ffixed_r9)) {
+    CmdArgs.push_back("-backend-option");
+    CmdArgs.push_back("-arm-reserve-r9");
+  }
 }
 
 /// getARM64TargetCPU - Get the (LLVM) name of the ARM64 cpu we are targeting.