From: Krzysztof Parzyszek Date: Wed, 6 Dec 2017 16:40:37 +0000 (+0000) Subject: [Hexagon] Generate HVX code for vector construction and access X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=5f226216130b6fb4b3270924f682d14d6fc06351;p=llvm [Hexagon] Generate HVX code for vector construction and access Support for: - build vector, - extract vector element, subvector, - insert vector element, subvector, - shuffle. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319901 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/Target/Hexagon/CMakeLists.txt b/lib/Target/Hexagon/CMakeLists.txt index ac6a5fcd081..9f30f2b7cc3 100644 --- a/lib/Target/Hexagon/CMakeLists.txt +++ b/lib/Target/Hexagon/CMakeLists.txt @@ -35,7 +35,9 @@ add_llvm_target(HexagonCodeGen HexagonHazardRecognizer.cpp HexagonInstrInfo.cpp HexagonISelDAGToDAG.cpp + HexagonISelDAGToDAGHVX.cpp HexagonISelLowering.cpp + HexagonISelLoweringHVX.cpp HexagonLoopIdiomRecognition.cpp HexagonMachineFunctionInfo.cpp HexagonMachineScheduler.cpp diff --git a/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp b/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp index 2551fe5a140..d0cd143a4d4 100644 --- a/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp +++ b/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp @@ -754,7 +754,6 @@ void HexagonDAGToDAGISel::SelectBitcast(SDNode *N) { CurDAG->RemoveDeadNode(N); } - void HexagonDAGToDAGISel::Select(SDNode *N) { if (N->isMachineOpcode()) return N->setNodeId(-1); // Already selected. @@ -772,6 +771,13 @@ void HexagonDAGToDAGISel::Select(SDNode *N) { case ISD::INTRINSIC_WO_CHAIN: return SelectIntrinsicWOChain(N); } + if (HST->useHVXOps()) { + switch (N->getOpcode()) { + case ISD::VECTOR_SHUFFLE: return SelectHvxShuffle(N); + case HexagonISD::VROR: return SelectHvxRor(N); + } + } + SelectCode(N); } diff --git a/lib/Target/Hexagon/HexagonISelDAGToDAG.h b/lib/Target/Hexagon/HexagonISelDAGToDAG.h index 4a7f4b79f8f..e3e22a39fc1 100644 --- a/lib/Target/Hexagon/HexagonISelDAGToDAG.h +++ b/lib/Target/Hexagon/HexagonISelDAGToDAG.h @@ -26,6 +26,7 @@ namespace llvm { class MachineFunction; class HexagonInstrInfo; class HexagonRegisterInfo; +class HexagonTargetLowering; class HexagonDAGToDAGISel : public SelectionDAGISel { const HexagonSubtarget *HST; @@ -100,13 +101,25 @@ public: void SelectConstant(SDNode *N); void SelectConstantFP(SDNode *N); void SelectBitcast(SDNode *N); - void SelectVectorShuffle(SDNode *N); - // Include the pieces autogenerated from the target description. + // Include the declarations autogenerated from the selection patterns. #define GET_DAGISEL_DECL #include "HexagonGenDAGISel.inc" private: + // This is really only to get access to ReplaceNode (which is a protected + // member). Any other members used by HvxSelector can be moved around to + // make them accessible). + friend struct HvxSelector; + + SDValue selectUndef(const SDLoc &dl, MVT ResTy) { + SDNode *U = CurDAG->getMachineNode(TargetOpcode::IMPLICIT_DEF, dl, ResTy); + return SDValue(U, 0); + } + + void SelectHvxShuffle(SDNode *N); + void SelectHvxRor(SDNode *N); + bool keepsLowBits(const SDValue &Val, unsigned NumBits, SDValue &Src); bool isOrEquivalentToAdd(const SDNode *N) const; bool isAlignedMemNode(const MemSDNode *N) const; diff --git a/lib/Target/Hexagon/HexagonISelDAGToDAGHVX.cpp b/lib/Target/Hexagon/HexagonISelDAGToDAGHVX.cpp new file mode 100644 index 00000000000..a636e4e1557 --- /dev/null +++ b/lib/Target/Hexagon/HexagonISelDAGToDAGHVX.cpp @@ -0,0 +1,1924 @@ +//===-- HexagonISelDAGToDAGHVX.cpp ----------------------------------------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#include "Hexagon.h" +#include "HexagonISelDAGToDAG.h" +#include "HexagonISelLowering.h" +#include "HexagonTargetMachine.h" +#include "llvm/CodeGen/MachineInstrBuilder.h" +#include "llvm/CodeGen/SelectionDAGISel.h" +#include "llvm/IR/Intrinsics.h" +#include "llvm/Support/CommandLine.h" +#include "llvm/Support/Debug.h" + +#include +#include +#include +#include +#include + +#define DEBUG_TYPE "hexagon-isel" + +using namespace llvm; + +// -------------------------------------------------------------------- +// Implementation of permutation networks. + +// Implementation of the node routing through butterfly networks: +// - Forward delta. +// - Reverse delta. +// - Benes. +// +// +// Forward delta network consists of log(N) steps, where N is the number +// of inputs. In each step, an input can stay in place, or it can get +// routed to another position[1]. The step after that consists of two +// networks, each half in size in terms of the number of nodes. In those +// terms, in the given step, an input can go to either the upper or the +// lower network in the next step. +// +// [1] Hexagon's vdelta/vrdelta allow an element to be routed to both +// positions as long as there is no conflict. + +// Here's a delta network for 8 inputs, only the switching routes are +// shown: +// +// Steps: +// |- 1 ---------------|- 2 -----|- 3 -| +// +// Inp[0] *** *** *** *** Out[0] +// \ / \ / \ / +// \ / \ / X +// \ / \ / / \ +// Inp[1] *** \ / *** X *** *** Out[1] +// \ \ / / \ / \ / +// \ \ / / X X +// \ \ / / / \ / \ +// Inp[2] *** \ \ / / *** X *** *** Out[2] +// \ \ X / / / \ \ / +// \ \ / \ / / / \ X +// \ X X / / \ / \ +// Inp[3] *** \ / \ / \ / *** *** *** Out[3] +// \ X X X / +// \ / \ / \ / \ / +// X X X X +// / \ / \ / \ / \ +// / X X X \ +// Inp[4] *** / \ / \ / \ *** *** *** Out[4] +// / X X \ \ / \ / +// / / \ / \ \ \ / X +// / / X \ \ \ / / \ +// Inp[5] *** / / \ \ *** X *** *** Out[5] +// / / \ \ \ / \ / +// / / \ \ X X +// / / \ \ / \ / \ +// Inp[6] *** / \ *** X *** *** Out[6] +// / \ / \ \ / +// / \ / \ X +// / \ / \ / \ +// Inp[7] *** *** *** *** Out[7] +// +// +// Reverse delta network is same as delta network, with the steps in +// the opposite order. +// +// +// Benes network is a forward delta network immediately followed by +// a reverse delta network. + + +// Graph coloring utility used to partition nodes into two groups: +// they will correspond to nodes routed to the upper and lower networks. +struct Coloring { + enum : uint8_t { + None = 0, + Red, + Black + }; + + using Node = int; + using MapType = std::map; + static constexpr Node Ignore = Node(-1); + + Coloring(ArrayRef Ord) : Order(Ord) { + build(); + if (!color()) + Colors.clear(); + } + + const MapType &colors() const { + return Colors; + } + + uint8_t other(uint8_t Color) { + if (Color == None) + return Red; + return Color == Red ? Black : Red; + } + + void dump() const; + +private: + ArrayRef Order; + MapType Colors; + std::set Needed; + + using NodeSet = std::set; + std::map Edges; + + Node conj(Node Pos) { + Node Num = Order.size(); + return (Pos < Num/2) ? Pos + Num/2 : Pos - Num/2; + } + + uint8_t getColor(Node N) { + auto F = Colors.find(N); + return F != Colors.end() ? F->second : None; + } + + std::pair getUniqueColor(const NodeSet &Nodes); + + void build(); + bool color(); +}; + +std::pair Coloring::getUniqueColor(const NodeSet &Nodes) { + uint8_t Color = None; + for (Node N : Nodes) { + uint8_t ColorN = getColor(N); + if (ColorN == None) + continue; + if (Color == None) + Color = ColorN; + else if (Color != None && Color != ColorN) + return { false, None }; + } + return { true, Color }; +} + +void Coloring::build() { + // Add Order[P] and Order[conj(P)] to Edges. + for (unsigned P = 0; P != Order.size(); ++P) { + Node I = Order[P]; + if (I != Ignore) { + Needed.insert(I); + Node PC = Order[conj(P)]; + if (PC != Ignore && PC != I) + Edges[I].insert(PC); + } + } + // Add I and conj(I) to Edges. + for (unsigned I = 0; I != Order.size(); ++I) { + if (!Needed.count(I)) + continue; + Node C = conj(I); + // This will create an entry in the edge table, even if I is not + // connected to any other node. This is necessary, because it still + // needs to be colored. + NodeSet &Is = Edges[I]; + if (Needed.count(C)) + Is.insert(C); + } +} + +bool Coloring::color() { + SetVector FirstQ; + auto Enqueue = [this,&FirstQ] (Node N) { + SetVector Q; + Q.insert(N); + for (unsigned I = 0; I != Q.size(); ++I) { + NodeSet &Ns = Edges[Q[I]]; + Q.insert(Ns.begin(), Ns.end()); + } + FirstQ.insert(Q.begin(), Q.end()); + }; + for (Node N : Needed) + Enqueue(N); + + for (Node N : FirstQ) { + if (Colors.count(N)) + continue; + NodeSet &Ns = Edges[N]; + auto P = getUniqueColor(Ns); + if (!P.first) + return false; + Colors[N] = other(P.second); + } + + // First, color nodes that don't have any dups. + for (auto E : Edges) { + Node N = E.first; + if (!Needed.count(conj(N)) || Colors.count(N)) + continue; + auto P = getUniqueColor(E.second); + if (!P.first) + return false; + Colors[N] = other(P.second); + } + + // Now, nodes that are still uncolored. Since the graph can be modified + // in this step, create a work queue. + std::vector WorkQ; + for (auto E : Edges) { + Node N = E.first; + if (!Colors.count(N)) + WorkQ.push_back(N); + } + + for (unsigned I = 0; I < WorkQ.size(); ++I) { + Node N = WorkQ[I]; + NodeSet &Ns = Edges[N]; + auto P = getUniqueColor(Ns); + if (P.first) { + Colors[N] = other(P.second); + continue; + } + + // Coloring failed. Split this node. + Node C = conj(N); + uint8_t ColorN = other(None); + uint8_t ColorC = other(ColorN); + NodeSet &Cs = Edges[C]; + NodeSet CopyNs = Ns; + for (Node M : CopyNs) { + uint8_t ColorM = getColor(M); + if (ColorM == ColorC) { + // Connect M with C, disconnect M from N. + Cs.insert(M); + Edges[M].insert(C); + Ns.erase(M); + Edges[M].erase(N); + } + } + Colors[N] = ColorN; + Colors[C] = ColorC; + } + + // Explicitly assign "None" all all uncolored nodes. + for (unsigned I = 0; I != Order.size(); ++I) + if (Colors.count(I) == 0) + Colors[I] = None; + + return true; +} + +LLVM_DUMP_METHOD +void Coloring::dump() const { + dbgs() << "{ Order: {"; + for (unsigned I = 0; I != Order.size(); ++I) { + Node P = Order[I]; + if (P != Ignore) + dbgs() << ' ' << P; + else + dbgs() << " -"; + } + dbgs() << " }\n"; + dbgs() << " Needed: {"; + for (Node N : Needed) + dbgs() << ' ' << N; + dbgs() << " }\n"; + + dbgs() << " Edges: {\n"; + for (auto E : Edges) { + dbgs() << " " << E.first << " -> {"; + for (auto N : E.second) + dbgs() << ' ' << N; + dbgs() << " }\n"; + } + dbgs() << " }\n"; + + static const char *const Names[] = { "None", "Red", "Black" }; + dbgs() << " Colors: {\n"; + for (auto C : Colors) + dbgs() << " " << C.first << " -> " << Names[C.second] << "\n"; + dbgs() << " }\n}\n"; +} + +// Base class of for reordering networks. They don't strictly need to be +// permutations, as outputs with repeated occurrences of an input element +// are allowed. +struct PermNetwork { + using Controls = std::vector; + using ElemType = int; + static constexpr ElemType Ignore = ElemType(-1); + + enum : uint8_t { + None, + Pass, + Switch + }; + enum : uint8_t { + Forward, + Reverse + }; + + PermNetwork(ArrayRef Ord, unsigned Mult = 1) { + Order.assign(Ord.data(), Ord.data()+Ord.size()); + Log = 0; + + unsigned S = Order.size(); + while (S >>= 1) + ++Log; + + Table.resize(Order.size()); + for (RowType &Row : Table) + Row.resize(Mult*Log, None); + } + + void getControls(Controls &V, unsigned StartAt, uint8_t Dir) const { + unsigned Size = Order.size(); + V.resize(Size); + for (unsigned I = 0; I != Size; ++I) { + unsigned W = 0; + for (unsigned L = 0; L != Log; ++L) { + unsigned C = ctl(I, StartAt+L) == Switch; + if (Dir == Forward) + W |= C << (Log-1-L); + else + W |= C << L; + } + assert(isUInt<8>(W)); + V[I] = uint8_t(W); + } + } + + uint8_t ctl(ElemType Pos, unsigned Step) const { + return Table[Pos][Step]; + } + unsigned size() const { + return Order.size(); + } + unsigned steps() const { + return Log; + } + +protected: + unsigned Log; + std::vector Order; + using RowType = std::vector; + std::vector Table; +}; + +struct ForwardDeltaNetwork : public PermNetwork { + ForwardDeltaNetwork(ArrayRef Ord) : PermNetwork(Ord) {} + + bool run(Controls &V) { + if (!route(Order.data(), Table.data(), size(), 0)) + return false; + getControls(V, 0, Forward); + return true; + } + +private: + bool route(ElemType *P, RowType *T, unsigned Size, unsigned Step); +}; + +struct ReverseDeltaNetwork : public PermNetwork { + ReverseDeltaNetwork(ArrayRef Ord) : PermNetwork(Ord) {} + + bool run(Controls &V) { + if (!route(Order.data(), Table.data(), size(), 0)) + return false; + getControls(V, 0, Reverse); + return true; + } + +private: + bool route(ElemType *P, RowType *T, unsigned Size, unsigned Step); +}; + +struct BenesNetwork : public PermNetwork { + BenesNetwork(ArrayRef Ord) : PermNetwork(Ord, 2) {} + + bool run(Controls &F, Controls &R) { + if (!route(Order.data(), Table.data(), size(), 0)) + return false; + + getControls(F, 0, Forward); + getControls(R, Log, Reverse); + return true; + } + +private: + bool route(ElemType *P, RowType *T, unsigned Size, unsigned Step); +}; + + +bool ForwardDeltaNetwork::route(ElemType *P, RowType *T, unsigned Size, + unsigned Step) { + bool UseUp = false, UseDown = false; + ElemType Num = Size; + + // Cannot use coloring here, because coloring is used to determine + // the "big" switch, i.e. the one that changes halves, and in a forward + // network, a color can be simultaneously routed to both halves in the + // step we're working on. + for (ElemType J = 0; J != Num; ++J) { + ElemType I = P[J]; + // I is the position in the input, + // J is the position in the output. + if (I == Ignore) + continue; + uint8_t S; + if (I < Num/2) + S = (J < Num/2) ? Pass : Switch; + else + S = (J < Num/2) ? Switch : Pass; + + // U is the element in the table that needs to be updated. + ElemType U = (S == Pass) ? I : (I < Num/2 ? I+Num/2 : I-Num/2); + if (U < Num/2) + UseUp = true; + else + UseDown = true; + if (T[U][Step] != S && T[U][Step] != None) + return false; + T[U][Step] = S; + } + + for (ElemType J = 0; J != Num; ++J) + if (P[J] != Ignore && P[J] >= Num/2) + P[J] -= Num/2; + + if (Step+1 < Log) { + if (UseUp && !route(P, T, Size/2, Step+1)) + return false; + if (UseDown && !route(P+Size/2, T+Size/2, Size/2, Step+1)) + return false; + } + return true; +} + +bool ReverseDeltaNetwork::route(ElemType *P, RowType *T, unsigned Size, + unsigned Step) { + unsigned Pets = Log-1 - Step; + bool UseUp = false, UseDown = false; + ElemType Num = Size; + + // In this step half-switching occurs, so coloring can be used. + Coloring G({P,Size}); + const Coloring::MapType &M = G.colors(); + if (M.empty()) + return false; + + uint8_t ColorUp = Coloring::None; + for (ElemType J = 0; J != Num; ++J) { + ElemType I = P[J]; + // I is the position in the input, + // J is the position in the output. + if (I == Ignore) + continue; + uint8_t C = M.at(I); + if (C == Coloring::None) + continue; + // During "Step", inputs cannot switch halves, so if the "up" color + // is still unknown, make sure that it is selected in such a way that + // "I" will stay in the same half. + bool InpUp = I < Num/2; + if (ColorUp == Coloring::None) + ColorUp = InpUp ? C : G.other(C); + if ((C == ColorUp) != InpUp) { + // If I should go to a different half than where is it now, give up. + return false; + } + + uint8_t S; + if (InpUp) { + S = (J < Num/2) ? Pass : Switch; + UseUp = true; + } else { + S = (J < Num/2) ? Switch : Pass; + UseDown = true; + } + T[J][Pets] = S; + } + + // Reorder the working permutation according to the computed switch table + // for the last step (i.e. Pets). + for (ElemType J = 0; J != Size/2; ++J) { + ElemType PJ = P[J]; // Current values of P[J] + ElemType PC = P[J+Size/2]; // and P[conj(J)] + ElemType QJ = PJ; // New values of P[J] + ElemType QC = PC; // and P[conj(J)] + if (T[J][Pets] == Switch) + QC = PJ; + if (T[J+Size/2][Pets] == Switch) + QJ = PC; + P[J] = QJ; + P[J+Size/2] = QC; + } + + for (ElemType J = 0; J != Num; ++J) + if (P[J] != Ignore && P[J] >= Num/2) + P[J] -= Num/2; + + if (Step+1 < Log) { + if (UseUp && !route(P, T, Size/2, Step+1)) + return false; + if (UseDown && !route(P+Size/2, T+Size/2, Size/2, Step+1)) + return false; + } + return true; +} + +bool BenesNetwork::route(ElemType *P, RowType *T, unsigned Size, + unsigned Step) { + Coloring G({P,Size}); + const Coloring::MapType &M = G.colors(); + if (M.empty()) + return false; + ElemType Num = Size; + + unsigned Pets = 2*Log-1 - Step; + bool UseUp = false, UseDown = false; + + // Both assignments, i.e. Red->Up and Red->Down are valid, but they will + // result in different controls. Let's pick the one where the first + // control will be "Pass". + uint8_t ColorUp = Coloring::None; + for (ElemType J = 0; J != Num; ++J) { + ElemType I = P[J]; + if (I == Ignore) + continue; + uint8_t C = M.at(I); + if (C == Coloring::None) + continue; + if (ColorUp == Coloring::None) { + ColorUp = (I < Num/2) ? Coloring::Red : Coloring::Black; + } + unsigned CI = (I < Num/2) ? I+Num/2 : I-Num/2; + if (C == ColorUp) { + if (I < Num/2) + T[I][Step] = Pass; + else + T[CI][Step] = Switch; + T[J][Pets] = (J < Num/2) ? Pass : Switch; + UseUp = true; + } else { // Down + if (I < Num/2) + T[CI][Step] = Switch; + else + T[I][Step] = Pass; + T[J][Pets] = (J < Num/2) ? Switch : Pass; + UseDown = true; + } + } + + // Reorder the working permutation according to the computed switch table + // for the last step (i.e. Pets). + for (ElemType J = 0; J != Num/2; ++J) { + ElemType PJ = P[J]; // Current values of P[J] + ElemType PC = P[J+Num/2]; // and P[conj(J)] + ElemType QJ = PJ; // New values of P[J] + ElemType QC = PC; // and P[conj(J)] + if (T[J][Pets] == Switch) + QC = PJ; + if (T[J+Num/2][Pets] == Switch) + QJ = PC; + P[J] = QJ; + P[J+Num/2] = QC; + } + + for (ElemType J = 0; J != Num; ++J) + if (P[J] != Ignore && P[J] >= Num/2) + P[J] -= Num/2; + + if (Step+1 < Log) { + if (UseUp && !route(P, T, Size/2, Step+1)) + return false; + if (UseDown && !route(P+Size/2, T+Size/2, Size/2, Step+1)) + return false; + } + return true; +} + +// -------------------------------------------------------------------- +// Support for building selection results (output instructions that are +// parts of the final selection). + +struct OpRef { + OpRef(SDValue V) : OpV(V) {} + bool isValue() const { return OpV.getNode() != nullptr; } + bool isValid() const { return isValue() || !(OpN & Invalid); } + static OpRef res(int N) { return OpRef(Whole | (N & Index)); } + static OpRef fail() { return OpRef(Invalid); } + + static OpRef lo(const OpRef &R) { + assert(!R.isValue()); + return OpRef(R.OpN & (Undef | Index | LoHalf)); + } + static OpRef hi(const OpRef &R) { + assert(!R.isValue()); + return OpRef(R.OpN & (Undef | Index | HiHalf)); + } + static OpRef undef(MVT Ty) { return OpRef(Undef | Ty.SimpleTy); } + + // Direct value. + SDValue OpV = SDValue(); + + // Reference to the operand of the input node: + // If the 31st bit is 1, it's undef, otherwise, bits 28..0 are the + // operand index: + // If bit 30 is set, it's the high half of the operand. + // If bit 29 is set, it's the low half of the operand. + unsigned OpN = 0; + + enum : unsigned { + Invalid = 0x10000000, + LoHalf = 0x20000000, + HiHalf = 0x40000000, + Whole = LoHalf | HiHalf, + Undef = 0x80000000, + Index = 0x0FFFFFFF, // Mask of the index value. + IndexBits = 28, + }; + + void print(raw_ostream &OS, const SelectionDAG &G) const; + +private: + OpRef(unsigned N) : OpN(N) {} +}; + +struct NodeTemplate { + NodeTemplate() = default; + unsigned Opc = 0; + MVT Ty = MVT::Other; + std::vector Ops; + + void print(raw_ostream &OS, const SelectionDAG &G) const; +}; + +struct ResultStack { + ResultStack(SDNode *Inp) + : InpNode(Inp), InpTy(Inp->getValueType(0).getSimpleVT()) {} + SDNode *InpNode; + MVT InpTy; + unsigned push(const NodeTemplate &Res) { + List.push_back(Res); + return List.size()-1; + } + unsigned push(unsigned Opc, MVT Ty, std::vector &&Ops) { + NodeTemplate Res; + Res.Opc = Opc; + Res.Ty = Ty; + Res.Ops = Ops; + return push(Res); + } + bool empty() const { return List.empty(); } + unsigned size() const { return List.size(); } + unsigned top() const { return size()-1; } + const NodeTemplate &operator[](unsigned I) const { return List[I]; } + unsigned reset(unsigned NewTop) { + List.resize(NewTop+1); + return NewTop; + } + + using BaseType = std::vector; + BaseType::iterator begin() { return List.begin(); } + BaseType::iterator end() { return List.end(); } + BaseType::const_iterator begin() const { return List.begin(); } + BaseType::const_iterator end() const { return List.end(); } + + BaseType List; + + void print(raw_ostream &OS, const SelectionDAG &G) const; +}; + +void OpRef::print(raw_ostream &OS, const SelectionDAG &G) const { + if (isValue()) { + OpV.getNode()->print(OS, &G); + return; + } + if (OpN & Invalid) { + OS << "invalid"; + return; + } + if (OpN & Undef) { + OS << "undef"; + return; + } + if ((OpN & Whole) != Whole) { + assert((OpN & Whole) == LoHalf || (OpN & Whole) == HiHalf); + if (OpN & LoHalf) + OS << "lo "; + else + OS << "hi "; + } + OS << '#' << SignExtend32(OpN & Index, IndexBits); +} + +void NodeTemplate::print(raw_ostream &OS, const SelectionDAG &G) const { + const TargetInstrInfo &TII = *G.getSubtarget().getInstrInfo(); + OS << format("%8s", EVT(Ty).getEVTString().c_str()) << " " + << TII.getName(Opc); + bool Comma = false; + for (const auto &R : Ops) { + if (Comma) + OS << ','; + Comma = true; + OS << ' '; + R.print(OS, G); + } +} + +void ResultStack::print(raw_ostream &OS, const SelectionDAG &G) const { + OS << "Input node:\n"; + InpNode->dumpr(&G); + OS << "Result templates:\n"; + for (unsigned I = 0, E = List.size(); I != E; ++I) { + OS << '[' << I << "] "; + List[I].print(OS, G); + OS << '\n'; + } +} + +struct ShuffleMask { + ShuffleMask(ArrayRef M) : Mask(M) { + for (unsigned I = 0, E = Mask.size(); I != E; ++I) { + int M = Mask[I]; + if (M == -1) + continue; + MinSrc = (MinSrc == -1) ? M : std::min(MinSrc, M); + MaxSrc = (MaxSrc == -1) ? M : std::max(MaxSrc, M); + } + } + + ArrayRef Mask; + int MinSrc = -1, MaxSrc = -1; + + ShuffleMask lo() const { + size_t H = Mask.size()/2; + return ShuffleMask({Mask.data(), H}); + } + ShuffleMask hi() const { + size_t H = Mask.size()/2; + return ShuffleMask({Mask.data()+H, H}); + } +}; + +// -------------------------------------------------------------------- +// The HvxSelector class. + +static const HexagonTargetLowering &getHexagonLowering(SelectionDAG &G) { + return static_cast(G.getTargetLoweringInfo()); +} +static const HexagonSubtarget &getHexagonSubtarget(SelectionDAG &G) { + return static_cast(G.getSubtarget()); +} + +namespace llvm { + struct HvxSelector { + const HexagonTargetLowering &Lower; + HexagonDAGToDAGISel &ISel; + SelectionDAG &DAG; + const HexagonSubtarget &HST; + const unsigned HwLen; + + HvxSelector(HexagonDAGToDAGISel &HS, SelectionDAG &G) + : Lower(getHexagonLowering(G)), ISel(HS), DAG(G), + HST(getHexagonSubtarget(G)), HwLen(HST.getVectorLength()) {} + + MVT getSingleVT(MVT ElemTy) const { + unsigned NumElems = HwLen / (ElemTy.getSizeInBits()/8); + return MVT::getVectorVT(ElemTy, NumElems); + } + + MVT getPairVT(MVT ElemTy) const { + unsigned NumElems = (2*HwLen) / (ElemTy.getSizeInBits()/8); + return MVT::getVectorVT(ElemTy, NumElems); + } + + void selectShuffle(SDNode *N); + void selectRor(SDNode *N); + + private: + void materialize(const ResultStack &Results); + + SDValue getVectorConstant(ArrayRef Data, const SDLoc &dl); + + enum : unsigned { + None, + PackMux, + }; + OpRef concat(OpRef Va, OpRef Vb, ResultStack &Results); + OpRef packs(ShuffleMask SM, OpRef Va, OpRef Vb, ResultStack &Results, + MutableArrayRef NewMask, unsigned Options = None); + OpRef packp(ShuffleMask SM, OpRef Va, OpRef Vb, ResultStack &Results, + MutableArrayRef NewMask); + OpRef zerous(ShuffleMask SM, OpRef Va, ResultStack &Results); + OpRef vmuxs(ArrayRef Bytes, OpRef Va, OpRef Vb, + ResultStack &Results); + OpRef vmuxp(ArrayRef Bytes, OpRef Va, OpRef Vb, + ResultStack &Results); + + OpRef shuffs1(ShuffleMask SM, OpRef Va, ResultStack &Results); + OpRef shuffs2(ShuffleMask SM, OpRef Va, OpRef Vb, ResultStack &Results); + OpRef shuffp1(ShuffleMask SM, OpRef Va, ResultStack &Results); + OpRef shuffp2(ShuffleMask SM, OpRef Va, OpRef Vb, ResultStack &Results); + + OpRef butterfly(ShuffleMask SM, OpRef Va, ResultStack &Results); + OpRef contracting(ShuffleMask SM, OpRef Va, OpRef Vb, ResultStack &Results); + OpRef expanding(ShuffleMask SM, OpRef Va, ResultStack &Results); + OpRef perfect(ShuffleMask SM, OpRef Va, ResultStack &Results); + + bool selectVectorConstants(SDNode *N); + bool scalarizeShuffle(ArrayRef Mask, const SDLoc &dl, MVT ResTy, + SDValue Va, SDValue Vb, SDNode *N); + + }; +} + +// Return a submask of A that is shorter than A by |C| elements: +// - if C > 0, return a submask of A that starts at position C, +// - if C <= 0, return a submask of A that starts at 0 (reduce A by |C|). +static ArrayRef subm(ArrayRef A, int C) { + if (C > 0) + return { A.data()+C, A.size()-C }; + return { A.data(), A.size()+C }; +} + +static void splitMask(ArrayRef Mask, MutableArrayRef MaskL, + MutableArrayRef MaskR) { + unsigned VecLen = Mask.size(); + assert(MaskL.size() == VecLen && MaskR.size() == VecLen); + for (unsigned I = 0; I != VecLen; ++I) { + int M = Mask[I]; + if (M < 0) { + MaskL[I] = MaskR[I] = -1; + } else if (unsigned(M) < VecLen) { + MaskL[I] = M; + MaskR[I] = -1; + } else { + MaskL[I] = -1; + MaskR[I] = M-VecLen; + } + } +} + +static std::pair findStrip(ArrayRef A, int Inc, + unsigned MaxLen) { + assert(A.size() > 0 && A.size() >= MaxLen); + int F = A[0]; + int E = F; + for (unsigned I = 1; I != MaxLen; ++I) { + if (A[I] - E != Inc) + return { F, I }; + E = A[I]; + } + return { F, MaxLen }; +} + +static bool isUndef(ArrayRef Mask) { + for (int Idx : Mask) + if (Idx != -1) + return false; + return true; +} + +static bool isIdentity(ArrayRef Mask) { + unsigned Size = Mask.size(); + return findStrip(Mask, 1, Size) == std::make_pair(0, Size); +} + +static bool isPermutation(ArrayRef Mask) { + // Check by adding all numbers only works if there is no overflow. + assert(Mask.size() < 0x00007FFF && "Sanity failure"); + int Sum = 0; + for (int Idx : Mask) { + if (Idx == -1) + return false; + Sum += Idx; + } + int N = Mask.size(); + return 2*Sum == N*(N-1); +} + +bool HvxSelector::selectVectorConstants(SDNode *N) { + // Constant vectors are generated as loads from constant pools. + // Since they are generated during the selection process, the main + // selection algorithm is not aware of them. Select them directly + // here. + if (!N->isMachineOpcode() && N->getOpcode() == ISD::LOAD) { + SDValue Addr = cast(N)->getBasePtr(); + unsigned AddrOpc = Addr.getOpcode(); + if (AddrOpc == HexagonISD::AT_PCREL || AddrOpc == HexagonISD::CP) { + if (Addr.getOperand(0).getOpcode() == ISD::TargetConstantPool) { + ISel.Select(N); + return true; + } + } + } + + bool Selected = false; + for (unsigned I = 0, E = N->getNumOperands(); I != E; ++I) + Selected = selectVectorConstants(N->getOperand(I).getNode()) || Selected; + return Selected; +} + +void HvxSelector::materialize(const ResultStack &Results) { + DEBUG_WITH_TYPE("isel", { + dbgs() << "Materializing\n"; + Results.print(dbgs(), DAG); + }); + if (Results.empty()) + return; + const SDLoc &dl(Results.InpNode); + std::vector Output; + + for (unsigned I = 0, E = Results.size(); I != E; ++I) { + const NodeTemplate &Node = Results[I]; + std::vector Ops; + for (const OpRef &R : Node.Ops) { + assert(R.isValid()); + if (R.isValue()) { + Ops.push_back(R.OpV); + continue; + } + if (R.OpN & OpRef::Undef) { + MVT::SimpleValueType SVT = MVT::SimpleValueType(R.OpN & OpRef::Index); + Ops.push_back(ISel.selectUndef(dl, MVT(SVT))); + continue; + } + // R is an index of a result. + unsigned Part = R.OpN & OpRef::Whole; + int Idx = SignExtend32(R.OpN & OpRef::Index, OpRef::IndexBits); + if (Idx < 0) + Idx += I; + assert(Idx >= 0 && unsigned(Idx) < Output.size()); + SDValue Op = Output[Idx]; + MVT OpTy = Op.getValueType().getSimpleVT(); + if (Part != OpRef::Whole) { + assert(Part == OpRef::LoHalf || Part == OpRef::HiHalf); + if (Op.getOpcode() == HexagonISD::VCOMBINE) { + Op = (Part == OpRef::HiHalf) ? Op.getOperand(0) : Op.getOperand(1); + } else { + MVT HalfTy = MVT::getVectorVT(OpTy.getVectorElementType(), + OpTy.getVectorNumElements()/2); + unsigned Sub = (Part == OpRef::LoHalf) ? Hexagon::vsub_lo + : Hexagon::vsub_hi; + Op = DAG.getTargetExtractSubreg(Sub, dl, HalfTy, Op); + } + } + Ops.push_back(Op); + } // for (Node : Results) + + assert(Node.Ty != MVT::Other); + SDNode *ResN = (Node.Opc == TargetOpcode::COPY) + ? Ops.front().getNode() + : DAG.getMachineNode(Node.Opc, dl, Node.Ty, Ops); + Output.push_back(SDValue(ResN, 0)); + } + + SDNode *OutN = Output.back().getNode(); + SDNode *InpN = Results.InpNode; + DEBUG_WITH_TYPE("isel", { + dbgs() << "Generated node:\n"; + OutN->dumpr(&DAG); + }); + + ISel.ReplaceNode(InpN, OutN); + selectVectorConstants(OutN); + DAG.RemoveDeadNodes(); +} + +OpRef HvxSelector::concat(OpRef Lo, OpRef Hi, ResultStack &Results) { + DEBUG_WITH_TYPE("isel", {dbgs() << __func__ << '\n';}); + const SDLoc &dl(Results.InpNode); + Results.push(TargetOpcode::REG_SEQUENCE, getPairVT(MVT::i8), { + DAG.getTargetConstant(Hexagon::HvxWRRegClassID, dl, MVT::i32), + Lo, DAG.getTargetConstant(Hexagon::vsub_lo, dl, MVT::i32), + Hi, DAG.getTargetConstant(Hexagon::vsub_hi, dl, MVT::i32), + }); + return OpRef::res(Results.top()); +} + +// Va, Vb are single vectors, SM can be arbitrarily long. +OpRef HvxSelector::packs(ShuffleMask SM, OpRef Va, OpRef Vb, + ResultStack &Results, MutableArrayRef NewMask, + unsigned Options) { + DEBUG_WITH_TYPE("isel", {dbgs() << __func__ << '\n';}); + if (!Va.isValid() || !Vb.isValid()) + return OpRef::fail(); + + int VecLen = SM.Mask.size(); + MVT Ty = getSingleVT(MVT::i8); + + if (SM.MaxSrc - SM.MinSrc < int(HwLen)) { + if (SM.MaxSrc < int(HwLen)) { + memcpy(NewMask.data(), SM.Mask.data(), sizeof(int)*VecLen); + return Va; + } + if (SM.MinSrc >= int(HwLen)) { + for (int I = 0; I != VecLen; ++I) { + int M = SM.Mask[I]; + if (M != -1) + M -= HwLen; + NewMask[I] = M; + } + return Vb; + } + const SDLoc &dl(Results.InpNode); + SDValue S = DAG.getTargetConstant(SM.MinSrc, dl, MVT::i32); + if (isUInt<3>(SM.MinSrc)) { + Results.push(Hexagon::V6_valignbi, Ty, {Vb, Va, S}); + } else { + Results.push(Hexagon::A2_tfrsi, MVT::i32, {S}); + unsigned Top = Results.top(); + Results.push(Hexagon::V6_valignb, Ty, {Vb, Va, OpRef::res(Top)}); + } + for (int I = 0; I != VecLen; ++I) { + int M = SM.Mask[I]; + if (M != -1) + M -= SM.MinSrc; + NewMask[I] = M; + } + return OpRef::res(Results.top()); + } + + if (Options & PackMux) { + // If elements picked from Va and Vb have all different (source) indexes + // (relative to the start of the argument), do a mux, and update the mask. + BitVector Picked(HwLen); + SmallVector MuxBytes(HwLen); + bool CanMux = true; + for (int I = 0; I != VecLen; ++I) { + int M = SM.Mask[I]; + if (M == -1) + continue; + if (M >= int(HwLen)) + M -= HwLen; + else + MuxBytes[M] = 0xFF; + if (Picked[M]) { + CanMux = false; + break; + } + NewMask[I] = M; + } + if (CanMux) + return vmuxs(MuxBytes, Va, Vb, Results); + } + + return OpRef::fail(); +} + +OpRef HvxSelector::packp(ShuffleMask SM, OpRef Va, OpRef Vb, + ResultStack &Results, MutableArrayRef NewMask) { + DEBUG_WITH_TYPE("isel", {dbgs() << __func__ << '\n';}); + unsigned HalfMask = 0; + unsigned LogHw = Log2_32(HwLen); + for (int M : SM.Mask) { + if (M == -1) + continue; + HalfMask |= (1u << (M >> LogHw)); + } + + if (HalfMask == 0) + return OpRef::undef(getPairVT(MVT::i8)); + + // If more than two halves are used, bail. + // TODO: be more aggressive here? + if (countPopulation(HalfMask) > 2) + return OpRef::fail(); + + MVT HalfTy = getSingleVT(MVT::i8); + + OpRef Inp[2] = { Va, Vb }; + OpRef Out[2] = { OpRef::undef(HalfTy), OpRef::undef(HalfTy) }; + + uint8_t HalfIdx[4] = { 0xFF, 0xFF, 0xFF, 0xFF }; + unsigned Idx = 0; + for (unsigned I = 0; I != 4; ++I) { + if ((HalfMask & (1u << I)) == 0) + continue; + assert(Idx < 2); + OpRef Op = Inp[I/2]; + Out[Idx] = (I & 1) ? OpRef::hi(Op) : OpRef::lo(Op); + HalfIdx[I] = Idx++; + } + + int VecLen = SM.Mask.size(); + for (int I = 0; I != VecLen; ++I) { + int M = SM.Mask[I]; + if (M >= 0) { + uint8_t Idx = HalfIdx[M >> LogHw]; + assert(Idx == 0 || Idx == 1); + M = (M & (HwLen-1)) + HwLen*Idx; + } + NewMask[I] = M; + } + + return concat(Out[0], Out[1], Results); +} + +OpRef HvxSelector::zerous(ShuffleMask SM, OpRef Va, ResultStack &Results) { + DEBUG_WITH_TYPE("isel", {dbgs() << __func__ << '\n';}); + + int VecLen = SM.Mask.size(); + SmallVector UsedBytes(VecLen); + bool HasUnused = false; + for (int I = 0; I != VecLen; ++I) { + if (SM.Mask[I] != -1) + UsedBytes[I] = 0xFF; + else + HasUnused = true; + } + if (!HasUnused) + return Va; + SDValue B = getVectorConstant(UsedBytes, SDLoc(Results.InpNode)); + Results.push(Hexagon::V6_vand, getSingleVT(MVT::i8), {Va, OpRef(B)}); + return OpRef::res(Results.top()); +} + +OpRef HvxSelector::vmuxs(ArrayRef Bytes, OpRef Va, OpRef Vb, + ResultStack &Results) { + DEBUG_WITH_TYPE("isel", {dbgs() << __func__ << '\n';}); + MVT ByteTy = getSingleVT(MVT::i8); + MVT BoolTy = MVT::getVectorVT(MVT::i1, 8*HwLen); // XXX + const SDLoc &dl(Results.InpNode); + SDValue B = getVectorConstant(Bytes, dl); + Results.push(Hexagon::V6_vd0, ByteTy, {}); + Results.push(Hexagon::V6_veqb, BoolTy, {OpRef(B), OpRef::res(-1)}); + Results.push(Hexagon::V6_vmux, ByteTy, {OpRef::res(-1), Va, Vb}); + return OpRef::res(Results.top()); +} + +OpRef HvxSelector::vmuxp(ArrayRef Bytes, OpRef Va, OpRef Vb, + ResultStack &Results) { + DEBUG_WITH_TYPE("isel", {dbgs() << __func__ << '\n';}); + size_t S = Bytes.size() / 2; + OpRef L = vmuxs({Bytes.data(), S}, OpRef::lo(Va), OpRef::lo(Vb), Results); + OpRef H = vmuxs({Bytes.data()+S, S}, OpRef::hi(Va), OpRef::hi(Vb), Results); + return concat(L, H, Results); +} + +OpRef HvxSelector::shuffs1(ShuffleMask SM, OpRef Va, ResultStack &Results) { + DEBUG_WITH_TYPE("isel", {dbgs() << __func__ << '\n';}); + unsigned VecLen = SM.Mask.size(); + assert(HwLen == VecLen); + assert(all_of(SM.Mask, [this](int M) { return M == -1 || M < int(HwLen); })); + + if (isIdentity(SM.Mask)) + return Va; + if (isUndef(SM.Mask)) + return OpRef::undef(getSingleVT(MVT::i8)); + + return butterfly(SM, Va, Results); +} + +OpRef HvxSelector::shuffs2(ShuffleMask SM, OpRef Va, OpRef Vb, + ResultStack &Results) { + DEBUG_WITH_TYPE("isel", {dbgs() << __func__ << '\n';}); + OpRef C = contracting(SM, Va, Vb, Results); + if (C.isValid()) + return C; + + int VecLen = SM.Mask.size(); + SmallVector NewMask(VecLen); + OpRef P = packs(SM, Va, Vb, Results, NewMask); + if (P.isValid()) + return shuffs1(ShuffleMask(NewMask), P, Results); + + SmallVector MaskL(VecLen), MaskR(VecLen); + splitMask(SM.Mask, MaskL, MaskR); + + OpRef L = shuffs1(ShuffleMask(MaskL), Va, Results); + OpRef R = shuffs1(ShuffleMask(MaskR), Vb, Results); + if (!L.isValid() || !R.isValid()) + return OpRef::fail(); + + SmallVector Bytes(VecLen); + for (int I = 0; I != VecLen; ++I) { + if (MaskL[I] != -1) + Bytes[I] = 0xFF; + } + return vmuxs(Bytes, L, R, Results); +} + +OpRef HvxSelector::shuffp1(ShuffleMask SM, OpRef Va, ResultStack &Results) { + DEBUG_WITH_TYPE("isel", {dbgs() << __func__ << '\n';}); + int VecLen = SM.Mask.size(); + + SmallVector PackedMask(VecLen); + OpRef P = packs(SM, OpRef::lo(Va), OpRef::hi(Va), Results, PackedMask); + if (P.isValid()) { + ShuffleMask PM(PackedMask); + OpRef E = expanding(PM, P, Results); + if (E.isValid()) + return E; + + OpRef L = shuffs1(PM.lo(), P, Results); + OpRef H = shuffs1(PM.hi(), P, Results); + if (L.isValid() && H.isValid()) + return concat(L, H, Results); + } + + OpRef R = perfect(SM, Va, Results); + if (R.isValid()) + return R; + // TODO commute the mask and try the opposite order of the halves. + + OpRef L = shuffs2(SM.lo(), OpRef::lo(Va), OpRef::hi(Va), Results); + OpRef H = shuffs2(SM.hi(), OpRef::lo(Va), OpRef::hi(Va), Results); + if (L.isValid() && H.isValid()) + return concat(L, H, Results); + + return OpRef::fail(); +} + +OpRef HvxSelector::shuffp2(ShuffleMask SM, OpRef Va, OpRef Vb, + ResultStack &Results) { + DEBUG_WITH_TYPE("isel", {dbgs() << __func__ << '\n';}); + int VecLen = SM.Mask.size(); + + SmallVector PackedMask(VecLen); + OpRef P = packp(SM, Va, Vb, Results, PackedMask); + if (P.isValid()) + return shuffp1(ShuffleMask(PackedMask), P, Results); + + SmallVector MaskL(VecLen), MaskR(VecLen); + OpRef L = shuffp1(ShuffleMask(MaskL), Va, Results); + OpRef R = shuffp1(ShuffleMask(MaskR), Vb, Results); + if (!L.isValid() || !R.isValid()) + return OpRef::fail(); + + // Mux the results. + SmallVector Bytes(VecLen); + for (int I = 0; I != VecLen; ++I) { + if (MaskL[I] != -1) + Bytes[I] = 0xFF; + } + return vmuxp(Bytes, L, R, Results); +} + +bool HvxSelector::scalarizeShuffle(ArrayRef Mask, const SDLoc &dl, + MVT ResTy, SDValue Va, SDValue Vb, + SDNode *N) { + DEBUG_WITH_TYPE("isel", {dbgs() << __func__ << '\n';}); + MVT ElemTy = ResTy.getVectorElementType(); + assert(ElemTy == MVT::i8); + unsigned VecLen = Mask.size(); + bool HavePairs = (2*HwLen == VecLen); + MVT SingleTy = getSingleVT(MVT::i8); + + SmallVector Ops; + for (int I : Mask) { + if (I < 0) { + Ops.push_back(ISel.selectUndef(dl, ElemTy)); + continue; + } + SDValue Vec; + unsigned M = I; + if (M < VecLen) { + Vec = Va; + } else { + Vec = Vb; + M -= VecLen; + } + if (HavePairs) { + if (M < HwLen) { + Vec = DAG.getTargetExtractSubreg(Hexagon::vsub_lo, dl, SingleTy, Vec); + } else { + Vec = DAG.getTargetExtractSubreg(Hexagon::vsub_hi, dl, SingleTy, Vec); + M -= HwLen; + } + } + SDValue Idx = DAG.getConstant(M, dl, MVT::i32); + SDValue Ex = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, ElemTy, {Vec, Idx}); + SDValue L = Lower.LowerOperation(Ex, DAG); + assert(L.getNode()); + Ops.push_back(L); + } + + SDValue LV; + if (2*HwLen == VecLen) { + SDValue B0 = DAG.getBuildVector(SingleTy, dl, {Ops.data(), HwLen}); + SDValue L0 = Lower.LowerOperation(B0, DAG); + SDValue B1 = DAG.getBuildVector(SingleTy, dl, {Ops.data()+HwLen, HwLen}); + SDValue L1 = Lower.LowerOperation(B1, DAG); + // XXX CONCAT_VECTORS is legal for HVX vectors. Legalizing (lowering) + // functions may expect to be called only for illegal operations, so + // make sure that they are not called for legal ones. Develop a better + // mechanism for dealing with this. + LV = DAG.getNode(ISD::CONCAT_VECTORS, dl, ResTy, {L0, L1}); + } else { + SDValue BV = DAG.getBuildVector(ResTy, dl, Ops); + LV = Lower.LowerOperation(BV, DAG); + } + + assert(!N->use_empty()); + ISel.ReplaceNode(N, LV.getNode()); + DAG.RemoveDeadNodes(); + + std::deque SubNodes; + SubNodes.push_back(LV.getNode()); + for (unsigned I = 0; I != SubNodes.size(); ++I) { + for (SDValue Op : SubNodes[I]->ops()) + SubNodes.push_back(Op.getNode()); + } + while (!SubNodes.empty()) { + SDNode *S = SubNodes.front(); + SubNodes.pop_front(); + if (S->use_empty()) + continue; + // This isn't great, but users need to be selected before any nodes that + // they use. (The reason is to match larger patterns, and avoid nodes that + // cannot be matched on their own, e.g. ValueType, TokenFactor, etc.). + bool PendingUser = llvm::any_of(S->uses(), [&SubNodes](const SDNode *U) { + return llvm::any_of(SubNodes, [U](const SDNode *T) { + return T == U; + }); + }); + if (PendingUser) + SubNodes.push_back(S); + else + ISel.Select(S); + } + + DAG.RemoveDeadNodes(); + return true; +} + +OpRef HvxSelector::contracting(ShuffleMask SM, OpRef Va, OpRef Vb, + ResultStack &Results) { + DEBUG_WITH_TYPE("isel", {dbgs() << __func__ << '\n';}); + if (!Va.isValid() || !Vb.isValid()) + return OpRef::fail(); + + // Contracting shuffles, i.e. instructions that always discard some bytes + // from the operand vectors. + // + // V6_vshuff{e,o}b + // V6_vdealb4w + // V6_vpack{e,o}{b,h} + + int VecLen = SM.Mask.size(); + std::pair Strip = findStrip(SM.Mask, 1, VecLen); + MVT ResTy = getSingleVT(MVT::i8); + + // The following shuffles only work for bytes and halfwords. This requires + // the strip length to be 1 or 2. + if (Strip.second != 1 && Strip.second != 2) + return OpRef::fail(); + + // The patterns for the shuffles, in terms of the starting offsets of the + // consecutive strips (L = length of the strip, N = VecLen): + // + // vpacke: 0, 2L, 4L ... N+0, N+2L, N+4L ... L = 1 or 2 + // vpacko: L, 3L, 5L ... N+L, N+3L, N+5L ... L = 1 or 2 + // + // vshuffe: 0, N+0, 2L, N+2L, 4L ... L = 1 or 2 + // vshuffo: L, N+L, 3L, N+3L, 5L ... L = 1 or 2 + // + // vdealb4w: 0, 4, 8 ... 2, 6, 10 ... N+0, N+4, N+8 ... N+2, N+6, N+10 ... + + // The value of the element in the mask following the strip will decide + // what kind of a shuffle this can be. + int NextInMask = SM.Mask[Strip.second]; + + // Check if NextInMask could be 2L, 3L or 4, i.e. if it could be a mask + // for vpack or vdealb4w. VecLen > 4, so NextInMask for vdealb4w would + // satisfy this. + if (NextInMask < VecLen) { + // vpack{e,o} or vdealb4w + if (Strip.first == 0 && Strip.second == 1 && NextInMask == 4) { + int N = VecLen; + // Check if this is vdealb4w (L=1). + for (int I = 0; I != N/4; ++I) + if (SM.Mask[I] != 4*I) + return OpRef::fail(); + for (int I = 0; I != N/4; ++I) + if (SM.Mask[I+N/4] != 2 + 4*I) + return OpRef::fail(); + for (int I = 0; I != N/4; ++I) + if (SM.Mask[I+N/2] != N + 4*I) + return OpRef::fail(); + for (int I = 0; I != N/4; ++I) + if (SM.Mask[I+3*N/4] != N+2 + 4*I) + return OpRef::fail(); + // Matched mask for vdealb4w. + Results.push(Hexagon::V6_vdealb4w, ResTy, {Vb, Va}); + return OpRef::res(Results.top()); + } + + // Check if this is vpack{e,o}. + int N = VecLen; + int L = Strip.second; + // Check if the first strip starts at 0 or at L. + if (Strip.first != 0 && Strip.first != L) + return OpRef::fail(); + // Examine the rest of the mask. + for (int I = L; I < N/2; I += L) { + auto S = findStrip(subm(SM.Mask,I), 1, N-I); + // Check whether the mask element at the beginning of each strip + // increases by 2L each time. + if (S.first - Strip.first != 2*I) + return OpRef::fail(); + // Check whether each strip is of the same length. + if (S.second != unsigned(L)) + return OpRef::fail(); + } + + // Strip.first == 0 => vpacke + // Strip.first == L => vpacko + assert(Strip.first == 0 || Strip.first == L); + using namespace Hexagon; + NodeTemplate Res; + Res.Opc = Strip.second == 1 // Number of bytes. + ? (Strip.first == 0 ? V6_vpackeb : V6_vpackob) + : (Strip.first == 0 ? V6_vpackeh : V6_vpackoh); + Res.Ty = ResTy; + Res.Ops = { Vb, Va }; + Results.push(Res); + return OpRef::res(Results.top()); + } + + // Check if this is vshuff{e,o}. + int N = VecLen; + int L = Strip.second; + std::pair PrevS = Strip; + bool Flip = false; + for (int I = L; I < N; I += L) { + auto S = findStrip(subm(SM.Mask,I), 1, N-I); + if (S.second != PrevS.second) + return OpRef::fail(); + int Diff = Flip ? PrevS.first - S.first + 2*L + : S.first - PrevS.first; + if (Diff != N) + return OpRef::fail(); + Flip ^= true; + PrevS = S; + } + // Strip.first == 0 => vshuffe + // Strip.first == L => vshuffo + assert(Strip.first == 0 || Strip.first == L); + using namespace Hexagon; + NodeTemplate Res; + Res.Opc = Strip.second == 1 // Number of bytes. + ? (Strip.first == 0 ? V6_vshuffeb : V6_vshuffob) + : (Strip.first == 0 ? V6_vshufeh : V6_vshufoh); + Res.Ty = ResTy; + Res.Ops = { Vb, Va }; + Results.push(Res); + return OpRef::res(Results.top()); +} + +OpRef HvxSelector::expanding(ShuffleMask SM, OpRef Va, ResultStack &Results) { + DEBUG_WITH_TYPE("isel", {dbgs() << __func__ << '\n';}); + // Expanding shuffles (using all elements and inserting into larger vector): + // + // V6_vunpacku{b,h} [*] + // + // [*] Only if the upper elements (filled with 0s) are "don't care" in Mask. + // + // Note: V6_vunpacko{b,h} are or-ing the high byte/half in the result, so + // they are not shuffles. + // + // The argument is a single vector. + + int VecLen = SM.Mask.size(); + assert(2*HwLen == unsigned(VecLen) && "Expecting vector-pair type"); + + std::pair Strip = findStrip(SM.Mask, 1, VecLen); + + // The patterns for the unpacks, in terms of the starting offsets of the + // consecutive strips (L = length of the strip, N = VecLen): + // + // vunpacku: 0, -1, L, -1, 2L, -1 ... + + if (Strip.first != 0) + return OpRef::fail(); + + // The vunpackus only handle byte and half-word. + if (Strip.second != 1 && Strip.second != 2) + return OpRef::fail(); + + int N = VecLen; + int L = Strip.second; + + // First, check the non-ignored strips. + for (int I = 2*L; I < 2*N; I += 2*L) { + auto S = findStrip(subm(SM.Mask,I), 1, N-I); + if (S.second != unsigned(L)) + return OpRef::fail(); + if (2*S.first != I) + return OpRef::fail(); + } + // Check the -1s. + for (int I = L; I < 2*N; I += 2*L) { + auto S = findStrip(subm(SM.Mask,I), 0, N-I); + if (S.first != -1 || S.second != unsigned(L)) + return OpRef::fail(); + } + + unsigned Opc = Strip.second == 1 ? Hexagon::V6_vunpackub + : Hexagon::V6_vunpackuh; + Results.push(Opc, getPairVT(MVT::i8), {Va}); + return OpRef::res(Results.top()); +} + +OpRef HvxSelector::perfect(ShuffleMask SM, OpRef Va, ResultStack &Results) { + DEBUG_WITH_TYPE("isel", {dbgs() << __func__ << '\n';}); + // V6_vdeal{b,h} + // V6_vshuff{b,h} + + // V6_vshufoe{b,h} those are quivalent to vshuffvdd(..,{1,2}) + // V6_vshuffvdd (V6_vshuff) + // V6_dealvdd (V6_vdeal) + + // TODO Recognize patterns for V6_vdeal{b,h} and V6_vshuff{b,h}. + + int VecLen = SM.Mask.size(); + assert(isPowerOf2_32(VecLen) && Log2_32(VecLen) <= 8); + unsigned LogLen = Log2_32(VecLen); + + if (!isPermutation(SM.Mask)) + return OpRef::fail(); + + SmallVector Perm(LogLen); + + // Check if this could be a perfect shuffle, or a combination of perfect + // shuffles. + // + // Consider this permutation (using hex digits to make the ASCII diagrams + // easier to read): + // { 0, 8, 1, 9, 2, A, 3, B, 4, C, 5, D, 6, E, 7, F }. + // This is a "deal" operation: divide the input into two halves, and + // create the output by picking elements by alternating between these two + // halves: + // 0 1 2 3 4 5 6 7 --> 0 8 1 9 2 A 3 B 4 C 5 D 6 E 7 F [*] + // 8 9 A B C D E F + // + // Aside from a few special explicit cases (V6_vdealb, etc.), HVX provides + // a somwehat different mechanism that could be used to perform shuffle/ + // deal operations: a 2x2 transpose. + // Consider the halves of inputs again, they can be interpreted as a 2x8 + // matrix. A 2x8 matrix can be looked at four 2x2 matrices concatenated + // together. Now, when considering 2 elements at a time, it will be a 2x4 + // matrix (with elements 01, 23, 45, etc.), or two 2x2 matrices: + // 01 23 45 67 + // 89 AB CD EF + // With groups of 4, this will become a single 2x2 matrix, and so on. + // + // The 2x2 transpose instruction works by transposing each of the 2x2 + // matrices (or "sub-matrices"), given a specific group size. For example, + // if the group size is 1 (i.e. each element is its own group), there + // will be four transposes of the four 2x2 matrices that form the 2x8. + // For example, with the inputs as above, the result will be: + // 0 8 2 A 4 C 6 E + // 1 9 3 B 5 D 7 F + // Now, this result can be tranposed again, but with the group size of 2: + // 08 19 4C 5D + // 2A 3B 6E 7F + // If we then transpose that result, but with the group size of 4, we get: + // 0819 2A3B + // 4C5D 6E7F + // If we concatenate these two rows, it will be + // 0 8 1 9 2 A 3 B 4 C 5 D 6 E 7 F + // which is the same as the "deal" [*] above. + // + // In general, a "deal" of individual elements is a series of 2x2 transposes, + // with changing group size. HVX has two instructions: + // Vdd = V6_vdealvdd Vu, Vv, Rt + // Vdd = V6_shufvdd Vu, Vv, Rt + // that perform exactly that. The register Rt controls which transposes are + // going to happen: a bit at position n (counting from 0) indicates that a + // transpose with a group size of 2^n will take place. If multiple bits are + // set, multiple transposes will happen: vdealvdd will perform them starting + // with the largest group size, vshuffvdd will do them in the reverse order. + // + // The main observation is that each 2x2 transpose corresponds to swapping + // columns of bits in the binary representation of the values. + // + // The numbers {3,2,1,0} and the log2 of the number of contiguous 1 bits + // in a given column. The * denote the columns that will be swapped. + // The transpose with the group size 2^n corresponds to swapping columns + // 3 (the highest log) and log2(n): + // + // 3 2 1 0 0 2 1 3 0 2 3 1 + // * * * * * * + // 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + // 1 0 0 0 1 8 1 0 0 0 8 1 0 0 0 8 1 0 0 0 + // 2 0 0 1 0 2 0 0 1 0 1 0 0 0 1 1 0 0 0 1 + // 3 0 0 1 1 A 1 0 1 0 9 1 0 0 1 9 1 0 0 1 + // 4 0 1 0 0 4 0 1 0 0 4 0 1 0 0 2 0 0 1 0 + // 5 0 1 0 1 C 1 1 0 0 C 1 1 0 0 A 1 0 1 0 + // 6 0 1 1 0 6 0 1 1 0 5 0 1 0 1 3 0 0 1 1 + // 7 0 1 1 1 E 1 1 1 0 D 1 1 0 1 B 1 0 1 1 + // 8 1 0 0 0 1 0 0 0 1 2 0 0 1 0 4 0 1 0 0 + // 9 1 0 0 1 9 1 0 0 1 A 1 0 1 0 C 1 1 0 0 + // A 1 0 1 0 3 0 0 1 1 3 0 0 1 1 5 0 1 0 1 + // B 1 0 1 1 B 1 0 1 1 B 1 0 1 1 D 1 1 0 1 + // C 1 1 0 0 5 0 1 0 1 6 0 1 1 0 6 0 1 1 0 + // D 1 1 0 1 D 1 1 0 1 E 1 1 1 0 E 1 1 1 0 + // E 1 1 1 0 7 0 1 1 1 7 0 1 1 1 7 0 1 1 1 + // F 1 1 1 1 F 1 1 1 1 F 1 1 1 1 F 1 1 1 1 + + auto XorPow2 = [] (ArrayRef Mask, unsigned Num) { + unsigned X = Mask[0] ^ Mask[Num/2]; + // Check that the first half has the X's bits clear. + if ((Mask[0] & X) != 0) + return 0u; + for (unsigned I = 1; I != Num/2; ++I) { + if (unsigned(Mask[I] ^ Mask[I+Num/2]) != X) + return 0u; + if ((Mask[I] & X) != 0) + return 0u; + } + return X; + }; + + // Create a vector of log2's for each column: Perm[i] corresponds to + // the i-th bit (lsb is 0). + assert(VecLen > 2); + for (unsigned I = VecLen; I >= 2; I >>= 1) { + // Examine the initial segment of Mask of size I. + unsigned X = XorPow2(SM.Mask, I); + if (!isPowerOf2_32(X)) + return OpRef::fail(); + // Check the other segments of Mask. + for (int J = 0; J < VecLen; J += I) { + if (XorPow2(subm(SM.Mask, -J), I) != X) + return OpRef::fail(); + } + Perm[Log2_32(X)] = Log2_32(I)-1; + } + + // Once we have Perm, represent it as cycles. Denote the maximum log2 + // (equal to log2(VecLen)-1) as M. The cycle containing M can then be + // written as (M a1 a2 a3 ... an). That cycle can be broken up into + // simple swaps as (M a1)(M a2)(M a3)...(M an), with the composition + // order being from left to right. Any (contiguous) segment where the + // values ai, ai+1...aj are either all increasing or all decreasing, + // can be implemented via a single vshuffvdd/vdealvdd respectively. + // + // If there is a cycle (a1 a2 ... an) that does not involve M, it can + // be written as (M an)(a1 a2 ... an)(M a1). The first two cycles can + // then be folded to get (M a1 a2 ... an)(M a1), and the above procedure + // can be used to generate a sequence of vshuffvdd/vdealvdd. + // + // Example: + // Assume M = 4 and consider a permutation (0 1)(2 3). It can be written + // as (4 0 1)(4 0) composed with (4 2 3)(4 2), or simply + // (4 0 1)(4 0)(4 2 3)(4 2). + // It can then be expanded into swaps as + // (4 0)(4 1)(4 0)(4 2)(4 3)(4 2), + // and broken up into "increasing" segments as + // [(4 0)(4 1)] [(4 0)(4 2)(4 3)] [(4 2)]. + // This is equivalent to + // (4 0 1)(4 0 2 3)(4 2), + // which can be implemented as 3 vshufvdd instructions. + + using CycleType = SmallVector; + std::set Cycles; + std::set All; + + for (unsigned I : Perm) + All.insert(I); + + // If the cycle contains LogLen-1, move it to the front of the cycle. + // Otherwise, return the cycle unchanged. + auto canonicalize = [LogLen](const CycleType &C) -> CycleType { + unsigned LogPos, N = C.size(); + for (LogPos = 0; LogPos != N; ++LogPos) + if (C[LogPos] == LogLen-1) + break; + if (LogPos == N) + return C; + + CycleType NewC(C.begin()+LogPos, C.end()); + NewC.append(C.begin(), C.begin()+LogPos); + return NewC; + }; + + while (!All.empty()) { + unsigned A = *All.begin(); + All.erase(A); + CycleType C; + C.push_back(A); + for (unsigned B = Perm[A]; B != A; B = Perm[B]) { + C.push_back(B); + All.erase(B); + } + if (C.size() <= 1) + continue; + Cycles.insert(canonicalize(C)); + } + + SmallVector SwapElems; + if (HwLen == unsigned(VecLen)) + SwapElems.push_back(LogLen-1); + + for (const CycleType &C : Cycles) { + unsigned First = (C[0] == LogLen-1) ? 1 : 0; + SwapElems.append(C.begin()+First, C.end()); + if (First == 0) + SwapElems.push_back(C[0]); + } + + const SDLoc &dl(Results.InpNode); + OpRef Arg = Va; + MVT PairTy = getPairVT(MVT::i8); + + for (unsigned I = 0, E = SwapElems.size(); I != E; ) { + bool IsInc = I == E-1 || SwapElems[I] < SwapElems[I+1]; + unsigned S = (1u << SwapElems[I]); + if (I < E-1) { + while (++I < E-1 && IsInc == (SwapElems[I] < SwapElems[I+1])) + S |= 1u << SwapElems[I]; + // The above loop will not add a bit for the final SwapElems[I+1], + // so add it here. + S |= 1u << SwapElems[I]; + } + ++I; + + NodeTemplate Res; + Results.push(Hexagon::A2_tfrsi, MVT::i32, + { DAG.getTargetConstant(S, dl, MVT::i32) }); + Res.Opc = IsInc ? Hexagon::V6_vshuffvdd : Hexagon::V6_vdealvdd; + Res.Ty = PairTy; + Res.Ops = { OpRef::hi(Arg), OpRef::lo(Arg), OpRef::res(-1) }; + Results.push(Res); + Arg = OpRef::res(Results.top()); + } + + return Arg; +} + +OpRef HvxSelector::butterfly(ShuffleMask SM, OpRef Va, ResultStack &Results) { + DEBUG_WITH_TYPE("isel", {dbgs() << __func__ << '\n';}); + // Butterfly shuffles. + // + // V6_vdelta + // V6_vrdelta + // V6_vror + + // The assumption here is that all elements picked by Mask are in the + // first operand to the vector_shuffle. This assumption is enforced + // by the caller. + + MVT ResTy = getSingleVT(MVT::i8); + PermNetwork::Controls FC, RC; + const SDLoc &dl(Results.InpNode); + int VecLen = SM.Mask.size(); + + for (int M : SM.Mask) { + if (M != -1 && M >= VecLen) + return OpRef::fail(); + } + + // Try the deltas/benes for both single vectors and vector pairs. + ForwardDeltaNetwork FN(SM.Mask); + if (FN.run(FC)) { + SDValue Ctl = getVectorConstant(FC, dl); + Results.push(Hexagon::V6_vdelta, ResTy, {Va, OpRef(Ctl)}); + return OpRef::res(Results.top()); + } + + // Try reverse delta. + ReverseDeltaNetwork RN(SM.Mask); + if (RN.run(RC)) { + SDValue Ctl = getVectorConstant(RC, dl); + Results.push(Hexagon::V6_vrdelta, ResTy, {Va, OpRef(Ctl)}); + return OpRef::res(Results.top()); + } + + // Do Benes. + BenesNetwork BN(SM.Mask); + if (BN.run(FC, RC)) { + SDValue CtlF = getVectorConstant(FC, dl); + SDValue CtlR = getVectorConstant(RC, dl); + Results.push(Hexagon::V6_vdelta, ResTy, {Va, OpRef(CtlF)}); + Results.push(Hexagon::V6_vrdelta, ResTy, + {OpRef::res(-1), OpRef(CtlR)}); + return OpRef::res(Results.top()); + } + + return OpRef::fail(); +} + +SDValue HvxSelector::getVectorConstant(ArrayRef Data, + const SDLoc &dl) { + SmallVector Elems; + for (uint8_t C : Data) + Elems.push_back(DAG.getConstant(C, dl, MVT::i8)); + MVT VecTy = MVT::getVectorVT(MVT::i8, Data.size()); + SDValue BV = DAG.getBuildVector(VecTy, dl, Elems); + SDValue LV = Lower.LowerOperation(BV, DAG); + DAG.RemoveDeadNode(BV.getNode()); + return LV; +} + +void HvxSelector::selectShuffle(SDNode *N) { + DEBUG_WITH_TYPE("isel", { + dbgs() << "Starting " << __func__ << " on node:\n"; + N->dump(&DAG); + }); + MVT ResTy = N->getValueType(0).getSimpleVT(); + // Assume that vector shuffles operate on vectors of bytes. + assert(ResTy.isVector() && ResTy.getVectorElementType() == MVT::i8); + + auto *SN = cast(N); + std::vector Mask(SN->getMask().begin(), SN->getMask().end()); + // This shouldn't really be necessary. Is it? + for (int &Idx : Mask) + if (Idx != -1 && Idx < 0) + Idx = -1; + + unsigned VecLen = Mask.size(); + bool HavePairs = (2*HwLen == VecLen); + assert(ResTy.getSizeInBits() / 8 == VecLen); + + // Vd = vector_shuffle Va, Vb, Mask + // + + bool UseLeft = false, UseRight = false; + for (unsigned I = 0; I != VecLen; ++I) { + if (Mask[I] == -1) + continue; + unsigned Idx = Mask[I]; + assert(Idx < 2*VecLen); + if (Idx < VecLen) + UseLeft = true; + else + UseRight = true; + } + + DEBUG_WITH_TYPE("isel", { + dbgs() << "VecLen=" << VecLen << " HwLen=" << HwLen << " UseLeft=" + << UseLeft << " UseRight=" << UseRight << " HavePairs=" + << HavePairs << '\n'; + }); + // If the mask is all -1's, generate "undef". + if (!UseLeft && !UseRight) { + ISel.ReplaceNode(N, ISel.selectUndef(SDLoc(SN), ResTy).getNode()); + DAG.RemoveDeadNode(N); + return; + } + + SDValue Vec0 = N->getOperand(0); + SDValue Vec1 = N->getOperand(1); + ResultStack Results(SN); + Results.push(TargetOpcode::COPY, ResTy, {Vec0}); + Results.push(TargetOpcode::COPY, ResTy, {Vec1}); + OpRef Va = OpRef::res(Results.top()-1); + OpRef Vb = OpRef::res(Results.top()); + + OpRef Res = !HavePairs ? shuffs2(ShuffleMask(Mask), Va, Vb, Results) + : shuffp2(ShuffleMask(Mask), Va, Vb, Results); + + bool Done = Res.isValid(); + if (Done) + materialize(Results); + else + Done = scalarizeShuffle(Mask, SDLoc(N), ResTy, Vec0, Vec1, N); + + if (!Done) { +#ifndef NDEBUG + dbgs() << "Unhandled shuffle:\n"; + SN->dumpr(&DAG); +#endif + llvm_unreachable("Failed to select vector shuffle"); + } +} + +void HvxSelector::selectRor(SDNode *N) { + // If this is a rotation by less than 8, use V6_valignbi. + MVT Ty = N->getValueType(0).getSimpleVT(); + const SDLoc &dl(N); + SDValue VecV = N->getOperand(0); + SDValue RotV = N->getOperand(1); + SDNode *NewN = nullptr; + + if (auto *CN = dyn_cast(RotV.getNode())) { + unsigned S = CN->getZExtValue(); + if (S % HST.getVectorLength() == 0) { + NewN = VecV.getNode(); + } else if (isUInt<3>(S)) { + SDValue C = DAG.getTargetConstant(S, dl, MVT::i32); + NewN = DAG.getMachineNode(Hexagon::V6_valignbi, dl, Ty, + {VecV, VecV, C}); + } + } + + if (!NewN) + NewN = DAG.getMachineNode(Hexagon::V6_vror, dl, Ty, {VecV, RotV}); + + ISel.ReplaceNode(N, NewN); + DAG.RemoveDeadNode(N); +} + +void HexagonDAGToDAGISel::SelectHvxShuffle(SDNode *N) { + HvxSelector(*this, *CurDAG).selectShuffle(N); +} + +void HexagonDAGToDAGISel::SelectHvxRor(SDNode *N) { + HvxSelector(*this, *CurDAG).selectRor(N); +} + diff --git a/lib/Target/Hexagon/HexagonISelLowering.cpp b/lib/Target/Hexagon/HexagonISelLowering.cpp index 22bbb3e94df..859f6976c9b 100644 --- a/lib/Target/Hexagon/HexagonISelLowering.cpp +++ b/lib/Target/Hexagon/HexagonISelLowering.cpp @@ -129,6 +129,19 @@ namespace { // Implement calling convention for Hexagon. +static const MVT LegalV64[] = { + MVT::v64i8, MVT::v32i16, MVT::v16i32, MVT::v8i64 +}; +static const MVT LegalW64[] = { + MVT::v128i8, MVT::v64i16, MVT::v32i32, MVT::v16i64 +}; +static const MVT LegalV128[] = { + MVT::v128i8, MVT::v64i16, MVT::v32i32, MVT::v16i64 +}; +static const MVT LegalW128[] = { + MVT::v256i8, MVT::v128i16, MVT::v64i32, MVT::v32i64 +}; + static bool CC_Hexagon(unsigned ValNo, MVT ValVT, MVT LocVT, CCValAssign::LocInfo LocInfo, @@ -1978,36 +1991,52 @@ HexagonTargetLowering::HexagonTargetLowering(const TargetMachine &TM, setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v4i16, Custom); setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v8i8, Custom); + auto setPromoteTo = [this] (unsigned Opc, MVT FromTy, MVT ToTy) { + setOperationAction(Opc, FromTy, Promote); + AddPromotedToType(Opc, FromTy, ToTy); + }; + if (Subtarget.useHVXOps()) { - if (Subtarget.useHVX64BOps()) { - setOperationAction(ISD::CONCAT_VECTORS, MVT::v128i8, Custom); - setOperationAction(ISD::CONCAT_VECTORS, MVT::v64i16, Custom); - setOperationAction(ISD::CONCAT_VECTORS, MVT::v32i32, Custom); - setOperationAction(ISD::CONCAT_VECTORS, MVT::v16i64, Custom); - // We try to generate the vpack{e/o} instructions. If we fail - // we fall back upon ExpandOp. - setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v64i8, Custom); - setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v32i16, Custom); - setOperationAction(ISD::EXTRACT_SUBVECTOR, MVT::v64i8, Custom); - setOperationAction(ISD::EXTRACT_SUBVECTOR, MVT::v32i16, Custom); - setOperationAction(ISD::EXTRACT_SUBVECTOR, MVT::v16i32, Custom); - } else if (Subtarget.useHVX128BOps()) { - setOperationAction(ISD::CONCAT_VECTORS, MVT::v256i8, Custom); - setOperationAction(ISD::CONCAT_VECTORS, MVT::v128i16, Custom); - setOperationAction(ISD::CONCAT_VECTORS, MVT::v64i32, Custom); - setOperationAction(ISD::CONCAT_VECTORS, MVT::v32i64, Custom); - // We try to generate the vpack{e/o} instructions. If we fail - // we fall back upon ExpandOp. - setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v128i8, Custom); - setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v64i16, Custom); - setOperationAction(ISD::EXTRACT_SUBVECTOR, MVT::v4i32, Custom); - setOperationAction(ISD::EXTRACT_SUBVECTOR, MVT::v128i8, Custom); - setOperationAction(ISD::EXTRACT_SUBVECTOR, MVT::v64i16, Custom); - setOperationAction(ISD::EXTRACT_SUBVECTOR, MVT::v32i32, Custom); - } else { - llvm_unreachable("Unrecognized HVX mode"); + bool Use64b = Subtarget.useHVX64BOps(); + ArrayRef LegalV = Use64b ? LegalV64 : LegalV128; + ArrayRef LegalW = Use64b ? LegalW64 : LegalW128; + MVT ByteV = Use64b ? MVT::v64i8 : MVT::v128i8; + MVT ByteW = Use64b ? MVT::v128i8 : MVT::v256i8; + + setOperationAction(ISD::VECTOR_SHUFFLE, ByteV, Legal); + setOperationAction(ISD::VECTOR_SHUFFLE, ByteW, Legal); + setOperationAction(ISD::CONCAT_VECTORS, ByteW, Legal); + setOperationAction(ISD::OR, ByteV, Legal); + + for (MVT T : LegalV) { + setIndexedLoadAction(ISD::POST_INC, T, Legal); + setIndexedStoreAction(ISD::POST_INC, T, Legal); + + setOperationAction(ISD::BUILD_VECTOR, T, Custom); + setOperationAction(ISD::INSERT_SUBVECTOR, T, Custom); + setOperationAction(ISD::INSERT_VECTOR_ELT, T, Custom); + setOperationAction(ISD::EXTRACT_SUBVECTOR, T, Custom); + setOperationAction(ISD::EXTRACT_VECTOR_ELT, T, Custom); + } + + for (MVT T : LegalV) { + if (T == ByteV) + continue; + // Promote all shuffles and concats to operate on vectors of bytes. + setPromoteTo(ISD::VECTOR_SHUFFLE, T, ByteV); + setPromoteTo(ISD::CONCAT_VECTORS, T, ByteV); + setPromoteTo(ISD::OR, T, ByteV); + } + + for (MVT T : LegalW) { + if (T == ByteW) + continue; + // Promote all shuffles and concats to operate on vectors of bytes. + setPromoteTo(ISD::VECTOR_SHUFFLE, T, ByteW); + setPromoteTo(ISD::CONCAT_VECTORS, T, ByteW); } } + // Subtarget-specific operation actions. // if (Subtarget.hasV5TOps()) { @@ -2069,20 +2098,6 @@ HexagonTargetLowering::HexagonTargetLowering(const TargetMachine &TM, setIndexedStoreAction(ISD::POST_INC, VT, Legal); } - if (Subtarget.useHVX64BOps()) { - for (MVT VT : {MVT::v64i8, MVT::v32i16, MVT::v16i32, MVT::v8i64, - MVT::v128i8, MVT::v64i16, MVT::v32i32, MVT::v16i64}) { - setIndexedLoadAction(ISD::POST_INC, VT, Legal); - setIndexedStoreAction(ISD::POST_INC, VT, Legal); - } - } else if (Subtarget.useHVX128BOps()) { - for (MVT VT : {MVT::v128i8, MVT::v64i16, MVT::v32i32, MVT::v16i64, - MVT::v256i8, MVT::v128i16, MVT::v64i32, MVT::v32i64}) { - setIndexedLoadAction(ISD::POST_INC, VT, Legal); - setIndexedStoreAction(ISD::POST_INC, VT, Legal); - } - } - computeRegisterProperties(&HRI); // @@ -2225,6 +2240,9 @@ const char* HexagonTargetLowering::getTargetNodeName(unsigned Opcode) const { case HexagonISD::VASR: return "HexagonISD::VASR"; case HexagonISD::VLSR: return "HexagonISD::VLSR"; case HexagonISD::VSPLAT: return "HexagonISD::VSPLAT"; + case HexagonISD::VEXTRACTW: return "HexagonISD::VEXTRACTW"; + case HexagonISD::VINSERTW0: return "HexagonISD::VINSERTW0"; + case HexagonISD::VROR: return "HexagonISD::VROR"; case HexagonISD::READCYCLE: return "HexagonISD::READCYCLE"; case HexagonISD::OP_END: break; } @@ -2252,43 +2270,11 @@ bool HexagonTargetLowering::isFMAFasterThanFMulAndFAdd(EVT VT) const { // Should we expand the build vector with shuffles? bool HexagonTargetLowering::shouldExpandBuildVectorWithShuffles(EVT VT, unsigned DefinedValues) const { - // Hexagon vector shuffle operates on element sizes of bytes or halfwords - EVT EltVT = VT.getVectorElementType(); - int EltBits = EltVT.getSizeInBits(); - if ((EltBits != 8) && (EltBits != 16)) - return false; - - return TargetLowering::shouldExpandBuildVectorWithShuffles(VT, DefinedValues); -} - -static StridedLoadKind isStridedLoad(const ArrayRef &Mask) { - int even_start = -2; - int odd_start = -1; - size_t mask_len = Mask.size(); - for (auto idx : Mask) { - if ((idx - even_start) == 2) - even_start = idx; - else - break; - } - if (even_start == (int)(mask_len * 2) - 2) - return StridedLoadKind::Even; - for (auto idx : Mask) { - if ((idx - odd_start) == 2) - odd_start = idx; - else - break; - } - if (odd_start == (int)(mask_len * 2) - 1) - return StridedLoadKind::Odd; - - return StridedLoadKind::NoPattern; + return false; } bool HexagonTargetLowering::isShuffleMaskLegal(ArrayRef Mask, EVT VT) const { - if (Subtarget.useHVXOps()) - return isStridedLoad(Mask) != StridedLoadKind::NoPattern; return true; } @@ -2302,7 +2288,6 @@ HexagonTargetLowering::LowerVECTOR_SHUFFLE(SDValue Op, SelectionDAG &DAG) SDValue V2 = Op.getOperand(1); SDLoc dl(Op); EVT VT = Op.getValueType(); - bool UseHVX = Subtarget.useHVXOps(); if (V2.isUndef()) V2 = V1; @@ -2334,27 +2319,6 @@ HexagonTargetLowering::LowerVECTOR_SHUFFLE(SDValue Op, SelectionDAG &DAG) DAG.getConstant(Lane, dl, MVT::i32)); } - if (UseHVX) { - ArrayRef Mask = SVN->getMask(); - size_t MaskLen = Mask.size(); - unsigned SizeInBits = VT.getScalarSizeInBits() * MaskLen; - - if ((Subtarget.useHVX64BOps() && SizeInBits == 64 * 8) || - (Subtarget.useHVX128BOps() && SizeInBits == 128 * 8)) { - StridedLoadKind Pattern = isStridedLoad(Mask); - if (Pattern == StridedLoadKind::NoPattern) - return SDValue(); - - unsigned Opc = Pattern == StridedLoadKind::Even ? HexagonISD::VPACKE - : HexagonISD::VPACKO; - return DAG.getNode(Opc, dl, VT, {Op.getOperand(1), Op.getOperand(0)}); - } - // We used to assert in the "else" part here, but that is bad for Halide - // Halide creates intermediate double registers by interleaving two - // concatenated vector registers. The interleaving requires vector_shuffle - // nodes and we shouldn't barf on a double register result of a - // vector_shuffle because it is most likely an intermediate result. - } // FIXME: We need to support more general vector shuffles. See // below the comment from the ARM backend that deals in the general // case with the vector shuffles. For now, let expand handle these. @@ -2445,7 +2409,7 @@ HexagonTargetLowering::buildVector32(ArrayRef Elem, const SDLoc &dl, SmallVector Consts; bool AllConst = true; for (SDValue V : Elem) { - if (V.getOpcode() == ISD::UNDEF) + if (isUndef(V)) V = DAG.getConstant(0, dl, ElemTy); auto *C = dyn_cast(V.getNode()); Consts.push_back(C); @@ -2454,7 +2418,7 @@ HexagonTargetLowering::buildVector32(ArrayRef Elem, const SDLoc &dl, unsigned First, Num = Elem.size(); for (First = 0; First != Num; ++First) - if (Elem[First].getOpcode() != ISD::UNDEF) + if (!isUndef(Elem[First])) break; if (First == Num) return DAG.getUNDEF(VecTy); @@ -2466,9 +2430,9 @@ HexagonTargetLowering::buildVector32(ArrayRef Elem, const SDLoc &dl, Consts[1]->getZExtValue() << 16; return DAG.getBitcast(MVT::v2i16, DAG.getConstant(V, dl, MVT::i32)); } - SDNode *N = DAG.getMachineNode(Hexagon::A2_combine_ll, dl, MVT::i32, - { Elem[1], Elem[0] }); - return DAG.getBitcast(MVT::v2i16, SDValue(N,0)); + SDValue N = getNode(Hexagon::A2_combine_ll, dl, MVT::i32, + {Elem[1], Elem[0]}, DAG); + return DAG.getBitcast(MVT::v2i16, N); } // First try generating a constant. @@ -2486,7 +2450,7 @@ HexagonTargetLowering::buildVector32(ArrayRef Elem, const SDLoc &dl, for (unsigned i = 0; i != Num; ++i) { if (i == First) continue; - if (Elem[i] == Elem[First] || Elem[i].getOpcode() == ISD::UNDEF) + if (Elem[i] == Elem[First] || isUndef(Elem[i])) continue; IsSplat = false; break; @@ -2507,9 +2471,9 @@ HexagonTargetLowering::buildVector32(ArrayRef Elem, const SDLoc &dl, SDValue V5 = DAG.getNode(ISD::SHL, dl, MVT::i32, {V3, S8}); SDValue V6 = DAG.getNode(ISD::OR, dl, MVT::i32, {V0, V4}); SDValue V7 = DAG.getNode(ISD::OR, dl, MVT::i32, {V2, V5}); - SDNode *T0 = DAG.getMachineNode(Hexagon::A2_combine_ll, dl, MVT::i32, - {V7, V6}); - return DAG.getBitcast(MVT::v4i8, SDValue(T0,0)); + + SDValue T0 = getNode(Hexagon::A2_combine_ll, dl, MVT::i32, {V7, V6}, DAG); + return DAG.getBitcast(MVT::v4i8, T0); } SDValue @@ -2521,7 +2485,7 @@ HexagonTargetLowering::buildVector64(ArrayRef Elem, const SDLoc &dl, SmallVector Consts; bool AllConst = true; for (SDValue V : Elem) { - if (V.getOpcode() == ISD::UNDEF) + if (isUndef(V)) V = DAG.getConstant(0, dl, ElemTy); auto *C = dyn_cast(V.getNode()); Consts.push_back(C); @@ -2530,7 +2494,7 @@ HexagonTargetLowering::buildVector64(ArrayRef Elem, const SDLoc &dl, unsigned First, Num = Elem.size(); for (First = 0; First != Num; ++First) - if (Elem[First].getOpcode() != ISD::UNDEF) + if (!isUndef(Elem[First])) break; if (First == Num) return DAG.getUNDEF(VecTy); @@ -2541,7 +2505,7 @@ HexagonTargetLowering::buildVector64(ArrayRef Elem, const SDLoc &dl, for (unsigned i = 0; i != Num; ++i) { if (i == First) continue; - if (Elem[i] == Elem[First] || Elem[i].getOpcode() == ISD::UNDEF) + if (Elem[i] == Elem[First] || isUndef(Elem[i])) continue; IsSplat = false; break; @@ -2570,12 +2534,7 @@ HexagonTargetLowering::buildVector64(ArrayRef Elem, const SDLoc &dl, SDValue H = (ElemTy == MVT::i32) ? Elem[1] : buildVector32({Elem.data()+Num/2, Num/2}, dl, HalfTy, DAG); - unsigned Id = Hexagon::DoubleRegsRegClassID; - SDNode *N = DAG.getMachineNode(TargetOpcode::REG_SEQUENCE, dl, VecTy, - { DAG.getTargetConstant(Id, dl, MVT::i32), - L, DAG.getTargetConstant(Hexagon::isub_lo, dl, MVT::i32), - H, DAG.getTargetConstant(Hexagon::isub_hi, dl, MVT::i32) }); - return SDValue(N, 0); + return DAG.getNode(HexagonISD::COMBINE, dl, VecTy, {H, L}); } SDValue @@ -2675,120 +2634,33 @@ HexagonTargetLowering::insertVector(SDValue VecV, SDValue ValV, SDValue IdxV, SDValue HexagonTargetLowering::LowerBUILD_VECTOR(SDValue Op, SelectionDAG &DAG) const { - MVT VT = Op.getValueType().getSimpleVT(); - unsigned BW = VT.getSizeInBits(); + MVT VecTy = ty(Op); + unsigned BW = VecTy.getSizeInBits(); if (BW == 32 || BW == 64) { SmallVector Ops; for (unsigned i = 0, e = Op.getNumOperands(); i != e; ++i) Ops.push_back(Op.getOperand(i)); if (BW == 32) - return buildVector32(Ops, SDLoc(Op), VT, DAG); - return buildVector64(Ops, SDLoc(Op), VT, DAG); + return buildVector32(Ops, SDLoc(Op), VecTy, DAG); + return buildVector64(Ops, SDLoc(Op), VecTy, DAG); } + if (Subtarget.useHVXOps() && Subtarget.isHVXVectorType(VecTy)) + return LowerHvxBuildVector(Op, DAG); + return SDValue(); } SDValue HexagonTargetLowering::LowerCONCAT_VECTORS(SDValue Op, SelectionDAG &DAG) const { - SDLoc dl(Op); - bool UseHVX = Subtarget.useHVXOps(); - EVT VT = Op.getValueType(); - unsigned NElts = Op.getNumOperands(); - SDValue Vec0 = Op.getOperand(0); - EVT VecVT = Vec0.getValueType(); - unsigned Width = VecVT.getSizeInBits(); - - if (NElts == 2) { - MVT ST = VecVT.getSimpleVT(); - // We are trying to concat two v2i16 to a single v4i16, or two v4i8 - // into a single v8i8. - if (ST == MVT::v2i16 || ST == MVT::v4i8) - return DAG.getNode(HexagonISD::COMBINE, dl, VT, Op.getOperand(1), Vec0); - - if (UseHVX) { - assert((Width == 64 * 8 && Subtarget.useHVX64BOps()) || - (Width == 128 * 8 && Subtarget.useHVX128BOps())); - SDValue Vec1 = Op.getOperand(1); - MVT OpTy = Subtarget.useHVX64BOps() ? MVT::v16i32 : MVT::v32i32; - MVT ReTy = Subtarget.useHVX64BOps() ? MVT::v32i32 : MVT::v64i32; - SDValue B0 = DAG.getNode(ISD::BITCAST, dl, OpTy, Vec0); - SDValue B1 = DAG.getNode(ISD::BITCAST, dl, OpTy, Vec1); - SDValue VC = DAG.getNode(HexagonISD::VCOMBINE, dl, ReTy, B1, B0); - return DAG.getNode(ISD::BITCAST, dl, VT, VC); - } - } - - if (VT.getSizeInBits() != 32 && VT.getSizeInBits() != 64) - return SDValue(); - - SDValue C0 = DAG.getConstant(0, dl, MVT::i64); - SDValue C32 = DAG.getConstant(32, dl, MVT::i64); - SDValue W = DAG.getConstant(Width, dl, MVT::i64); - // Create the "width" part of the argument to insert_rp/insertp_rp. - SDValue S = DAG.getNode(ISD::SHL, dl, MVT::i64, W, C32); - SDValue V = C0; - - for (unsigned i = 0, e = NElts; i != e; ++i) { - unsigned N = NElts-i-1; - SDValue OpN = Op.getOperand(N); - - if (VT.getSizeInBits() == 64 && OpN.getValueSizeInBits() == 32) { - SDValue C = DAG.getConstant(0, dl, MVT::i32); - OpN = DAG.getNode(HexagonISD::COMBINE, dl, VT, C, OpN); - } - SDValue Idx = DAG.getConstant(N, dl, MVT::i64); - SDValue Offset = DAG.getNode(ISD::MUL, dl, MVT::i64, Idx, W); - SDValue Or = DAG.getNode(ISD::OR, dl, MVT::i64, S, Offset); - if (VT.getSizeInBits() == 32) - V = DAG.getNode(HexagonISD::INSERTRP, dl, MVT::i32, {V, OpN, Or}); - else if (VT.getSizeInBits() == 64) - V = DAG.getNode(HexagonISD::INSERTRP, dl, MVT::i64, {V, OpN, Or}); - else - return SDValue(); - } - - return DAG.getNode(ISD::BITCAST, dl, VT, V); -} - -SDValue -HexagonTargetLowering::LowerEXTRACT_SUBVECTOR_HVX(SDValue Op, - SelectionDAG &DAG) const { - EVT VT = Op.getOperand(0).getValueType(); - SDLoc dl(Op); - bool UseHVX = Subtarget.useHVXOps(); - bool UseHVX64B = Subtarget.useHVX64BOps(); - // Just in case... - - if (!VT.isVector() || !UseHVX) - return SDValue(); - - EVT ResVT = Op.getValueType(); - unsigned ResSize = ResVT.getSizeInBits(); - unsigned VectorSizeInBits = UseHVX64B ? (64 * 8) : (128 * 8); - unsigned OpSize = VT.getSizeInBits(); - - // We deal only with cases where the result is the vector size - // and the vector operand is a double register. - if (!(ResVT.isByteSized() && ResSize == VectorSizeInBits) || - !(VT.isByteSized() && OpSize == 2 * VectorSizeInBits)) - return SDValue(); - - ConstantSDNode *Cst = dyn_cast(Op.getOperand(1)); - if (!Cst) - return SDValue(); - unsigned Val = Cst->getZExtValue(); - - // These two will get lowered to an appropriate EXTRACT_SUBREG in ISel. - if (Val == 0) { - SDValue Vec = Op.getOperand(0); - return DAG.getTargetExtractSubreg(Hexagon::vsub_lo, dl, ResVT, Vec); - } + MVT VecTy = ty(Op); + assert(!Subtarget.useHVXOps() || !Subtarget.isHVXVectorType(VecTy)); - if (ResVT.getVectorNumElements() == Val) { - SDValue Vec = Op.getOperand(0); - return DAG.getTargetExtractSubreg(Hexagon::vsub_hi, dl, ResVT, Vec); + if (VecTy.getSizeInBits() == 64) { + assert(Op.getNumOperands() == 2); + return DAG.getNode(HexagonISD::COMBINE, SDLoc(Op), VecTy, Op.getOperand(1), + Op.getOperand(0)); } return SDValue(); @@ -2798,6 +2670,10 @@ SDValue HexagonTargetLowering::LowerEXTRACT_VECTOR_ELT(SDValue Op, SelectionDAG &DAG) const { SDValue Vec = Op.getOperand(0); + MVT VecTy = ty(Vec); + if (Subtarget.useHVXOps() && Subtarget.isHVXVectorType(VecTy)) + return LowerHvxExtractElement(Op, DAG); + MVT ElemTy = ty(Vec).getVectorElementType(); return extractVector(Vec, Op.getOperand(1), SDLoc(Op), ElemTy, ty(Op), DAG); } @@ -2808,7 +2684,7 @@ HexagonTargetLowering::LowerEXTRACT_SUBVECTOR(SDValue Op, SDValue Vec = Op.getOperand(0); MVT VecTy = ty(Vec); if (Subtarget.useHVXOps() && Subtarget.isHVXVectorType(VecTy)) - return LowerEXTRACT_SUBVECTOR_HVX(Op, DAG); + return LowerHvxExtractSubvector(Op, DAG); return extractVector(Vec, Op.getOperand(1), SDLoc(Op), ty(Op), ty(Op), DAG); } @@ -2817,6 +2693,9 @@ SDValue HexagonTargetLowering::LowerINSERT_VECTOR_ELT(SDValue Op, SelectionDAG &DAG) const { MVT VecTy = ty(Op); + if (Subtarget.useHVXOps() && Subtarget.isHVXVectorType(VecTy)) + return LowerHvxInsertElement(Op, DAG); + return insertVector(Op.getOperand(0), Op.getOperand(1), Op.getOperand(2), SDLoc(Op), VecTy.getVectorElementType(), DAG); } @@ -2824,6 +2703,9 @@ HexagonTargetLowering::LowerINSERT_VECTOR_ELT(SDValue Op, SDValue HexagonTargetLowering::LowerINSERT_SUBVECTOR(SDValue Op, SelectionDAG &DAG) const { + if (Subtarget.useHVXOps() && Subtarget.isHVXVectorType(ty(Op))) + return LowerHvxInsertSubvector(Op, DAG); + SDValue ValV = Op.getOperand(1); return insertVector(Op.getOperand(0), ValV, Op.getOperand(2), SDLoc(Op), ty(ValV), DAG); @@ -2911,6 +2793,7 @@ HexagonTargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG) const { case ISD::PREFETCH: return LowerPREFETCH(Op, DAG); case ISD::READCYCLECOUNTER: return LowerREADCYCLECOUNTER(Op, DAG); } + return SDValue(); } /// Returns relocation base for the given PIC jumptable. diff --git a/lib/Target/Hexagon/HexagonISelLowering.h b/lib/Target/Hexagon/HexagonISelLowering.h index 9f7891e1746..17310914572 100644 --- a/lib/Target/Hexagon/HexagonISelLowering.h +++ b/lib/Target/Hexagon/HexagonISelLowering.h @@ -63,6 +63,9 @@ namespace HexagonISD { VCOMBINE, VPACKE, VPACKO, + VEXTRACTW, + VINSERTW0, + VROR, TC_RETURN, EH_RETURN, DCFETCH, @@ -88,6 +91,8 @@ namespace HexagonISD { explicit HexagonTargetLowering(const TargetMachine &TM, const HexagonSubtarget &ST); + bool isHVXVectorType(MVT Ty) const; + /// IsEligibleForTailCallOptimization - Check whether the call is eligible /// for tail call optimization. Targets which want to do tail call /// optimization should implement this function. @@ -121,9 +126,8 @@ namespace HexagonISD { SDValue LowerCONCAT_VECTORS(SDValue Op, SelectionDAG &DAG) const; SDValue LowerEXTRACT_VECTOR_ELT(SDValue Op, SelectionDAG &DAG) const; SDValue LowerEXTRACT_SUBVECTOR(SDValue Op, SelectionDAG &DAG) const; - SDValue LowerEXTRACT_SUBVECTOR_HVX(SDValue Op, SelectionDAG &DAG) const; - SDValue LowerINSERT_SUBVECTOR(SDValue Op, SelectionDAG &DAG) const; SDValue LowerINSERT_VECTOR_ELT(SDValue Op, SelectionDAG &DAG) const; + SDValue LowerINSERT_SUBVECTOR(SDValue Op, SelectionDAG &DAG) const; SDValue LowerVECTOR_SHUFFLE(SDValue Op, SelectionDAG &DAG) const; SDValue LowerVECTOR_SHIFT(SDValue Op, SelectionDAG &DAG) const; @@ -281,7 +285,24 @@ namespace HexagonISD { return Ty; return MVT::getIntegerVT(Ty.getSizeInBits()); } + MVT tyVector(MVT Ty, MVT ElemTy) const { + if (Ty.isVector() && Ty.getVectorElementType() == ElemTy) + return Ty; + unsigned TyWidth = Ty.getSizeInBits(), ElemWidth = ElemTy.getSizeInBits(); + assert((TyWidth % ElemWidth) == 0); + return MVT::getVectorVT(ElemTy, TyWidth/ElemWidth); + } + bool isUndef(SDValue Op) const { + if (Op.isMachineOpcode()) + return Op.getMachineOpcode() == TargetOpcode::IMPLICIT_DEF; + return Op.getOpcode() == ISD::UNDEF; + } + SDValue getNode(unsigned MachineOpc, const SDLoc &dl, MVT Ty, + ArrayRef Ops, SelectionDAG &DAG) const { + SDNode *N = DAG.getMachineNode(MachineOpc, dl, Ty, Ops); + return SDValue(N, 0); + } SDValue buildVector32(ArrayRef Elem, const SDLoc &dl, MVT VecTy, SelectionDAG &DAG) const; SDValue buildVector64(ArrayRef Elem, const SDLoc &dl, MVT VecTy, @@ -291,6 +312,38 @@ namespace HexagonISD { SDValue insertVector(SDValue VecV, SDValue ValV, SDValue IdxV, const SDLoc &dl, MVT ValTy, SelectionDAG &DAG) const; + using VectorPair = std::pair; + using TypePair = std::pair; + + SDValue getInt(unsigned IntId, MVT ResTy, ArrayRef Ops, + const SDLoc &dl, SelectionDAG &DAG) const; + + TypePair ty(const VectorPair &Ops) const { + return { Ops.first.getValueType().getSimpleVT(), + Ops.second.getValueType().getSimpleVT() }; + } + + MVT typeJoin(const TypePair &Tys) const; + TypePair typeSplit(MVT Ty) const; + MVT typeCastElem(MVT VecTy, MVT ElemTy) const; + MVT typeExtElem(MVT VecTy, unsigned Factor) const; + MVT typeTruncElem(MVT VecTy, unsigned Factor) const; + + SDValue opJoin(const VectorPair &Ops, const SDLoc &dl, + SelectionDAG &DAG) const; + VectorPair opSplit(SDValue Vec, const SDLoc &dl, SelectionDAG &DAG) const; + SDValue opCastElem(SDValue Vec, MVT ElemTy, SelectionDAG &DAG) const; + + SDValue convertToByteIndex(SDValue ElemIdx, MVT ElemTy, + SelectionDAG &DAG) const; + SDValue getIndexInWord32(SDValue Idx, MVT ElemTy, SelectionDAG &DAG) const; + + SDValue LowerHvxBuildVector(SDValue Op, SelectionDAG &DAG) const; + SDValue LowerHvxExtractElement(SDValue Op, SelectionDAG &DAG) const; + SDValue LowerHvxInsertElement(SDValue Op, SelectionDAG &DAG) const; + SDValue LowerHvxExtractSubvector(SDValue Op, SelectionDAG &DAG) const; + SDValue LowerHvxInsertSubvector(SDValue Op, SelectionDAG &DAG) const; + std::pair findRepresentativeClass(const TargetRegisterInfo *TRI, MVT VT) const override; diff --git a/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp b/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp new file mode 100644 index 00000000000..3a9e50826a0 --- /dev/null +++ b/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp @@ -0,0 +1,299 @@ +//===-- HexagonISelLoweringHVX.cpp --- Lowering HVX operations ------------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#include "HexagonISelLowering.h" +#include "HexagonRegisterInfo.h" +#include "HexagonSubtarget.h" + +using namespace llvm; + +SDValue +HexagonTargetLowering::getInt(unsigned IntId, MVT ResTy, ArrayRef Ops, + const SDLoc &dl, SelectionDAG &DAG) const { + SmallVector IntOps; + IntOps.push_back(DAG.getConstant(IntId, dl, MVT::i32)); + for (const SDValue &Op : Ops) + IntOps.push_back(Op); + return DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, ResTy, IntOps); +} + +MVT +HexagonTargetLowering::typeJoin(const TypePair &Tys) const { + assert(Tys.first.getVectorElementType() == Tys.second.getVectorElementType()); + + MVT ElemTy = Tys.first.getVectorElementType(); + return MVT::getVectorVT(ElemTy, Tys.first.getVectorNumElements() + + Tys.second.getVectorNumElements()); +} + +HexagonTargetLowering::TypePair +HexagonTargetLowering::typeSplit(MVT VecTy) const { + assert(VecTy.isVector()); + unsigned NumElem = VecTy.getVectorNumElements(); + assert((NumElem % 2) == 0 && "Expecting even-sized vector type"); + MVT HalfTy = MVT::getVectorVT(VecTy.getVectorElementType(), NumElem/2); + return { HalfTy, HalfTy }; +} + +MVT +HexagonTargetLowering::typeExtElem(MVT VecTy, unsigned Factor) const { + MVT ElemTy = VecTy.getVectorElementType(); + MVT NewElemTy = MVT::getIntegerVT(ElemTy.getSizeInBits() * Factor); + return MVT::getVectorVT(NewElemTy, VecTy.getVectorNumElements()); +} + +MVT +HexagonTargetLowering::typeTruncElem(MVT VecTy, unsigned Factor) const { + MVT ElemTy = VecTy.getVectorElementType(); + MVT NewElemTy = MVT::getIntegerVT(ElemTy.getSizeInBits() / Factor); + return MVT::getVectorVT(NewElemTy, VecTy.getVectorNumElements()); +} + +SDValue +HexagonTargetLowering::opCastElem(SDValue Vec, MVT ElemTy, + SelectionDAG &DAG) const { + if (ty(Vec).getVectorElementType() == ElemTy) + return Vec; + MVT CastTy = tyVector(Vec.getValueType().getSimpleVT(), ElemTy); + return DAG.getBitcast(CastTy, Vec); +} + +SDValue +HexagonTargetLowering::opJoin(const VectorPair &Ops, const SDLoc &dl, + SelectionDAG &DAG) const { + return DAG.getNode(ISD::CONCAT_VECTORS, dl, typeJoin(ty(Ops)), + Ops.second, Ops.first); +} + +HexagonTargetLowering::VectorPair +HexagonTargetLowering::opSplit(SDValue Vec, const SDLoc &dl, + SelectionDAG &DAG) const { + TypePair Tys = typeSplit(ty(Vec)); + return DAG.SplitVector(Vec, dl, Tys.first, Tys.second); +} + +SDValue +HexagonTargetLowering::convertToByteIndex(SDValue ElemIdx, MVT ElemTy, + SelectionDAG &DAG) const { + if (ElemIdx.getValueType().getSimpleVT() != MVT::i32) + ElemIdx = DAG.getBitcast(MVT::i32, ElemIdx); + + unsigned ElemWidth = ElemTy.getSizeInBits(); + if (ElemWidth == 8) + return ElemIdx; + + unsigned L = Log2_32(ElemWidth/8); + const SDLoc &dl(ElemIdx); + return DAG.getNode(ISD::SHL, dl, MVT::i32, + {ElemIdx, DAG.getConstant(L, dl, MVT::i32)}); +} + +SDValue +HexagonTargetLowering::getIndexInWord32(SDValue Idx, MVT ElemTy, + SelectionDAG &DAG) const { + unsigned ElemWidth = ElemTy.getSizeInBits(); + assert(ElemWidth >= 8 && ElemWidth <= 32); + if (ElemWidth == 32) + return Idx; + + if (ty(Idx) != MVT::i32) + Idx = DAG.getBitcast(MVT::i32, Idx); + const SDLoc &dl(Idx); + SDValue Mask = DAG.getConstant(32/ElemWidth - 1, dl, MVT::i32); + SDValue SubIdx = DAG.getNode(ISD::AND, dl, MVT::i32, {Idx, Mask}); + return SubIdx; +} + +SDValue +HexagonTargetLowering::LowerHvxBuildVector(SDValue Op, SelectionDAG &DAG) + const { + const SDLoc &dl(Op); + BuildVectorSDNode *BN = cast(Op.getNode()); + bool IsConst = BN->isConstant(); + MachineFunction &MF = DAG.getMachineFunction(); + MVT VecTy = ty(Op); + + if (IsConst) { + SmallVector Elems; + for (SDValue V : BN->op_values()) { + if (auto *C = dyn_cast(V.getNode())) + Elems.push_back(const_cast(C->getConstantIntValue())); + } + Constant *CV = ConstantVector::get(Elems); + unsigned Align = VecTy.getSizeInBits() / 8; + SDValue CP = LowerConstantPool(DAG.getConstantPool(CV, VecTy, Align), DAG); + return DAG.getLoad(VecTy, dl, DAG.getEntryNode(), CP, + MachinePointerInfo::getConstantPool(MF), Align); + } + + unsigned NumOps = Op.getNumOperands(); + unsigned HwLen = Subtarget.getVectorLength(); + unsigned ElemSize = VecTy.getVectorElementType().getSizeInBits() / 8; + assert(ElemSize*NumOps == HwLen); + + SmallVector Words; + SmallVector Ops; + for (unsigned i = 0; i != NumOps; ++i) + Ops.push_back(Op.getOperand(i)); + + if (VecTy.getVectorElementType() != MVT::i32) { + assert(ElemSize < 4 && "vNi64 should have been promoted to vNi32"); + assert((ElemSize == 1 || ElemSize == 2) && "Invalid element size"); + unsigned OpsPerWord = (ElemSize == 1) ? 4 : 2; + MVT PartVT = MVT::getVectorVT(VecTy.getVectorElementType(), OpsPerWord); + for (unsigned i = 0; i != NumOps; i += OpsPerWord) { + SDValue W = buildVector32({&Ops[i], OpsPerWord}, dl, PartVT, DAG); + Words.push_back(DAG.getBitcast(MVT::i32, W)); + } + } else { + Words.assign(Ops.begin(), Ops.end()); + } + + // Construct two halves in parallel, then or them together. + assert(4*Words.size() == Subtarget.getVectorLength()); + SDValue HalfV0 = getNode(Hexagon::V6_vd0, dl, VecTy, {}, DAG); + SDValue HalfV1 = getNode(Hexagon::V6_vd0, dl, VecTy, {}, DAG); + SDValue S = DAG.getConstant(4, dl, MVT::i32); + unsigned NumWords = Words.size(); + for (unsigned i = 0; i != NumWords/2; ++i) { + SDValue N = DAG.getNode(HexagonISD::VINSERTW0, dl, VecTy, + {HalfV0, Words[i]}); + SDValue M = DAG.getNode(HexagonISD::VINSERTW0, dl, VecTy, + {HalfV1, Words[i+NumWords/2]}); + HalfV0 = DAG.getNode(HexagonISD::VROR, dl, VecTy, {N, S}); + HalfV1 = DAG.getNode(HexagonISD::VROR, dl, VecTy, {M, S}); + } + + HalfV0 = DAG.getNode(HexagonISD::VROR, dl, VecTy, + {HalfV0, DAG.getConstant(HwLen/2, dl, MVT::i32)}); + SDValue DstV = DAG.getNode(ISD::OR, dl, VecTy, {HalfV0, HalfV1}); + return DstV; +} + +SDValue +HexagonTargetLowering::LowerHvxExtractElement(SDValue Op, SelectionDAG &DAG) + const { + // Change the type of the extracted element to i32. + SDValue VecV = Op.getOperand(0); + MVT ElemTy = ty(VecV).getVectorElementType(); + unsigned ElemWidth = ElemTy.getSizeInBits(); + assert(ElemWidth >= 8 && ElemWidth <= 32); // TODO i64 + + const SDLoc &dl(Op); + SDValue IdxV = Op.getOperand(1); + if (ty(IdxV) != MVT::i32) + IdxV = DAG.getBitcast(MVT::i32, IdxV); + + SDValue ByteIdx = convertToByteIndex(IdxV, ElemTy, DAG); + SDValue ExWord = DAG.getNode(HexagonISD::VEXTRACTW, dl, MVT::i32, + {VecV, ByteIdx}); + if (ElemTy == MVT::i32) + return ExWord; + + // Have an extracted word, need to extract the smaller element out of it. + // 1. Extract the bits of (the original) IdxV that correspond to the index + // of the desired element in the 32-bit word. + SDValue SubIdx = getIndexInWord32(IdxV, ElemTy, DAG); + // 2. Extract the element from the word. + SDValue ExVec = DAG.getBitcast(tyVector(ty(ExWord), ElemTy), ExWord); + return extractVector(ExVec, SubIdx, dl, ElemTy, MVT::i32, DAG); +} + +SDValue +HexagonTargetLowering::LowerHvxInsertElement(SDValue Op, SelectionDAG &DAG) + const { + const SDLoc &dl(Op); + SDValue VecV = Op.getOperand(0); + SDValue ValV = Op.getOperand(1); + SDValue IdxV = Op.getOperand(2); + MVT ElemTy = ty(VecV).getVectorElementType(); + unsigned ElemWidth = ElemTy.getSizeInBits(); + assert(ElemWidth >= 8 && ElemWidth <= 32); // TODO i64 + + auto InsertWord = [&DAG,&dl,this] (SDValue VecV, SDValue ValV, + SDValue ByteIdxV) { + MVT VecTy = ty(VecV); + unsigned HwLen = Subtarget.getVectorLength(); + SDValue MaskV = DAG.getNode(ISD::AND, dl, MVT::i32, + {ByteIdxV, DAG.getConstant(-4, dl, MVT::i32)}); + SDValue RotV = DAG.getNode(HexagonISD::VROR, dl, VecTy, {VecV, MaskV}); + SDValue InsV = DAG.getNode(HexagonISD::VINSERTW0, dl, VecTy, {RotV, ValV}); + SDValue SubV = DAG.getNode(ISD::SUB, dl, MVT::i32, + {DAG.getConstant(HwLen/4, dl, MVT::i32), MaskV}); + SDValue TorV = DAG.getNode(HexagonISD::VROR, dl, VecTy, {InsV, SubV}); + return TorV; + }; + + SDValue ByteIdx = convertToByteIndex(IdxV, ElemTy, DAG); + if (ElemTy == MVT::i32) + return InsertWord(VecV, ValV, ByteIdx); + + // If this is not inserting a 32-bit word, convert it into such a thing. + // 1. Extract the existing word from the target vector. + SDValue WordIdx = DAG.getNode(ISD::SRL, dl, MVT::i32, + {ByteIdx, DAG.getConstant(2, dl, MVT::i32)}); + SDValue Ex0 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::i32, + {opCastElem(VecV, MVT::i32, DAG), WordIdx}); + SDValue Ext = LowerHvxExtractElement(Ex0, DAG); + + // 2. Treating the extracted word as a 32-bit vector, insert the given + // value into it. + SDValue SubIdx = getIndexInWord32(IdxV, ElemTy, DAG); + MVT SubVecTy = tyVector(ty(Ext), ElemTy); + SDValue Ins = insertVector(DAG.getBitcast(SubVecTy, Ext), + ValV, SubIdx, dl, SubVecTy, DAG); + + // 3. Insert the 32-bit word back into the original vector. + return InsertWord(VecV, Ins, ByteIdx); +} + +SDValue +HexagonTargetLowering::LowerHvxExtractSubvector(SDValue Op, SelectionDAG &DAG) + const { + SDValue SrcV = Op.getOperand(0); + MVT SrcTy = ty(SrcV); + unsigned SrcElems = SrcTy.getVectorNumElements(); + SDValue IdxV = Op.getOperand(1); + unsigned Idx = cast(IdxV.getNode())->getZExtValue(); + MVT DstTy = ty(Op); + assert(Idx == 0 || DstTy.getVectorNumElements() % Idx == 0); + const SDLoc &dl(Op); + if (Idx == 0) + return DAG.getTargetExtractSubreg(Hexagon::vsub_lo, dl, DstTy, SrcV); + if (Idx == SrcElems/2) + return DAG.getTargetExtractSubreg(Hexagon::vsub_hi, dl, DstTy, SrcV); + return SDValue(); +} + +SDValue +HexagonTargetLowering::LowerHvxInsertSubvector(SDValue Op, SelectionDAG &DAG) + const { + // Idx may be variable + SDValue IdxV = Op.getOperand(2); + auto *IdxN = dyn_cast(IdxV.getNode()); + if (!IdxN) + return SDValue(); + unsigned Idx = IdxN->getZExtValue(); + + SDValue DstV = Op.getOperand(0); + SDValue SrcV = Op.getOperand(1); + MVT DstTy = ty(DstV); + MVT SrcTy = ty(SrcV); + unsigned DstElems = DstTy.getVectorNumElements(); + unsigned SrcElems = SrcTy.getVectorNumElements(); + if (2*SrcElems != DstElems) + return SDValue(); + + const SDLoc &dl(Op); + if (Idx == 0) + return DAG.getTargetInsertSubreg(Hexagon::vsub_lo, dl, DstTy, DstV, SrcV); + if (Idx == SrcElems) + return DAG.getTargetInsertSubreg(Hexagon::vsub_hi, dl, DstTy, DstV, SrcV); + return SDValue(); +} diff --git a/lib/Target/Hexagon/HexagonPatterns.td b/lib/Target/Hexagon/HexagonPatterns.td index 270575aa09a..f1d01b0cee2 100644 --- a/lib/Target/Hexagon/HexagonPatterns.td +++ b/lib/Target/Hexagon/HexagonPatterns.td @@ -19,10 +19,10 @@ // (8) Shift/permute // (9) Arithmetic/bitwise // (10) Bit -// (11) Load -// (12) Store -// (13) Memop -// (14) PIC +// (11) PIC +// (12) Load +// (13) Store +// (14) Memop // (15) Call // (16) Branch // (17) Misc @@ -340,6 +340,8 @@ def: Pat<(HexagonCONST32_GP tblockaddress:$A), (A2_tfrsi imm:$A)>; def: Pat<(HexagonCONST32_GP tglobaladdr:$A), (A2_tfrsi imm:$A)>; def: Pat<(HexagonJT tjumptable:$A), (A2_tfrsi imm:$A)>; def: Pat<(HexagonCP tconstpool:$A), (A2_tfrsi imm:$A)>; +// The HVX load patterns also match CP directly. Make sure that if +// the selection of this opcode changes, it's updated in all places. def: Pat<(i1 0), (PS_false)>; def: Pat<(i1 1), (PS_true)>; @@ -1630,7 +1632,31 @@ let AddedComplexity = 100 in { (I1toI32 (S4_ntstbit_r IntRegs:$Rs, IntRegs:$Rt))>; } -// --(11) Load ----------------------------------------------------------- +// --(11) PIC ------------------------------------------------------------ +// + +def SDT_HexagonAtGot + : SDTypeProfile<1, 3, [SDTCisVT<0, i32>, SDTCisVT<1, i32>, SDTCisVT<2, i32>]>; +def SDT_HexagonAtPcrel + : SDTypeProfile<1, 1, [SDTCisVT<0, i32>, SDTCisVT<1, i32>]>; + +// AT_GOT address-of-GOT, address-of-global, offset-in-global +def HexagonAtGot : SDNode<"HexagonISD::AT_GOT", SDT_HexagonAtGot>; +// AT_PCREL address-of-global +def HexagonAtPcrel : SDNode<"HexagonISD::AT_PCREL", SDT_HexagonAtPcrel>; + +def: Pat<(HexagonAtGot I32:$got, I32:$addr, (i32 0)), + (L2_loadri_io I32:$got, imm:$addr)>; +def: Pat<(HexagonAtGot I32:$got, I32:$addr, s30_2ImmPred:$off), + (A2_addi (L2_loadri_io I32:$got, imm:$addr), imm:$off)>; +def: Pat<(HexagonAtPcrel I32:$addr), + (C4_addipc imm:$addr)>; + +// The HVX load patterns also match AT_PCREL directly. Make sure that +// if the selection of this opcode changes, it's updated in all places. + + +// --(12) Load ----------------------------------------------------------- // def extloadv2i8: PatFrag<(ops node:$ptr), (extload node:$ptr), [{ @@ -1971,6 +1997,12 @@ multiclass HvxLd_pat { def: Pat<(VT (Load I32:$Rt)), (MI I32:$Rt, 0)>; def: Pat<(VT (Load (add I32:$Rt, ImmPred:$s))), (MI I32:$Rt, imm:$s)>; + // The HVX selection code for shuffles can generate vector constants. + // Calling "Select" on the resulting loads from CP fails without these + // patterns. + def: Pat<(VT (Load (HexagonCP tconstpool:$A))), (MI (A2_tfrsi imm:$A), 0)>; + def: Pat<(VT (Load (HexagonAtPcrel tconstpool:$A))), + (MI (C4_addipc imm:$A), 0)>; } @@ -1997,7 +2029,7 @@ let Predicates = [UseHVX] in { } -// --(12) Store ---------------------------------------------------------- +// --(13) Store ---------------------------------------------------------- // @@ -2466,7 +2498,7 @@ let Predicates = [UseHVX] in { } -// --(13) Memop ---------------------------------------------------------- +// --(14) Memop ---------------------------------------------------------- // def m5_0Imm8Pred : PatLeaf<(i32 imm), [{ @@ -2744,27 +2776,6 @@ let AddedComplexity = 220 in { } -// --(14) PIC ------------------------------------------------------------ -// - -def SDT_HexagonAtGot - : SDTypeProfile<1, 3, [SDTCisVT<0, i32>, SDTCisVT<1, i32>, SDTCisVT<2, i32>]>; -def SDT_HexagonAtPcrel - : SDTypeProfile<1, 1, [SDTCisVT<0, i32>, SDTCisVT<1, i32>]>; - -// AT_GOT address-of-GOT, address-of-global, offset-in-global -def HexagonAtGot : SDNode<"HexagonISD::AT_GOT", SDT_HexagonAtGot>; -// AT_PCREL address-of-global -def HexagonAtPcrel : SDNode<"HexagonISD::AT_PCREL", SDT_HexagonAtPcrel>; - -def: Pat<(HexagonAtGot I32:$got, I32:$addr, (i32 0)), - (L2_loadri_io I32:$got, imm:$addr)>; -def: Pat<(HexagonAtGot I32:$got, I32:$addr, s30_2ImmPred:$off), - (A2_addi (L2_loadri_io I32:$got, imm:$addr), imm:$off)>; -def: Pat<(HexagonAtPcrel I32:$addr), - (C4_addipc imm:$addr)>; - - // --(15) Call ----------------------------------------------------------- // @@ -2894,3 +2905,32 @@ def HexagonREADCYCLE: SDNode<"HexagonISD::READCYCLE", SDTInt64Leaf, [SDNPHasChain]>; def: Pat<(HexagonREADCYCLE), (A4_tfrcpp UPCYCLE)>; + +def SDTHexagonVEXTRACTW: SDTypeProfile<1, 2, + [SDTCisVT<0, i32>, SDTCisVec<1>, SDTCisVT<2, i32>]>; +def HexagonVEXTRACTW : SDNode<"HexagonISD::VEXTRACTW", SDTHexagonVEXTRACTW>; + +def SDTHexagonVINSERTW0: SDTypeProfile<1, 2, + [SDTCisVec<0>, SDTCisSameAs<0, 1>, SDTCisVT<2, i32>]>; +def HexagonVINSERTW0 : SDNode<"HexagonISD::VINSERTW0", SDTHexagonVINSERTW0>; + +let Predicates = [UseHVX] in { + def: Pat<(concat_vectors HVI8:$Vs, HVI8:$Vt), + (V6_vcombine HvxVR:$Vt, HvxVR:$Vs)>; + def: Pat<(or HVI8:$Vs, HVI8:$Vt), + (V6_vor HvxVR:$Vt, HvxVR:$Vs)>; + + def: Pat<(HexagonVEXTRACTW HVI8:$Vu, I32:$Rs), + (V6_extractw HvxVR:$Vu, I32:$Rs)>; + def: Pat<(HexagonVEXTRACTW HVI16:$Vu, I32:$Rs), + (V6_extractw HvxVR:$Vu, I32:$Rs)>; + def: Pat<(HexagonVEXTRACTW HVI32:$Vu, I32:$Rs), + (V6_extractw HvxVR:$Vu, I32:$Rs)>; + + def: Pat<(HexagonVINSERTW0 HVI8:$Vu, I32:$Rt), + (V6_vinsertwr HvxVR:$Vu, I32:$Rt)>; + def: Pat<(HexagonVINSERTW0 HVI16:$Vu, I32:$Rt), + (V6_vinsertwr HvxVR:$Vu, I32:$Rt)>; + def: Pat<(HexagonVINSERTW0 HVI32:$Vu, I32:$Rt), + (V6_vinsertwr HvxVR:$Vu, I32:$Rt)>; +} diff --git a/test/CodeGen/Hexagon/autohvx/align-128b.ll b/test/CodeGen/Hexagon/autohvx/align-128b.ll new file mode 100644 index 00000000000..8048dc43404 --- /dev/null +++ b/test/CodeGen/Hexagon/autohvx/align-128b.ll @@ -0,0 +1,1019 @@ +; RUN: llc -march=hexagon < %s | FileCheck %s + +; CHECK-LABEL: test_0000 +; CHECK-NOT: valign +define <256 x i8> @test_0000(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_0001 +; CHECK: valign(v1,v0,#1) +define <256 x i8> @test_0001(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_0002 +; CHECK: valign(v1,v0,#2) +define <256 x i8> @test_0002(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_0003 +; CHECK: valign(v1,v0,#3) +define <256 x i8> @test_0003(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_0004 +; CHECK: valign(v1,v0,#4) +define <256 x i8> @test_0004(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_0005 +; CHECK: valign(v1,v0,#5) +define <256 x i8> @test_0005(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_0006 +; CHECK: valign(v1,v0,#6) +define <256 x i8> @test_0006(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_0007 +; CHECK: valign(v1,v0,#7) +define <256 x i8> @test_0007(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_0008 +; CHECK: [[R0008:r[0-9]+]] = #8 +; CHECK: valign(v1,v0,[[R0008]]) +define <256 x i8> @test_0008(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_0009 +; CHECK: [[R0009:r[0-9]+]] = #9 +; CHECK: valign(v1,v0,[[R0009]]) +define <256 x i8> @test_0009(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_000a +; CHECK: [[R000a:r[0-9]+]] = #10 +; CHECK: valign(v1,v0,[[R000a]]) +define <256 x i8> @test_000a(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_000b +; CHECK: [[R000b:r[0-9]+]] = #11 +; CHECK: valign(v1,v0,[[R000b]]) +define <256 x i8> @test_000b(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_000c +; CHECK: [[R000c:r[0-9]+]] = #12 +; CHECK: valign(v1,v0,[[R000c]]) +define <256 x i8> @test_000c(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_000d +; CHECK: [[R000d:r[0-9]+]] = #13 +; CHECK: valign(v1,v0,[[R000d]]) +define <256 x i8> @test_000d(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_000e +; CHECK: [[R000e:r[0-9]+]] = #14 +; CHECK: valign(v1,v0,[[R000e]]) +define <256 x i8> @test_000e(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_000f +; CHECK: [[R000f:r[0-9]+]] = #15 +; CHECK: valign(v1,v0,[[R000f]]) +define <256 x i8> @test_000f(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_0010 +; CHECK: [[R0010:r[0-9]+]] = #16 +; CHECK: valign(v1,v0,[[R0010]]) +define <256 x i8> @test_0010(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_0011 +; CHECK: [[R0011:r[0-9]+]] = #17 +; CHECK: valign(v1,v0,[[R0011]]) +define <256 x i8> @test_0011(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_0012 +; CHECK: [[R0012:r[0-9]+]] = #18 +; CHECK: valign(v1,v0,[[R0012]]) +define <256 x i8> @test_0012(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_0013 +; CHECK: [[R0013:r[0-9]+]] = #19 +; CHECK: valign(v1,v0,[[R0013]]) +define <256 x i8> @test_0013(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_0014 +; CHECK: [[R0014:r[0-9]+]] = #20 +; CHECK: valign(v1,v0,[[R0014]]) +define <256 x i8> @test_0014(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_0015 +; CHECK: [[R0015:r[0-9]+]] = #21 +; CHECK: valign(v1,v0,[[R0015]]) +define <256 x i8> @test_0015(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_0016 +; CHECK: [[R0016:r[0-9]+]] = #22 +; CHECK: valign(v1,v0,[[R0016]]) +define <256 x i8> @test_0016(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_0017 +; CHECK: [[R0017:r[0-9]+]] = #23 +; CHECK: valign(v1,v0,[[R0017]]) +define <256 x i8> @test_0017(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_0018 +; CHECK: [[R0018:r[0-9]+]] = #24 +; CHECK: valign(v1,v0,[[R0018]]) +define <256 x i8> @test_0018(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_0019 +; CHECK: [[R0019:r[0-9]+]] = #25 +; CHECK: valign(v1,v0,[[R0019]]) +define <256 x i8> @test_0019(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_001a +; CHECK: [[R001a:r[0-9]+]] = #26 +; CHECK: valign(v1,v0,[[R001a]]) +define <256 x i8> @test_001a(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_001b +; CHECK: [[R001b:r[0-9]+]] = #27 +; CHECK: valign(v1,v0,[[R001b]]) +define <256 x i8> @test_001b(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_001c +; CHECK: [[R001c:r[0-9]+]] = #28 +; CHECK: valign(v1,v0,[[R001c]]) +define <256 x i8> @test_001c(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_001d +; CHECK: [[R001d:r[0-9]+]] = #29 +; CHECK: valign(v1,v0,[[R001d]]) +define <256 x i8> @test_001d(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_001e +; CHECK: [[R001e:r[0-9]+]] = #30 +; CHECK: valign(v1,v0,[[R001e]]) +define <256 x i8> @test_001e(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_001f +; CHECK: [[R001f:r[0-9]+]] = #31 +; CHECK: valign(v1,v0,[[R001f]]) +define <256 x i8> @test_001f(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_0020 +; CHECK: [[R0020:r[0-9]+]] = #32 +; CHECK: valign(v1,v0,[[R0020]]) +define <256 x i8> @test_0020(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_0021 +; CHECK: [[R0021:r[0-9]+]] = #33 +; CHECK: valign(v1,v0,[[R0021]]) +define <256 x i8> @test_0021(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_0022 +; CHECK: [[R0022:r[0-9]+]] = #34 +; CHECK: valign(v1,v0,[[R0022]]) +define <256 x i8> @test_0022(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_0023 +; CHECK: [[R0023:r[0-9]+]] = #35 +; CHECK: valign(v1,v0,[[R0023]]) +define <256 x i8> @test_0023(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_0024 +; CHECK: [[R0024:r[0-9]+]] = #36 +; CHECK: valign(v1,v0,[[R0024]]) +define <256 x i8> @test_0024(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_0025 +; CHECK: [[R0025:r[0-9]+]] = #37 +; CHECK: valign(v1,v0,[[R0025]]) +define <256 x i8> @test_0025(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_0026 +; CHECK: [[R0026:r[0-9]+]] = #38 +; CHECK: valign(v1,v0,[[R0026]]) +define <256 x i8> @test_0026(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_0027 +; CHECK: [[R0027:r[0-9]+]] = #39 +; CHECK: valign(v1,v0,[[R0027]]) +define <256 x i8> @test_0027(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_0028 +; CHECK: [[R0028:r[0-9]+]] = #40 +; CHECK: valign(v1,v0,[[R0028]]) +define <256 x i8> @test_0028(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_0029 +; CHECK: [[R0029:r[0-9]+]] = #41 +; CHECK: valign(v1,v0,[[R0029]]) +define <256 x i8> @test_0029(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_002a +; CHECK: [[R002a:r[0-9]+]] = #42 +; CHECK: valign(v1,v0,[[R002a]]) +define <256 x i8> @test_002a(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_002b +; CHECK: [[R002b:r[0-9]+]] = #43 +; CHECK: valign(v1,v0,[[R002b]]) +define <256 x i8> @test_002b(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_002c +; CHECK: [[R002c:r[0-9]+]] = #44 +; CHECK: valign(v1,v0,[[R002c]]) +define <256 x i8> @test_002c(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_002d +; CHECK: [[R002d:r[0-9]+]] = #45 +; CHECK: valign(v1,v0,[[R002d]]) +define <256 x i8> @test_002d(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_002e +; CHECK: [[R002e:r[0-9]+]] = #46 +; CHECK: valign(v1,v0,[[R002e]]) +define <256 x i8> @test_002e(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_002f +; CHECK: [[R002f:r[0-9]+]] = #47 +; CHECK: valign(v1,v0,[[R002f]]) +define <256 x i8> @test_002f(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_0030 +; CHECK: [[R0030:r[0-9]+]] = #48 +; CHECK: valign(v1,v0,[[R0030]]) +define <256 x i8> @test_0030(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_0031 +; CHECK: [[R0031:r[0-9]+]] = #49 +; CHECK: valign(v1,v0,[[R0031]]) +define <256 x i8> @test_0031(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_0032 +; CHECK: [[R0032:r[0-9]+]] = #50 +; CHECK: valign(v1,v0,[[R0032]]) +define <256 x i8> @test_0032(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_0033 +; CHECK: [[R0033:r[0-9]+]] = #51 +; CHECK: valign(v1,v0,[[R0033]]) +define <256 x i8> @test_0033(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_0034 +; CHECK: [[R0034:r[0-9]+]] = #52 +; CHECK: valign(v1,v0,[[R0034]]) +define <256 x i8> @test_0034(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_0035 +; CHECK: [[R0035:r[0-9]+]] = #53 +; CHECK: valign(v1,v0,[[R0035]]) +define <256 x i8> @test_0035(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_0036 +; CHECK: [[R0036:r[0-9]+]] = #54 +; CHECK: valign(v1,v0,[[R0036]]) +define <256 x i8> @test_0036(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_0037 +; CHECK: [[R0037:r[0-9]+]] = #55 +; CHECK: valign(v1,v0,[[R0037]]) +define <256 x i8> @test_0037(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_0038 +; CHECK: [[R0038:r[0-9]+]] = #56 +; CHECK: valign(v1,v0,[[R0038]]) +define <256 x i8> @test_0038(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_0039 +; CHECK: [[R0039:r[0-9]+]] = #57 +; CHECK: valign(v1,v0,[[R0039]]) +define <256 x i8> @test_0039(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_003a +; CHECK: [[R003a:r[0-9]+]] = #58 +; CHECK: valign(v1,v0,[[R003a]]) +define <256 x i8> @test_003a(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_003b +; CHECK: [[R003b:r[0-9]+]] = #59 +; CHECK: valign(v1,v0,[[R003b]]) +define <256 x i8> @test_003b(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_003c +; CHECK: [[R003c:r[0-9]+]] = #60 +; CHECK: valign(v1,v0,[[R003c]]) +define <256 x i8> @test_003c(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_003d +; CHECK: [[R003d:r[0-9]+]] = #61 +; CHECK: valign(v1,v0,[[R003d]]) +define <256 x i8> @test_003d(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_003e +; CHECK: [[R003e:r[0-9]+]] = #62 +; CHECK: valign(v1,v0,[[R003e]]) +define <256 x i8> @test_003e(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_003f +; CHECK: [[R003f:r[0-9]+]] = #63 +; CHECK: valign(v1,v0,[[R003f]]) +define <256 x i8> @test_003f(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_0040 +; CHECK: [[R0040:r[0-9]+]] = #64 +; CHECK: valign(v1,v0,[[R0040]]) +define <256 x i8> @test_0040(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_0041 +; CHECK: [[R0041:r[0-9]+]] = #65 +; CHECK: valign(v1,v0,[[R0041]]) +define <256 x i8> @test_0041(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_0042 +; CHECK: [[R0042:r[0-9]+]] = #66 +; CHECK: valign(v1,v0,[[R0042]]) +define <256 x i8> @test_0042(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_0043 +; CHECK: [[R0043:r[0-9]+]] = #67 +; CHECK: valign(v1,v0,[[R0043]]) +define <256 x i8> @test_0043(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_0044 +; CHECK: [[R0044:r[0-9]+]] = #68 +; CHECK: valign(v1,v0,[[R0044]]) +define <256 x i8> @test_0044(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_0045 +; CHECK: [[R0045:r[0-9]+]] = #69 +; CHECK: valign(v1,v0,[[R0045]]) +define <256 x i8> @test_0045(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_0046 +; CHECK: [[R0046:r[0-9]+]] = #70 +; CHECK: valign(v1,v0,[[R0046]]) +define <256 x i8> @test_0046(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_0047 +; CHECK: [[R0047:r[0-9]+]] = #71 +; CHECK: valign(v1,v0,[[R0047]]) +define <256 x i8> @test_0047(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_0048 +; CHECK: [[R0048:r[0-9]+]] = #72 +; CHECK: valign(v1,v0,[[R0048]]) +define <256 x i8> @test_0048(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_0049 +; CHECK: [[R0049:r[0-9]+]] = #73 +; CHECK: valign(v1,v0,[[R0049]]) +define <256 x i8> @test_0049(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_004a +; CHECK: [[R004a:r[0-9]+]] = #74 +; CHECK: valign(v1,v0,[[R004a]]) +define <256 x i8> @test_004a(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_004b +; CHECK: [[R004b:r[0-9]+]] = #75 +; CHECK: valign(v1,v0,[[R004b]]) +define <256 x i8> @test_004b(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_004c +; CHECK: [[R004c:r[0-9]+]] = #76 +; CHECK: valign(v1,v0,[[R004c]]) +define <256 x i8> @test_004c(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_004d +; CHECK: [[R004d:r[0-9]+]] = #77 +; CHECK: valign(v1,v0,[[R004d]]) +define <256 x i8> @test_004d(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_004e +; CHECK: [[R004e:r[0-9]+]] = #78 +; CHECK: valign(v1,v0,[[R004e]]) +define <256 x i8> @test_004e(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_004f +; CHECK: [[R004f:r[0-9]+]] = #79 +; CHECK: valign(v1,v0,[[R004f]]) +define <256 x i8> @test_004f(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_0050 +; CHECK: [[R0050:r[0-9]+]] = #80 +; CHECK: valign(v1,v0,[[R0050]]) +define <256 x i8> @test_0050(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_0051 +; CHECK: [[R0051:r[0-9]+]] = #81 +; CHECK: valign(v1,v0,[[R0051]]) +define <256 x i8> @test_0051(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_0052 +; CHECK: [[R0052:r[0-9]+]] = #82 +; CHECK: valign(v1,v0,[[R0052]]) +define <256 x i8> @test_0052(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_0053 +; CHECK: [[R0053:r[0-9]+]] = #83 +; CHECK: valign(v1,v0,[[R0053]]) +define <256 x i8> @test_0053(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_0054 +; CHECK: [[R0054:r[0-9]+]] = #84 +; CHECK: valign(v1,v0,[[R0054]]) +define <256 x i8> @test_0054(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_0055 +; CHECK: [[R0055:r[0-9]+]] = #85 +; CHECK: valign(v1,v0,[[R0055]]) +define <256 x i8> @test_0055(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_0056 +; CHECK: [[R0056:r[0-9]+]] = #86 +; CHECK: valign(v1,v0,[[R0056]]) +define <256 x i8> @test_0056(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_0057 +; CHECK: [[R0057:r[0-9]+]] = #87 +; CHECK: valign(v1,v0,[[R0057]]) +define <256 x i8> @test_0057(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_0058 +; CHECK: [[R0058:r[0-9]+]] = #88 +; CHECK: valign(v1,v0,[[R0058]]) +define <256 x i8> @test_0058(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_0059 +; CHECK: [[R0059:r[0-9]+]] = #89 +; CHECK: valign(v1,v0,[[R0059]]) +define <256 x i8> @test_0059(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_005a +; CHECK: [[R005a:r[0-9]+]] = #90 +; CHECK: valign(v1,v0,[[R005a]]) +define <256 x i8> @test_005a(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_005b +; CHECK: [[R005b:r[0-9]+]] = #91 +; CHECK: valign(v1,v0,[[R005b]]) +define <256 x i8> @test_005b(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_005c +; CHECK: [[R005c:r[0-9]+]] = #92 +; CHECK: valign(v1,v0,[[R005c]]) +define <256 x i8> @test_005c(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_005d +; CHECK: [[R005d:r[0-9]+]] = #93 +; CHECK: valign(v1,v0,[[R005d]]) +define <256 x i8> @test_005d(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_005e +; CHECK: [[R005e:r[0-9]+]] = #94 +; CHECK: valign(v1,v0,[[R005e]]) +define <256 x i8> @test_005e(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_005f +; CHECK: [[R005f:r[0-9]+]] = #95 +; CHECK: valign(v1,v0,[[R005f]]) +define <256 x i8> @test_005f(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_0060 +; CHECK: [[R0060:r[0-9]+]] = #96 +; CHECK: valign(v1,v0,[[R0060]]) +define <256 x i8> @test_0060(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_0061 +; CHECK: [[R0061:r[0-9]+]] = #97 +; CHECK: valign(v1,v0,[[R0061]]) +define <256 x i8> @test_0061(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_0062 +; CHECK: [[R0062:r[0-9]+]] = #98 +; CHECK: valign(v1,v0,[[R0062]]) +define <256 x i8> @test_0062(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_0063 +; CHECK: [[R0063:r[0-9]+]] = #99 +; CHECK: valign(v1,v0,[[R0063]]) +define <256 x i8> @test_0063(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_0064 +; CHECK: [[R0064:r[0-9]+]] = #100 +; CHECK: valign(v1,v0,[[R0064]]) +define <256 x i8> @test_0064(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_0065 +; CHECK: [[R0065:r[0-9]+]] = #101 +; CHECK: valign(v1,v0,[[R0065]]) +define <256 x i8> @test_0065(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_0066 +; CHECK: [[R0066:r[0-9]+]] = #102 +; CHECK: valign(v1,v0,[[R0066]]) +define <256 x i8> @test_0066(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_0067 +; CHECK: [[R0067:r[0-9]+]] = #103 +; CHECK: valign(v1,v0,[[R0067]]) +define <256 x i8> @test_0067(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_0068 +; CHECK: [[R0068:r[0-9]+]] = #104 +; CHECK: valign(v1,v0,[[R0068]]) +define <256 x i8> @test_0068(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_0069 +; CHECK: [[R0069:r[0-9]+]] = #105 +; CHECK: valign(v1,v0,[[R0069]]) +define <256 x i8> @test_0069(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_006a +; CHECK: [[R006a:r[0-9]+]] = #106 +; CHECK: valign(v1,v0,[[R006a]]) +define <256 x i8> @test_006a(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_006b +; CHECK: [[R006b:r[0-9]+]] = #107 +; CHECK: valign(v1,v0,[[R006b]]) +define <256 x i8> @test_006b(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_006c +; CHECK: [[R006c:r[0-9]+]] = #108 +; CHECK: valign(v1,v0,[[R006c]]) +define <256 x i8> @test_006c(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_006d +; CHECK: [[R006d:r[0-9]+]] = #109 +; CHECK: valign(v1,v0,[[R006d]]) +define <256 x i8> @test_006d(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_006e +; CHECK: [[R006e:r[0-9]+]] = #110 +; CHECK: valign(v1,v0,[[R006e]]) +define <256 x i8> @test_006e(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_006f +; CHECK: [[R006f:r[0-9]+]] = #111 +; CHECK: valign(v1,v0,[[R006f]]) +define <256 x i8> @test_006f(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_0070 +; CHECK: [[R0070:r[0-9]+]] = #112 +; CHECK: valign(v1,v0,[[R0070]]) +define <256 x i8> @test_0070(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_0071 +; CHECK: [[R0071:r[0-9]+]] = #113 +; CHECK: valign(v1,v0,[[R0071]]) +define <256 x i8> @test_0071(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_0072 +; CHECK: [[R0072:r[0-9]+]] = #114 +; CHECK: valign(v1,v0,[[R0072]]) +define <256 x i8> @test_0072(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_0073 +; CHECK: [[R0073:r[0-9]+]] = #115 +; CHECK: valign(v1,v0,[[R0073]]) +define <256 x i8> @test_0073(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_0074 +; CHECK: [[R0074:r[0-9]+]] = #116 +; CHECK: valign(v1,v0,[[R0074]]) +define <256 x i8> @test_0074(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_0075 +; CHECK: [[R0075:r[0-9]+]] = #117 +; CHECK: valign(v1,v0,[[R0075]]) +define <256 x i8> @test_0075(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_0076 +; CHECK: [[R0076:r[0-9]+]] = #118 +; CHECK: valign(v1,v0,[[R0076]]) +define <256 x i8> @test_0076(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_0077 +; CHECK: [[R0077:r[0-9]+]] = #119 +; CHECK: valign(v1,v0,[[R0077]]) +define <256 x i8> @test_0077(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_0078 +; CHECK: [[R0078:r[0-9]+]] = #120 +; CHECK: valign(v1,v0,[[R0078]]) +define <256 x i8> @test_0078(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_0079 +; CHECK: [[R0079:r[0-9]+]] = #121 +; CHECK: valign(v1,v0,[[R0079]]) +define <256 x i8> @test_0079(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_007a +; CHECK: [[R007a:r[0-9]+]] = #122 +; CHECK: valign(v1,v0,[[R007a]]) +define <256 x i8> @test_007a(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_007b +; CHECK: [[R007b:r[0-9]+]] = #123 +; CHECK: valign(v1,v0,[[R007b]]) +define <256 x i8> @test_007b(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_007c +; CHECK: [[R007c:r[0-9]+]] = #124 +; CHECK: valign(v1,v0,[[R007c]]) +define <256 x i8> @test_007c(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_007d +; CHECK: [[R007d:r[0-9]+]] = #125 +; CHECK: valign(v1,v0,[[R007d]]) +define <256 x i8> @test_007d(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_007e +; CHECK: [[R007e:r[0-9]+]] = #126 +; CHECK: valign(v1,v0,[[R007e]]) +define <256 x i8> @test_007e(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_007f +; CHECK: [[R007f:r[0-9]+]] = #127 +; CHECK: valign(v1,v0,[[R007f]]) +define <256 x i8> @test_007f(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +attributes #0 = { nounwind readnone "target-cpu"="hexagonv60" "target-features"="+hvx,+hvx-length128b" } diff --git a/test/CodeGen/Hexagon/autohvx/align-64b.ll b/test/CodeGen/Hexagon/autohvx/align-64b.ll new file mode 100644 index 00000000000..26dd4e36bed --- /dev/null +++ b/test/CodeGen/Hexagon/autohvx/align-64b.ll @@ -0,0 +1,507 @@ +; RUN: llc -march=hexagon < %s | FileCheck %s + +; CHECK-LABEL: test_0000 +; CHECK-NOT: valign +define <128 x i8> @test_0000(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; CHECK-LABEL: test_0001 +; CHECK: valign(v1,v0,#1) +define <128 x i8> @test_0001(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; CHECK-LABEL: test_0002 +; CHECK: valign(v1,v0,#2) +define <128 x i8> @test_0002(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; CHECK-LABEL: test_0003 +; CHECK: valign(v1,v0,#3) +define <128 x i8> @test_0003(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; CHECK-LABEL: test_0004 +; CHECK: valign(v1,v0,#4) +define <128 x i8> @test_0004(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; CHECK-LABEL: test_0005 +; CHECK: valign(v1,v0,#5) +define <128 x i8> @test_0005(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; CHECK-LABEL: test_0006 +; CHECK: valign(v1,v0,#6) +define <128 x i8> @test_0006(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; CHECK-LABEL: test_0007 +; CHECK: valign(v1,v0,#7) +define <128 x i8> @test_0007(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; CHECK-LABEL: test_0008 +; CHECK: [[R0008:r[0-9]+]] = #8 +; CHECK: valign(v1,v0,[[R0008]]) +define <128 x i8> @test_0008(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; CHECK-LABEL: test_0009 +; CHECK: [[R0009:r[0-9]+]] = #9 +; CHECK: valign(v1,v0,[[R0009]]) +define <128 x i8> @test_0009(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; CHECK-LABEL: test_000a +; CHECK: [[R000a:r[0-9]+]] = #10 +; CHECK: valign(v1,v0,[[R000a]]) +define <128 x i8> @test_000a(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; CHECK-LABEL: test_000b +; CHECK: [[R000b:r[0-9]+]] = #11 +; CHECK: valign(v1,v0,[[R000b]]) +define <128 x i8> @test_000b(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; CHECK-LABEL: test_000c +; CHECK: [[R000c:r[0-9]+]] = #12 +; CHECK: valign(v1,v0,[[R000c]]) +define <128 x i8> @test_000c(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; CHECK-LABEL: test_000d +; CHECK: [[R000d:r[0-9]+]] = #13 +; CHECK: valign(v1,v0,[[R000d]]) +define <128 x i8> @test_000d(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; CHECK-LABEL: test_000e +; CHECK: [[R000e:r[0-9]+]] = #14 +; CHECK: valign(v1,v0,[[R000e]]) +define <128 x i8> @test_000e(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; CHECK-LABEL: test_000f +; CHECK: [[R000f:r[0-9]+]] = #15 +; CHECK: valign(v1,v0,[[R000f]]) +define <128 x i8> @test_000f(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; CHECK-LABEL: test_0010 +; CHECK: [[R0010:r[0-9]+]] = #16 +; CHECK: valign(v1,v0,[[R0010]]) +define <128 x i8> @test_0010(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; CHECK-LABEL: test_0011 +; CHECK: [[R0011:r[0-9]+]] = #17 +; CHECK: valign(v1,v0,[[R0011]]) +define <128 x i8> @test_0011(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; CHECK-LABEL: test_0012 +; CHECK: [[R0012:r[0-9]+]] = #18 +; CHECK: valign(v1,v0,[[R0012]]) +define <128 x i8> @test_0012(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; CHECK-LABEL: test_0013 +; CHECK: [[R0013:r[0-9]+]] = #19 +; CHECK: valign(v1,v0,[[R0013]]) +define <128 x i8> @test_0013(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; CHECK-LABEL: test_0014 +; CHECK: [[R0014:r[0-9]+]] = #20 +; CHECK: valign(v1,v0,[[R0014]]) +define <128 x i8> @test_0014(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; CHECK-LABEL: test_0015 +; CHECK: [[R0015:r[0-9]+]] = #21 +; CHECK: valign(v1,v0,[[R0015]]) +define <128 x i8> @test_0015(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; CHECK-LABEL: test_0016 +; CHECK: [[R0016:r[0-9]+]] = #22 +; CHECK: valign(v1,v0,[[R0016]]) +define <128 x i8> @test_0016(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; CHECK-LABEL: test_0017 +; CHECK: [[R0017:r[0-9]+]] = #23 +; CHECK: valign(v1,v0,[[R0017]]) +define <128 x i8> @test_0017(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; CHECK-LABEL: test_0018 +; CHECK: [[R0018:r[0-9]+]] = #24 +; CHECK: valign(v1,v0,[[R0018]]) +define <128 x i8> @test_0018(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; CHECK-LABEL: test_0019 +; CHECK: [[R0019:r[0-9]+]] = #25 +; CHECK: valign(v1,v0,[[R0019]]) +define <128 x i8> @test_0019(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; CHECK-LABEL: test_001a +; CHECK: [[R001a:r[0-9]+]] = #26 +; CHECK: valign(v1,v0,[[R001a]]) +define <128 x i8> @test_001a(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; CHECK-LABEL: test_001b +; CHECK: [[R001b:r[0-9]+]] = #27 +; CHECK: valign(v1,v0,[[R001b]]) +define <128 x i8> @test_001b(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; CHECK-LABEL: test_001c +; CHECK: [[R001c:r[0-9]+]] = #28 +; CHECK: valign(v1,v0,[[R001c]]) +define <128 x i8> @test_001c(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; CHECK-LABEL: test_001d +; CHECK: [[R001d:r[0-9]+]] = #29 +; CHECK: valign(v1,v0,[[R001d]]) +define <128 x i8> @test_001d(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; CHECK-LABEL: test_001e +; CHECK: [[R001e:r[0-9]+]] = #30 +; CHECK: valign(v1,v0,[[R001e]]) +define <128 x i8> @test_001e(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; CHECK-LABEL: test_001f +; CHECK: [[R001f:r[0-9]+]] = #31 +; CHECK: valign(v1,v0,[[R001f]]) +define <128 x i8> @test_001f(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; CHECK-LABEL: test_0020 +; CHECK: [[R0020:r[0-9]+]] = #32 +; CHECK: valign(v1,v0,[[R0020]]) +define <128 x i8> @test_0020(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; CHECK-LABEL: test_0021 +; CHECK: [[R0021:r[0-9]+]] = #33 +; CHECK: valign(v1,v0,[[R0021]]) +define <128 x i8> @test_0021(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; CHECK-LABEL: test_0022 +; CHECK: [[R0022:r[0-9]+]] = #34 +; CHECK: valign(v1,v0,[[R0022]]) +define <128 x i8> @test_0022(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; CHECK-LABEL: test_0023 +; CHECK: [[R0023:r[0-9]+]] = #35 +; CHECK: valign(v1,v0,[[R0023]]) +define <128 x i8> @test_0023(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; CHECK-LABEL: test_0024 +; CHECK: [[R0024:r[0-9]+]] = #36 +; CHECK: valign(v1,v0,[[R0024]]) +define <128 x i8> @test_0024(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; CHECK-LABEL: test_0025 +; CHECK: [[R0025:r[0-9]+]] = #37 +; CHECK: valign(v1,v0,[[R0025]]) +define <128 x i8> @test_0025(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; CHECK-LABEL: test_0026 +; CHECK: [[R0026:r[0-9]+]] = #38 +; CHECK: valign(v1,v0,[[R0026]]) +define <128 x i8> @test_0026(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; CHECK-LABEL: test_0027 +; CHECK: [[R0027:r[0-9]+]] = #39 +; CHECK: valign(v1,v0,[[R0027]]) +define <128 x i8> @test_0027(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; CHECK-LABEL: test_0028 +; CHECK: [[R0028:r[0-9]+]] = #40 +; CHECK: valign(v1,v0,[[R0028]]) +define <128 x i8> @test_0028(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; CHECK-LABEL: test_0029 +; CHECK: [[R0029:r[0-9]+]] = #41 +; CHECK: valign(v1,v0,[[R0029]]) +define <128 x i8> @test_0029(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; CHECK-LABEL: test_002a +; CHECK: [[R002a:r[0-9]+]] = #42 +; CHECK: valign(v1,v0,[[R002a]]) +define <128 x i8> @test_002a(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; CHECK-LABEL: test_002b +; CHECK: [[R002b:r[0-9]+]] = #43 +; CHECK: valign(v1,v0,[[R002b]]) +define <128 x i8> @test_002b(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; CHECK-LABEL: test_002c +; CHECK: [[R002c:r[0-9]+]] = #44 +; CHECK: valign(v1,v0,[[R002c]]) +define <128 x i8> @test_002c(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; CHECK-LABEL: test_002d +; CHECK: [[R002d:r[0-9]+]] = #45 +; CHECK: valign(v1,v0,[[R002d]]) +define <128 x i8> @test_002d(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; CHECK-LABEL: test_002e +; CHECK: [[R002e:r[0-9]+]] = #46 +; CHECK: valign(v1,v0,[[R002e]]) +define <128 x i8> @test_002e(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; CHECK-LABEL: test_002f +; CHECK: [[R002f:r[0-9]+]] = #47 +; CHECK: valign(v1,v0,[[R002f]]) +define <128 x i8> @test_002f(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; CHECK-LABEL: test_0030 +; CHECK: [[R0030:r[0-9]+]] = #48 +; CHECK: valign(v1,v0,[[R0030]]) +define <128 x i8> @test_0030(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; CHECK-LABEL: test_0031 +; CHECK: [[R0031:r[0-9]+]] = #49 +; CHECK: valign(v1,v0,[[R0031]]) +define <128 x i8> @test_0031(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; CHECK-LABEL: test_0032 +; CHECK: [[R0032:r[0-9]+]] = #50 +; CHECK: valign(v1,v0,[[R0032]]) +define <128 x i8> @test_0032(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; CHECK-LABEL: test_0033 +; CHECK: [[R0033:r[0-9]+]] = #51 +; CHECK: valign(v1,v0,[[R0033]]) +define <128 x i8> @test_0033(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; CHECK-LABEL: test_0034 +; CHECK: [[R0034:r[0-9]+]] = #52 +; CHECK: valign(v1,v0,[[R0034]]) +define <128 x i8> @test_0034(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; CHECK-LABEL: test_0035 +; CHECK: [[R0035:r[0-9]+]] = #53 +; CHECK: valign(v1,v0,[[R0035]]) +define <128 x i8> @test_0035(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; CHECK-LABEL: test_0036 +; CHECK: [[R0036:r[0-9]+]] = #54 +; CHECK: valign(v1,v0,[[R0036]]) +define <128 x i8> @test_0036(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; CHECK-LABEL: test_0037 +; CHECK: [[R0037:r[0-9]+]] = #55 +; CHECK: valign(v1,v0,[[R0037]]) +define <128 x i8> @test_0037(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; CHECK-LABEL: test_0038 +; CHECK: [[R0038:r[0-9]+]] = #56 +; CHECK: valign(v1,v0,[[R0038]]) +define <128 x i8> @test_0038(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; CHECK-LABEL: test_0039 +; CHECK: [[R0039:r[0-9]+]] = #57 +; CHECK: valign(v1,v0,[[R0039]]) +define <128 x i8> @test_0039(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; CHECK-LABEL: test_003a +; CHECK: [[R003a:r[0-9]+]] = #58 +; CHECK: valign(v1,v0,[[R003a]]) +define <128 x i8> @test_003a(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; CHECK-LABEL: test_003b +; CHECK: [[R003b:r[0-9]+]] = #59 +; CHECK: valign(v1,v0,[[R003b]]) +define <128 x i8> @test_003b(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; CHECK-LABEL: test_003c +; CHECK: [[R003c:r[0-9]+]] = #60 +; CHECK: valign(v1,v0,[[R003c]]) +define <128 x i8> @test_003c(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; CHECK-LABEL: test_003d +; CHECK: [[R003d:r[0-9]+]] = #61 +; CHECK: valign(v1,v0,[[R003d]]) +define <128 x i8> @test_003d(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; CHECK-LABEL: test_003e +; CHECK: [[R003e:r[0-9]+]] = #62 +; CHECK: valign(v1,v0,[[R003e]]) +define <128 x i8> @test_003e(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; CHECK-LABEL: test_003f +; CHECK: [[R003f:r[0-9]+]] = #63 +; CHECK: valign(v1,v0,[[R003f]]) +define <128 x i8> @test_003f(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +attributes #0 = { nounwind readnone "target-cpu"="hexagonv60" "target-features"="+hvx,+hvx-length64b" } diff --git a/test/CodeGen/Hexagon/autohvx/contract-128b.ll b/test/CodeGen/Hexagon/autohvx/contract-128b.ll new file mode 100644 index 00000000000..67ccfb3c12d --- /dev/null +++ b/test/CodeGen/Hexagon/autohvx/contract-128b.ll @@ -0,0 +1,67 @@ +; RUN: llc -march=hexagon < %s | FileCheck %s + +; CHECK-LABEL: test_0000 +; CHECK: v0.b = vshuffe(v1.b,v0.b) +define <256 x i8> @test_0000(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_0001 +; CHECK: v0.b = vshuffo(v1.b,v0.b) +define <256 x i8> @test_0001(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_0002 +; CHECK: v0.h = vshuffe(v1.h,v0.h) +define <256 x i8> @test_0002(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_0003 +; CHECK: v0.h = vshuffo(v1.h,v0.h) +define <256 x i8> @test_0003(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_0004 +; CHECK: v0.b = vpacke(v1.h,v0.h) +define <256 x i8> @test_0004(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_0005 +; CHECK: v0.b = vpacko(v1.h,v0.h) +define <256 x i8> @test_0005(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_0006 +; CHECK: v0.h = vpacke(v1.w,v0.w) +define <256 x i8> @test_0006(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_0007 +; CHECK: v0.h = vpacko(v1.w,v0.w) +define <256 x i8> @test_0007(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; CHECK-LABEL: test_0008 +; CHECK: v0.b = vdeale(v1.b,v0.b) +define <256 x i8> @test_0008(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +attributes #0 = { nounwind readnone "target-cpu"="hexagonv60" "target-features"="+hvx,+hvx-length128b" } + diff --git a/test/CodeGen/Hexagon/autohvx/contract-64b.ll b/test/CodeGen/Hexagon/autohvx/contract-64b.ll new file mode 100644 index 00000000000..19a126027c1 --- /dev/null +++ b/test/CodeGen/Hexagon/autohvx/contract-64b.ll @@ -0,0 +1,67 @@ +; RUN: llc -march=hexagon < %s | FileCheck %s + +; CHECK-LABEL: test_0000 +; CHECK: v0.b = vshuffe(v1.b,v0.b) +define <128 x i8> @test_0000(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; CHECK-LABEL: test_0001 +; CHECK: v0.b = vshuffo(v1.b,v0.b) +define <128 x i8> @test_0001(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; CHECK-LABEL: test_0002 +; CHECK: v0.h = vshuffe(v1.h,v0.h) +define <128 x i8> @test_0002(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; CHECK-LABEL: test_0003 +; CHECK: v0.h = vshuffo(v1.h,v0.h) +define <128 x i8> @test_0003(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; CHECK-LABEL: test_0004 +; CHECK: v0.b = vpacke(v1.h,v0.h) +define <128 x i8> @test_0004(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; CHECK-LABEL: test_0005 +; CHECK: v0.b = vpacko(v1.h,v0.h) +define <128 x i8> @test_0005(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; CHECK-LABEL: test_0006 +; CHECK: v0.h = vpacke(v1.w,v0.w) +define <128 x i8> @test_0006(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; CHECK-LABEL: test_0007 +; CHECK: v0.h = vpacko(v1.w,v0.w) +define <128 x i8> @test_0007(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; CHECK-LABEL: test_0008 +; CHECK: v0.b = vdeale(v1.b,v0.b) +define <128 x i8> @test_0008(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +attributes #0 = { nounwind readnone "target-cpu"="hexagonv60" "target-features"="+hvx,+hvx-length64b" } + diff --git a/test/CodeGen/Hexagon/autohvx/deal-128b.ll b/test/CodeGen/Hexagon/autohvx/deal-128b.ll new file mode 100644 index 00000000000..429ead4a47f --- /dev/null +++ b/test/CodeGen/Hexagon/autohvx/deal-128b.ll @@ -0,0 +1,1031 @@ +; RUN: llc -march=hexagon < %s | FileCheck %s + +; Check the individual vdeal shuffles for all 128 controls. +; Note: for shuffles with a single 2x2 transpose, vshuff is generated instead +; of vdeal. (For such cases vdeal and vshuff are equivalent.) + +; This is an identity shuffle: there should not be any shuffling code emitted. +; CHECK-LABEL: vdeal_00: +; CHECK-NOT: vdeal( +define <256 x i8> @vdeal_00(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 48, i32 49, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63, i32 64, i32 65, i32 66, i32 67, i32 68, i32 69, i32 70, i32 71, i32 72, i32 73, i32 74, i32 75, i32 76, i32 77, i32 78, i32 79, i32 80, i32 81, i32 82, i32 83, i32 84, i32 85, i32 86, i32 87, i32 88, i32 89, i32 90, i32 91, i32 92, i32 93, i32 94, i32 95, i32 96, i32 97, i32 98, i32 99, i32 100, i32 101, i32 102, i32 103, i32 104, i32 105, i32 106, i32 107, i32 108, i32 109, i32 110, i32 111, i32 112, i32 113, i32 114, i32 115, i32 116, i32 117, i32 118, i32 119, i32 120, i32 121, i32 122, i32 123, i32 124, i32 125, i32 126, i32 127, i32 128, i32 129, i32 130, i32 131, i32 132, i32 133, i32 134, i32 135, i32 136, i32 137, i32 138, i32 139, i32 140, i32 141, i32 142, i32 143, i32 144, i32 145, i32 146, i32 147, i32 148, i32 149, i32 150, i32 151, i32 152, i32 153, i32 154, i32 155, i32 156, i32 157, i32 158, i32 159, i32 160, i32 161, i32 162, i32 163, i32 164, i32 165, i32 166, i32 167, i32 168, i32 169, i32 170, i32 171, i32 172, i32 173, i32 174, i32 175, i32 176, i32 177, i32 178, i32 179, i32 180, i32 181, i32 182, i32 183, i32 184, i32 185, i32 186, i32 187, i32 188, i32 189, i32 190, i32 191, i32 192, i32 193, i32 194, i32 195, i32 196, i32 197, i32 198, i32 199, i32 200, i32 201, i32 202, i32 203, i32 204, i32 205, i32 206, i32 207, i32 208, i32 209, i32 210, i32 211, i32 212, i32 213, i32 214, i32 215, i32 216, i32 217, i32 218, i32 219, i32 220, i32 221, i32 222, i32 223, i32 224, i32 225, i32 226, i32 227, i32 228, i32 229, i32 230, i32 231, i32 232, i32 233, i32 234, i32 235, i32 236, i32 237, i32 238, i32 239, i32 240, i32 241, i32 242, i32 243, i32 244, i32 245, i32 246, i32 247, i32 248, i32 249, i32 250, i32 251, i32 252, i32 253, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_01: +; CHECK: [[REG01:r[0-9]+]] = #1 +; CHECK: vshuff(v1,v0,[[REG01]]) +define <256 x i8> @vdeal_01(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 128, i32 2, i32 130, i32 4, i32 132, i32 6, i32 134, i32 8, i32 136, i32 10, i32 138, i32 12, i32 140, i32 14, i32 142, i32 16, i32 144, i32 18, i32 146, i32 20, i32 148, i32 22, i32 150, i32 24, i32 152, i32 26, i32 154, i32 28, i32 156, i32 30, i32 158, i32 32, i32 160, i32 34, i32 162, i32 36, i32 164, i32 38, i32 166, i32 40, i32 168, i32 42, i32 170, i32 44, i32 172, i32 46, i32 174, i32 48, i32 176, i32 50, i32 178, i32 52, i32 180, i32 54, i32 182, i32 56, i32 184, i32 58, i32 186, i32 60, i32 188, i32 62, i32 190, i32 64, i32 192, i32 66, i32 194, i32 68, i32 196, i32 70, i32 198, i32 72, i32 200, i32 74, i32 202, i32 76, i32 204, i32 78, i32 206, i32 80, i32 208, i32 82, i32 210, i32 84, i32 212, i32 86, i32 214, i32 88, i32 216, i32 90, i32 218, i32 92, i32 220, i32 94, i32 222, i32 96, i32 224, i32 98, i32 226, i32 100, i32 228, i32 102, i32 230, i32 104, i32 232, i32 106, i32 234, i32 108, i32 236, i32 110, i32 238, i32 112, i32 240, i32 114, i32 242, i32 116, i32 244, i32 118, i32 246, i32 120, i32 248, i32 122, i32 250, i32 124, i32 252, i32 126, i32 254, i32 1, i32 129, i32 3, i32 131, i32 5, i32 133, i32 7, i32 135, i32 9, i32 137, i32 11, i32 139, i32 13, i32 141, i32 15, i32 143, i32 17, i32 145, i32 19, i32 147, i32 21, i32 149, i32 23, i32 151, i32 25, i32 153, i32 27, i32 155, i32 29, i32 157, i32 31, i32 159, i32 33, i32 161, i32 35, i32 163, i32 37, i32 165, i32 39, i32 167, i32 41, i32 169, i32 43, i32 171, i32 45, i32 173, i32 47, i32 175, i32 49, i32 177, i32 51, i32 179, i32 53, i32 181, i32 55, i32 183, i32 57, i32 185, i32 59, i32 187, i32 61, i32 189, i32 63, i32 191, i32 65, i32 193, i32 67, i32 195, i32 69, i32 197, i32 71, i32 199, i32 73, i32 201, i32 75, i32 203, i32 77, i32 205, i32 79, i32 207, i32 81, i32 209, i32 83, i32 211, i32 85, i32 213, i32 87, i32 215, i32 89, i32 217, i32 91, i32 219, i32 93, i32 221, i32 95, i32 223, i32 97, i32 225, i32 99, i32 227, i32 101, i32 229, i32 103, i32 231, i32 105, i32 233, i32 107, i32 235, i32 109, i32 237, i32 111, i32 239, i32 113, i32 241, i32 115, i32 243, i32 117, i32 245, i32 119, i32 247, i32 121, i32 249, i32 123, i32 251, i32 125, i32 253, i32 127, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_02: +; CHECK: [[REG02:r[0-9]+]] = #2 +; CHECK: vshuff(v1,v0,[[REG02]]) +define <256 x i8> @vdeal_02(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 128, i32 129, i32 4, i32 5, i32 132, i32 133, i32 8, i32 9, i32 136, i32 137, i32 12, i32 13, i32 140, i32 141, i32 16, i32 17, i32 144, i32 145, i32 20, i32 21, i32 148, i32 149, i32 24, i32 25, i32 152, i32 153, i32 28, i32 29, i32 156, i32 157, i32 32, i32 33, i32 160, i32 161, i32 36, i32 37, i32 164, i32 165, i32 40, i32 41, i32 168, i32 169, i32 44, i32 45, i32 172, i32 173, i32 48, i32 49, i32 176, i32 177, i32 52, i32 53, i32 180, i32 181, i32 56, i32 57, i32 184, i32 185, i32 60, i32 61, i32 188, i32 189, i32 64, i32 65, i32 192, i32 193, i32 68, i32 69, i32 196, i32 197, i32 72, i32 73, i32 200, i32 201, i32 76, i32 77, i32 204, i32 205, i32 80, i32 81, i32 208, i32 209, i32 84, i32 85, i32 212, i32 213, i32 88, i32 89, i32 216, i32 217, i32 92, i32 93, i32 220, i32 221, i32 96, i32 97, i32 224, i32 225, i32 100, i32 101, i32 228, i32 229, i32 104, i32 105, i32 232, i32 233, i32 108, i32 109, i32 236, i32 237, i32 112, i32 113, i32 240, i32 241, i32 116, i32 117, i32 244, i32 245, i32 120, i32 121, i32 248, i32 249, i32 124, i32 125, i32 252, i32 253, i32 2, i32 3, i32 130, i32 131, i32 6, i32 7, i32 134, i32 135, i32 10, i32 11, i32 138, i32 139, i32 14, i32 15, i32 142, i32 143, i32 18, i32 19, i32 146, i32 147, i32 22, i32 23, i32 150, i32 151, i32 26, i32 27, i32 154, i32 155, i32 30, i32 31, i32 158, i32 159, i32 34, i32 35, i32 162, i32 163, i32 38, i32 39, i32 166, i32 167, i32 42, i32 43, i32 170, i32 171, i32 46, i32 47, i32 174, i32 175, i32 50, i32 51, i32 178, i32 179, i32 54, i32 55, i32 182, i32 183, i32 58, i32 59, i32 186, i32 187, i32 62, i32 63, i32 190, i32 191, i32 66, i32 67, i32 194, i32 195, i32 70, i32 71, i32 198, i32 199, i32 74, i32 75, i32 202, i32 203, i32 78, i32 79, i32 206, i32 207, i32 82, i32 83, i32 210, i32 211, i32 86, i32 87, i32 214, i32 215, i32 90, i32 91, i32 218, i32 219, i32 94, i32 95, i32 222, i32 223, i32 98, i32 99, i32 226, i32 227, i32 102, i32 103, i32 230, i32 231, i32 106, i32 107, i32 234, i32 235, i32 110, i32 111, i32 238, i32 239, i32 114, i32 115, i32 242, i32 243, i32 118, i32 119, i32 246, i32 247, i32 122, i32 123, i32 250, i32 251, i32 126, i32 127, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_03: +; CHECK: [[REG03:r[0-9]+]] = #3 +; CHECK: vdeal(v1,v0,[[REG03]]) +define <256 x i8> @vdeal_03(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 2, i32 128, i32 130, i32 4, i32 6, i32 132, i32 134, i32 8, i32 10, i32 136, i32 138, i32 12, i32 14, i32 140, i32 142, i32 16, i32 18, i32 144, i32 146, i32 20, i32 22, i32 148, i32 150, i32 24, i32 26, i32 152, i32 154, i32 28, i32 30, i32 156, i32 158, i32 32, i32 34, i32 160, i32 162, i32 36, i32 38, i32 164, i32 166, i32 40, i32 42, i32 168, i32 170, i32 44, i32 46, i32 172, i32 174, i32 48, i32 50, i32 176, i32 178, i32 52, i32 54, i32 180, i32 182, i32 56, i32 58, i32 184, i32 186, i32 60, i32 62, i32 188, i32 190, i32 64, i32 66, i32 192, i32 194, i32 68, i32 70, i32 196, i32 198, i32 72, i32 74, i32 200, i32 202, i32 76, i32 78, i32 204, i32 206, i32 80, i32 82, i32 208, i32 210, i32 84, i32 86, i32 212, i32 214, i32 88, i32 90, i32 216, i32 218, i32 92, i32 94, i32 220, i32 222, i32 96, i32 98, i32 224, i32 226, i32 100, i32 102, i32 228, i32 230, i32 104, i32 106, i32 232, i32 234, i32 108, i32 110, i32 236, i32 238, i32 112, i32 114, i32 240, i32 242, i32 116, i32 118, i32 244, i32 246, i32 120, i32 122, i32 248, i32 250, i32 124, i32 126, i32 252, i32 254, i32 1, i32 3, i32 129, i32 131, i32 5, i32 7, i32 133, i32 135, i32 9, i32 11, i32 137, i32 139, i32 13, i32 15, i32 141, i32 143, i32 17, i32 19, i32 145, i32 147, i32 21, i32 23, i32 149, i32 151, i32 25, i32 27, i32 153, i32 155, i32 29, i32 31, i32 157, i32 159, i32 33, i32 35, i32 161, i32 163, i32 37, i32 39, i32 165, i32 167, i32 41, i32 43, i32 169, i32 171, i32 45, i32 47, i32 173, i32 175, i32 49, i32 51, i32 177, i32 179, i32 53, i32 55, i32 181, i32 183, i32 57, i32 59, i32 185, i32 187, i32 61, i32 63, i32 189, i32 191, i32 65, i32 67, i32 193, i32 195, i32 69, i32 71, i32 197, i32 199, i32 73, i32 75, i32 201, i32 203, i32 77, i32 79, i32 205, i32 207, i32 81, i32 83, i32 209, i32 211, i32 85, i32 87, i32 213, i32 215, i32 89, i32 91, i32 217, i32 219, i32 93, i32 95, i32 221, i32 223, i32 97, i32 99, i32 225, i32 227, i32 101, i32 103, i32 229, i32 231, i32 105, i32 107, i32 233, i32 235, i32 109, i32 111, i32 237, i32 239, i32 113, i32 115, i32 241, i32 243, i32 117, i32 119, i32 245, i32 247, i32 121, i32 123, i32 249, i32 251, i32 125, i32 127, i32 253, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_04: +; CHECK: [[REG04:r[0-9]+]] = #4 +; CHECK: vshuff(v1,v0,[[REG04]]) +define <256 x i8> @vdeal_04(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 2, i32 3, i32 128, i32 129, i32 130, i32 131, i32 8, i32 9, i32 10, i32 11, i32 136, i32 137, i32 138, i32 139, i32 16, i32 17, i32 18, i32 19, i32 144, i32 145, i32 146, i32 147, i32 24, i32 25, i32 26, i32 27, i32 152, i32 153, i32 154, i32 155, i32 32, i32 33, i32 34, i32 35, i32 160, i32 161, i32 162, i32 163, i32 40, i32 41, i32 42, i32 43, i32 168, i32 169, i32 170, i32 171, i32 48, i32 49, i32 50, i32 51, i32 176, i32 177, i32 178, i32 179, i32 56, i32 57, i32 58, i32 59, i32 184, i32 185, i32 186, i32 187, i32 64, i32 65, i32 66, i32 67, i32 192, i32 193, i32 194, i32 195, i32 72, i32 73, i32 74, i32 75, i32 200, i32 201, i32 202, i32 203, i32 80, i32 81, i32 82, i32 83, i32 208, i32 209, i32 210, i32 211, i32 88, i32 89, i32 90, i32 91, i32 216, i32 217, i32 218, i32 219, i32 96, i32 97, i32 98, i32 99, i32 224, i32 225, i32 226, i32 227, i32 104, i32 105, i32 106, i32 107, i32 232, i32 233, i32 234, i32 235, i32 112, i32 113, i32 114, i32 115, i32 240, i32 241, i32 242, i32 243, i32 120, i32 121, i32 122, i32 123, i32 248, i32 249, i32 250, i32 251, i32 4, i32 5, i32 6, i32 7, i32 132, i32 133, i32 134, i32 135, i32 12, i32 13, i32 14, i32 15, i32 140, i32 141, i32 142, i32 143, i32 20, i32 21, i32 22, i32 23, i32 148, i32 149, i32 150, i32 151, i32 28, i32 29, i32 30, i32 31, i32 156, i32 157, i32 158, i32 159, i32 36, i32 37, i32 38, i32 39, i32 164, i32 165, i32 166, i32 167, i32 44, i32 45, i32 46, i32 47, i32 172, i32 173, i32 174, i32 175, i32 52, i32 53, i32 54, i32 55, i32 180, i32 181, i32 182, i32 183, i32 60, i32 61, i32 62, i32 63, i32 188, i32 189, i32 190, i32 191, i32 68, i32 69, i32 70, i32 71, i32 196, i32 197, i32 198, i32 199, i32 76, i32 77, i32 78, i32 79, i32 204, i32 205, i32 206, i32 207, i32 84, i32 85, i32 86, i32 87, i32 212, i32 213, i32 214, i32 215, i32 92, i32 93, i32 94, i32 95, i32 220, i32 221, i32 222, i32 223, i32 100, i32 101, i32 102, i32 103, i32 228, i32 229, i32 230, i32 231, i32 108, i32 109, i32 110, i32 111, i32 236, i32 237, i32 238, i32 239, i32 116, i32 117, i32 118, i32 119, i32 244, i32 245, i32 246, i32 247, i32 124, i32 125, i32 126, i32 127, i32 252, i32 253, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_05: +; CHECK: [[REG05:r[0-9]+]] = #5 +; CHECK: vdeal(v1,v0,[[REG05]]) +define <256 x i8> @vdeal_05(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 4, i32 2, i32 6, i32 128, i32 132, i32 130, i32 134, i32 8, i32 12, i32 10, i32 14, i32 136, i32 140, i32 138, i32 142, i32 16, i32 20, i32 18, i32 22, i32 144, i32 148, i32 146, i32 150, i32 24, i32 28, i32 26, i32 30, i32 152, i32 156, i32 154, i32 158, i32 32, i32 36, i32 34, i32 38, i32 160, i32 164, i32 162, i32 166, i32 40, i32 44, i32 42, i32 46, i32 168, i32 172, i32 170, i32 174, i32 48, i32 52, i32 50, i32 54, i32 176, i32 180, i32 178, i32 182, i32 56, i32 60, i32 58, i32 62, i32 184, i32 188, i32 186, i32 190, i32 64, i32 68, i32 66, i32 70, i32 192, i32 196, i32 194, i32 198, i32 72, i32 76, i32 74, i32 78, i32 200, i32 204, i32 202, i32 206, i32 80, i32 84, i32 82, i32 86, i32 208, i32 212, i32 210, i32 214, i32 88, i32 92, i32 90, i32 94, i32 216, i32 220, i32 218, i32 222, i32 96, i32 100, i32 98, i32 102, i32 224, i32 228, i32 226, i32 230, i32 104, i32 108, i32 106, i32 110, i32 232, i32 236, i32 234, i32 238, i32 112, i32 116, i32 114, i32 118, i32 240, i32 244, i32 242, i32 246, i32 120, i32 124, i32 122, i32 126, i32 248, i32 252, i32 250, i32 254, i32 1, i32 5, i32 3, i32 7, i32 129, i32 133, i32 131, i32 135, i32 9, i32 13, i32 11, i32 15, i32 137, i32 141, i32 139, i32 143, i32 17, i32 21, i32 19, i32 23, i32 145, i32 149, i32 147, i32 151, i32 25, i32 29, i32 27, i32 31, i32 153, i32 157, i32 155, i32 159, i32 33, i32 37, i32 35, i32 39, i32 161, i32 165, i32 163, i32 167, i32 41, i32 45, i32 43, i32 47, i32 169, i32 173, i32 171, i32 175, i32 49, i32 53, i32 51, i32 55, i32 177, i32 181, i32 179, i32 183, i32 57, i32 61, i32 59, i32 63, i32 185, i32 189, i32 187, i32 191, i32 65, i32 69, i32 67, i32 71, i32 193, i32 197, i32 195, i32 199, i32 73, i32 77, i32 75, i32 79, i32 201, i32 205, i32 203, i32 207, i32 81, i32 85, i32 83, i32 87, i32 209, i32 213, i32 211, i32 215, i32 89, i32 93, i32 91, i32 95, i32 217, i32 221, i32 219, i32 223, i32 97, i32 101, i32 99, i32 103, i32 225, i32 229, i32 227, i32 231, i32 105, i32 109, i32 107, i32 111, i32 233, i32 237, i32 235, i32 239, i32 113, i32 117, i32 115, i32 119, i32 241, i32 245, i32 243, i32 247, i32 121, i32 125, i32 123, i32 127, i32 249, i32 253, i32 251, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_06: +; CHECK: [[REG06:r[0-9]+]] = #6 +; CHECK: vdeal(v1,v0,[[REG06]]) +define <256 x i8> @vdeal_06(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 4, i32 5, i32 128, i32 129, i32 132, i32 133, i32 8, i32 9, i32 12, i32 13, i32 136, i32 137, i32 140, i32 141, i32 16, i32 17, i32 20, i32 21, i32 144, i32 145, i32 148, i32 149, i32 24, i32 25, i32 28, i32 29, i32 152, i32 153, i32 156, i32 157, i32 32, i32 33, i32 36, i32 37, i32 160, i32 161, i32 164, i32 165, i32 40, i32 41, i32 44, i32 45, i32 168, i32 169, i32 172, i32 173, i32 48, i32 49, i32 52, i32 53, i32 176, i32 177, i32 180, i32 181, i32 56, i32 57, i32 60, i32 61, i32 184, i32 185, i32 188, i32 189, i32 64, i32 65, i32 68, i32 69, i32 192, i32 193, i32 196, i32 197, i32 72, i32 73, i32 76, i32 77, i32 200, i32 201, i32 204, i32 205, i32 80, i32 81, i32 84, i32 85, i32 208, i32 209, i32 212, i32 213, i32 88, i32 89, i32 92, i32 93, i32 216, i32 217, i32 220, i32 221, i32 96, i32 97, i32 100, i32 101, i32 224, i32 225, i32 228, i32 229, i32 104, i32 105, i32 108, i32 109, i32 232, i32 233, i32 236, i32 237, i32 112, i32 113, i32 116, i32 117, i32 240, i32 241, i32 244, i32 245, i32 120, i32 121, i32 124, i32 125, i32 248, i32 249, i32 252, i32 253, i32 2, i32 3, i32 6, i32 7, i32 130, i32 131, i32 134, i32 135, i32 10, i32 11, i32 14, i32 15, i32 138, i32 139, i32 142, i32 143, i32 18, i32 19, i32 22, i32 23, i32 146, i32 147, i32 150, i32 151, i32 26, i32 27, i32 30, i32 31, i32 154, i32 155, i32 158, i32 159, i32 34, i32 35, i32 38, i32 39, i32 162, i32 163, i32 166, i32 167, i32 42, i32 43, i32 46, i32 47, i32 170, i32 171, i32 174, i32 175, i32 50, i32 51, i32 54, i32 55, i32 178, i32 179, i32 182, i32 183, i32 58, i32 59, i32 62, i32 63, i32 186, i32 187, i32 190, i32 191, i32 66, i32 67, i32 70, i32 71, i32 194, i32 195, i32 198, i32 199, i32 74, i32 75, i32 78, i32 79, i32 202, i32 203, i32 206, i32 207, i32 82, i32 83, i32 86, i32 87, i32 210, i32 211, i32 214, i32 215, i32 90, i32 91, i32 94, i32 95, i32 218, i32 219, i32 222, i32 223, i32 98, i32 99, i32 102, i32 103, i32 226, i32 227, i32 230, i32 231, i32 106, i32 107, i32 110, i32 111, i32 234, i32 235, i32 238, i32 239, i32 114, i32 115, i32 118, i32 119, i32 242, i32 243, i32 246, i32 247, i32 122, i32 123, i32 126, i32 127, i32 250, i32 251, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_07: +; CHECK: [[REG07:r[0-9]+]] = #7 +; CHECK: vdeal(v1,v0,[[REG07]]) +define <256 x i8> @vdeal_07(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 2, i32 4, i32 6, i32 128, i32 130, i32 132, i32 134, i32 8, i32 10, i32 12, i32 14, i32 136, i32 138, i32 140, i32 142, i32 16, i32 18, i32 20, i32 22, i32 144, i32 146, i32 148, i32 150, i32 24, i32 26, i32 28, i32 30, i32 152, i32 154, i32 156, i32 158, i32 32, i32 34, i32 36, i32 38, i32 160, i32 162, i32 164, i32 166, i32 40, i32 42, i32 44, i32 46, i32 168, i32 170, i32 172, i32 174, i32 48, i32 50, i32 52, i32 54, i32 176, i32 178, i32 180, i32 182, i32 56, i32 58, i32 60, i32 62, i32 184, i32 186, i32 188, i32 190, i32 64, i32 66, i32 68, i32 70, i32 192, i32 194, i32 196, i32 198, i32 72, i32 74, i32 76, i32 78, i32 200, i32 202, i32 204, i32 206, i32 80, i32 82, i32 84, i32 86, i32 208, i32 210, i32 212, i32 214, i32 88, i32 90, i32 92, i32 94, i32 216, i32 218, i32 220, i32 222, i32 96, i32 98, i32 100, i32 102, i32 224, i32 226, i32 228, i32 230, i32 104, i32 106, i32 108, i32 110, i32 232, i32 234, i32 236, i32 238, i32 112, i32 114, i32 116, i32 118, i32 240, i32 242, i32 244, i32 246, i32 120, i32 122, i32 124, i32 126, i32 248, i32 250, i32 252, i32 254, i32 1, i32 3, i32 5, i32 7, i32 129, i32 131, i32 133, i32 135, i32 9, i32 11, i32 13, i32 15, i32 137, i32 139, i32 141, i32 143, i32 17, i32 19, i32 21, i32 23, i32 145, i32 147, i32 149, i32 151, i32 25, i32 27, i32 29, i32 31, i32 153, i32 155, i32 157, i32 159, i32 33, i32 35, i32 37, i32 39, i32 161, i32 163, i32 165, i32 167, i32 41, i32 43, i32 45, i32 47, i32 169, i32 171, i32 173, i32 175, i32 49, i32 51, i32 53, i32 55, i32 177, i32 179, i32 181, i32 183, i32 57, i32 59, i32 61, i32 63, i32 185, i32 187, i32 189, i32 191, i32 65, i32 67, i32 69, i32 71, i32 193, i32 195, i32 197, i32 199, i32 73, i32 75, i32 77, i32 79, i32 201, i32 203, i32 205, i32 207, i32 81, i32 83, i32 85, i32 87, i32 209, i32 211, i32 213, i32 215, i32 89, i32 91, i32 93, i32 95, i32 217, i32 219, i32 221, i32 223, i32 97, i32 99, i32 101, i32 103, i32 225, i32 227, i32 229, i32 231, i32 105, i32 107, i32 109, i32 111, i32 233, i32 235, i32 237, i32 239, i32 113, i32 115, i32 117, i32 119, i32 241, i32 243, i32 245, i32 247, i32 121, i32 123, i32 125, i32 127, i32 249, i32 251, i32 253, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_08: +; CHECK: [[REG08:r[0-9]+]] = #8 +; CHECK: vshuff(v1,v0,[[REG08]]) +define <256 x i8> @vdeal_08(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 128, i32 129, i32 130, i32 131, i32 132, i32 133, i32 134, i32 135, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 144, i32 145, i32 146, i32 147, i32 148, i32 149, i32 150, i32 151, i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 160, i32 161, i32 162, i32 163, i32 164, i32 165, i32 166, i32 167, i32 48, i32 49, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 176, i32 177, i32 178, i32 179, i32 180, i32 181, i32 182, i32 183, i32 64, i32 65, i32 66, i32 67, i32 68, i32 69, i32 70, i32 71, i32 192, i32 193, i32 194, i32 195, i32 196, i32 197, i32 198, i32 199, i32 80, i32 81, i32 82, i32 83, i32 84, i32 85, i32 86, i32 87, i32 208, i32 209, i32 210, i32 211, i32 212, i32 213, i32 214, i32 215, i32 96, i32 97, i32 98, i32 99, i32 100, i32 101, i32 102, i32 103, i32 224, i32 225, i32 226, i32 227, i32 228, i32 229, i32 230, i32 231, i32 112, i32 113, i32 114, i32 115, i32 116, i32 117, i32 118, i32 119, i32 240, i32 241, i32 242, i32 243, i32 244, i32 245, i32 246, i32 247, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 136, i32 137, i32 138, i32 139, i32 140, i32 141, i32 142, i32 143, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 152, i32 153, i32 154, i32 155, i32 156, i32 157, i32 158, i32 159, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 168, i32 169, i32 170, i32 171, i32 172, i32 173, i32 174, i32 175, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63, i32 184, i32 185, i32 186, i32 187, i32 188, i32 189, i32 190, i32 191, i32 72, i32 73, i32 74, i32 75, i32 76, i32 77, i32 78, i32 79, i32 200, i32 201, i32 202, i32 203, i32 204, i32 205, i32 206, i32 207, i32 88, i32 89, i32 90, i32 91, i32 92, i32 93, i32 94, i32 95, i32 216, i32 217, i32 218, i32 219, i32 220, i32 221, i32 222, i32 223, i32 104, i32 105, i32 106, i32 107, i32 108, i32 109, i32 110, i32 111, i32 232, i32 233, i32 234, i32 235, i32 236, i32 237, i32 238, i32 239, i32 120, i32 121, i32 122, i32 123, i32 124, i32 125, i32 126, i32 127, i32 248, i32 249, i32 250, i32 251, i32 252, i32 253, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_09: +; CHECK: [[REG09:r[0-9]+]] = #9 +; CHECK: vdeal(v1,v0,[[REG09]]) +define <256 x i8> @vdeal_09(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14, i32 128, i32 136, i32 130, i32 138, i32 132, i32 140, i32 134, i32 142, i32 16, i32 24, i32 18, i32 26, i32 20, i32 28, i32 22, i32 30, i32 144, i32 152, i32 146, i32 154, i32 148, i32 156, i32 150, i32 158, i32 32, i32 40, i32 34, i32 42, i32 36, i32 44, i32 38, i32 46, i32 160, i32 168, i32 162, i32 170, i32 164, i32 172, i32 166, i32 174, i32 48, i32 56, i32 50, i32 58, i32 52, i32 60, i32 54, i32 62, i32 176, i32 184, i32 178, i32 186, i32 180, i32 188, i32 182, i32 190, i32 64, i32 72, i32 66, i32 74, i32 68, i32 76, i32 70, i32 78, i32 192, i32 200, i32 194, i32 202, i32 196, i32 204, i32 198, i32 206, i32 80, i32 88, i32 82, i32 90, i32 84, i32 92, i32 86, i32 94, i32 208, i32 216, i32 210, i32 218, i32 212, i32 220, i32 214, i32 222, i32 96, i32 104, i32 98, i32 106, i32 100, i32 108, i32 102, i32 110, i32 224, i32 232, i32 226, i32 234, i32 228, i32 236, i32 230, i32 238, i32 112, i32 120, i32 114, i32 122, i32 116, i32 124, i32 118, i32 126, i32 240, i32 248, i32 242, i32 250, i32 244, i32 252, i32 246, i32 254, i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15, i32 129, i32 137, i32 131, i32 139, i32 133, i32 141, i32 135, i32 143, i32 17, i32 25, i32 19, i32 27, i32 21, i32 29, i32 23, i32 31, i32 145, i32 153, i32 147, i32 155, i32 149, i32 157, i32 151, i32 159, i32 33, i32 41, i32 35, i32 43, i32 37, i32 45, i32 39, i32 47, i32 161, i32 169, i32 163, i32 171, i32 165, i32 173, i32 167, i32 175, i32 49, i32 57, i32 51, i32 59, i32 53, i32 61, i32 55, i32 63, i32 177, i32 185, i32 179, i32 187, i32 181, i32 189, i32 183, i32 191, i32 65, i32 73, i32 67, i32 75, i32 69, i32 77, i32 71, i32 79, i32 193, i32 201, i32 195, i32 203, i32 197, i32 205, i32 199, i32 207, i32 81, i32 89, i32 83, i32 91, i32 85, i32 93, i32 87, i32 95, i32 209, i32 217, i32 211, i32 219, i32 213, i32 221, i32 215, i32 223, i32 97, i32 105, i32 99, i32 107, i32 101, i32 109, i32 103, i32 111, i32 225, i32 233, i32 227, i32 235, i32 229, i32 237, i32 231, i32 239, i32 113, i32 121, i32 115, i32 123, i32 117, i32 125, i32 119, i32 127, i32 241, i32 249, i32 243, i32 251, i32 245, i32 253, i32 247, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_0a: +; CHECK: [[REG0a:r[0-9]+]] = #10 +; CHECK: vdeal(v1,v0,[[REG0a]]) +define <256 x i8> @vdeal_0a(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 8, i32 9, i32 4, i32 5, i32 12, i32 13, i32 128, i32 129, i32 136, i32 137, i32 132, i32 133, i32 140, i32 141, i32 16, i32 17, i32 24, i32 25, i32 20, i32 21, i32 28, i32 29, i32 144, i32 145, i32 152, i32 153, i32 148, i32 149, i32 156, i32 157, i32 32, i32 33, i32 40, i32 41, i32 36, i32 37, i32 44, i32 45, i32 160, i32 161, i32 168, i32 169, i32 164, i32 165, i32 172, i32 173, i32 48, i32 49, i32 56, i32 57, i32 52, i32 53, i32 60, i32 61, i32 176, i32 177, i32 184, i32 185, i32 180, i32 181, i32 188, i32 189, i32 64, i32 65, i32 72, i32 73, i32 68, i32 69, i32 76, i32 77, i32 192, i32 193, i32 200, i32 201, i32 196, i32 197, i32 204, i32 205, i32 80, i32 81, i32 88, i32 89, i32 84, i32 85, i32 92, i32 93, i32 208, i32 209, i32 216, i32 217, i32 212, i32 213, i32 220, i32 221, i32 96, i32 97, i32 104, i32 105, i32 100, i32 101, i32 108, i32 109, i32 224, i32 225, i32 232, i32 233, i32 228, i32 229, i32 236, i32 237, i32 112, i32 113, i32 120, i32 121, i32 116, i32 117, i32 124, i32 125, i32 240, i32 241, i32 248, i32 249, i32 244, i32 245, i32 252, i32 253, i32 2, i32 3, i32 10, i32 11, i32 6, i32 7, i32 14, i32 15, i32 130, i32 131, i32 138, i32 139, i32 134, i32 135, i32 142, i32 143, i32 18, i32 19, i32 26, i32 27, i32 22, i32 23, i32 30, i32 31, i32 146, i32 147, i32 154, i32 155, i32 150, i32 151, i32 158, i32 159, i32 34, i32 35, i32 42, i32 43, i32 38, i32 39, i32 46, i32 47, i32 162, i32 163, i32 170, i32 171, i32 166, i32 167, i32 174, i32 175, i32 50, i32 51, i32 58, i32 59, i32 54, i32 55, i32 62, i32 63, i32 178, i32 179, i32 186, i32 187, i32 182, i32 183, i32 190, i32 191, i32 66, i32 67, i32 74, i32 75, i32 70, i32 71, i32 78, i32 79, i32 194, i32 195, i32 202, i32 203, i32 198, i32 199, i32 206, i32 207, i32 82, i32 83, i32 90, i32 91, i32 86, i32 87, i32 94, i32 95, i32 210, i32 211, i32 218, i32 219, i32 214, i32 215, i32 222, i32 223, i32 98, i32 99, i32 106, i32 107, i32 102, i32 103, i32 110, i32 111, i32 226, i32 227, i32 234, i32 235, i32 230, i32 231, i32 238, i32 239, i32 114, i32 115, i32 122, i32 123, i32 118, i32 119, i32 126, i32 127, i32 242, i32 243, i32 250, i32 251, i32 246, i32 247, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_0b: +; CHECK: [[REG0b:r[0-9]+]] = #11 +; CHECK: vdeal(v1,v0,[[REG0b]]) +define <256 x i8> @vdeal_0b(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 2, i32 8, i32 10, i32 4, i32 6, i32 12, i32 14, i32 128, i32 130, i32 136, i32 138, i32 132, i32 134, i32 140, i32 142, i32 16, i32 18, i32 24, i32 26, i32 20, i32 22, i32 28, i32 30, i32 144, i32 146, i32 152, i32 154, i32 148, i32 150, i32 156, i32 158, i32 32, i32 34, i32 40, i32 42, i32 36, i32 38, i32 44, i32 46, i32 160, i32 162, i32 168, i32 170, i32 164, i32 166, i32 172, i32 174, i32 48, i32 50, i32 56, i32 58, i32 52, i32 54, i32 60, i32 62, i32 176, i32 178, i32 184, i32 186, i32 180, i32 182, i32 188, i32 190, i32 64, i32 66, i32 72, i32 74, i32 68, i32 70, i32 76, i32 78, i32 192, i32 194, i32 200, i32 202, i32 196, i32 198, i32 204, i32 206, i32 80, i32 82, i32 88, i32 90, i32 84, i32 86, i32 92, i32 94, i32 208, i32 210, i32 216, i32 218, i32 212, i32 214, i32 220, i32 222, i32 96, i32 98, i32 104, i32 106, i32 100, i32 102, i32 108, i32 110, i32 224, i32 226, i32 232, i32 234, i32 228, i32 230, i32 236, i32 238, i32 112, i32 114, i32 120, i32 122, i32 116, i32 118, i32 124, i32 126, i32 240, i32 242, i32 248, i32 250, i32 244, i32 246, i32 252, i32 254, i32 1, i32 3, i32 9, i32 11, i32 5, i32 7, i32 13, i32 15, i32 129, i32 131, i32 137, i32 139, i32 133, i32 135, i32 141, i32 143, i32 17, i32 19, i32 25, i32 27, i32 21, i32 23, i32 29, i32 31, i32 145, i32 147, i32 153, i32 155, i32 149, i32 151, i32 157, i32 159, i32 33, i32 35, i32 41, i32 43, i32 37, i32 39, i32 45, i32 47, i32 161, i32 163, i32 169, i32 171, i32 165, i32 167, i32 173, i32 175, i32 49, i32 51, i32 57, i32 59, i32 53, i32 55, i32 61, i32 63, i32 177, i32 179, i32 185, i32 187, i32 181, i32 183, i32 189, i32 191, i32 65, i32 67, i32 73, i32 75, i32 69, i32 71, i32 77, i32 79, i32 193, i32 195, i32 201, i32 203, i32 197, i32 199, i32 205, i32 207, i32 81, i32 83, i32 89, i32 91, i32 85, i32 87, i32 93, i32 95, i32 209, i32 211, i32 217, i32 219, i32 213, i32 215, i32 221, i32 223, i32 97, i32 99, i32 105, i32 107, i32 101, i32 103, i32 109, i32 111, i32 225, i32 227, i32 233, i32 235, i32 229, i32 231, i32 237, i32 239, i32 113, i32 115, i32 121, i32 123, i32 117, i32 119, i32 125, i32 127, i32 241, i32 243, i32 249, i32 251, i32 245, i32 247, i32 253, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_0c: +; CHECK: [[REG0c:r[0-9]+]] = #12 +; CHECK: vdeal(v1,v0,[[REG0c]]) +define <256 x i8> @vdeal_0c(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 10, i32 11, i32 128, i32 129, i32 130, i32 131, i32 136, i32 137, i32 138, i32 139, i32 16, i32 17, i32 18, i32 19, i32 24, i32 25, i32 26, i32 27, i32 144, i32 145, i32 146, i32 147, i32 152, i32 153, i32 154, i32 155, i32 32, i32 33, i32 34, i32 35, i32 40, i32 41, i32 42, i32 43, i32 160, i32 161, i32 162, i32 163, i32 168, i32 169, i32 170, i32 171, i32 48, i32 49, i32 50, i32 51, i32 56, i32 57, i32 58, i32 59, i32 176, i32 177, i32 178, i32 179, i32 184, i32 185, i32 186, i32 187, i32 64, i32 65, i32 66, i32 67, i32 72, i32 73, i32 74, i32 75, i32 192, i32 193, i32 194, i32 195, i32 200, i32 201, i32 202, i32 203, i32 80, i32 81, i32 82, i32 83, i32 88, i32 89, i32 90, i32 91, i32 208, i32 209, i32 210, i32 211, i32 216, i32 217, i32 218, i32 219, i32 96, i32 97, i32 98, i32 99, i32 104, i32 105, i32 106, i32 107, i32 224, i32 225, i32 226, i32 227, i32 232, i32 233, i32 234, i32 235, i32 112, i32 113, i32 114, i32 115, i32 120, i32 121, i32 122, i32 123, i32 240, i32 241, i32 242, i32 243, i32 248, i32 249, i32 250, i32 251, i32 4, i32 5, i32 6, i32 7, i32 12, i32 13, i32 14, i32 15, i32 132, i32 133, i32 134, i32 135, i32 140, i32 141, i32 142, i32 143, i32 20, i32 21, i32 22, i32 23, i32 28, i32 29, i32 30, i32 31, i32 148, i32 149, i32 150, i32 151, i32 156, i32 157, i32 158, i32 159, i32 36, i32 37, i32 38, i32 39, i32 44, i32 45, i32 46, i32 47, i32 164, i32 165, i32 166, i32 167, i32 172, i32 173, i32 174, i32 175, i32 52, i32 53, i32 54, i32 55, i32 60, i32 61, i32 62, i32 63, i32 180, i32 181, i32 182, i32 183, i32 188, i32 189, i32 190, i32 191, i32 68, i32 69, i32 70, i32 71, i32 76, i32 77, i32 78, i32 79, i32 196, i32 197, i32 198, i32 199, i32 204, i32 205, i32 206, i32 207, i32 84, i32 85, i32 86, i32 87, i32 92, i32 93, i32 94, i32 95, i32 212, i32 213, i32 214, i32 215, i32 220, i32 221, i32 222, i32 223, i32 100, i32 101, i32 102, i32 103, i32 108, i32 109, i32 110, i32 111, i32 228, i32 229, i32 230, i32 231, i32 236, i32 237, i32 238, i32 239, i32 116, i32 117, i32 118, i32 119, i32 124, i32 125, i32 126, i32 127, i32 244, i32 245, i32 246, i32 247, i32 252, i32 253, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_0d: +; CHECK: [[REG0d:r[0-9]+]] = #13 +; CHECK: vdeal(v1,v0,[[REG0d]]) +define <256 x i8> @vdeal_0d(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 4, i32 2, i32 6, i32 8, i32 12, i32 10, i32 14, i32 128, i32 132, i32 130, i32 134, i32 136, i32 140, i32 138, i32 142, i32 16, i32 20, i32 18, i32 22, i32 24, i32 28, i32 26, i32 30, i32 144, i32 148, i32 146, i32 150, i32 152, i32 156, i32 154, i32 158, i32 32, i32 36, i32 34, i32 38, i32 40, i32 44, i32 42, i32 46, i32 160, i32 164, i32 162, i32 166, i32 168, i32 172, i32 170, i32 174, i32 48, i32 52, i32 50, i32 54, i32 56, i32 60, i32 58, i32 62, i32 176, i32 180, i32 178, i32 182, i32 184, i32 188, i32 186, i32 190, i32 64, i32 68, i32 66, i32 70, i32 72, i32 76, i32 74, i32 78, i32 192, i32 196, i32 194, i32 198, i32 200, i32 204, i32 202, i32 206, i32 80, i32 84, i32 82, i32 86, i32 88, i32 92, i32 90, i32 94, i32 208, i32 212, i32 210, i32 214, i32 216, i32 220, i32 218, i32 222, i32 96, i32 100, i32 98, i32 102, i32 104, i32 108, i32 106, i32 110, i32 224, i32 228, i32 226, i32 230, i32 232, i32 236, i32 234, i32 238, i32 112, i32 116, i32 114, i32 118, i32 120, i32 124, i32 122, i32 126, i32 240, i32 244, i32 242, i32 246, i32 248, i32 252, i32 250, i32 254, i32 1, i32 5, i32 3, i32 7, i32 9, i32 13, i32 11, i32 15, i32 129, i32 133, i32 131, i32 135, i32 137, i32 141, i32 139, i32 143, i32 17, i32 21, i32 19, i32 23, i32 25, i32 29, i32 27, i32 31, i32 145, i32 149, i32 147, i32 151, i32 153, i32 157, i32 155, i32 159, i32 33, i32 37, i32 35, i32 39, i32 41, i32 45, i32 43, i32 47, i32 161, i32 165, i32 163, i32 167, i32 169, i32 173, i32 171, i32 175, i32 49, i32 53, i32 51, i32 55, i32 57, i32 61, i32 59, i32 63, i32 177, i32 181, i32 179, i32 183, i32 185, i32 189, i32 187, i32 191, i32 65, i32 69, i32 67, i32 71, i32 73, i32 77, i32 75, i32 79, i32 193, i32 197, i32 195, i32 199, i32 201, i32 205, i32 203, i32 207, i32 81, i32 85, i32 83, i32 87, i32 89, i32 93, i32 91, i32 95, i32 209, i32 213, i32 211, i32 215, i32 217, i32 221, i32 219, i32 223, i32 97, i32 101, i32 99, i32 103, i32 105, i32 109, i32 107, i32 111, i32 225, i32 229, i32 227, i32 231, i32 233, i32 237, i32 235, i32 239, i32 113, i32 117, i32 115, i32 119, i32 121, i32 125, i32 123, i32 127, i32 241, i32 245, i32 243, i32 247, i32 249, i32 253, i32 251, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_0e: +; CHECK: [[REG0e:r[0-9]+]] = #14 +; CHECK: vdeal(v1,v0,[[REG0e]]) +define <256 x i8> @vdeal_0e(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 4, i32 5, i32 8, i32 9, i32 12, i32 13, i32 128, i32 129, i32 132, i32 133, i32 136, i32 137, i32 140, i32 141, i32 16, i32 17, i32 20, i32 21, i32 24, i32 25, i32 28, i32 29, i32 144, i32 145, i32 148, i32 149, i32 152, i32 153, i32 156, i32 157, i32 32, i32 33, i32 36, i32 37, i32 40, i32 41, i32 44, i32 45, i32 160, i32 161, i32 164, i32 165, i32 168, i32 169, i32 172, i32 173, i32 48, i32 49, i32 52, i32 53, i32 56, i32 57, i32 60, i32 61, i32 176, i32 177, i32 180, i32 181, i32 184, i32 185, i32 188, i32 189, i32 64, i32 65, i32 68, i32 69, i32 72, i32 73, i32 76, i32 77, i32 192, i32 193, i32 196, i32 197, i32 200, i32 201, i32 204, i32 205, i32 80, i32 81, i32 84, i32 85, i32 88, i32 89, i32 92, i32 93, i32 208, i32 209, i32 212, i32 213, i32 216, i32 217, i32 220, i32 221, i32 96, i32 97, i32 100, i32 101, i32 104, i32 105, i32 108, i32 109, i32 224, i32 225, i32 228, i32 229, i32 232, i32 233, i32 236, i32 237, i32 112, i32 113, i32 116, i32 117, i32 120, i32 121, i32 124, i32 125, i32 240, i32 241, i32 244, i32 245, i32 248, i32 249, i32 252, i32 253, i32 2, i32 3, i32 6, i32 7, i32 10, i32 11, i32 14, i32 15, i32 130, i32 131, i32 134, i32 135, i32 138, i32 139, i32 142, i32 143, i32 18, i32 19, i32 22, i32 23, i32 26, i32 27, i32 30, i32 31, i32 146, i32 147, i32 150, i32 151, i32 154, i32 155, i32 158, i32 159, i32 34, i32 35, i32 38, i32 39, i32 42, i32 43, i32 46, i32 47, i32 162, i32 163, i32 166, i32 167, i32 170, i32 171, i32 174, i32 175, i32 50, i32 51, i32 54, i32 55, i32 58, i32 59, i32 62, i32 63, i32 178, i32 179, i32 182, i32 183, i32 186, i32 187, i32 190, i32 191, i32 66, i32 67, i32 70, i32 71, i32 74, i32 75, i32 78, i32 79, i32 194, i32 195, i32 198, i32 199, i32 202, i32 203, i32 206, i32 207, i32 82, i32 83, i32 86, i32 87, i32 90, i32 91, i32 94, i32 95, i32 210, i32 211, i32 214, i32 215, i32 218, i32 219, i32 222, i32 223, i32 98, i32 99, i32 102, i32 103, i32 106, i32 107, i32 110, i32 111, i32 226, i32 227, i32 230, i32 231, i32 234, i32 235, i32 238, i32 239, i32 114, i32 115, i32 118, i32 119, i32 122, i32 123, i32 126, i32 127, i32 242, i32 243, i32 246, i32 247, i32 250, i32 251, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_0f: +; CHECK: [[REG0f:r[0-9]+]] = #15 +; CHECK: vdeal(v1,v0,[[REG0f]]) +define <256 x i8> @vdeal_0f(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 128, i32 130, i32 132, i32 134, i32 136, i32 138, i32 140, i32 142, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30, i32 144, i32 146, i32 148, i32 150, i32 152, i32 154, i32 156, i32 158, i32 32, i32 34, i32 36, i32 38, i32 40, i32 42, i32 44, i32 46, i32 160, i32 162, i32 164, i32 166, i32 168, i32 170, i32 172, i32 174, i32 48, i32 50, i32 52, i32 54, i32 56, i32 58, i32 60, i32 62, i32 176, i32 178, i32 180, i32 182, i32 184, i32 186, i32 188, i32 190, i32 64, i32 66, i32 68, i32 70, i32 72, i32 74, i32 76, i32 78, i32 192, i32 194, i32 196, i32 198, i32 200, i32 202, i32 204, i32 206, i32 80, i32 82, i32 84, i32 86, i32 88, i32 90, i32 92, i32 94, i32 208, i32 210, i32 212, i32 214, i32 216, i32 218, i32 220, i32 222, i32 96, i32 98, i32 100, i32 102, i32 104, i32 106, i32 108, i32 110, i32 224, i32 226, i32 228, i32 230, i32 232, i32 234, i32 236, i32 238, i32 112, i32 114, i32 116, i32 118, i32 120, i32 122, i32 124, i32 126, i32 240, i32 242, i32 244, i32 246, i32 248, i32 250, i32 252, i32 254, i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 129, i32 131, i32 133, i32 135, i32 137, i32 139, i32 141, i32 143, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31, i32 145, i32 147, i32 149, i32 151, i32 153, i32 155, i32 157, i32 159, i32 33, i32 35, i32 37, i32 39, i32 41, i32 43, i32 45, i32 47, i32 161, i32 163, i32 165, i32 167, i32 169, i32 171, i32 173, i32 175, i32 49, i32 51, i32 53, i32 55, i32 57, i32 59, i32 61, i32 63, i32 177, i32 179, i32 181, i32 183, i32 185, i32 187, i32 189, i32 191, i32 65, i32 67, i32 69, i32 71, i32 73, i32 75, i32 77, i32 79, i32 193, i32 195, i32 197, i32 199, i32 201, i32 203, i32 205, i32 207, i32 81, i32 83, i32 85, i32 87, i32 89, i32 91, i32 93, i32 95, i32 209, i32 211, i32 213, i32 215, i32 217, i32 219, i32 221, i32 223, i32 97, i32 99, i32 101, i32 103, i32 105, i32 107, i32 109, i32 111, i32 225, i32 227, i32 229, i32 231, i32 233, i32 235, i32 237, i32 239, i32 113, i32 115, i32 117, i32 119, i32 121, i32 123, i32 125, i32 127, i32 241, i32 243, i32 245, i32 247, i32 249, i32 251, i32 253, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_10: +; CHECK: [[REG10:r[0-9]+]] = #16 +; CHECK: vshuff(v1,v0,[[REG10]]) +define <256 x i8> @vdeal_10(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 128, i32 129, i32 130, i32 131, i32 132, i32 133, i32 134, i32 135, i32 136, i32 137, i32 138, i32 139, i32 140, i32 141, i32 142, i32 143, i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 160, i32 161, i32 162, i32 163, i32 164, i32 165, i32 166, i32 167, i32 168, i32 169, i32 170, i32 171, i32 172, i32 173, i32 174, i32 175, i32 64, i32 65, i32 66, i32 67, i32 68, i32 69, i32 70, i32 71, i32 72, i32 73, i32 74, i32 75, i32 76, i32 77, i32 78, i32 79, i32 192, i32 193, i32 194, i32 195, i32 196, i32 197, i32 198, i32 199, i32 200, i32 201, i32 202, i32 203, i32 204, i32 205, i32 206, i32 207, i32 96, i32 97, i32 98, i32 99, i32 100, i32 101, i32 102, i32 103, i32 104, i32 105, i32 106, i32 107, i32 108, i32 109, i32 110, i32 111, i32 224, i32 225, i32 226, i32 227, i32 228, i32 229, i32 230, i32 231, i32 232, i32 233, i32 234, i32 235, i32 236, i32 237, i32 238, i32 239, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 144, i32 145, i32 146, i32 147, i32 148, i32 149, i32 150, i32 151, i32 152, i32 153, i32 154, i32 155, i32 156, i32 157, i32 158, i32 159, i32 48, i32 49, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63, i32 176, i32 177, i32 178, i32 179, i32 180, i32 181, i32 182, i32 183, i32 184, i32 185, i32 186, i32 187, i32 188, i32 189, i32 190, i32 191, i32 80, i32 81, i32 82, i32 83, i32 84, i32 85, i32 86, i32 87, i32 88, i32 89, i32 90, i32 91, i32 92, i32 93, i32 94, i32 95, i32 208, i32 209, i32 210, i32 211, i32 212, i32 213, i32 214, i32 215, i32 216, i32 217, i32 218, i32 219, i32 220, i32 221, i32 222, i32 223, i32 112, i32 113, i32 114, i32 115, i32 116, i32 117, i32 118, i32 119, i32 120, i32 121, i32 122, i32 123, i32 124, i32 125, i32 126, i32 127, i32 240, i32 241, i32 242, i32 243, i32 244, i32 245, i32 246, i32 247, i32 248, i32 249, i32 250, i32 251, i32 252, i32 253, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_11: +; CHECK: [[REG11:r[0-9]+]] = #17 +; CHECK: vdeal(v1,v0,[[REG11]]) +define <256 x i8> @vdeal_11(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 16, i32 2, i32 18, i32 4, i32 20, i32 6, i32 22, i32 8, i32 24, i32 10, i32 26, i32 12, i32 28, i32 14, i32 30, i32 128, i32 144, i32 130, i32 146, i32 132, i32 148, i32 134, i32 150, i32 136, i32 152, i32 138, i32 154, i32 140, i32 156, i32 142, i32 158, i32 32, i32 48, i32 34, i32 50, i32 36, i32 52, i32 38, i32 54, i32 40, i32 56, i32 42, i32 58, i32 44, i32 60, i32 46, i32 62, i32 160, i32 176, i32 162, i32 178, i32 164, i32 180, i32 166, i32 182, i32 168, i32 184, i32 170, i32 186, i32 172, i32 188, i32 174, i32 190, i32 64, i32 80, i32 66, i32 82, i32 68, i32 84, i32 70, i32 86, i32 72, i32 88, i32 74, i32 90, i32 76, i32 92, i32 78, i32 94, i32 192, i32 208, i32 194, i32 210, i32 196, i32 212, i32 198, i32 214, i32 200, i32 216, i32 202, i32 218, i32 204, i32 220, i32 206, i32 222, i32 96, i32 112, i32 98, i32 114, i32 100, i32 116, i32 102, i32 118, i32 104, i32 120, i32 106, i32 122, i32 108, i32 124, i32 110, i32 126, i32 224, i32 240, i32 226, i32 242, i32 228, i32 244, i32 230, i32 246, i32 232, i32 248, i32 234, i32 250, i32 236, i32 252, i32 238, i32 254, i32 1, i32 17, i32 3, i32 19, i32 5, i32 21, i32 7, i32 23, i32 9, i32 25, i32 11, i32 27, i32 13, i32 29, i32 15, i32 31, i32 129, i32 145, i32 131, i32 147, i32 133, i32 149, i32 135, i32 151, i32 137, i32 153, i32 139, i32 155, i32 141, i32 157, i32 143, i32 159, i32 33, i32 49, i32 35, i32 51, i32 37, i32 53, i32 39, i32 55, i32 41, i32 57, i32 43, i32 59, i32 45, i32 61, i32 47, i32 63, i32 161, i32 177, i32 163, i32 179, i32 165, i32 181, i32 167, i32 183, i32 169, i32 185, i32 171, i32 187, i32 173, i32 189, i32 175, i32 191, i32 65, i32 81, i32 67, i32 83, i32 69, i32 85, i32 71, i32 87, i32 73, i32 89, i32 75, i32 91, i32 77, i32 93, i32 79, i32 95, i32 193, i32 209, i32 195, i32 211, i32 197, i32 213, i32 199, i32 215, i32 201, i32 217, i32 203, i32 219, i32 205, i32 221, i32 207, i32 223, i32 97, i32 113, i32 99, i32 115, i32 101, i32 117, i32 103, i32 119, i32 105, i32 121, i32 107, i32 123, i32 109, i32 125, i32 111, i32 127, i32 225, i32 241, i32 227, i32 243, i32 229, i32 245, i32 231, i32 247, i32 233, i32 249, i32 235, i32 251, i32 237, i32 253, i32 239, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_12: +; CHECK: [[REG12:r[0-9]+]] = #18 +; CHECK: vdeal(v1,v0,[[REG12]]) +define <256 x i8> @vdeal_12(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 16, i32 17, i32 4, i32 5, i32 20, i32 21, i32 8, i32 9, i32 24, i32 25, i32 12, i32 13, i32 28, i32 29, i32 128, i32 129, i32 144, i32 145, i32 132, i32 133, i32 148, i32 149, i32 136, i32 137, i32 152, i32 153, i32 140, i32 141, i32 156, i32 157, i32 32, i32 33, i32 48, i32 49, i32 36, i32 37, i32 52, i32 53, i32 40, i32 41, i32 56, i32 57, i32 44, i32 45, i32 60, i32 61, i32 160, i32 161, i32 176, i32 177, i32 164, i32 165, i32 180, i32 181, i32 168, i32 169, i32 184, i32 185, i32 172, i32 173, i32 188, i32 189, i32 64, i32 65, i32 80, i32 81, i32 68, i32 69, i32 84, i32 85, i32 72, i32 73, i32 88, i32 89, i32 76, i32 77, i32 92, i32 93, i32 192, i32 193, i32 208, i32 209, i32 196, i32 197, i32 212, i32 213, i32 200, i32 201, i32 216, i32 217, i32 204, i32 205, i32 220, i32 221, i32 96, i32 97, i32 112, i32 113, i32 100, i32 101, i32 116, i32 117, i32 104, i32 105, i32 120, i32 121, i32 108, i32 109, i32 124, i32 125, i32 224, i32 225, i32 240, i32 241, i32 228, i32 229, i32 244, i32 245, i32 232, i32 233, i32 248, i32 249, i32 236, i32 237, i32 252, i32 253, i32 2, i32 3, i32 18, i32 19, i32 6, i32 7, i32 22, i32 23, i32 10, i32 11, i32 26, i32 27, i32 14, i32 15, i32 30, i32 31, i32 130, i32 131, i32 146, i32 147, i32 134, i32 135, i32 150, i32 151, i32 138, i32 139, i32 154, i32 155, i32 142, i32 143, i32 158, i32 159, i32 34, i32 35, i32 50, i32 51, i32 38, i32 39, i32 54, i32 55, i32 42, i32 43, i32 58, i32 59, i32 46, i32 47, i32 62, i32 63, i32 162, i32 163, i32 178, i32 179, i32 166, i32 167, i32 182, i32 183, i32 170, i32 171, i32 186, i32 187, i32 174, i32 175, i32 190, i32 191, i32 66, i32 67, i32 82, i32 83, i32 70, i32 71, i32 86, i32 87, i32 74, i32 75, i32 90, i32 91, i32 78, i32 79, i32 94, i32 95, i32 194, i32 195, i32 210, i32 211, i32 198, i32 199, i32 214, i32 215, i32 202, i32 203, i32 218, i32 219, i32 206, i32 207, i32 222, i32 223, i32 98, i32 99, i32 114, i32 115, i32 102, i32 103, i32 118, i32 119, i32 106, i32 107, i32 122, i32 123, i32 110, i32 111, i32 126, i32 127, i32 226, i32 227, i32 242, i32 243, i32 230, i32 231, i32 246, i32 247, i32 234, i32 235, i32 250, i32 251, i32 238, i32 239, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_13: +; CHECK: [[REG13:r[0-9]+]] = #19 +; CHECK: vdeal(v1,v0,[[REG13]]) +define <256 x i8> @vdeal_13(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 2, i32 16, i32 18, i32 4, i32 6, i32 20, i32 22, i32 8, i32 10, i32 24, i32 26, i32 12, i32 14, i32 28, i32 30, i32 128, i32 130, i32 144, i32 146, i32 132, i32 134, i32 148, i32 150, i32 136, i32 138, i32 152, i32 154, i32 140, i32 142, i32 156, i32 158, i32 32, i32 34, i32 48, i32 50, i32 36, i32 38, i32 52, i32 54, i32 40, i32 42, i32 56, i32 58, i32 44, i32 46, i32 60, i32 62, i32 160, i32 162, i32 176, i32 178, i32 164, i32 166, i32 180, i32 182, i32 168, i32 170, i32 184, i32 186, i32 172, i32 174, i32 188, i32 190, i32 64, i32 66, i32 80, i32 82, i32 68, i32 70, i32 84, i32 86, i32 72, i32 74, i32 88, i32 90, i32 76, i32 78, i32 92, i32 94, i32 192, i32 194, i32 208, i32 210, i32 196, i32 198, i32 212, i32 214, i32 200, i32 202, i32 216, i32 218, i32 204, i32 206, i32 220, i32 222, i32 96, i32 98, i32 112, i32 114, i32 100, i32 102, i32 116, i32 118, i32 104, i32 106, i32 120, i32 122, i32 108, i32 110, i32 124, i32 126, i32 224, i32 226, i32 240, i32 242, i32 228, i32 230, i32 244, i32 246, i32 232, i32 234, i32 248, i32 250, i32 236, i32 238, i32 252, i32 254, i32 1, i32 3, i32 17, i32 19, i32 5, i32 7, i32 21, i32 23, i32 9, i32 11, i32 25, i32 27, i32 13, i32 15, i32 29, i32 31, i32 129, i32 131, i32 145, i32 147, i32 133, i32 135, i32 149, i32 151, i32 137, i32 139, i32 153, i32 155, i32 141, i32 143, i32 157, i32 159, i32 33, i32 35, i32 49, i32 51, i32 37, i32 39, i32 53, i32 55, i32 41, i32 43, i32 57, i32 59, i32 45, i32 47, i32 61, i32 63, i32 161, i32 163, i32 177, i32 179, i32 165, i32 167, i32 181, i32 183, i32 169, i32 171, i32 185, i32 187, i32 173, i32 175, i32 189, i32 191, i32 65, i32 67, i32 81, i32 83, i32 69, i32 71, i32 85, i32 87, i32 73, i32 75, i32 89, i32 91, i32 77, i32 79, i32 93, i32 95, i32 193, i32 195, i32 209, i32 211, i32 197, i32 199, i32 213, i32 215, i32 201, i32 203, i32 217, i32 219, i32 205, i32 207, i32 221, i32 223, i32 97, i32 99, i32 113, i32 115, i32 101, i32 103, i32 117, i32 119, i32 105, i32 107, i32 121, i32 123, i32 109, i32 111, i32 125, i32 127, i32 225, i32 227, i32 241, i32 243, i32 229, i32 231, i32 245, i32 247, i32 233, i32 235, i32 249, i32 251, i32 237, i32 239, i32 253, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_14: +; CHECK: [[REG14:r[0-9]+]] = #20 +; CHECK: vdeal(v1,v0,[[REG14]]) +define <256 x i8> @vdeal_14(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 2, i32 3, i32 16, i32 17, i32 18, i32 19, i32 8, i32 9, i32 10, i32 11, i32 24, i32 25, i32 26, i32 27, i32 128, i32 129, i32 130, i32 131, i32 144, i32 145, i32 146, i32 147, i32 136, i32 137, i32 138, i32 139, i32 152, i32 153, i32 154, i32 155, i32 32, i32 33, i32 34, i32 35, i32 48, i32 49, i32 50, i32 51, i32 40, i32 41, i32 42, i32 43, i32 56, i32 57, i32 58, i32 59, i32 160, i32 161, i32 162, i32 163, i32 176, i32 177, i32 178, i32 179, i32 168, i32 169, i32 170, i32 171, i32 184, i32 185, i32 186, i32 187, i32 64, i32 65, i32 66, i32 67, i32 80, i32 81, i32 82, i32 83, i32 72, i32 73, i32 74, i32 75, i32 88, i32 89, i32 90, i32 91, i32 192, i32 193, i32 194, i32 195, i32 208, i32 209, i32 210, i32 211, i32 200, i32 201, i32 202, i32 203, i32 216, i32 217, i32 218, i32 219, i32 96, i32 97, i32 98, i32 99, i32 112, i32 113, i32 114, i32 115, i32 104, i32 105, i32 106, i32 107, i32 120, i32 121, i32 122, i32 123, i32 224, i32 225, i32 226, i32 227, i32 240, i32 241, i32 242, i32 243, i32 232, i32 233, i32 234, i32 235, i32 248, i32 249, i32 250, i32 251, i32 4, i32 5, i32 6, i32 7, i32 20, i32 21, i32 22, i32 23, i32 12, i32 13, i32 14, i32 15, i32 28, i32 29, i32 30, i32 31, i32 132, i32 133, i32 134, i32 135, i32 148, i32 149, i32 150, i32 151, i32 140, i32 141, i32 142, i32 143, i32 156, i32 157, i32 158, i32 159, i32 36, i32 37, i32 38, i32 39, i32 52, i32 53, i32 54, i32 55, i32 44, i32 45, i32 46, i32 47, i32 60, i32 61, i32 62, i32 63, i32 164, i32 165, i32 166, i32 167, i32 180, i32 181, i32 182, i32 183, i32 172, i32 173, i32 174, i32 175, i32 188, i32 189, i32 190, i32 191, i32 68, i32 69, i32 70, i32 71, i32 84, i32 85, i32 86, i32 87, i32 76, i32 77, i32 78, i32 79, i32 92, i32 93, i32 94, i32 95, i32 196, i32 197, i32 198, i32 199, i32 212, i32 213, i32 214, i32 215, i32 204, i32 205, i32 206, i32 207, i32 220, i32 221, i32 222, i32 223, i32 100, i32 101, i32 102, i32 103, i32 116, i32 117, i32 118, i32 119, i32 108, i32 109, i32 110, i32 111, i32 124, i32 125, i32 126, i32 127, i32 228, i32 229, i32 230, i32 231, i32 244, i32 245, i32 246, i32 247, i32 236, i32 237, i32 238, i32 239, i32 252, i32 253, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_15: +; CHECK: [[REG15:r[0-9]+]] = #21 +; CHECK: vdeal(v1,v0,[[REG15]]) +define <256 x i8> @vdeal_15(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 4, i32 2, i32 6, i32 16, i32 20, i32 18, i32 22, i32 8, i32 12, i32 10, i32 14, i32 24, i32 28, i32 26, i32 30, i32 128, i32 132, i32 130, i32 134, i32 144, i32 148, i32 146, i32 150, i32 136, i32 140, i32 138, i32 142, i32 152, i32 156, i32 154, i32 158, i32 32, i32 36, i32 34, i32 38, i32 48, i32 52, i32 50, i32 54, i32 40, i32 44, i32 42, i32 46, i32 56, i32 60, i32 58, i32 62, i32 160, i32 164, i32 162, i32 166, i32 176, i32 180, i32 178, i32 182, i32 168, i32 172, i32 170, i32 174, i32 184, i32 188, i32 186, i32 190, i32 64, i32 68, i32 66, i32 70, i32 80, i32 84, i32 82, i32 86, i32 72, i32 76, i32 74, i32 78, i32 88, i32 92, i32 90, i32 94, i32 192, i32 196, i32 194, i32 198, i32 208, i32 212, i32 210, i32 214, i32 200, i32 204, i32 202, i32 206, i32 216, i32 220, i32 218, i32 222, i32 96, i32 100, i32 98, i32 102, i32 112, i32 116, i32 114, i32 118, i32 104, i32 108, i32 106, i32 110, i32 120, i32 124, i32 122, i32 126, i32 224, i32 228, i32 226, i32 230, i32 240, i32 244, i32 242, i32 246, i32 232, i32 236, i32 234, i32 238, i32 248, i32 252, i32 250, i32 254, i32 1, i32 5, i32 3, i32 7, i32 17, i32 21, i32 19, i32 23, i32 9, i32 13, i32 11, i32 15, i32 25, i32 29, i32 27, i32 31, i32 129, i32 133, i32 131, i32 135, i32 145, i32 149, i32 147, i32 151, i32 137, i32 141, i32 139, i32 143, i32 153, i32 157, i32 155, i32 159, i32 33, i32 37, i32 35, i32 39, i32 49, i32 53, i32 51, i32 55, i32 41, i32 45, i32 43, i32 47, i32 57, i32 61, i32 59, i32 63, i32 161, i32 165, i32 163, i32 167, i32 177, i32 181, i32 179, i32 183, i32 169, i32 173, i32 171, i32 175, i32 185, i32 189, i32 187, i32 191, i32 65, i32 69, i32 67, i32 71, i32 81, i32 85, i32 83, i32 87, i32 73, i32 77, i32 75, i32 79, i32 89, i32 93, i32 91, i32 95, i32 193, i32 197, i32 195, i32 199, i32 209, i32 213, i32 211, i32 215, i32 201, i32 205, i32 203, i32 207, i32 217, i32 221, i32 219, i32 223, i32 97, i32 101, i32 99, i32 103, i32 113, i32 117, i32 115, i32 119, i32 105, i32 109, i32 107, i32 111, i32 121, i32 125, i32 123, i32 127, i32 225, i32 229, i32 227, i32 231, i32 241, i32 245, i32 243, i32 247, i32 233, i32 237, i32 235, i32 239, i32 249, i32 253, i32 251, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_16: +; CHECK: [[REG16:r[0-9]+]] = #22 +; CHECK: vdeal(v1,v0,[[REG16]]) +define <256 x i8> @vdeal_16(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 4, i32 5, i32 16, i32 17, i32 20, i32 21, i32 8, i32 9, i32 12, i32 13, i32 24, i32 25, i32 28, i32 29, i32 128, i32 129, i32 132, i32 133, i32 144, i32 145, i32 148, i32 149, i32 136, i32 137, i32 140, i32 141, i32 152, i32 153, i32 156, i32 157, i32 32, i32 33, i32 36, i32 37, i32 48, i32 49, i32 52, i32 53, i32 40, i32 41, i32 44, i32 45, i32 56, i32 57, i32 60, i32 61, i32 160, i32 161, i32 164, i32 165, i32 176, i32 177, i32 180, i32 181, i32 168, i32 169, i32 172, i32 173, i32 184, i32 185, i32 188, i32 189, i32 64, i32 65, i32 68, i32 69, i32 80, i32 81, i32 84, i32 85, i32 72, i32 73, i32 76, i32 77, i32 88, i32 89, i32 92, i32 93, i32 192, i32 193, i32 196, i32 197, i32 208, i32 209, i32 212, i32 213, i32 200, i32 201, i32 204, i32 205, i32 216, i32 217, i32 220, i32 221, i32 96, i32 97, i32 100, i32 101, i32 112, i32 113, i32 116, i32 117, i32 104, i32 105, i32 108, i32 109, i32 120, i32 121, i32 124, i32 125, i32 224, i32 225, i32 228, i32 229, i32 240, i32 241, i32 244, i32 245, i32 232, i32 233, i32 236, i32 237, i32 248, i32 249, i32 252, i32 253, i32 2, i32 3, i32 6, i32 7, i32 18, i32 19, i32 22, i32 23, i32 10, i32 11, i32 14, i32 15, i32 26, i32 27, i32 30, i32 31, i32 130, i32 131, i32 134, i32 135, i32 146, i32 147, i32 150, i32 151, i32 138, i32 139, i32 142, i32 143, i32 154, i32 155, i32 158, i32 159, i32 34, i32 35, i32 38, i32 39, i32 50, i32 51, i32 54, i32 55, i32 42, i32 43, i32 46, i32 47, i32 58, i32 59, i32 62, i32 63, i32 162, i32 163, i32 166, i32 167, i32 178, i32 179, i32 182, i32 183, i32 170, i32 171, i32 174, i32 175, i32 186, i32 187, i32 190, i32 191, i32 66, i32 67, i32 70, i32 71, i32 82, i32 83, i32 86, i32 87, i32 74, i32 75, i32 78, i32 79, i32 90, i32 91, i32 94, i32 95, i32 194, i32 195, i32 198, i32 199, i32 210, i32 211, i32 214, i32 215, i32 202, i32 203, i32 206, i32 207, i32 218, i32 219, i32 222, i32 223, i32 98, i32 99, i32 102, i32 103, i32 114, i32 115, i32 118, i32 119, i32 106, i32 107, i32 110, i32 111, i32 122, i32 123, i32 126, i32 127, i32 226, i32 227, i32 230, i32 231, i32 242, i32 243, i32 246, i32 247, i32 234, i32 235, i32 238, i32 239, i32 250, i32 251, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_17: +; CHECK: [[REG17:r[0-9]+]] = #23 +; CHECK: vdeal(v1,v0,[[REG17]]) +define <256 x i8> @vdeal_17(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 2, i32 4, i32 6, i32 16, i32 18, i32 20, i32 22, i32 8, i32 10, i32 12, i32 14, i32 24, i32 26, i32 28, i32 30, i32 128, i32 130, i32 132, i32 134, i32 144, i32 146, i32 148, i32 150, i32 136, i32 138, i32 140, i32 142, i32 152, i32 154, i32 156, i32 158, i32 32, i32 34, i32 36, i32 38, i32 48, i32 50, i32 52, i32 54, i32 40, i32 42, i32 44, i32 46, i32 56, i32 58, i32 60, i32 62, i32 160, i32 162, i32 164, i32 166, i32 176, i32 178, i32 180, i32 182, i32 168, i32 170, i32 172, i32 174, i32 184, i32 186, i32 188, i32 190, i32 64, i32 66, i32 68, i32 70, i32 80, i32 82, i32 84, i32 86, i32 72, i32 74, i32 76, i32 78, i32 88, i32 90, i32 92, i32 94, i32 192, i32 194, i32 196, i32 198, i32 208, i32 210, i32 212, i32 214, i32 200, i32 202, i32 204, i32 206, i32 216, i32 218, i32 220, i32 222, i32 96, i32 98, i32 100, i32 102, i32 112, i32 114, i32 116, i32 118, i32 104, i32 106, i32 108, i32 110, i32 120, i32 122, i32 124, i32 126, i32 224, i32 226, i32 228, i32 230, i32 240, i32 242, i32 244, i32 246, i32 232, i32 234, i32 236, i32 238, i32 248, i32 250, i32 252, i32 254, i32 1, i32 3, i32 5, i32 7, i32 17, i32 19, i32 21, i32 23, i32 9, i32 11, i32 13, i32 15, i32 25, i32 27, i32 29, i32 31, i32 129, i32 131, i32 133, i32 135, i32 145, i32 147, i32 149, i32 151, i32 137, i32 139, i32 141, i32 143, i32 153, i32 155, i32 157, i32 159, i32 33, i32 35, i32 37, i32 39, i32 49, i32 51, i32 53, i32 55, i32 41, i32 43, i32 45, i32 47, i32 57, i32 59, i32 61, i32 63, i32 161, i32 163, i32 165, i32 167, i32 177, i32 179, i32 181, i32 183, i32 169, i32 171, i32 173, i32 175, i32 185, i32 187, i32 189, i32 191, i32 65, i32 67, i32 69, i32 71, i32 81, i32 83, i32 85, i32 87, i32 73, i32 75, i32 77, i32 79, i32 89, i32 91, i32 93, i32 95, i32 193, i32 195, i32 197, i32 199, i32 209, i32 211, i32 213, i32 215, i32 201, i32 203, i32 205, i32 207, i32 217, i32 219, i32 221, i32 223, i32 97, i32 99, i32 101, i32 103, i32 113, i32 115, i32 117, i32 119, i32 105, i32 107, i32 109, i32 111, i32 121, i32 123, i32 125, i32 127, i32 225, i32 227, i32 229, i32 231, i32 241, i32 243, i32 245, i32 247, i32 233, i32 235, i32 237, i32 239, i32 249, i32 251, i32 253, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_18: +; CHECK: [[REG18:r[0-9]+]] = #24 +; CHECK: vdeal(v1,v0,[[REG18]]) +define <256 x i8> @vdeal_18(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 128, i32 129, i32 130, i32 131, i32 132, i32 133, i32 134, i32 135, i32 144, i32 145, i32 146, i32 147, i32 148, i32 149, i32 150, i32 151, i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 48, i32 49, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 160, i32 161, i32 162, i32 163, i32 164, i32 165, i32 166, i32 167, i32 176, i32 177, i32 178, i32 179, i32 180, i32 181, i32 182, i32 183, i32 64, i32 65, i32 66, i32 67, i32 68, i32 69, i32 70, i32 71, i32 80, i32 81, i32 82, i32 83, i32 84, i32 85, i32 86, i32 87, i32 192, i32 193, i32 194, i32 195, i32 196, i32 197, i32 198, i32 199, i32 208, i32 209, i32 210, i32 211, i32 212, i32 213, i32 214, i32 215, i32 96, i32 97, i32 98, i32 99, i32 100, i32 101, i32 102, i32 103, i32 112, i32 113, i32 114, i32 115, i32 116, i32 117, i32 118, i32 119, i32 224, i32 225, i32 226, i32 227, i32 228, i32 229, i32 230, i32 231, i32 240, i32 241, i32 242, i32 243, i32 244, i32 245, i32 246, i32 247, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 136, i32 137, i32 138, i32 139, i32 140, i32 141, i32 142, i32 143, i32 152, i32 153, i32 154, i32 155, i32 156, i32 157, i32 158, i32 159, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63, i32 168, i32 169, i32 170, i32 171, i32 172, i32 173, i32 174, i32 175, i32 184, i32 185, i32 186, i32 187, i32 188, i32 189, i32 190, i32 191, i32 72, i32 73, i32 74, i32 75, i32 76, i32 77, i32 78, i32 79, i32 88, i32 89, i32 90, i32 91, i32 92, i32 93, i32 94, i32 95, i32 200, i32 201, i32 202, i32 203, i32 204, i32 205, i32 206, i32 207, i32 216, i32 217, i32 218, i32 219, i32 220, i32 221, i32 222, i32 223, i32 104, i32 105, i32 106, i32 107, i32 108, i32 109, i32 110, i32 111, i32 120, i32 121, i32 122, i32 123, i32 124, i32 125, i32 126, i32 127, i32 232, i32 233, i32 234, i32 235, i32 236, i32 237, i32 238, i32 239, i32 248, i32 249, i32 250, i32 251, i32 252, i32 253, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_19: +; CHECK: [[REG19:r[0-9]+]] = #25 +; CHECK: vdeal(v1,v0,[[REG19]]) +define <256 x i8> @vdeal_19(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14, i32 16, i32 24, i32 18, i32 26, i32 20, i32 28, i32 22, i32 30, i32 128, i32 136, i32 130, i32 138, i32 132, i32 140, i32 134, i32 142, i32 144, i32 152, i32 146, i32 154, i32 148, i32 156, i32 150, i32 158, i32 32, i32 40, i32 34, i32 42, i32 36, i32 44, i32 38, i32 46, i32 48, i32 56, i32 50, i32 58, i32 52, i32 60, i32 54, i32 62, i32 160, i32 168, i32 162, i32 170, i32 164, i32 172, i32 166, i32 174, i32 176, i32 184, i32 178, i32 186, i32 180, i32 188, i32 182, i32 190, i32 64, i32 72, i32 66, i32 74, i32 68, i32 76, i32 70, i32 78, i32 80, i32 88, i32 82, i32 90, i32 84, i32 92, i32 86, i32 94, i32 192, i32 200, i32 194, i32 202, i32 196, i32 204, i32 198, i32 206, i32 208, i32 216, i32 210, i32 218, i32 212, i32 220, i32 214, i32 222, i32 96, i32 104, i32 98, i32 106, i32 100, i32 108, i32 102, i32 110, i32 112, i32 120, i32 114, i32 122, i32 116, i32 124, i32 118, i32 126, i32 224, i32 232, i32 226, i32 234, i32 228, i32 236, i32 230, i32 238, i32 240, i32 248, i32 242, i32 250, i32 244, i32 252, i32 246, i32 254, i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15, i32 17, i32 25, i32 19, i32 27, i32 21, i32 29, i32 23, i32 31, i32 129, i32 137, i32 131, i32 139, i32 133, i32 141, i32 135, i32 143, i32 145, i32 153, i32 147, i32 155, i32 149, i32 157, i32 151, i32 159, i32 33, i32 41, i32 35, i32 43, i32 37, i32 45, i32 39, i32 47, i32 49, i32 57, i32 51, i32 59, i32 53, i32 61, i32 55, i32 63, i32 161, i32 169, i32 163, i32 171, i32 165, i32 173, i32 167, i32 175, i32 177, i32 185, i32 179, i32 187, i32 181, i32 189, i32 183, i32 191, i32 65, i32 73, i32 67, i32 75, i32 69, i32 77, i32 71, i32 79, i32 81, i32 89, i32 83, i32 91, i32 85, i32 93, i32 87, i32 95, i32 193, i32 201, i32 195, i32 203, i32 197, i32 205, i32 199, i32 207, i32 209, i32 217, i32 211, i32 219, i32 213, i32 221, i32 215, i32 223, i32 97, i32 105, i32 99, i32 107, i32 101, i32 109, i32 103, i32 111, i32 113, i32 121, i32 115, i32 123, i32 117, i32 125, i32 119, i32 127, i32 225, i32 233, i32 227, i32 235, i32 229, i32 237, i32 231, i32 239, i32 241, i32 249, i32 243, i32 251, i32 245, i32 253, i32 247, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_1a: +; CHECK: [[REG1a:r[0-9]+]] = #26 +; CHECK: vdeal(v1,v0,[[REG1a]]) +define <256 x i8> @vdeal_1a(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 8, i32 9, i32 4, i32 5, i32 12, i32 13, i32 16, i32 17, i32 24, i32 25, i32 20, i32 21, i32 28, i32 29, i32 128, i32 129, i32 136, i32 137, i32 132, i32 133, i32 140, i32 141, i32 144, i32 145, i32 152, i32 153, i32 148, i32 149, i32 156, i32 157, i32 32, i32 33, i32 40, i32 41, i32 36, i32 37, i32 44, i32 45, i32 48, i32 49, i32 56, i32 57, i32 52, i32 53, i32 60, i32 61, i32 160, i32 161, i32 168, i32 169, i32 164, i32 165, i32 172, i32 173, i32 176, i32 177, i32 184, i32 185, i32 180, i32 181, i32 188, i32 189, i32 64, i32 65, i32 72, i32 73, i32 68, i32 69, i32 76, i32 77, i32 80, i32 81, i32 88, i32 89, i32 84, i32 85, i32 92, i32 93, i32 192, i32 193, i32 200, i32 201, i32 196, i32 197, i32 204, i32 205, i32 208, i32 209, i32 216, i32 217, i32 212, i32 213, i32 220, i32 221, i32 96, i32 97, i32 104, i32 105, i32 100, i32 101, i32 108, i32 109, i32 112, i32 113, i32 120, i32 121, i32 116, i32 117, i32 124, i32 125, i32 224, i32 225, i32 232, i32 233, i32 228, i32 229, i32 236, i32 237, i32 240, i32 241, i32 248, i32 249, i32 244, i32 245, i32 252, i32 253, i32 2, i32 3, i32 10, i32 11, i32 6, i32 7, i32 14, i32 15, i32 18, i32 19, i32 26, i32 27, i32 22, i32 23, i32 30, i32 31, i32 130, i32 131, i32 138, i32 139, i32 134, i32 135, i32 142, i32 143, i32 146, i32 147, i32 154, i32 155, i32 150, i32 151, i32 158, i32 159, i32 34, i32 35, i32 42, i32 43, i32 38, i32 39, i32 46, i32 47, i32 50, i32 51, i32 58, i32 59, i32 54, i32 55, i32 62, i32 63, i32 162, i32 163, i32 170, i32 171, i32 166, i32 167, i32 174, i32 175, i32 178, i32 179, i32 186, i32 187, i32 182, i32 183, i32 190, i32 191, i32 66, i32 67, i32 74, i32 75, i32 70, i32 71, i32 78, i32 79, i32 82, i32 83, i32 90, i32 91, i32 86, i32 87, i32 94, i32 95, i32 194, i32 195, i32 202, i32 203, i32 198, i32 199, i32 206, i32 207, i32 210, i32 211, i32 218, i32 219, i32 214, i32 215, i32 222, i32 223, i32 98, i32 99, i32 106, i32 107, i32 102, i32 103, i32 110, i32 111, i32 114, i32 115, i32 122, i32 123, i32 118, i32 119, i32 126, i32 127, i32 226, i32 227, i32 234, i32 235, i32 230, i32 231, i32 238, i32 239, i32 242, i32 243, i32 250, i32 251, i32 246, i32 247, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_1b: +; CHECK: [[REG1b:r[0-9]+]] = #27 +; CHECK: vdeal(v1,v0,[[REG1b]]) +define <256 x i8> @vdeal_1b(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 2, i32 8, i32 10, i32 4, i32 6, i32 12, i32 14, i32 16, i32 18, i32 24, i32 26, i32 20, i32 22, i32 28, i32 30, i32 128, i32 130, i32 136, i32 138, i32 132, i32 134, i32 140, i32 142, i32 144, i32 146, i32 152, i32 154, i32 148, i32 150, i32 156, i32 158, i32 32, i32 34, i32 40, i32 42, i32 36, i32 38, i32 44, i32 46, i32 48, i32 50, i32 56, i32 58, i32 52, i32 54, i32 60, i32 62, i32 160, i32 162, i32 168, i32 170, i32 164, i32 166, i32 172, i32 174, i32 176, i32 178, i32 184, i32 186, i32 180, i32 182, i32 188, i32 190, i32 64, i32 66, i32 72, i32 74, i32 68, i32 70, i32 76, i32 78, i32 80, i32 82, i32 88, i32 90, i32 84, i32 86, i32 92, i32 94, i32 192, i32 194, i32 200, i32 202, i32 196, i32 198, i32 204, i32 206, i32 208, i32 210, i32 216, i32 218, i32 212, i32 214, i32 220, i32 222, i32 96, i32 98, i32 104, i32 106, i32 100, i32 102, i32 108, i32 110, i32 112, i32 114, i32 120, i32 122, i32 116, i32 118, i32 124, i32 126, i32 224, i32 226, i32 232, i32 234, i32 228, i32 230, i32 236, i32 238, i32 240, i32 242, i32 248, i32 250, i32 244, i32 246, i32 252, i32 254, i32 1, i32 3, i32 9, i32 11, i32 5, i32 7, i32 13, i32 15, i32 17, i32 19, i32 25, i32 27, i32 21, i32 23, i32 29, i32 31, i32 129, i32 131, i32 137, i32 139, i32 133, i32 135, i32 141, i32 143, i32 145, i32 147, i32 153, i32 155, i32 149, i32 151, i32 157, i32 159, i32 33, i32 35, i32 41, i32 43, i32 37, i32 39, i32 45, i32 47, i32 49, i32 51, i32 57, i32 59, i32 53, i32 55, i32 61, i32 63, i32 161, i32 163, i32 169, i32 171, i32 165, i32 167, i32 173, i32 175, i32 177, i32 179, i32 185, i32 187, i32 181, i32 183, i32 189, i32 191, i32 65, i32 67, i32 73, i32 75, i32 69, i32 71, i32 77, i32 79, i32 81, i32 83, i32 89, i32 91, i32 85, i32 87, i32 93, i32 95, i32 193, i32 195, i32 201, i32 203, i32 197, i32 199, i32 205, i32 207, i32 209, i32 211, i32 217, i32 219, i32 213, i32 215, i32 221, i32 223, i32 97, i32 99, i32 105, i32 107, i32 101, i32 103, i32 109, i32 111, i32 113, i32 115, i32 121, i32 123, i32 117, i32 119, i32 125, i32 127, i32 225, i32 227, i32 233, i32 235, i32 229, i32 231, i32 237, i32 239, i32 241, i32 243, i32 249, i32 251, i32 245, i32 247, i32 253, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_1c: +; CHECK: [[REG1c:r[0-9]+]] = #28 +; CHECK: vdeal(v1,v0,[[REG1c]]) +define <256 x i8> @vdeal_1c(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 10, i32 11, i32 16, i32 17, i32 18, i32 19, i32 24, i32 25, i32 26, i32 27, i32 128, i32 129, i32 130, i32 131, i32 136, i32 137, i32 138, i32 139, i32 144, i32 145, i32 146, i32 147, i32 152, i32 153, i32 154, i32 155, i32 32, i32 33, i32 34, i32 35, i32 40, i32 41, i32 42, i32 43, i32 48, i32 49, i32 50, i32 51, i32 56, i32 57, i32 58, i32 59, i32 160, i32 161, i32 162, i32 163, i32 168, i32 169, i32 170, i32 171, i32 176, i32 177, i32 178, i32 179, i32 184, i32 185, i32 186, i32 187, i32 64, i32 65, i32 66, i32 67, i32 72, i32 73, i32 74, i32 75, i32 80, i32 81, i32 82, i32 83, i32 88, i32 89, i32 90, i32 91, i32 192, i32 193, i32 194, i32 195, i32 200, i32 201, i32 202, i32 203, i32 208, i32 209, i32 210, i32 211, i32 216, i32 217, i32 218, i32 219, i32 96, i32 97, i32 98, i32 99, i32 104, i32 105, i32 106, i32 107, i32 112, i32 113, i32 114, i32 115, i32 120, i32 121, i32 122, i32 123, i32 224, i32 225, i32 226, i32 227, i32 232, i32 233, i32 234, i32 235, i32 240, i32 241, i32 242, i32 243, i32 248, i32 249, i32 250, i32 251, i32 4, i32 5, i32 6, i32 7, i32 12, i32 13, i32 14, i32 15, i32 20, i32 21, i32 22, i32 23, i32 28, i32 29, i32 30, i32 31, i32 132, i32 133, i32 134, i32 135, i32 140, i32 141, i32 142, i32 143, i32 148, i32 149, i32 150, i32 151, i32 156, i32 157, i32 158, i32 159, i32 36, i32 37, i32 38, i32 39, i32 44, i32 45, i32 46, i32 47, i32 52, i32 53, i32 54, i32 55, i32 60, i32 61, i32 62, i32 63, i32 164, i32 165, i32 166, i32 167, i32 172, i32 173, i32 174, i32 175, i32 180, i32 181, i32 182, i32 183, i32 188, i32 189, i32 190, i32 191, i32 68, i32 69, i32 70, i32 71, i32 76, i32 77, i32 78, i32 79, i32 84, i32 85, i32 86, i32 87, i32 92, i32 93, i32 94, i32 95, i32 196, i32 197, i32 198, i32 199, i32 204, i32 205, i32 206, i32 207, i32 212, i32 213, i32 214, i32 215, i32 220, i32 221, i32 222, i32 223, i32 100, i32 101, i32 102, i32 103, i32 108, i32 109, i32 110, i32 111, i32 116, i32 117, i32 118, i32 119, i32 124, i32 125, i32 126, i32 127, i32 228, i32 229, i32 230, i32 231, i32 236, i32 237, i32 238, i32 239, i32 244, i32 245, i32 246, i32 247, i32 252, i32 253, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_1d: +; CHECK: [[REG1d:r[0-9]+]] = #29 +; CHECK: vdeal(v1,v0,[[REG1d]]) +define <256 x i8> @vdeal_1d(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 4, i32 2, i32 6, i32 8, i32 12, i32 10, i32 14, i32 16, i32 20, i32 18, i32 22, i32 24, i32 28, i32 26, i32 30, i32 128, i32 132, i32 130, i32 134, i32 136, i32 140, i32 138, i32 142, i32 144, i32 148, i32 146, i32 150, i32 152, i32 156, i32 154, i32 158, i32 32, i32 36, i32 34, i32 38, i32 40, i32 44, i32 42, i32 46, i32 48, i32 52, i32 50, i32 54, i32 56, i32 60, i32 58, i32 62, i32 160, i32 164, i32 162, i32 166, i32 168, i32 172, i32 170, i32 174, i32 176, i32 180, i32 178, i32 182, i32 184, i32 188, i32 186, i32 190, i32 64, i32 68, i32 66, i32 70, i32 72, i32 76, i32 74, i32 78, i32 80, i32 84, i32 82, i32 86, i32 88, i32 92, i32 90, i32 94, i32 192, i32 196, i32 194, i32 198, i32 200, i32 204, i32 202, i32 206, i32 208, i32 212, i32 210, i32 214, i32 216, i32 220, i32 218, i32 222, i32 96, i32 100, i32 98, i32 102, i32 104, i32 108, i32 106, i32 110, i32 112, i32 116, i32 114, i32 118, i32 120, i32 124, i32 122, i32 126, i32 224, i32 228, i32 226, i32 230, i32 232, i32 236, i32 234, i32 238, i32 240, i32 244, i32 242, i32 246, i32 248, i32 252, i32 250, i32 254, i32 1, i32 5, i32 3, i32 7, i32 9, i32 13, i32 11, i32 15, i32 17, i32 21, i32 19, i32 23, i32 25, i32 29, i32 27, i32 31, i32 129, i32 133, i32 131, i32 135, i32 137, i32 141, i32 139, i32 143, i32 145, i32 149, i32 147, i32 151, i32 153, i32 157, i32 155, i32 159, i32 33, i32 37, i32 35, i32 39, i32 41, i32 45, i32 43, i32 47, i32 49, i32 53, i32 51, i32 55, i32 57, i32 61, i32 59, i32 63, i32 161, i32 165, i32 163, i32 167, i32 169, i32 173, i32 171, i32 175, i32 177, i32 181, i32 179, i32 183, i32 185, i32 189, i32 187, i32 191, i32 65, i32 69, i32 67, i32 71, i32 73, i32 77, i32 75, i32 79, i32 81, i32 85, i32 83, i32 87, i32 89, i32 93, i32 91, i32 95, i32 193, i32 197, i32 195, i32 199, i32 201, i32 205, i32 203, i32 207, i32 209, i32 213, i32 211, i32 215, i32 217, i32 221, i32 219, i32 223, i32 97, i32 101, i32 99, i32 103, i32 105, i32 109, i32 107, i32 111, i32 113, i32 117, i32 115, i32 119, i32 121, i32 125, i32 123, i32 127, i32 225, i32 229, i32 227, i32 231, i32 233, i32 237, i32 235, i32 239, i32 241, i32 245, i32 243, i32 247, i32 249, i32 253, i32 251, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_1e: +; CHECK: [[REG1e:r[0-9]+]] = #30 +; CHECK: vdeal(v1,v0,[[REG1e]]) +define <256 x i8> @vdeal_1e(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 4, i32 5, i32 8, i32 9, i32 12, i32 13, i32 16, i32 17, i32 20, i32 21, i32 24, i32 25, i32 28, i32 29, i32 128, i32 129, i32 132, i32 133, i32 136, i32 137, i32 140, i32 141, i32 144, i32 145, i32 148, i32 149, i32 152, i32 153, i32 156, i32 157, i32 32, i32 33, i32 36, i32 37, i32 40, i32 41, i32 44, i32 45, i32 48, i32 49, i32 52, i32 53, i32 56, i32 57, i32 60, i32 61, i32 160, i32 161, i32 164, i32 165, i32 168, i32 169, i32 172, i32 173, i32 176, i32 177, i32 180, i32 181, i32 184, i32 185, i32 188, i32 189, i32 64, i32 65, i32 68, i32 69, i32 72, i32 73, i32 76, i32 77, i32 80, i32 81, i32 84, i32 85, i32 88, i32 89, i32 92, i32 93, i32 192, i32 193, i32 196, i32 197, i32 200, i32 201, i32 204, i32 205, i32 208, i32 209, i32 212, i32 213, i32 216, i32 217, i32 220, i32 221, i32 96, i32 97, i32 100, i32 101, i32 104, i32 105, i32 108, i32 109, i32 112, i32 113, i32 116, i32 117, i32 120, i32 121, i32 124, i32 125, i32 224, i32 225, i32 228, i32 229, i32 232, i32 233, i32 236, i32 237, i32 240, i32 241, i32 244, i32 245, i32 248, i32 249, i32 252, i32 253, i32 2, i32 3, i32 6, i32 7, i32 10, i32 11, i32 14, i32 15, i32 18, i32 19, i32 22, i32 23, i32 26, i32 27, i32 30, i32 31, i32 130, i32 131, i32 134, i32 135, i32 138, i32 139, i32 142, i32 143, i32 146, i32 147, i32 150, i32 151, i32 154, i32 155, i32 158, i32 159, i32 34, i32 35, i32 38, i32 39, i32 42, i32 43, i32 46, i32 47, i32 50, i32 51, i32 54, i32 55, i32 58, i32 59, i32 62, i32 63, i32 162, i32 163, i32 166, i32 167, i32 170, i32 171, i32 174, i32 175, i32 178, i32 179, i32 182, i32 183, i32 186, i32 187, i32 190, i32 191, i32 66, i32 67, i32 70, i32 71, i32 74, i32 75, i32 78, i32 79, i32 82, i32 83, i32 86, i32 87, i32 90, i32 91, i32 94, i32 95, i32 194, i32 195, i32 198, i32 199, i32 202, i32 203, i32 206, i32 207, i32 210, i32 211, i32 214, i32 215, i32 218, i32 219, i32 222, i32 223, i32 98, i32 99, i32 102, i32 103, i32 106, i32 107, i32 110, i32 111, i32 114, i32 115, i32 118, i32 119, i32 122, i32 123, i32 126, i32 127, i32 226, i32 227, i32 230, i32 231, i32 234, i32 235, i32 238, i32 239, i32 242, i32 243, i32 246, i32 247, i32 250, i32 251, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_1f: +; CHECK: [[REG1f:r[0-9]+]] = #31 +; CHECK: vdeal(v1,v0,[[REG1f]]) +define <256 x i8> @vdeal_1f(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30, i32 128, i32 130, i32 132, i32 134, i32 136, i32 138, i32 140, i32 142, i32 144, i32 146, i32 148, i32 150, i32 152, i32 154, i32 156, i32 158, i32 32, i32 34, i32 36, i32 38, i32 40, i32 42, i32 44, i32 46, i32 48, i32 50, i32 52, i32 54, i32 56, i32 58, i32 60, i32 62, i32 160, i32 162, i32 164, i32 166, i32 168, i32 170, i32 172, i32 174, i32 176, i32 178, i32 180, i32 182, i32 184, i32 186, i32 188, i32 190, i32 64, i32 66, i32 68, i32 70, i32 72, i32 74, i32 76, i32 78, i32 80, i32 82, i32 84, i32 86, i32 88, i32 90, i32 92, i32 94, i32 192, i32 194, i32 196, i32 198, i32 200, i32 202, i32 204, i32 206, i32 208, i32 210, i32 212, i32 214, i32 216, i32 218, i32 220, i32 222, i32 96, i32 98, i32 100, i32 102, i32 104, i32 106, i32 108, i32 110, i32 112, i32 114, i32 116, i32 118, i32 120, i32 122, i32 124, i32 126, i32 224, i32 226, i32 228, i32 230, i32 232, i32 234, i32 236, i32 238, i32 240, i32 242, i32 244, i32 246, i32 248, i32 250, i32 252, i32 254, i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31, i32 129, i32 131, i32 133, i32 135, i32 137, i32 139, i32 141, i32 143, i32 145, i32 147, i32 149, i32 151, i32 153, i32 155, i32 157, i32 159, i32 33, i32 35, i32 37, i32 39, i32 41, i32 43, i32 45, i32 47, i32 49, i32 51, i32 53, i32 55, i32 57, i32 59, i32 61, i32 63, i32 161, i32 163, i32 165, i32 167, i32 169, i32 171, i32 173, i32 175, i32 177, i32 179, i32 181, i32 183, i32 185, i32 187, i32 189, i32 191, i32 65, i32 67, i32 69, i32 71, i32 73, i32 75, i32 77, i32 79, i32 81, i32 83, i32 85, i32 87, i32 89, i32 91, i32 93, i32 95, i32 193, i32 195, i32 197, i32 199, i32 201, i32 203, i32 205, i32 207, i32 209, i32 211, i32 213, i32 215, i32 217, i32 219, i32 221, i32 223, i32 97, i32 99, i32 101, i32 103, i32 105, i32 107, i32 109, i32 111, i32 113, i32 115, i32 117, i32 119, i32 121, i32 123, i32 125, i32 127, i32 225, i32 227, i32 229, i32 231, i32 233, i32 235, i32 237, i32 239, i32 241, i32 243, i32 245, i32 247, i32 249, i32 251, i32 253, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_20: +; CHECK: [[REG20:r[0-9]+]] = #32 +; CHECK: vshuff(v1,v0,[[REG20]]) +define <256 x i8> @vdeal_20(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 128, i32 129, i32 130, i32 131, i32 132, i32 133, i32 134, i32 135, i32 136, i32 137, i32 138, i32 139, i32 140, i32 141, i32 142, i32 143, i32 144, i32 145, i32 146, i32 147, i32 148, i32 149, i32 150, i32 151, i32 152, i32 153, i32 154, i32 155, i32 156, i32 157, i32 158, i32 159, i32 64, i32 65, i32 66, i32 67, i32 68, i32 69, i32 70, i32 71, i32 72, i32 73, i32 74, i32 75, i32 76, i32 77, i32 78, i32 79, i32 80, i32 81, i32 82, i32 83, i32 84, i32 85, i32 86, i32 87, i32 88, i32 89, i32 90, i32 91, i32 92, i32 93, i32 94, i32 95, i32 192, i32 193, i32 194, i32 195, i32 196, i32 197, i32 198, i32 199, i32 200, i32 201, i32 202, i32 203, i32 204, i32 205, i32 206, i32 207, i32 208, i32 209, i32 210, i32 211, i32 212, i32 213, i32 214, i32 215, i32 216, i32 217, i32 218, i32 219, i32 220, i32 221, i32 222, i32 223, i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 48, i32 49, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63, i32 160, i32 161, i32 162, i32 163, i32 164, i32 165, i32 166, i32 167, i32 168, i32 169, i32 170, i32 171, i32 172, i32 173, i32 174, i32 175, i32 176, i32 177, i32 178, i32 179, i32 180, i32 181, i32 182, i32 183, i32 184, i32 185, i32 186, i32 187, i32 188, i32 189, i32 190, i32 191, i32 96, i32 97, i32 98, i32 99, i32 100, i32 101, i32 102, i32 103, i32 104, i32 105, i32 106, i32 107, i32 108, i32 109, i32 110, i32 111, i32 112, i32 113, i32 114, i32 115, i32 116, i32 117, i32 118, i32 119, i32 120, i32 121, i32 122, i32 123, i32 124, i32 125, i32 126, i32 127, i32 224, i32 225, i32 226, i32 227, i32 228, i32 229, i32 230, i32 231, i32 232, i32 233, i32 234, i32 235, i32 236, i32 237, i32 238, i32 239, i32 240, i32 241, i32 242, i32 243, i32 244, i32 245, i32 246, i32 247, i32 248, i32 249, i32 250, i32 251, i32 252, i32 253, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_21: +; CHECK: [[REG21:r[0-9]+]] = #33 +; CHECK: vdeal(v1,v0,[[REG21]]) +define <256 x i8> @vdeal_21(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 32, i32 2, i32 34, i32 4, i32 36, i32 6, i32 38, i32 8, i32 40, i32 10, i32 42, i32 12, i32 44, i32 14, i32 46, i32 16, i32 48, i32 18, i32 50, i32 20, i32 52, i32 22, i32 54, i32 24, i32 56, i32 26, i32 58, i32 28, i32 60, i32 30, i32 62, i32 128, i32 160, i32 130, i32 162, i32 132, i32 164, i32 134, i32 166, i32 136, i32 168, i32 138, i32 170, i32 140, i32 172, i32 142, i32 174, i32 144, i32 176, i32 146, i32 178, i32 148, i32 180, i32 150, i32 182, i32 152, i32 184, i32 154, i32 186, i32 156, i32 188, i32 158, i32 190, i32 64, i32 96, i32 66, i32 98, i32 68, i32 100, i32 70, i32 102, i32 72, i32 104, i32 74, i32 106, i32 76, i32 108, i32 78, i32 110, i32 80, i32 112, i32 82, i32 114, i32 84, i32 116, i32 86, i32 118, i32 88, i32 120, i32 90, i32 122, i32 92, i32 124, i32 94, i32 126, i32 192, i32 224, i32 194, i32 226, i32 196, i32 228, i32 198, i32 230, i32 200, i32 232, i32 202, i32 234, i32 204, i32 236, i32 206, i32 238, i32 208, i32 240, i32 210, i32 242, i32 212, i32 244, i32 214, i32 246, i32 216, i32 248, i32 218, i32 250, i32 220, i32 252, i32 222, i32 254, i32 1, i32 33, i32 3, i32 35, i32 5, i32 37, i32 7, i32 39, i32 9, i32 41, i32 11, i32 43, i32 13, i32 45, i32 15, i32 47, i32 17, i32 49, i32 19, i32 51, i32 21, i32 53, i32 23, i32 55, i32 25, i32 57, i32 27, i32 59, i32 29, i32 61, i32 31, i32 63, i32 129, i32 161, i32 131, i32 163, i32 133, i32 165, i32 135, i32 167, i32 137, i32 169, i32 139, i32 171, i32 141, i32 173, i32 143, i32 175, i32 145, i32 177, i32 147, i32 179, i32 149, i32 181, i32 151, i32 183, i32 153, i32 185, i32 155, i32 187, i32 157, i32 189, i32 159, i32 191, i32 65, i32 97, i32 67, i32 99, i32 69, i32 101, i32 71, i32 103, i32 73, i32 105, i32 75, i32 107, i32 77, i32 109, i32 79, i32 111, i32 81, i32 113, i32 83, i32 115, i32 85, i32 117, i32 87, i32 119, i32 89, i32 121, i32 91, i32 123, i32 93, i32 125, i32 95, i32 127, i32 193, i32 225, i32 195, i32 227, i32 197, i32 229, i32 199, i32 231, i32 201, i32 233, i32 203, i32 235, i32 205, i32 237, i32 207, i32 239, i32 209, i32 241, i32 211, i32 243, i32 213, i32 245, i32 215, i32 247, i32 217, i32 249, i32 219, i32 251, i32 221, i32 253, i32 223, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_22: +; CHECK: [[REG22:r[0-9]+]] = #34 +; CHECK: vdeal(v1,v0,[[REG22]]) +define <256 x i8> @vdeal_22(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 32, i32 33, i32 4, i32 5, i32 36, i32 37, i32 8, i32 9, i32 40, i32 41, i32 12, i32 13, i32 44, i32 45, i32 16, i32 17, i32 48, i32 49, i32 20, i32 21, i32 52, i32 53, i32 24, i32 25, i32 56, i32 57, i32 28, i32 29, i32 60, i32 61, i32 128, i32 129, i32 160, i32 161, i32 132, i32 133, i32 164, i32 165, i32 136, i32 137, i32 168, i32 169, i32 140, i32 141, i32 172, i32 173, i32 144, i32 145, i32 176, i32 177, i32 148, i32 149, i32 180, i32 181, i32 152, i32 153, i32 184, i32 185, i32 156, i32 157, i32 188, i32 189, i32 64, i32 65, i32 96, i32 97, i32 68, i32 69, i32 100, i32 101, i32 72, i32 73, i32 104, i32 105, i32 76, i32 77, i32 108, i32 109, i32 80, i32 81, i32 112, i32 113, i32 84, i32 85, i32 116, i32 117, i32 88, i32 89, i32 120, i32 121, i32 92, i32 93, i32 124, i32 125, i32 192, i32 193, i32 224, i32 225, i32 196, i32 197, i32 228, i32 229, i32 200, i32 201, i32 232, i32 233, i32 204, i32 205, i32 236, i32 237, i32 208, i32 209, i32 240, i32 241, i32 212, i32 213, i32 244, i32 245, i32 216, i32 217, i32 248, i32 249, i32 220, i32 221, i32 252, i32 253, i32 2, i32 3, i32 34, i32 35, i32 6, i32 7, i32 38, i32 39, i32 10, i32 11, i32 42, i32 43, i32 14, i32 15, i32 46, i32 47, i32 18, i32 19, i32 50, i32 51, i32 22, i32 23, i32 54, i32 55, i32 26, i32 27, i32 58, i32 59, i32 30, i32 31, i32 62, i32 63, i32 130, i32 131, i32 162, i32 163, i32 134, i32 135, i32 166, i32 167, i32 138, i32 139, i32 170, i32 171, i32 142, i32 143, i32 174, i32 175, i32 146, i32 147, i32 178, i32 179, i32 150, i32 151, i32 182, i32 183, i32 154, i32 155, i32 186, i32 187, i32 158, i32 159, i32 190, i32 191, i32 66, i32 67, i32 98, i32 99, i32 70, i32 71, i32 102, i32 103, i32 74, i32 75, i32 106, i32 107, i32 78, i32 79, i32 110, i32 111, i32 82, i32 83, i32 114, i32 115, i32 86, i32 87, i32 118, i32 119, i32 90, i32 91, i32 122, i32 123, i32 94, i32 95, i32 126, i32 127, i32 194, i32 195, i32 226, i32 227, i32 198, i32 199, i32 230, i32 231, i32 202, i32 203, i32 234, i32 235, i32 206, i32 207, i32 238, i32 239, i32 210, i32 211, i32 242, i32 243, i32 214, i32 215, i32 246, i32 247, i32 218, i32 219, i32 250, i32 251, i32 222, i32 223, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_23: +; CHECK: [[REG23:r[0-9]+]] = #35 +; CHECK: vdeal(v1,v0,[[REG23]]) +define <256 x i8> @vdeal_23(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 2, i32 32, i32 34, i32 4, i32 6, i32 36, i32 38, i32 8, i32 10, i32 40, i32 42, i32 12, i32 14, i32 44, i32 46, i32 16, i32 18, i32 48, i32 50, i32 20, i32 22, i32 52, i32 54, i32 24, i32 26, i32 56, i32 58, i32 28, i32 30, i32 60, i32 62, i32 128, i32 130, i32 160, i32 162, i32 132, i32 134, i32 164, i32 166, i32 136, i32 138, i32 168, i32 170, i32 140, i32 142, i32 172, i32 174, i32 144, i32 146, i32 176, i32 178, i32 148, i32 150, i32 180, i32 182, i32 152, i32 154, i32 184, i32 186, i32 156, i32 158, i32 188, i32 190, i32 64, i32 66, i32 96, i32 98, i32 68, i32 70, i32 100, i32 102, i32 72, i32 74, i32 104, i32 106, i32 76, i32 78, i32 108, i32 110, i32 80, i32 82, i32 112, i32 114, i32 84, i32 86, i32 116, i32 118, i32 88, i32 90, i32 120, i32 122, i32 92, i32 94, i32 124, i32 126, i32 192, i32 194, i32 224, i32 226, i32 196, i32 198, i32 228, i32 230, i32 200, i32 202, i32 232, i32 234, i32 204, i32 206, i32 236, i32 238, i32 208, i32 210, i32 240, i32 242, i32 212, i32 214, i32 244, i32 246, i32 216, i32 218, i32 248, i32 250, i32 220, i32 222, i32 252, i32 254, i32 1, i32 3, i32 33, i32 35, i32 5, i32 7, i32 37, i32 39, i32 9, i32 11, i32 41, i32 43, i32 13, i32 15, i32 45, i32 47, i32 17, i32 19, i32 49, i32 51, i32 21, i32 23, i32 53, i32 55, i32 25, i32 27, i32 57, i32 59, i32 29, i32 31, i32 61, i32 63, i32 129, i32 131, i32 161, i32 163, i32 133, i32 135, i32 165, i32 167, i32 137, i32 139, i32 169, i32 171, i32 141, i32 143, i32 173, i32 175, i32 145, i32 147, i32 177, i32 179, i32 149, i32 151, i32 181, i32 183, i32 153, i32 155, i32 185, i32 187, i32 157, i32 159, i32 189, i32 191, i32 65, i32 67, i32 97, i32 99, i32 69, i32 71, i32 101, i32 103, i32 73, i32 75, i32 105, i32 107, i32 77, i32 79, i32 109, i32 111, i32 81, i32 83, i32 113, i32 115, i32 85, i32 87, i32 117, i32 119, i32 89, i32 91, i32 121, i32 123, i32 93, i32 95, i32 125, i32 127, i32 193, i32 195, i32 225, i32 227, i32 197, i32 199, i32 229, i32 231, i32 201, i32 203, i32 233, i32 235, i32 205, i32 207, i32 237, i32 239, i32 209, i32 211, i32 241, i32 243, i32 213, i32 215, i32 245, i32 247, i32 217, i32 219, i32 249, i32 251, i32 221, i32 223, i32 253, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_24: +; CHECK: [[REG24:r[0-9]+]] = #36 +; CHECK: vdeal(v1,v0,[[REG24]]) +define <256 x i8> @vdeal_24(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 2, i32 3, i32 32, i32 33, i32 34, i32 35, i32 8, i32 9, i32 10, i32 11, i32 40, i32 41, i32 42, i32 43, i32 16, i32 17, i32 18, i32 19, i32 48, i32 49, i32 50, i32 51, i32 24, i32 25, i32 26, i32 27, i32 56, i32 57, i32 58, i32 59, i32 128, i32 129, i32 130, i32 131, i32 160, i32 161, i32 162, i32 163, i32 136, i32 137, i32 138, i32 139, i32 168, i32 169, i32 170, i32 171, i32 144, i32 145, i32 146, i32 147, i32 176, i32 177, i32 178, i32 179, i32 152, i32 153, i32 154, i32 155, i32 184, i32 185, i32 186, i32 187, i32 64, i32 65, i32 66, i32 67, i32 96, i32 97, i32 98, i32 99, i32 72, i32 73, i32 74, i32 75, i32 104, i32 105, i32 106, i32 107, i32 80, i32 81, i32 82, i32 83, i32 112, i32 113, i32 114, i32 115, i32 88, i32 89, i32 90, i32 91, i32 120, i32 121, i32 122, i32 123, i32 192, i32 193, i32 194, i32 195, i32 224, i32 225, i32 226, i32 227, i32 200, i32 201, i32 202, i32 203, i32 232, i32 233, i32 234, i32 235, i32 208, i32 209, i32 210, i32 211, i32 240, i32 241, i32 242, i32 243, i32 216, i32 217, i32 218, i32 219, i32 248, i32 249, i32 250, i32 251, i32 4, i32 5, i32 6, i32 7, i32 36, i32 37, i32 38, i32 39, i32 12, i32 13, i32 14, i32 15, i32 44, i32 45, i32 46, i32 47, i32 20, i32 21, i32 22, i32 23, i32 52, i32 53, i32 54, i32 55, i32 28, i32 29, i32 30, i32 31, i32 60, i32 61, i32 62, i32 63, i32 132, i32 133, i32 134, i32 135, i32 164, i32 165, i32 166, i32 167, i32 140, i32 141, i32 142, i32 143, i32 172, i32 173, i32 174, i32 175, i32 148, i32 149, i32 150, i32 151, i32 180, i32 181, i32 182, i32 183, i32 156, i32 157, i32 158, i32 159, i32 188, i32 189, i32 190, i32 191, i32 68, i32 69, i32 70, i32 71, i32 100, i32 101, i32 102, i32 103, i32 76, i32 77, i32 78, i32 79, i32 108, i32 109, i32 110, i32 111, i32 84, i32 85, i32 86, i32 87, i32 116, i32 117, i32 118, i32 119, i32 92, i32 93, i32 94, i32 95, i32 124, i32 125, i32 126, i32 127, i32 196, i32 197, i32 198, i32 199, i32 228, i32 229, i32 230, i32 231, i32 204, i32 205, i32 206, i32 207, i32 236, i32 237, i32 238, i32 239, i32 212, i32 213, i32 214, i32 215, i32 244, i32 245, i32 246, i32 247, i32 220, i32 221, i32 222, i32 223, i32 252, i32 253, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_25: +; CHECK: [[REG25:r[0-9]+]] = #37 +; CHECK: vdeal(v1,v0,[[REG25]]) +define <256 x i8> @vdeal_25(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 4, i32 2, i32 6, i32 32, i32 36, i32 34, i32 38, i32 8, i32 12, i32 10, i32 14, i32 40, i32 44, i32 42, i32 46, i32 16, i32 20, i32 18, i32 22, i32 48, i32 52, i32 50, i32 54, i32 24, i32 28, i32 26, i32 30, i32 56, i32 60, i32 58, i32 62, i32 128, i32 132, i32 130, i32 134, i32 160, i32 164, i32 162, i32 166, i32 136, i32 140, i32 138, i32 142, i32 168, i32 172, i32 170, i32 174, i32 144, i32 148, i32 146, i32 150, i32 176, i32 180, i32 178, i32 182, i32 152, i32 156, i32 154, i32 158, i32 184, i32 188, i32 186, i32 190, i32 64, i32 68, i32 66, i32 70, i32 96, i32 100, i32 98, i32 102, i32 72, i32 76, i32 74, i32 78, i32 104, i32 108, i32 106, i32 110, i32 80, i32 84, i32 82, i32 86, i32 112, i32 116, i32 114, i32 118, i32 88, i32 92, i32 90, i32 94, i32 120, i32 124, i32 122, i32 126, i32 192, i32 196, i32 194, i32 198, i32 224, i32 228, i32 226, i32 230, i32 200, i32 204, i32 202, i32 206, i32 232, i32 236, i32 234, i32 238, i32 208, i32 212, i32 210, i32 214, i32 240, i32 244, i32 242, i32 246, i32 216, i32 220, i32 218, i32 222, i32 248, i32 252, i32 250, i32 254, i32 1, i32 5, i32 3, i32 7, i32 33, i32 37, i32 35, i32 39, i32 9, i32 13, i32 11, i32 15, i32 41, i32 45, i32 43, i32 47, i32 17, i32 21, i32 19, i32 23, i32 49, i32 53, i32 51, i32 55, i32 25, i32 29, i32 27, i32 31, i32 57, i32 61, i32 59, i32 63, i32 129, i32 133, i32 131, i32 135, i32 161, i32 165, i32 163, i32 167, i32 137, i32 141, i32 139, i32 143, i32 169, i32 173, i32 171, i32 175, i32 145, i32 149, i32 147, i32 151, i32 177, i32 181, i32 179, i32 183, i32 153, i32 157, i32 155, i32 159, i32 185, i32 189, i32 187, i32 191, i32 65, i32 69, i32 67, i32 71, i32 97, i32 101, i32 99, i32 103, i32 73, i32 77, i32 75, i32 79, i32 105, i32 109, i32 107, i32 111, i32 81, i32 85, i32 83, i32 87, i32 113, i32 117, i32 115, i32 119, i32 89, i32 93, i32 91, i32 95, i32 121, i32 125, i32 123, i32 127, i32 193, i32 197, i32 195, i32 199, i32 225, i32 229, i32 227, i32 231, i32 201, i32 205, i32 203, i32 207, i32 233, i32 237, i32 235, i32 239, i32 209, i32 213, i32 211, i32 215, i32 241, i32 245, i32 243, i32 247, i32 217, i32 221, i32 219, i32 223, i32 249, i32 253, i32 251, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_26: +; CHECK: [[REG26:r[0-9]+]] = #38 +; CHECK: vdeal(v1,v0,[[REG26]]) +define <256 x i8> @vdeal_26(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 4, i32 5, i32 32, i32 33, i32 36, i32 37, i32 8, i32 9, i32 12, i32 13, i32 40, i32 41, i32 44, i32 45, i32 16, i32 17, i32 20, i32 21, i32 48, i32 49, i32 52, i32 53, i32 24, i32 25, i32 28, i32 29, i32 56, i32 57, i32 60, i32 61, i32 128, i32 129, i32 132, i32 133, i32 160, i32 161, i32 164, i32 165, i32 136, i32 137, i32 140, i32 141, i32 168, i32 169, i32 172, i32 173, i32 144, i32 145, i32 148, i32 149, i32 176, i32 177, i32 180, i32 181, i32 152, i32 153, i32 156, i32 157, i32 184, i32 185, i32 188, i32 189, i32 64, i32 65, i32 68, i32 69, i32 96, i32 97, i32 100, i32 101, i32 72, i32 73, i32 76, i32 77, i32 104, i32 105, i32 108, i32 109, i32 80, i32 81, i32 84, i32 85, i32 112, i32 113, i32 116, i32 117, i32 88, i32 89, i32 92, i32 93, i32 120, i32 121, i32 124, i32 125, i32 192, i32 193, i32 196, i32 197, i32 224, i32 225, i32 228, i32 229, i32 200, i32 201, i32 204, i32 205, i32 232, i32 233, i32 236, i32 237, i32 208, i32 209, i32 212, i32 213, i32 240, i32 241, i32 244, i32 245, i32 216, i32 217, i32 220, i32 221, i32 248, i32 249, i32 252, i32 253, i32 2, i32 3, i32 6, i32 7, i32 34, i32 35, i32 38, i32 39, i32 10, i32 11, i32 14, i32 15, i32 42, i32 43, i32 46, i32 47, i32 18, i32 19, i32 22, i32 23, i32 50, i32 51, i32 54, i32 55, i32 26, i32 27, i32 30, i32 31, i32 58, i32 59, i32 62, i32 63, i32 130, i32 131, i32 134, i32 135, i32 162, i32 163, i32 166, i32 167, i32 138, i32 139, i32 142, i32 143, i32 170, i32 171, i32 174, i32 175, i32 146, i32 147, i32 150, i32 151, i32 178, i32 179, i32 182, i32 183, i32 154, i32 155, i32 158, i32 159, i32 186, i32 187, i32 190, i32 191, i32 66, i32 67, i32 70, i32 71, i32 98, i32 99, i32 102, i32 103, i32 74, i32 75, i32 78, i32 79, i32 106, i32 107, i32 110, i32 111, i32 82, i32 83, i32 86, i32 87, i32 114, i32 115, i32 118, i32 119, i32 90, i32 91, i32 94, i32 95, i32 122, i32 123, i32 126, i32 127, i32 194, i32 195, i32 198, i32 199, i32 226, i32 227, i32 230, i32 231, i32 202, i32 203, i32 206, i32 207, i32 234, i32 235, i32 238, i32 239, i32 210, i32 211, i32 214, i32 215, i32 242, i32 243, i32 246, i32 247, i32 218, i32 219, i32 222, i32 223, i32 250, i32 251, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_27: +; CHECK: [[REG27:r[0-9]+]] = #39 +; CHECK: vdeal(v1,v0,[[REG27]]) +define <256 x i8> @vdeal_27(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 2, i32 4, i32 6, i32 32, i32 34, i32 36, i32 38, i32 8, i32 10, i32 12, i32 14, i32 40, i32 42, i32 44, i32 46, i32 16, i32 18, i32 20, i32 22, i32 48, i32 50, i32 52, i32 54, i32 24, i32 26, i32 28, i32 30, i32 56, i32 58, i32 60, i32 62, i32 128, i32 130, i32 132, i32 134, i32 160, i32 162, i32 164, i32 166, i32 136, i32 138, i32 140, i32 142, i32 168, i32 170, i32 172, i32 174, i32 144, i32 146, i32 148, i32 150, i32 176, i32 178, i32 180, i32 182, i32 152, i32 154, i32 156, i32 158, i32 184, i32 186, i32 188, i32 190, i32 64, i32 66, i32 68, i32 70, i32 96, i32 98, i32 100, i32 102, i32 72, i32 74, i32 76, i32 78, i32 104, i32 106, i32 108, i32 110, i32 80, i32 82, i32 84, i32 86, i32 112, i32 114, i32 116, i32 118, i32 88, i32 90, i32 92, i32 94, i32 120, i32 122, i32 124, i32 126, i32 192, i32 194, i32 196, i32 198, i32 224, i32 226, i32 228, i32 230, i32 200, i32 202, i32 204, i32 206, i32 232, i32 234, i32 236, i32 238, i32 208, i32 210, i32 212, i32 214, i32 240, i32 242, i32 244, i32 246, i32 216, i32 218, i32 220, i32 222, i32 248, i32 250, i32 252, i32 254, i32 1, i32 3, i32 5, i32 7, i32 33, i32 35, i32 37, i32 39, i32 9, i32 11, i32 13, i32 15, i32 41, i32 43, i32 45, i32 47, i32 17, i32 19, i32 21, i32 23, i32 49, i32 51, i32 53, i32 55, i32 25, i32 27, i32 29, i32 31, i32 57, i32 59, i32 61, i32 63, i32 129, i32 131, i32 133, i32 135, i32 161, i32 163, i32 165, i32 167, i32 137, i32 139, i32 141, i32 143, i32 169, i32 171, i32 173, i32 175, i32 145, i32 147, i32 149, i32 151, i32 177, i32 179, i32 181, i32 183, i32 153, i32 155, i32 157, i32 159, i32 185, i32 187, i32 189, i32 191, i32 65, i32 67, i32 69, i32 71, i32 97, i32 99, i32 101, i32 103, i32 73, i32 75, i32 77, i32 79, i32 105, i32 107, i32 109, i32 111, i32 81, i32 83, i32 85, i32 87, i32 113, i32 115, i32 117, i32 119, i32 89, i32 91, i32 93, i32 95, i32 121, i32 123, i32 125, i32 127, i32 193, i32 195, i32 197, i32 199, i32 225, i32 227, i32 229, i32 231, i32 201, i32 203, i32 205, i32 207, i32 233, i32 235, i32 237, i32 239, i32 209, i32 211, i32 213, i32 215, i32 241, i32 243, i32 245, i32 247, i32 217, i32 219, i32 221, i32 223, i32 249, i32 251, i32 253, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_28: +; CHECK: [[REG28:r[0-9]+]] = #40 +; CHECK: vdeal(v1,v0,[[REG28]]) +define <256 x i8> @vdeal_28(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 48, i32 49, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 128, i32 129, i32 130, i32 131, i32 132, i32 133, i32 134, i32 135, i32 160, i32 161, i32 162, i32 163, i32 164, i32 165, i32 166, i32 167, i32 144, i32 145, i32 146, i32 147, i32 148, i32 149, i32 150, i32 151, i32 176, i32 177, i32 178, i32 179, i32 180, i32 181, i32 182, i32 183, i32 64, i32 65, i32 66, i32 67, i32 68, i32 69, i32 70, i32 71, i32 96, i32 97, i32 98, i32 99, i32 100, i32 101, i32 102, i32 103, i32 80, i32 81, i32 82, i32 83, i32 84, i32 85, i32 86, i32 87, i32 112, i32 113, i32 114, i32 115, i32 116, i32 117, i32 118, i32 119, i32 192, i32 193, i32 194, i32 195, i32 196, i32 197, i32 198, i32 199, i32 224, i32 225, i32 226, i32 227, i32 228, i32 229, i32 230, i32 231, i32 208, i32 209, i32 210, i32 211, i32 212, i32 213, i32 214, i32 215, i32 240, i32 241, i32 242, i32 243, i32 244, i32 245, i32 246, i32 247, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63, i32 136, i32 137, i32 138, i32 139, i32 140, i32 141, i32 142, i32 143, i32 168, i32 169, i32 170, i32 171, i32 172, i32 173, i32 174, i32 175, i32 152, i32 153, i32 154, i32 155, i32 156, i32 157, i32 158, i32 159, i32 184, i32 185, i32 186, i32 187, i32 188, i32 189, i32 190, i32 191, i32 72, i32 73, i32 74, i32 75, i32 76, i32 77, i32 78, i32 79, i32 104, i32 105, i32 106, i32 107, i32 108, i32 109, i32 110, i32 111, i32 88, i32 89, i32 90, i32 91, i32 92, i32 93, i32 94, i32 95, i32 120, i32 121, i32 122, i32 123, i32 124, i32 125, i32 126, i32 127, i32 200, i32 201, i32 202, i32 203, i32 204, i32 205, i32 206, i32 207, i32 232, i32 233, i32 234, i32 235, i32 236, i32 237, i32 238, i32 239, i32 216, i32 217, i32 218, i32 219, i32 220, i32 221, i32 222, i32 223, i32 248, i32 249, i32 250, i32 251, i32 252, i32 253, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_29: +; CHECK: [[REG29:r[0-9]+]] = #41 +; CHECK: vdeal(v1,v0,[[REG29]]) +define <256 x i8> @vdeal_29(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14, i32 32, i32 40, i32 34, i32 42, i32 36, i32 44, i32 38, i32 46, i32 16, i32 24, i32 18, i32 26, i32 20, i32 28, i32 22, i32 30, i32 48, i32 56, i32 50, i32 58, i32 52, i32 60, i32 54, i32 62, i32 128, i32 136, i32 130, i32 138, i32 132, i32 140, i32 134, i32 142, i32 160, i32 168, i32 162, i32 170, i32 164, i32 172, i32 166, i32 174, i32 144, i32 152, i32 146, i32 154, i32 148, i32 156, i32 150, i32 158, i32 176, i32 184, i32 178, i32 186, i32 180, i32 188, i32 182, i32 190, i32 64, i32 72, i32 66, i32 74, i32 68, i32 76, i32 70, i32 78, i32 96, i32 104, i32 98, i32 106, i32 100, i32 108, i32 102, i32 110, i32 80, i32 88, i32 82, i32 90, i32 84, i32 92, i32 86, i32 94, i32 112, i32 120, i32 114, i32 122, i32 116, i32 124, i32 118, i32 126, i32 192, i32 200, i32 194, i32 202, i32 196, i32 204, i32 198, i32 206, i32 224, i32 232, i32 226, i32 234, i32 228, i32 236, i32 230, i32 238, i32 208, i32 216, i32 210, i32 218, i32 212, i32 220, i32 214, i32 222, i32 240, i32 248, i32 242, i32 250, i32 244, i32 252, i32 246, i32 254, i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15, i32 33, i32 41, i32 35, i32 43, i32 37, i32 45, i32 39, i32 47, i32 17, i32 25, i32 19, i32 27, i32 21, i32 29, i32 23, i32 31, i32 49, i32 57, i32 51, i32 59, i32 53, i32 61, i32 55, i32 63, i32 129, i32 137, i32 131, i32 139, i32 133, i32 141, i32 135, i32 143, i32 161, i32 169, i32 163, i32 171, i32 165, i32 173, i32 167, i32 175, i32 145, i32 153, i32 147, i32 155, i32 149, i32 157, i32 151, i32 159, i32 177, i32 185, i32 179, i32 187, i32 181, i32 189, i32 183, i32 191, i32 65, i32 73, i32 67, i32 75, i32 69, i32 77, i32 71, i32 79, i32 97, i32 105, i32 99, i32 107, i32 101, i32 109, i32 103, i32 111, i32 81, i32 89, i32 83, i32 91, i32 85, i32 93, i32 87, i32 95, i32 113, i32 121, i32 115, i32 123, i32 117, i32 125, i32 119, i32 127, i32 193, i32 201, i32 195, i32 203, i32 197, i32 205, i32 199, i32 207, i32 225, i32 233, i32 227, i32 235, i32 229, i32 237, i32 231, i32 239, i32 209, i32 217, i32 211, i32 219, i32 213, i32 221, i32 215, i32 223, i32 241, i32 249, i32 243, i32 251, i32 245, i32 253, i32 247, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_2a: +; CHECK: [[REG2a:r[0-9]+]] = #42 +; CHECK: vdeal(v1,v0,[[REG2a]]) +define <256 x i8> @vdeal_2a(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 8, i32 9, i32 4, i32 5, i32 12, i32 13, i32 32, i32 33, i32 40, i32 41, i32 36, i32 37, i32 44, i32 45, i32 16, i32 17, i32 24, i32 25, i32 20, i32 21, i32 28, i32 29, i32 48, i32 49, i32 56, i32 57, i32 52, i32 53, i32 60, i32 61, i32 128, i32 129, i32 136, i32 137, i32 132, i32 133, i32 140, i32 141, i32 160, i32 161, i32 168, i32 169, i32 164, i32 165, i32 172, i32 173, i32 144, i32 145, i32 152, i32 153, i32 148, i32 149, i32 156, i32 157, i32 176, i32 177, i32 184, i32 185, i32 180, i32 181, i32 188, i32 189, i32 64, i32 65, i32 72, i32 73, i32 68, i32 69, i32 76, i32 77, i32 96, i32 97, i32 104, i32 105, i32 100, i32 101, i32 108, i32 109, i32 80, i32 81, i32 88, i32 89, i32 84, i32 85, i32 92, i32 93, i32 112, i32 113, i32 120, i32 121, i32 116, i32 117, i32 124, i32 125, i32 192, i32 193, i32 200, i32 201, i32 196, i32 197, i32 204, i32 205, i32 224, i32 225, i32 232, i32 233, i32 228, i32 229, i32 236, i32 237, i32 208, i32 209, i32 216, i32 217, i32 212, i32 213, i32 220, i32 221, i32 240, i32 241, i32 248, i32 249, i32 244, i32 245, i32 252, i32 253, i32 2, i32 3, i32 10, i32 11, i32 6, i32 7, i32 14, i32 15, i32 34, i32 35, i32 42, i32 43, i32 38, i32 39, i32 46, i32 47, i32 18, i32 19, i32 26, i32 27, i32 22, i32 23, i32 30, i32 31, i32 50, i32 51, i32 58, i32 59, i32 54, i32 55, i32 62, i32 63, i32 130, i32 131, i32 138, i32 139, i32 134, i32 135, i32 142, i32 143, i32 162, i32 163, i32 170, i32 171, i32 166, i32 167, i32 174, i32 175, i32 146, i32 147, i32 154, i32 155, i32 150, i32 151, i32 158, i32 159, i32 178, i32 179, i32 186, i32 187, i32 182, i32 183, i32 190, i32 191, i32 66, i32 67, i32 74, i32 75, i32 70, i32 71, i32 78, i32 79, i32 98, i32 99, i32 106, i32 107, i32 102, i32 103, i32 110, i32 111, i32 82, i32 83, i32 90, i32 91, i32 86, i32 87, i32 94, i32 95, i32 114, i32 115, i32 122, i32 123, i32 118, i32 119, i32 126, i32 127, i32 194, i32 195, i32 202, i32 203, i32 198, i32 199, i32 206, i32 207, i32 226, i32 227, i32 234, i32 235, i32 230, i32 231, i32 238, i32 239, i32 210, i32 211, i32 218, i32 219, i32 214, i32 215, i32 222, i32 223, i32 242, i32 243, i32 250, i32 251, i32 246, i32 247, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_2b: +; CHECK: [[REG2b:r[0-9]+]] = #43 +; CHECK: vdeal(v1,v0,[[REG2b]]) +define <256 x i8> @vdeal_2b(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 2, i32 8, i32 10, i32 4, i32 6, i32 12, i32 14, i32 32, i32 34, i32 40, i32 42, i32 36, i32 38, i32 44, i32 46, i32 16, i32 18, i32 24, i32 26, i32 20, i32 22, i32 28, i32 30, i32 48, i32 50, i32 56, i32 58, i32 52, i32 54, i32 60, i32 62, i32 128, i32 130, i32 136, i32 138, i32 132, i32 134, i32 140, i32 142, i32 160, i32 162, i32 168, i32 170, i32 164, i32 166, i32 172, i32 174, i32 144, i32 146, i32 152, i32 154, i32 148, i32 150, i32 156, i32 158, i32 176, i32 178, i32 184, i32 186, i32 180, i32 182, i32 188, i32 190, i32 64, i32 66, i32 72, i32 74, i32 68, i32 70, i32 76, i32 78, i32 96, i32 98, i32 104, i32 106, i32 100, i32 102, i32 108, i32 110, i32 80, i32 82, i32 88, i32 90, i32 84, i32 86, i32 92, i32 94, i32 112, i32 114, i32 120, i32 122, i32 116, i32 118, i32 124, i32 126, i32 192, i32 194, i32 200, i32 202, i32 196, i32 198, i32 204, i32 206, i32 224, i32 226, i32 232, i32 234, i32 228, i32 230, i32 236, i32 238, i32 208, i32 210, i32 216, i32 218, i32 212, i32 214, i32 220, i32 222, i32 240, i32 242, i32 248, i32 250, i32 244, i32 246, i32 252, i32 254, i32 1, i32 3, i32 9, i32 11, i32 5, i32 7, i32 13, i32 15, i32 33, i32 35, i32 41, i32 43, i32 37, i32 39, i32 45, i32 47, i32 17, i32 19, i32 25, i32 27, i32 21, i32 23, i32 29, i32 31, i32 49, i32 51, i32 57, i32 59, i32 53, i32 55, i32 61, i32 63, i32 129, i32 131, i32 137, i32 139, i32 133, i32 135, i32 141, i32 143, i32 161, i32 163, i32 169, i32 171, i32 165, i32 167, i32 173, i32 175, i32 145, i32 147, i32 153, i32 155, i32 149, i32 151, i32 157, i32 159, i32 177, i32 179, i32 185, i32 187, i32 181, i32 183, i32 189, i32 191, i32 65, i32 67, i32 73, i32 75, i32 69, i32 71, i32 77, i32 79, i32 97, i32 99, i32 105, i32 107, i32 101, i32 103, i32 109, i32 111, i32 81, i32 83, i32 89, i32 91, i32 85, i32 87, i32 93, i32 95, i32 113, i32 115, i32 121, i32 123, i32 117, i32 119, i32 125, i32 127, i32 193, i32 195, i32 201, i32 203, i32 197, i32 199, i32 205, i32 207, i32 225, i32 227, i32 233, i32 235, i32 229, i32 231, i32 237, i32 239, i32 209, i32 211, i32 217, i32 219, i32 213, i32 215, i32 221, i32 223, i32 241, i32 243, i32 249, i32 251, i32 245, i32 247, i32 253, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_2c: +; CHECK: [[REG2c:r[0-9]+]] = #44 +; CHECK: vdeal(v1,v0,[[REG2c]]) +define <256 x i8> @vdeal_2c(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 10, i32 11, i32 32, i32 33, i32 34, i32 35, i32 40, i32 41, i32 42, i32 43, i32 16, i32 17, i32 18, i32 19, i32 24, i32 25, i32 26, i32 27, i32 48, i32 49, i32 50, i32 51, i32 56, i32 57, i32 58, i32 59, i32 128, i32 129, i32 130, i32 131, i32 136, i32 137, i32 138, i32 139, i32 160, i32 161, i32 162, i32 163, i32 168, i32 169, i32 170, i32 171, i32 144, i32 145, i32 146, i32 147, i32 152, i32 153, i32 154, i32 155, i32 176, i32 177, i32 178, i32 179, i32 184, i32 185, i32 186, i32 187, i32 64, i32 65, i32 66, i32 67, i32 72, i32 73, i32 74, i32 75, i32 96, i32 97, i32 98, i32 99, i32 104, i32 105, i32 106, i32 107, i32 80, i32 81, i32 82, i32 83, i32 88, i32 89, i32 90, i32 91, i32 112, i32 113, i32 114, i32 115, i32 120, i32 121, i32 122, i32 123, i32 192, i32 193, i32 194, i32 195, i32 200, i32 201, i32 202, i32 203, i32 224, i32 225, i32 226, i32 227, i32 232, i32 233, i32 234, i32 235, i32 208, i32 209, i32 210, i32 211, i32 216, i32 217, i32 218, i32 219, i32 240, i32 241, i32 242, i32 243, i32 248, i32 249, i32 250, i32 251, i32 4, i32 5, i32 6, i32 7, i32 12, i32 13, i32 14, i32 15, i32 36, i32 37, i32 38, i32 39, i32 44, i32 45, i32 46, i32 47, i32 20, i32 21, i32 22, i32 23, i32 28, i32 29, i32 30, i32 31, i32 52, i32 53, i32 54, i32 55, i32 60, i32 61, i32 62, i32 63, i32 132, i32 133, i32 134, i32 135, i32 140, i32 141, i32 142, i32 143, i32 164, i32 165, i32 166, i32 167, i32 172, i32 173, i32 174, i32 175, i32 148, i32 149, i32 150, i32 151, i32 156, i32 157, i32 158, i32 159, i32 180, i32 181, i32 182, i32 183, i32 188, i32 189, i32 190, i32 191, i32 68, i32 69, i32 70, i32 71, i32 76, i32 77, i32 78, i32 79, i32 100, i32 101, i32 102, i32 103, i32 108, i32 109, i32 110, i32 111, i32 84, i32 85, i32 86, i32 87, i32 92, i32 93, i32 94, i32 95, i32 116, i32 117, i32 118, i32 119, i32 124, i32 125, i32 126, i32 127, i32 196, i32 197, i32 198, i32 199, i32 204, i32 205, i32 206, i32 207, i32 228, i32 229, i32 230, i32 231, i32 236, i32 237, i32 238, i32 239, i32 212, i32 213, i32 214, i32 215, i32 220, i32 221, i32 222, i32 223, i32 244, i32 245, i32 246, i32 247, i32 252, i32 253, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_2d: +; CHECK: [[REG2d:r[0-9]+]] = #45 +; CHECK: vdeal(v1,v0,[[REG2d]]) +define <256 x i8> @vdeal_2d(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 4, i32 2, i32 6, i32 8, i32 12, i32 10, i32 14, i32 32, i32 36, i32 34, i32 38, i32 40, i32 44, i32 42, i32 46, i32 16, i32 20, i32 18, i32 22, i32 24, i32 28, i32 26, i32 30, i32 48, i32 52, i32 50, i32 54, i32 56, i32 60, i32 58, i32 62, i32 128, i32 132, i32 130, i32 134, i32 136, i32 140, i32 138, i32 142, i32 160, i32 164, i32 162, i32 166, i32 168, i32 172, i32 170, i32 174, i32 144, i32 148, i32 146, i32 150, i32 152, i32 156, i32 154, i32 158, i32 176, i32 180, i32 178, i32 182, i32 184, i32 188, i32 186, i32 190, i32 64, i32 68, i32 66, i32 70, i32 72, i32 76, i32 74, i32 78, i32 96, i32 100, i32 98, i32 102, i32 104, i32 108, i32 106, i32 110, i32 80, i32 84, i32 82, i32 86, i32 88, i32 92, i32 90, i32 94, i32 112, i32 116, i32 114, i32 118, i32 120, i32 124, i32 122, i32 126, i32 192, i32 196, i32 194, i32 198, i32 200, i32 204, i32 202, i32 206, i32 224, i32 228, i32 226, i32 230, i32 232, i32 236, i32 234, i32 238, i32 208, i32 212, i32 210, i32 214, i32 216, i32 220, i32 218, i32 222, i32 240, i32 244, i32 242, i32 246, i32 248, i32 252, i32 250, i32 254, i32 1, i32 5, i32 3, i32 7, i32 9, i32 13, i32 11, i32 15, i32 33, i32 37, i32 35, i32 39, i32 41, i32 45, i32 43, i32 47, i32 17, i32 21, i32 19, i32 23, i32 25, i32 29, i32 27, i32 31, i32 49, i32 53, i32 51, i32 55, i32 57, i32 61, i32 59, i32 63, i32 129, i32 133, i32 131, i32 135, i32 137, i32 141, i32 139, i32 143, i32 161, i32 165, i32 163, i32 167, i32 169, i32 173, i32 171, i32 175, i32 145, i32 149, i32 147, i32 151, i32 153, i32 157, i32 155, i32 159, i32 177, i32 181, i32 179, i32 183, i32 185, i32 189, i32 187, i32 191, i32 65, i32 69, i32 67, i32 71, i32 73, i32 77, i32 75, i32 79, i32 97, i32 101, i32 99, i32 103, i32 105, i32 109, i32 107, i32 111, i32 81, i32 85, i32 83, i32 87, i32 89, i32 93, i32 91, i32 95, i32 113, i32 117, i32 115, i32 119, i32 121, i32 125, i32 123, i32 127, i32 193, i32 197, i32 195, i32 199, i32 201, i32 205, i32 203, i32 207, i32 225, i32 229, i32 227, i32 231, i32 233, i32 237, i32 235, i32 239, i32 209, i32 213, i32 211, i32 215, i32 217, i32 221, i32 219, i32 223, i32 241, i32 245, i32 243, i32 247, i32 249, i32 253, i32 251, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_2e: +; CHECK: [[REG2e:r[0-9]+]] = #46 +; CHECK: vdeal(v1,v0,[[REG2e]]) +define <256 x i8> @vdeal_2e(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 4, i32 5, i32 8, i32 9, i32 12, i32 13, i32 32, i32 33, i32 36, i32 37, i32 40, i32 41, i32 44, i32 45, i32 16, i32 17, i32 20, i32 21, i32 24, i32 25, i32 28, i32 29, i32 48, i32 49, i32 52, i32 53, i32 56, i32 57, i32 60, i32 61, i32 128, i32 129, i32 132, i32 133, i32 136, i32 137, i32 140, i32 141, i32 160, i32 161, i32 164, i32 165, i32 168, i32 169, i32 172, i32 173, i32 144, i32 145, i32 148, i32 149, i32 152, i32 153, i32 156, i32 157, i32 176, i32 177, i32 180, i32 181, i32 184, i32 185, i32 188, i32 189, i32 64, i32 65, i32 68, i32 69, i32 72, i32 73, i32 76, i32 77, i32 96, i32 97, i32 100, i32 101, i32 104, i32 105, i32 108, i32 109, i32 80, i32 81, i32 84, i32 85, i32 88, i32 89, i32 92, i32 93, i32 112, i32 113, i32 116, i32 117, i32 120, i32 121, i32 124, i32 125, i32 192, i32 193, i32 196, i32 197, i32 200, i32 201, i32 204, i32 205, i32 224, i32 225, i32 228, i32 229, i32 232, i32 233, i32 236, i32 237, i32 208, i32 209, i32 212, i32 213, i32 216, i32 217, i32 220, i32 221, i32 240, i32 241, i32 244, i32 245, i32 248, i32 249, i32 252, i32 253, i32 2, i32 3, i32 6, i32 7, i32 10, i32 11, i32 14, i32 15, i32 34, i32 35, i32 38, i32 39, i32 42, i32 43, i32 46, i32 47, i32 18, i32 19, i32 22, i32 23, i32 26, i32 27, i32 30, i32 31, i32 50, i32 51, i32 54, i32 55, i32 58, i32 59, i32 62, i32 63, i32 130, i32 131, i32 134, i32 135, i32 138, i32 139, i32 142, i32 143, i32 162, i32 163, i32 166, i32 167, i32 170, i32 171, i32 174, i32 175, i32 146, i32 147, i32 150, i32 151, i32 154, i32 155, i32 158, i32 159, i32 178, i32 179, i32 182, i32 183, i32 186, i32 187, i32 190, i32 191, i32 66, i32 67, i32 70, i32 71, i32 74, i32 75, i32 78, i32 79, i32 98, i32 99, i32 102, i32 103, i32 106, i32 107, i32 110, i32 111, i32 82, i32 83, i32 86, i32 87, i32 90, i32 91, i32 94, i32 95, i32 114, i32 115, i32 118, i32 119, i32 122, i32 123, i32 126, i32 127, i32 194, i32 195, i32 198, i32 199, i32 202, i32 203, i32 206, i32 207, i32 226, i32 227, i32 230, i32 231, i32 234, i32 235, i32 238, i32 239, i32 210, i32 211, i32 214, i32 215, i32 218, i32 219, i32 222, i32 223, i32 242, i32 243, i32 246, i32 247, i32 250, i32 251, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_2f: +; CHECK: [[REG2f:r[0-9]+]] = #47 +; CHECK: vdeal(v1,v0,[[REG2f]]) +define <256 x i8> @vdeal_2f(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 32, i32 34, i32 36, i32 38, i32 40, i32 42, i32 44, i32 46, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30, i32 48, i32 50, i32 52, i32 54, i32 56, i32 58, i32 60, i32 62, i32 128, i32 130, i32 132, i32 134, i32 136, i32 138, i32 140, i32 142, i32 160, i32 162, i32 164, i32 166, i32 168, i32 170, i32 172, i32 174, i32 144, i32 146, i32 148, i32 150, i32 152, i32 154, i32 156, i32 158, i32 176, i32 178, i32 180, i32 182, i32 184, i32 186, i32 188, i32 190, i32 64, i32 66, i32 68, i32 70, i32 72, i32 74, i32 76, i32 78, i32 96, i32 98, i32 100, i32 102, i32 104, i32 106, i32 108, i32 110, i32 80, i32 82, i32 84, i32 86, i32 88, i32 90, i32 92, i32 94, i32 112, i32 114, i32 116, i32 118, i32 120, i32 122, i32 124, i32 126, i32 192, i32 194, i32 196, i32 198, i32 200, i32 202, i32 204, i32 206, i32 224, i32 226, i32 228, i32 230, i32 232, i32 234, i32 236, i32 238, i32 208, i32 210, i32 212, i32 214, i32 216, i32 218, i32 220, i32 222, i32 240, i32 242, i32 244, i32 246, i32 248, i32 250, i32 252, i32 254, i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 33, i32 35, i32 37, i32 39, i32 41, i32 43, i32 45, i32 47, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31, i32 49, i32 51, i32 53, i32 55, i32 57, i32 59, i32 61, i32 63, i32 129, i32 131, i32 133, i32 135, i32 137, i32 139, i32 141, i32 143, i32 161, i32 163, i32 165, i32 167, i32 169, i32 171, i32 173, i32 175, i32 145, i32 147, i32 149, i32 151, i32 153, i32 155, i32 157, i32 159, i32 177, i32 179, i32 181, i32 183, i32 185, i32 187, i32 189, i32 191, i32 65, i32 67, i32 69, i32 71, i32 73, i32 75, i32 77, i32 79, i32 97, i32 99, i32 101, i32 103, i32 105, i32 107, i32 109, i32 111, i32 81, i32 83, i32 85, i32 87, i32 89, i32 91, i32 93, i32 95, i32 113, i32 115, i32 117, i32 119, i32 121, i32 123, i32 125, i32 127, i32 193, i32 195, i32 197, i32 199, i32 201, i32 203, i32 205, i32 207, i32 225, i32 227, i32 229, i32 231, i32 233, i32 235, i32 237, i32 239, i32 209, i32 211, i32 213, i32 215, i32 217, i32 219, i32 221, i32 223, i32 241, i32 243, i32 245, i32 247, i32 249, i32 251, i32 253, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_30: +; CHECK: [[REG30:r[0-9]+]] = #48 +; CHECK: vdeal(v1,v0,[[REG30]]) +define <256 x i8> @vdeal_30(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 128, i32 129, i32 130, i32 131, i32 132, i32 133, i32 134, i32 135, i32 136, i32 137, i32 138, i32 139, i32 140, i32 141, i32 142, i32 143, i32 160, i32 161, i32 162, i32 163, i32 164, i32 165, i32 166, i32 167, i32 168, i32 169, i32 170, i32 171, i32 172, i32 173, i32 174, i32 175, i32 64, i32 65, i32 66, i32 67, i32 68, i32 69, i32 70, i32 71, i32 72, i32 73, i32 74, i32 75, i32 76, i32 77, i32 78, i32 79, i32 96, i32 97, i32 98, i32 99, i32 100, i32 101, i32 102, i32 103, i32 104, i32 105, i32 106, i32 107, i32 108, i32 109, i32 110, i32 111, i32 192, i32 193, i32 194, i32 195, i32 196, i32 197, i32 198, i32 199, i32 200, i32 201, i32 202, i32 203, i32 204, i32 205, i32 206, i32 207, i32 224, i32 225, i32 226, i32 227, i32 228, i32 229, i32 230, i32 231, i32 232, i32 233, i32 234, i32 235, i32 236, i32 237, i32 238, i32 239, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 48, i32 49, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63, i32 144, i32 145, i32 146, i32 147, i32 148, i32 149, i32 150, i32 151, i32 152, i32 153, i32 154, i32 155, i32 156, i32 157, i32 158, i32 159, i32 176, i32 177, i32 178, i32 179, i32 180, i32 181, i32 182, i32 183, i32 184, i32 185, i32 186, i32 187, i32 188, i32 189, i32 190, i32 191, i32 80, i32 81, i32 82, i32 83, i32 84, i32 85, i32 86, i32 87, i32 88, i32 89, i32 90, i32 91, i32 92, i32 93, i32 94, i32 95, i32 112, i32 113, i32 114, i32 115, i32 116, i32 117, i32 118, i32 119, i32 120, i32 121, i32 122, i32 123, i32 124, i32 125, i32 126, i32 127, i32 208, i32 209, i32 210, i32 211, i32 212, i32 213, i32 214, i32 215, i32 216, i32 217, i32 218, i32 219, i32 220, i32 221, i32 222, i32 223, i32 240, i32 241, i32 242, i32 243, i32 244, i32 245, i32 246, i32 247, i32 248, i32 249, i32 250, i32 251, i32 252, i32 253, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_31: +; CHECK: [[REG31:r[0-9]+]] = #49 +; CHECK: vdeal(v1,v0,[[REG31]]) +define <256 x i8> @vdeal_31(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 16, i32 2, i32 18, i32 4, i32 20, i32 6, i32 22, i32 8, i32 24, i32 10, i32 26, i32 12, i32 28, i32 14, i32 30, i32 32, i32 48, i32 34, i32 50, i32 36, i32 52, i32 38, i32 54, i32 40, i32 56, i32 42, i32 58, i32 44, i32 60, i32 46, i32 62, i32 128, i32 144, i32 130, i32 146, i32 132, i32 148, i32 134, i32 150, i32 136, i32 152, i32 138, i32 154, i32 140, i32 156, i32 142, i32 158, i32 160, i32 176, i32 162, i32 178, i32 164, i32 180, i32 166, i32 182, i32 168, i32 184, i32 170, i32 186, i32 172, i32 188, i32 174, i32 190, i32 64, i32 80, i32 66, i32 82, i32 68, i32 84, i32 70, i32 86, i32 72, i32 88, i32 74, i32 90, i32 76, i32 92, i32 78, i32 94, i32 96, i32 112, i32 98, i32 114, i32 100, i32 116, i32 102, i32 118, i32 104, i32 120, i32 106, i32 122, i32 108, i32 124, i32 110, i32 126, i32 192, i32 208, i32 194, i32 210, i32 196, i32 212, i32 198, i32 214, i32 200, i32 216, i32 202, i32 218, i32 204, i32 220, i32 206, i32 222, i32 224, i32 240, i32 226, i32 242, i32 228, i32 244, i32 230, i32 246, i32 232, i32 248, i32 234, i32 250, i32 236, i32 252, i32 238, i32 254, i32 1, i32 17, i32 3, i32 19, i32 5, i32 21, i32 7, i32 23, i32 9, i32 25, i32 11, i32 27, i32 13, i32 29, i32 15, i32 31, i32 33, i32 49, i32 35, i32 51, i32 37, i32 53, i32 39, i32 55, i32 41, i32 57, i32 43, i32 59, i32 45, i32 61, i32 47, i32 63, i32 129, i32 145, i32 131, i32 147, i32 133, i32 149, i32 135, i32 151, i32 137, i32 153, i32 139, i32 155, i32 141, i32 157, i32 143, i32 159, i32 161, i32 177, i32 163, i32 179, i32 165, i32 181, i32 167, i32 183, i32 169, i32 185, i32 171, i32 187, i32 173, i32 189, i32 175, i32 191, i32 65, i32 81, i32 67, i32 83, i32 69, i32 85, i32 71, i32 87, i32 73, i32 89, i32 75, i32 91, i32 77, i32 93, i32 79, i32 95, i32 97, i32 113, i32 99, i32 115, i32 101, i32 117, i32 103, i32 119, i32 105, i32 121, i32 107, i32 123, i32 109, i32 125, i32 111, i32 127, i32 193, i32 209, i32 195, i32 211, i32 197, i32 213, i32 199, i32 215, i32 201, i32 217, i32 203, i32 219, i32 205, i32 221, i32 207, i32 223, i32 225, i32 241, i32 227, i32 243, i32 229, i32 245, i32 231, i32 247, i32 233, i32 249, i32 235, i32 251, i32 237, i32 253, i32 239, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_32: +; CHECK: [[REG32:r[0-9]+]] = #50 +; CHECK: vdeal(v1,v0,[[REG32]]) +define <256 x i8> @vdeal_32(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 16, i32 17, i32 4, i32 5, i32 20, i32 21, i32 8, i32 9, i32 24, i32 25, i32 12, i32 13, i32 28, i32 29, i32 32, i32 33, i32 48, i32 49, i32 36, i32 37, i32 52, i32 53, i32 40, i32 41, i32 56, i32 57, i32 44, i32 45, i32 60, i32 61, i32 128, i32 129, i32 144, i32 145, i32 132, i32 133, i32 148, i32 149, i32 136, i32 137, i32 152, i32 153, i32 140, i32 141, i32 156, i32 157, i32 160, i32 161, i32 176, i32 177, i32 164, i32 165, i32 180, i32 181, i32 168, i32 169, i32 184, i32 185, i32 172, i32 173, i32 188, i32 189, i32 64, i32 65, i32 80, i32 81, i32 68, i32 69, i32 84, i32 85, i32 72, i32 73, i32 88, i32 89, i32 76, i32 77, i32 92, i32 93, i32 96, i32 97, i32 112, i32 113, i32 100, i32 101, i32 116, i32 117, i32 104, i32 105, i32 120, i32 121, i32 108, i32 109, i32 124, i32 125, i32 192, i32 193, i32 208, i32 209, i32 196, i32 197, i32 212, i32 213, i32 200, i32 201, i32 216, i32 217, i32 204, i32 205, i32 220, i32 221, i32 224, i32 225, i32 240, i32 241, i32 228, i32 229, i32 244, i32 245, i32 232, i32 233, i32 248, i32 249, i32 236, i32 237, i32 252, i32 253, i32 2, i32 3, i32 18, i32 19, i32 6, i32 7, i32 22, i32 23, i32 10, i32 11, i32 26, i32 27, i32 14, i32 15, i32 30, i32 31, i32 34, i32 35, i32 50, i32 51, i32 38, i32 39, i32 54, i32 55, i32 42, i32 43, i32 58, i32 59, i32 46, i32 47, i32 62, i32 63, i32 130, i32 131, i32 146, i32 147, i32 134, i32 135, i32 150, i32 151, i32 138, i32 139, i32 154, i32 155, i32 142, i32 143, i32 158, i32 159, i32 162, i32 163, i32 178, i32 179, i32 166, i32 167, i32 182, i32 183, i32 170, i32 171, i32 186, i32 187, i32 174, i32 175, i32 190, i32 191, i32 66, i32 67, i32 82, i32 83, i32 70, i32 71, i32 86, i32 87, i32 74, i32 75, i32 90, i32 91, i32 78, i32 79, i32 94, i32 95, i32 98, i32 99, i32 114, i32 115, i32 102, i32 103, i32 118, i32 119, i32 106, i32 107, i32 122, i32 123, i32 110, i32 111, i32 126, i32 127, i32 194, i32 195, i32 210, i32 211, i32 198, i32 199, i32 214, i32 215, i32 202, i32 203, i32 218, i32 219, i32 206, i32 207, i32 222, i32 223, i32 226, i32 227, i32 242, i32 243, i32 230, i32 231, i32 246, i32 247, i32 234, i32 235, i32 250, i32 251, i32 238, i32 239, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_33: +; CHECK: [[REG33:r[0-9]+]] = #51 +; CHECK: vdeal(v1,v0,[[REG33]]) +define <256 x i8> @vdeal_33(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 2, i32 16, i32 18, i32 4, i32 6, i32 20, i32 22, i32 8, i32 10, i32 24, i32 26, i32 12, i32 14, i32 28, i32 30, i32 32, i32 34, i32 48, i32 50, i32 36, i32 38, i32 52, i32 54, i32 40, i32 42, i32 56, i32 58, i32 44, i32 46, i32 60, i32 62, i32 128, i32 130, i32 144, i32 146, i32 132, i32 134, i32 148, i32 150, i32 136, i32 138, i32 152, i32 154, i32 140, i32 142, i32 156, i32 158, i32 160, i32 162, i32 176, i32 178, i32 164, i32 166, i32 180, i32 182, i32 168, i32 170, i32 184, i32 186, i32 172, i32 174, i32 188, i32 190, i32 64, i32 66, i32 80, i32 82, i32 68, i32 70, i32 84, i32 86, i32 72, i32 74, i32 88, i32 90, i32 76, i32 78, i32 92, i32 94, i32 96, i32 98, i32 112, i32 114, i32 100, i32 102, i32 116, i32 118, i32 104, i32 106, i32 120, i32 122, i32 108, i32 110, i32 124, i32 126, i32 192, i32 194, i32 208, i32 210, i32 196, i32 198, i32 212, i32 214, i32 200, i32 202, i32 216, i32 218, i32 204, i32 206, i32 220, i32 222, i32 224, i32 226, i32 240, i32 242, i32 228, i32 230, i32 244, i32 246, i32 232, i32 234, i32 248, i32 250, i32 236, i32 238, i32 252, i32 254, i32 1, i32 3, i32 17, i32 19, i32 5, i32 7, i32 21, i32 23, i32 9, i32 11, i32 25, i32 27, i32 13, i32 15, i32 29, i32 31, i32 33, i32 35, i32 49, i32 51, i32 37, i32 39, i32 53, i32 55, i32 41, i32 43, i32 57, i32 59, i32 45, i32 47, i32 61, i32 63, i32 129, i32 131, i32 145, i32 147, i32 133, i32 135, i32 149, i32 151, i32 137, i32 139, i32 153, i32 155, i32 141, i32 143, i32 157, i32 159, i32 161, i32 163, i32 177, i32 179, i32 165, i32 167, i32 181, i32 183, i32 169, i32 171, i32 185, i32 187, i32 173, i32 175, i32 189, i32 191, i32 65, i32 67, i32 81, i32 83, i32 69, i32 71, i32 85, i32 87, i32 73, i32 75, i32 89, i32 91, i32 77, i32 79, i32 93, i32 95, i32 97, i32 99, i32 113, i32 115, i32 101, i32 103, i32 117, i32 119, i32 105, i32 107, i32 121, i32 123, i32 109, i32 111, i32 125, i32 127, i32 193, i32 195, i32 209, i32 211, i32 197, i32 199, i32 213, i32 215, i32 201, i32 203, i32 217, i32 219, i32 205, i32 207, i32 221, i32 223, i32 225, i32 227, i32 241, i32 243, i32 229, i32 231, i32 245, i32 247, i32 233, i32 235, i32 249, i32 251, i32 237, i32 239, i32 253, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_34: +; CHECK: [[REG34:r[0-9]+]] = #52 +; CHECK: vdeal(v1,v0,[[REG34]]) +define <256 x i8> @vdeal_34(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 2, i32 3, i32 16, i32 17, i32 18, i32 19, i32 8, i32 9, i32 10, i32 11, i32 24, i32 25, i32 26, i32 27, i32 32, i32 33, i32 34, i32 35, i32 48, i32 49, i32 50, i32 51, i32 40, i32 41, i32 42, i32 43, i32 56, i32 57, i32 58, i32 59, i32 128, i32 129, i32 130, i32 131, i32 144, i32 145, i32 146, i32 147, i32 136, i32 137, i32 138, i32 139, i32 152, i32 153, i32 154, i32 155, i32 160, i32 161, i32 162, i32 163, i32 176, i32 177, i32 178, i32 179, i32 168, i32 169, i32 170, i32 171, i32 184, i32 185, i32 186, i32 187, i32 64, i32 65, i32 66, i32 67, i32 80, i32 81, i32 82, i32 83, i32 72, i32 73, i32 74, i32 75, i32 88, i32 89, i32 90, i32 91, i32 96, i32 97, i32 98, i32 99, i32 112, i32 113, i32 114, i32 115, i32 104, i32 105, i32 106, i32 107, i32 120, i32 121, i32 122, i32 123, i32 192, i32 193, i32 194, i32 195, i32 208, i32 209, i32 210, i32 211, i32 200, i32 201, i32 202, i32 203, i32 216, i32 217, i32 218, i32 219, i32 224, i32 225, i32 226, i32 227, i32 240, i32 241, i32 242, i32 243, i32 232, i32 233, i32 234, i32 235, i32 248, i32 249, i32 250, i32 251, i32 4, i32 5, i32 6, i32 7, i32 20, i32 21, i32 22, i32 23, i32 12, i32 13, i32 14, i32 15, i32 28, i32 29, i32 30, i32 31, i32 36, i32 37, i32 38, i32 39, i32 52, i32 53, i32 54, i32 55, i32 44, i32 45, i32 46, i32 47, i32 60, i32 61, i32 62, i32 63, i32 132, i32 133, i32 134, i32 135, i32 148, i32 149, i32 150, i32 151, i32 140, i32 141, i32 142, i32 143, i32 156, i32 157, i32 158, i32 159, i32 164, i32 165, i32 166, i32 167, i32 180, i32 181, i32 182, i32 183, i32 172, i32 173, i32 174, i32 175, i32 188, i32 189, i32 190, i32 191, i32 68, i32 69, i32 70, i32 71, i32 84, i32 85, i32 86, i32 87, i32 76, i32 77, i32 78, i32 79, i32 92, i32 93, i32 94, i32 95, i32 100, i32 101, i32 102, i32 103, i32 116, i32 117, i32 118, i32 119, i32 108, i32 109, i32 110, i32 111, i32 124, i32 125, i32 126, i32 127, i32 196, i32 197, i32 198, i32 199, i32 212, i32 213, i32 214, i32 215, i32 204, i32 205, i32 206, i32 207, i32 220, i32 221, i32 222, i32 223, i32 228, i32 229, i32 230, i32 231, i32 244, i32 245, i32 246, i32 247, i32 236, i32 237, i32 238, i32 239, i32 252, i32 253, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_35: +; CHECK: [[REG35:r[0-9]+]] = #53 +; CHECK: vdeal(v1,v0,[[REG35]]) +define <256 x i8> @vdeal_35(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 4, i32 2, i32 6, i32 16, i32 20, i32 18, i32 22, i32 8, i32 12, i32 10, i32 14, i32 24, i32 28, i32 26, i32 30, i32 32, i32 36, i32 34, i32 38, i32 48, i32 52, i32 50, i32 54, i32 40, i32 44, i32 42, i32 46, i32 56, i32 60, i32 58, i32 62, i32 128, i32 132, i32 130, i32 134, i32 144, i32 148, i32 146, i32 150, i32 136, i32 140, i32 138, i32 142, i32 152, i32 156, i32 154, i32 158, i32 160, i32 164, i32 162, i32 166, i32 176, i32 180, i32 178, i32 182, i32 168, i32 172, i32 170, i32 174, i32 184, i32 188, i32 186, i32 190, i32 64, i32 68, i32 66, i32 70, i32 80, i32 84, i32 82, i32 86, i32 72, i32 76, i32 74, i32 78, i32 88, i32 92, i32 90, i32 94, i32 96, i32 100, i32 98, i32 102, i32 112, i32 116, i32 114, i32 118, i32 104, i32 108, i32 106, i32 110, i32 120, i32 124, i32 122, i32 126, i32 192, i32 196, i32 194, i32 198, i32 208, i32 212, i32 210, i32 214, i32 200, i32 204, i32 202, i32 206, i32 216, i32 220, i32 218, i32 222, i32 224, i32 228, i32 226, i32 230, i32 240, i32 244, i32 242, i32 246, i32 232, i32 236, i32 234, i32 238, i32 248, i32 252, i32 250, i32 254, i32 1, i32 5, i32 3, i32 7, i32 17, i32 21, i32 19, i32 23, i32 9, i32 13, i32 11, i32 15, i32 25, i32 29, i32 27, i32 31, i32 33, i32 37, i32 35, i32 39, i32 49, i32 53, i32 51, i32 55, i32 41, i32 45, i32 43, i32 47, i32 57, i32 61, i32 59, i32 63, i32 129, i32 133, i32 131, i32 135, i32 145, i32 149, i32 147, i32 151, i32 137, i32 141, i32 139, i32 143, i32 153, i32 157, i32 155, i32 159, i32 161, i32 165, i32 163, i32 167, i32 177, i32 181, i32 179, i32 183, i32 169, i32 173, i32 171, i32 175, i32 185, i32 189, i32 187, i32 191, i32 65, i32 69, i32 67, i32 71, i32 81, i32 85, i32 83, i32 87, i32 73, i32 77, i32 75, i32 79, i32 89, i32 93, i32 91, i32 95, i32 97, i32 101, i32 99, i32 103, i32 113, i32 117, i32 115, i32 119, i32 105, i32 109, i32 107, i32 111, i32 121, i32 125, i32 123, i32 127, i32 193, i32 197, i32 195, i32 199, i32 209, i32 213, i32 211, i32 215, i32 201, i32 205, i32 203, i32 207, i32 217, i32 221, i32 219, i32 223, i32 225, i32 229, i32 227, i32 231, i32 241, i32 245, i32 243, i32 247, i32 233, i32 237, i32 235, i32 239, i32 249, i32 253, i32 251, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_36: +; CHECK: [[REG36:r[0-9]+]] = #54 +; CHECK: vdeal(v1,v0,[[REG36]]) +define <256 x i8> @vdeal_36(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 4, i32 5, i32 16, i32 17, i32 20, i32 21, i32 8, i32 9, i32 12, i32 13, i32 24, i32 25, i32 28, i32 29, i32 32, i32 33, i32 36, i32 37, i32 48, i32 49, i32 52, i32 53, i32 40, i32 41, i32 44, i32 45, i32 56, i32 57, i32 60, i32 61, i32 128, i32 129, i32 132, i32 133, i32 144, i32 145, i32 148, i32 149, i32 136, i32 137, i32 140, i32 141, i32 152, i32 153, i32 156, i32 157, i32 160, i32 161, i32 164, i32 165, i32 176, i32 177, i32 180, i32 181, i32 168, i32 169, i32 172, i32 173, i32 184, i32 185, i32 188, i32 189, i32 64, i32 65, i32 68, i32 69, i32 80, i32 81, i32 84, i32 85, i32 72, i32 73, i32 76, i32 77, i32 88, i32 89, i32 92, i32 93, i32 96, i32 97, i32 100, i32 101, i32 112, i32 113, i32 116, i32 117, i32 104, i32 105, i32 108, i32 109, i32 120, i32 121, i32 124, i32 125, i32 192, i32 193, i32 196, i32 197, i32 208, i32 209, i32 212, i32 213, i32 200, i32 201, i32 204, i32 205, i32 216, i32 217, i32 220, i32 221, i32 224, i32 225, i32 228, i32 229, i32 240, i32 241, i32 244, i32 245, i32 232, i32 233, i32 236, i32 237, i32 248, i32 249, i32 252, i32 253, i32 2, i32 3, i32 6, i32 7, i32 18, i32 19, i32 22, i32 23, i32 10, i32 11, i32 14, i32 15, i32 26, i32 27, i32 30, i32 31, i32 34, i32 35, i32 38, i32 39, i32 50, i32 51, i32 54, i32 55, i32 42, i32 43, i32 46, i32 47, i32 58, i32 59, i32 62, i32 63, i32 130, i32 131, i32 134, i32 135, i32 146, i32 147, i32 150, i32 151, i32 138, i32 139, i32 142, i32 143, i32 154, i32 155, i32 158, i32 159, i32 162, i32 163, i32 166, i32 167, i32 178, i32 179, i32 182, i32 183, i32 170, i32 171, i32 174, i32 175, i32 186, i32 187, i32 190, i32 191, i32 66, i32 67, i32 70, i32 71, i32 82, i32 83, i32 86, i32 87, i32 74, i32 75, i32 78, i32 79, i32 90, i32 91, i32 94, i32 95, i32 98, i32 99, i32 102, i32 103, i32 114, i32 115, i32 118, i32 119, i32 106, i32 107, i32 110, i32 111, i32 122, i32 123, i32 126, i32 127, i32 194, i32 195, i32 198, i32 199, i32 210, i32 211, i32 214, i32 215, i32 202, i32 203, i32 206, i32 207, i32 218, i32 219, i32 222, i32 223, i32 226, i32 227, i32 230, i32 231, i32 242, i32 243, i32 246, i32 247, i32 234, i32 235, i32 238, i32 239, i32 250, i32 251, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_37: +; CHECK: [[REG37:r[0-9]+]] = #55 +; CHECK: vdeal(v1,v0,[[REG37]]) +define <256 x i8> @vdeal_37(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 2, i32 4, i32 6, i32 16, i32 18, i32 20, i32 22, i32 8, i32 10, i32 12, i32 14, i32 24, i32 26, i32 28, i32 30, i32 32, i32 34, i32 36, i32 38, i32 48, i32 50, i32 52, i32 54, i32 40, i32 42, i32 44, i32 46, i32 56, i32 58, i32 60, i32 62, i32 128, i32 130, i32 132, i32 134, i32 144, i32 146, i32 148, i32 150, i32 136, i32 138, i32 140, i32 142, i32 152, i32 154, i32 156, i32 158, i32 160, i32 162, i32 164, i32 166, i32 176, i32 178, i32 180, i32 182, i32 168, i32 170, i32 172, i32 174, i32 184, i32 186, i32 188, i32 190, i32 64, i32 66, i32 68, i32 70, i32 80, i32 82, i32 84, i32 86, i32 72, i32 74, i32 76, i32 78, i32 88, i32 90, i32 92, i32 94, i32 96, i32 98, i32 100, i32 102, i32 112, i32 114, i32 116, i32 118, i32 104, i32 106, i32 108, i32 110, i32 120, i32 122, i32 124, i32 126, i32 192, i32 194, i32 196, i32 198, i32 208, i32 210, i32 212, i32 214, i32 200, i32 202, i32 204, i32 206, i32 216, i32 218, i32 220, i32 222, i32 224, i32 226, i32 228, i32 230, i32 240, i32 242, i32 244, i32 246, i32 232, i32 234, i32 236, i32 238, i32 248, i32 250, i32 252, i32 254, i32 1, i32 3, i32 5, i32 7, i32 17, i32 19, i32 21, i32 23, i32 9, i32 11, i32 13, i32 15, i32 25, i32 27, i32 29, i32 31, i32 33, i32 35, i32 37, i32 39, i32 49, i32 51, i32 53, i32 55, i32 41, i32 43, i32 45, i32 47, i32 57, i32 59, i32 61, i32 63, i32 129, i32 131, i32 133, i32 135, i32 145, i32 147, i32 149, i32 151, i32 137, i32 139, i32 141, i32 143, i32 153, i32 155, i32 157, i32 159, i32 161, i32 163, i32 165, i32 167, i32 177, i32 179, i32 181, i32 183, i32 169, i32 171, i32 173, i32 175, i32 185, i32 187, i32 189, i32 191, i32 65, i32 67, i32 69, i32 71, i32 81, i32 83, i32 85, i32 87, i32 73, i32 75, i32 77, i32 79, i32 89, i32 91, i32 93, i32 95, i32 97, i32 99, i32 101, i32 103, i32 113, i32 115, i32 117, i32 119, i32 105, i32 107, i32 109, i32 111, i32 121, i32 123, i32 125, i32 127, i32 193, i32 195, i32 197, i32 199, i32 209, i32 211, i32 213, i32 215, i32 201, i32 203, i32 205, i32 207, i32 217, i32 219, i32 221, i32 223, i32 225, i32 227, i32 229, i32 231, i32 241, i32 243, i32 245, i32 247, i32 233, i32 235, i32 237, i32 239, i32 249, i32 251, i32 253, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_38: +; CHECK: [[REG38:r[0-9]+]] = #56 +; CHECK: vdeal(v1,v0,[[REG38]]) +define <256 x i8> @vdeal_38(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 48, i32 49, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 128, i32 129, i32 130, i32 131, i32 132, i32 133, i32 134, i32 135, i32 144, i32 145, i32 146, i32 147, i32 148, i32 149, i32 150, i32 151, i32 160, i32 161, i32 162, i32 163, i32 164, i32 165, i32 166, i32 167, i32 176, i32 177, i32 178, i32 179, i32 180, i32 181, i32 182, i32 183, i32 64, i32 65, i32 66, i32 67, i32 68, i32 69, i32 70, i32 71, i32 80, i32 81, i32 82, i32 83, i32 84, i32 85, i32 86, i32 87, i32 96, i32 97, i32 98, i32 99, i32 100, i32 101, i32 102, i32 103, i32 112, i32 113, i32 114, i32 115, i32 116, i32 117, i32 118, i32 119, i32 192, i32 193, i32 194, i32 195, i32 196, i32 197, i32 198, i32 199, i32 208, i32 209, i32 210, i32 211, i32 212, i32 213, i32 214, i32 215, i32 224, i32 225, i32 226, i32 227, i32 228, i32 229, i32 230, i32 231, i32 240, i32 241, i32 242, i32 243, i32 244, i32 245, i32 246, i32 247, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63, i32 136, i32 137, i32 138, i32 139, i32 140, i32 141, i32 142, i32 143, i32 152, i32 153, i32 154, i32 155, i32 156, i32 157, i32 158, i32 159, i32 168, i32 169, i32 170, i32 171, i32 172, i32 173, i32 174, i32 175, i32 184, i32 185, i32 186, i32 187, i32 188, i32 189, i32 190, i32 191, i32 72, i32 73, i32 74, i32 75, i32 76, i32 77, i32 78, i32 79, i32 88, i32 89, i32 90, i32 91, i32 92, i32 93, i32 94, i32 95, i32 104, i32 105, i32 106, i32 107, i32 108, i32 109, i32 110, i32 111, i32 120, i32 121, i32 122, i32 123, i32 124, i32 125, i32 126, i32 127, i32 200, i32 201, i32 202, i32 203, i32 204, i32 205, i32 206, i32 207, i32 216, i32 217, i32 218, i32 219, i32 220, i32 221, i32 222, i32 223, i32 232, i32 233, i32 234, i32 235, i32 236, i32 237, i32 238, i32 239, i32 248, i32 249, i32 250, i32 251, i32 252, i32 253, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_39: +; CHECK: [[REG39:r[0-9]+]] = #57 +; CHECK: vdeal(v1,v0,[[REG39]]) +define <256 x i8> @vdeal_39(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14, i32 16, i32 24, i32 18, i32 26, i32 20, i32 28, i32 22, i32 30, i32 32, i32 40, i32 34, i32 42, i32 36, i32 44, i32 38, i32 46, i32 48, i32 56, i32 50, i32 58, i32 52, i32 60, i32 54, i32 62, i32 128, i32 136, i32 130, i32 138, i32 132, i32 140, i32 134, i32 142, i32 144, i32 152, i32 146, i32 154, i32 148, i32 156, i32 150, i32 158, i32 160, i32 168, i32 162, i32 170, i32 164, i32 172, i32 166, i32 174, i32 176, i32 184, i32 178, i32 186, i32 180, i32 188, i32 182, i32 190, i32 64, i32 72, i32 66, i32 74, i32 68, i32 76, i32 70, i32 78, i32 80, i32 88, i32 82, i32 90, i32 84, i32 92, i32 86, i32 94, i32 96, i32 104, i32 98, i32 106, i32 100, i32 108, i32 102, i32 110, i32 112, i32 120, i32 114, i32 122, i32 116, i32 124, i32 118, i32 126, i32 192, i32 200, i32 194, i32 202, i32 196, i32 204, i32 198, i32 206, i32 208, i32 216, i32 210, i32 218, i32 212, i32 220, i32 214, i32 222, i32 224, i32 232, i32 226, i32 234, i32 228, i32 236, i32 230, i32 238, i32 240, i32 248, i32 242, i32 250, i32 244, i32 252, i32 246, i32 254, i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15, i32 17, i32 25, i32 19, i32 27, i32 21, i32 29, i32 23, i32 31, i32 33, i32 41, i32 35, i32 43, i32 37, i32 45, i32 39, i32 47, i32 49, i32 57, i32 51, i32 59, i32 53, i32 61, i32 55, i32 63, i32 129, i32 137, i32 131, i32 139, i32 133, i32 141, i32 135, i32 143, i32 145, i32 153, i32 147, i32 155, i32 149, i32 157, i32 151, i32 159, i32 161, i32 169, i32 163, i32 171, i32 165, i32 173, i32 167, i32 175, i32 177, i32 185, i32 179, i32 187, i32 181, i32 189, i32 183, i32 191, i32 65, i32 73, i32 67, i32 75, i32 69, i32 77, i32 71, i32 79, i32 81, i32 89, i32 83, i32 91, i32 85, i32 93, i32 87, i32 95, i32 97, i32 105, i32 99, i32 107, i32 101, i32 109, i32 103, i32 111, i32 113, i32 121, i32 115, i32 123, i32 117, i32 125, i32 119, i32 127, i32 193, i32 201, i32 195, i32 203, i32 197, i32 205, i32 199, i32 207, i32 209, i32 217, i32 211, i32 219, i32 213, i32 221, i32 215, i32 223, i32 225, i32 233, i32 227, i32 235, i32 229, i32 237, i32 231, i32 239, i32 241, i32 249, i32 243, i32 251, i32 245, i32 253, i32 247, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_3a: +; CHECK: [[REG3a:r[0-9]+]] = #58 +; CHECK: vdeal(v1,v0,[[REG3a]]) +define <256 x i8> @vdeal_3a(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 8, i32 9, i32 4, i32 5, i32 12, i32 13, i32 16, i32 17, i32 24, i32 25, i32 20, i32 21, i32 28, i32 29, i32 32, i32 33, i32 40, i32 41, i32 36, i32 37, i32 44, i32 45, i32 48, i32 49, i32 56, i32 57, i32 52, i32 53, i32 60, i32 61, i32 128, i32 129, i32 136, i32 137, i32 132, i32 133, i32 140, i32 141, i32 144, i32 145, i32 152, i32 153, i32 148, i32 149, i32 156, i32 157, i32 160, i32 161, i32 168, i32 169, i32 164, i32 165, i32 172, i32 173, i32 176, i32 177, i32 184, i32 185, i32 180, i32 181, i32 188, i32 189, i32 64, i32 65, i32 72, i32 73, i32 68, i32 69, i32 76, i32 77, i32 80, i32 81, i32 88, i32 89, i32 84, i32 85, i32 92, i32 93, i32 96, i32 97, i32 104, i32 105, i32 100, i32 101, i32 108, i32 109, i32 112, i32 113, i32 120, i32 121, i32 116, i32 117, i32 124, i32 125, i32 192, i32 193, i32 200, i32 201, i32 196, i32 197, i32 204, i32 205, i32 208, i32 209, i32 216, i32 217, i32 212, i32 213, i32 220, i32 221, i32 224, i32 225, i32 232, i32 233, i32 228, i32 229, i32 236, i32 237, i32 240, i32 241, i32 248, i32 249, i32 244, i32 245, i32 252, i32 253, i32 2, i32 3, i32 10, i32 11, i32 6, i32 7, i32 14, i32 15, i32 18, i32 19, i32 26, i32 27, i32 22, i32 23, i32 30, i32 31, i32 34, i32 35, i32 42, i32 43, i32 38, i32 39, i32 46, i32 47, i32 50, i32 51, i32 58, i32 59, i32 54, i32 55, i32 62, i32 63, i32 130, i32 131, i32 138, i32 139, i32 134, i32 135, i32 142, i32 143, i32 146, i32 147, i32 154, i32 155, i32 150, i32 151, i32 158, i32 159, i32 162, i32 163, i32 170, i32 171, i32 166, i32 167, i32 174, i32 175, i32 178, i32 179, i32 186, i32 187, i32 182, i32 183, i32 190, i32 191, i32 66, i32 67, i32 74, i32 75, i32 70, i32 71, i32 78, i32 79, i32 82, i32 83, i32 90, i32 91, i32 86, i32 87, i32 94, i32 95, i32 98, i32 99, i32 106, i32 107, i32 102, i32 103, i32 110, i32 111, i32 114, i32 115, i32 122, i32 123, i32 118, i32 119, i32 126, i32 127, i32 194, i32 195, i32 202, i32 203, i32 198, i32 199, i32 206, i32 207, i32 210, i32 211, i32 218, i32 219, i32 214, i32 215, i32 222, i32 223, i32 226, i32 227, i32 234, i32 235, i32 230, i32 231, i32 238, i32 239, i32 242, i32 243, i32 250, i32 251, i32 246, i32 247, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_3b: +; CHECK: [[REG3b:r[0-9]+]] = #59 +; CHECK: vdeal(v1,v0,[[REG3b]]) +define <256 x i8> @vdeal_3b(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 2, i32 8, i32 10, i32 4, i32 6, i32 12, i32 14, i32 16, i32 18, i32 24, i32 26, i32 20, i32 22, i32 28, i32 30, i32 32, i32 34, i32 40, i32 42, i32 36, i32 38, i32 44, i32 46, i32 48, i32 50, i32 56, i32 58, i32 52, i32 54, i32 60, i32 62, i32 128, i32 130, i32 136, i32 138, i32 132, i32 134, i32 140, i32 142, i32 144, i32 146, i32 152, i32 154, i32 148, i32 150, i32 156, i32 158, i32 160, i32 162, i32 168, i32 170, i32 164, i32 166, i32 172, i32 174, i32 176, i32 178, i32 184, i32 186, i32 180, i32 182, i32 188, i32 190, i32 64, i32 66, i32 72, i32 74, i32 68, i32 70, i32 76, i32 78, i32 80, i32 82, i32 88, i32 90, i32 84, i32 86, i32 92, i32 94, i32 96, i32 98, i32 104, i32 106, i32 100, i32 102, i32 108, i32 110, i32 112, i32 114, i32 120, i32 122, i32 116, i32 118, i32 124, i32 126, i32 192, i32 194, i32 200, i32 202, i32 196, i32 198, i32 204, i32 206, i32 208, i32 210, i32 216, i32 218, i32 212, i32 214, i32 220, i32 222, i32 224, i32 226, i32 232, i32 234, i32 228, i32 230, i32 236, i32 238, i32 240, i32 242, i32 248, i32 250, i32 244, i32 246, i32 252, i32 254, i32 1, i32 3, i32 9, i32 11, i32 5, i32 7, i32 13, i32 15, i32 17, i32 19, i32 25, i32 27, i32 21, i32 23, i32 29, i32 31, i32 33, i32 35, i32 41, i32 43, i32 37, i32 39, i32 45, i32 47, i32 49, i32 51, i32 57, i32 59, i32 53, i32 55, i32 61, i32 63, i32 129, i32 131, i32 137, i32 139, i32 133, i32 135, i32 141, i32 143, i32 145, i32 147, i32 153, i32 155, i32 149, i32 151, i32 157, i32 159, i32 161, i32 163, i32 169, i32 171, i32 165, i32 167, i32 173, i32 175, i32 177, i32 179, i32 185, i32 187, i32 181, i32 183, i32 189, i32 191, i32 65, i32 67, i32 73, i32 75, i32 69, i32 71, i32 77, i32 79, i32 81, i32 83, i32 89, i32 91, i32 85, i32 87, i32 93, i32 95, i32 97, i32 99, i32 105, i32 107, i32 101, i32 103, i32 109, i32 111, i32 113, i32 115, i32 121, i32 123, i32 117, i32 119, i32 125, i32 127, i32 193, i32 195, i32 201, i32 203, i32 197, i32 199, i32 205, i32 207, i32 209, i32 211, i32 217, i32 219, i32 213, i32 215, i32 221, i32 223, i32 225, i32 227, i32 233, i32 235, i32 229, i32 231, i32 237, i32 239, i32 241, i32 243, i32 249, i32 251, i32 245, i32 247, i32 253, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_3c: +; CHECK: [[REG3c:r[0-9]+]] = #60 +; CHECK: vdeal(v1,v0,[[REG3c]]) +define <256 x i8> @vdeal_3c(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 10, i32 11, i32 16, i32 17, i32 18, i32 19, i32 24, i32 25, i32 26, i32 27, i32 32, i32 33, i32 34, i32 35, i32 40, i32 41, i32 42, i32 43, i32 48, i32 49, i32 50, i32 51, i32 56, i32 57, i32 58, i32 59, i32 128, i32 129, i32 130, i32 131, i32 136, i32 137, i32 138, i32 139, i32 144, i32 145, i32 146, i32 147, i32 152, i32 153, i32 154, i32 155, i32 160, i32 161, i32 162, i32 163, i32 168, i32 169, i32 170, i32 171, i32 176, i32 177, i32 178, i32 179, i32 184, i32 185, i32 186, i32 187, i32 64, i32 65, i32 66, i32 67, i32 72, i32 73, i32 74, i32 75, i32 80, i32 81, i32 82, i32 83, i32 88, i32 89, i32 90, i32 91, i32 96, i32 97, i32 98, i32 99, i32 104, i32 105, i32 106, i32 107, i32 112, i32 113, i32 114, i32 115, i32 120, i32 121, i32 122, i32 123, i32 192, i32 193, i32 194, i32 195, i32 200, i32 201, i32 202, i32 203, i32 208, i32 209, i32 210, i32 211, i32 216, i32 217, i32 218, i32 219, i32 224, i32 225, i32 226, i32 227, i32 232, i32 233, i32 234, i32 235, i32 240, i32 241, i32 242, i32 243, i32 248, i32 249, i32 250, i32 251, i32 4, i32 5, i32 6, i32 7, i32 12, i32 13, i32 14, i32 15, i32 20, i32 21, i32 22, i32 23, i32 28, i32 29, i32 30, i32 31, i32 36, i32 37, i32 38, i32 39, i32 44, i32 45, i32 46, i32 47, i32 52, i32 53, i32 54, i32 55, i32 60, i32 61, i32 62, i32 63, i32 132, i32 133, i32 134, i32 135, i32 140, i32 141, i32 142, i32 143, i32 148, i32 149, i32 150, i32 151, i32 156, i32 157, i32 158, i32 159, i32 164, i32 165, i32 166, i32 167, i32 172, i32 173, i32 174, i32 175, i32 180, i32 181, i32 182, i32 183, i32 188, i32 189, i32 190, i32 191, i32 68, i32 69, i32 70, i32 71, i32 76, i32 77, i32 78, i32 79, i32 84, i32 85, i32 86, i32 87, i32 92, i32 93, i32 94, i32 95, i32 100, i32 101, i32 102, i32 103, i32 108, i32 109, i32 110, i32 111, i32 116, i32 117, i32 118, i32 119, i32 124, i32 125, i32 126, i32 127, i32 196, i32 197, i32 198, i32 199, i32 204, i32 205, i32 206, i32 207, i32 212, i32 213, i32 214, i32 215, i32 220, i32 221, i32 222, i32 223, i32 228, i32 229, i32 230, i32 231, i32 236, i32 237, i32 238, i32 239, i32 244, i32 245, i32 246, i32 247, i32 252, i32 253, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_3d: +; CHECK: [[REG3d:r[0-9]+]] = #61 +; CHECK: vdeal(v1,v0,[[REG3d]]) +define <256 x i8> @vdeal_3d(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 4, i32 2, i32 6, i32 8, i32 12, i32 10, i32 14, i32 16, i32 20, i32 18, i32 22, i32 24, i32 28, i32 26, i32 30, i32 32, i32 36, i32 34, i32 38, i32 40, i32 44, i32 42, i32 46, i32 48, i32 52, i32 50, i32 54, i32 56, i32 60, i32 58, i32 62, i32 128, i32 132, i32 130, i32 134, i32 136, i32 140, i32 138, i32 142, i32 144, i32 148, i32 146, i32 150, i32 152, i32 156, i32 154, i32 158, i32 160, i32 164, i32 162, i32 166, i32 168, i32 172, i32 170, i32 174, i32 176, i32 180, i32 178, i32 182, i32 184, i32 188, i32 186, i32 190, i32 64, i32 68, i32 66, i32 70, i32 72, i32 76, i32 74, i32 78, i32 80, i32 84, i32 82, i32 86, i32 88, i32 92, i32 90, i32 94, i32 96, i32 100, i32 98, i32 102, i32 104, i32 108, i32 106, i32 110, i32 112, i32 116, i32 114, i32 118, i32 120, i32 124, i32 122, i32 126, i32 192, i32 196, i32 194, i32 198, i32 200, i32 204, i32 202, i32 206, i32 208, i32 212, i32 210, i32 214, i32 216, i32 220, i32 218, i32 222, i32 224, i32 228, i32 226, i32 230, i32 232, i32 236, i32 234, i32 238, i32 240, i32 244, i32 242, i32 246, i32 248, i32 252, i32 250, i32 254, i32 1, i32 5, i32 3, i32 7, i32 9, i32 13, i32 11, i32 15, i32 17, i32 21, i32 19, i32 23, i32 25, i32 29, i32 27, i32 31, i32 33, i32 37, i32 35, i32 39, i32 41, i32 45, i32 43, i32 47, i32 49, i32 53, i32 51, i32 55, i32 57, i32 61, i32 59, i32 63, i32 129, i32 133, i32 131, i32 135, i32 137, i32 141, i32 139, i32 143, i32 145, i32 149, i32 147, i32 151, i32 153, i32 157, i32 155, i32 159, i32 161, i32 165, i32 163, i32 167, i32 169, i32 173, i32 171, i32 175, i32 177, i32 181, i32 179, i32 183, i32 185, i32 189, i32 187, i32 191, i32 65, i32 69, i32 67, i32 71, i32 73, i32 77, i32 75, i32 79, i32 81, i32 85, i32 83, i32 87, i32 89, i32 93, i32 91, i32 95, i32 97, i32 101, i32 99, i32 103, i32 105, i32 109, i32 107, i32 111, i32 113, i32 117, i32 115, i32 119, i32 121, i32 125, i32 123, i32 127, i32 193, i32 197, i32 195, i32 199, i32 201, i32 205, i32 203, i32 207, i32 209, i32 213, i32 211, i32 215, i32 217, i32 221, i32 219, i32 223, i32 225, i32 229, i32 227, i32 231, i32 233, i32 237, i32 235, i32 239, i32 241, i32 245, i32 243, i32 247, i32 249, i32 253, i32 251, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_3e: +; CHECK: [[REG3e:r[0-9]+]] = #62 +; CHECK: vdeal(v1,v0,[[REG3e]]) +define <256 x i8> @vdeal_3e(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 4, i32 5, i32 8, i32 9, i32 12, i32 13, i32 16, i32 17, i32 20, i32 21, i32 24, i32 25, i32 28, i32 29, i32 32, i32 33, i32 36, i32 37, i32 40, i32 41, i32 44, i32 45, i32 48, i32 49, i32 52, i32 53, i32 56, i32 57, i32 60, i32 61, i32 128, i32 129, i32 132, i32 133, i32 136, i32 137, i32 140, i32 141, i32 144, i32 145, i32 148, i32 149, i32 152, i32 153, i32 156, i32 157, i32 160, i32 161, i32 164, i32 165, i32 168, i32 169, i32 172, i32 173, i32 176, i32 177, i32 180, i32 181, i32 184, i32 185, i32 188, i32 189, i32 64, i32 65, i32 68, i32 69, i32 72, i32 73, i32 76, i32 77, i32 80, i32 81, i32 84, i32 85, i32 88, i32 89, i32 92, i32 93, i32 96, i32 97, i32 100, i32 101, i32 104, i32 105, i32 108, i32 109, i32 112, i32 113, i32 116, i32 117, i32 120, i32 121, i32 124, i32 125, i32 192, i32 193, i32 196, i32 197, i32 200, i32 201, i32 204, i32 205, i32 208, i32 209, i32 212, i32 213, i32 216, i32 217, i32 220, i32 221, i32 224, i32 225, i32 228, i32 229, i32 232, i32 233, i32 236, i32 237, i32 240, i32 241, i32 244, i32 245, i32 248, i32 249, i32 252, i32 253, i32 2, i32 3, i32 6, i32 7, i32 10, i32 11, i32 14, i32 15, i32 18, i32 19, i32 22, i32 23, i32 26, i32 27, i32 30, i32 31, i32 34, i32 35, i32 38, i32 39, i32 42, i32 43, i32 46, i32 47, i32 50, i32 51, i32 54, i32 55, i32 58, i32 59, i32 62, i32 63, i32 130, i32 131, i32 134, i32 135, i32 138, i32 139, i32 142, i32 143, i32 146, i32 147, i32 150, i32 151, i32 154, i32 155, i32 158, i32 159, i32 162, i32 163, i32 166, i32 167, i32 170, i32 171, i32 174, i32 175, i32 178, i32 179, i32 182, i32 183, i32 186, i32 187, i32 190, i32 191, i32 66, i32 67, i32 70, i32 71, i32 74, i32 75, i32 78, i32 79, i32 82, i32 83, i32 86, i32 87, i32 90, i32 91, i32 94, i32 95, i32 98, i32 99, i32 102, i32 103, i32 106, i32 107, i32 110, i32 111, i32 114, i32 115, i32 118, i32 119, i32 122, i32 123, i32 126, i32 127, i32 194, i32 195, i32 198, i32 199, i32 202, i32 203, i32 206, i32 207, i32 210, i32 211, i32 214, i32 215, i32 218, i32 219, i32 222, i32 223, i32 226, i32 227, i32 230, i32 231, i32 234, i32 235, i32 238, i32 239, i32 242, i32 243, i32 246, i32 247, i32 250, i32 251, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_3f: +; CHECK: [[REG3f:r[0-9]+]] = #63 +; CHECK: vdeal(v1,v0,[[REG3f]]) +define <256 x i8> @vdeal_3f(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30, i32 32, i32 34, i32 36, i32 38, i32 40, i32 42, i32 44, i32 46, i32 48, i32 50, i32 52, i32 54, i32 56, i32 58, i32 60, i32 62, i32 128, i32 130, i32 132, i32 134, i32 136, i32 138, i32 140, i32 142, i32 144, i32 146, i32 148, i32 150, i32 152, i32 154, i32 156, i32 158, i32 160, i32 162, i32 164, i32 166, i32 168, i32 170, i32 172, i32 174, i32 176, i32 178, i32 180, i32 182, i32 184, i32 186, i32 188, i32 190, i32 64, i32 66, i32 68, i32 70, i32 72, i32 74, i32 76, i32 78, i32 80, i32 82, i32 84, i32 86, i32 88, i32 90, i32 92, i32 94, i32 96, i32 98, i32 100, i32 102, i32 104, i32 106, i32 108, i32 110, i32 112, i32 114, i32 116, i32 118, i32 120, i32 122, i32 124, i32 126, i32 192, i32 194, i32 196, i32 198, i32 200, i32 202, i32 204, i32 206, i32 208, i32 210, i32 212, i32 214, i32 216, i32 218, i32 220, i32 222, i32 224, i32 226, i32 228, i32 230, i32 232, i32 234, i32 236, i32 238, i32 240, i32 242, i32 244, i32 246, i32 248, i32 250, i32 252, i32 254, i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31, i32 33, i32 35, i32 37, i32 39, i32 41, i32 43, i32 45, i32 47, i32 49, i32 51, i32 53, i32 55, i32 57, i32 59, i32 61, i32 63, i32 129, i32 131, i32 133, i32 135, i32 137, i32 139, i32 141, i32 143, i32 145, i32 147, i32 149, i32 151, i32 153, i32 155, i32 157, i32 159, i32 161, i32 163, i32 165, i32 167, i32 169, i32 171, i32 173, i32 175, i32 177, i32 179, i32 181, i32 183, i32 185, i32 187, i32 189, i32 191, i32 65, i32 67, i32 69, i32 71, i32 73, i32 75, i32 77, i32 79, i32 81, i32 83, i32 85, i32 87, i32 89, i32 91, i32 93, i32 95, i32 97, i32 99, i32 101, i32 103, i32 105, i32 107, i32 109, i32 111, i32 113, i32 115, i32 117, i32 119, i32 121, i32 123, i32 125, i32 127, i32 193, i32 195, i32 197, i32 199, i32 201, i32 203, i32 205, i32 207, i32 209, i32 211, i32 213, i32 215, i32 217, i32 219, i32 221, i32 223, i32 225, i32 227, i32 229, i32 231, i32 233, i32 235, i32 237, i32 239, i32 241, i32 243, i32 245, i32 247, i32 249, i32 251, i32 253, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_40: +; CHECK: [[REG40:r[0-9]+]] = #64 +; CHECK: vshuff(v1,v0,[[REG40]]) +define <256 x i8> @vdeal_40(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 48, i32 49, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63, i32 128, i32 129, i32 130, i32 131, i32 132, i32 133, i32 134, i32 135, i32 136, i32 137, i32 138, i32 139, i32 140, i32 141, i32 142, i32 143, i32 144, i32 145, i32 146, i32 147, i32 148, i32 149, i32 150, i32 151, i32 152, i32 153, i32 154, i32 155, i32 156, i32 157, i32 158, i32 159, i32 160, i32 161, i32 162, i32 163, i32 164, i32 165, i32 166, i32 167, i32 168, i32 169, i32 170, i32 171, i32 172, i32 173, i32 174, i32 175, i32 176, i32 177, i32 178, i32 179, i32 180, i32 181, i32 182, i32 183, i32 184, i32 185, i32 186, i32 187, i32 188, i32 189, i32 190, i32 191, i32 64, i32 65, i32 66, i32 67, i32 68, i32 69, i32 70, i32 71, i32 72, i32 73, i32 74, i32 75, i32 76, i32 77, i32 78, i32 79, i32 80, i32 81, i32 82, i32 83, i32 84, i32 85, i32 86, i32 87, i32 88, i32 89, i32 90, i32 91, i32 92, i32 93, i32 94, i32 95, i32 96, i32 97, i32 98, i32 99, i32 100, i32 101, i32 102, i32 103, i32 104, i32 105, i32 106, i32 107, i32 108, i32 109, i32 110, i32 111, i32 112, i32 113, i32 114, i32 115, i32 116, i32 117, i32 118, i32 119, i32 120, i32 121, i32 122, i32 123, i32 124, i32 125, i32 126, i32 127, i32 192, i32 193, i32 194, i32 195, i32 196, i32 197, i32 198, i32 199, i32 200, i32 201, i32 202, i32 203, i32 204, i32 205, i32 206, i32 207, i32 208, i32 209, i32 210, i32 211, i32 212, i32 213, i32 214, i32 215, i32 216, i32 217, i32 218, i32 219, i32 220, i32 221, i32 222, i32 223, i32 224, i32 225, i32 226, i32 227, i32 228, i32 229, i32 230, i32 231, i32 232, i32 233, i32 234, i32 235, i32 236, i32 237, i32 238, i32 239, i32 240, i32 241, i32 242, i32 243, i32 244, i32 245, i32 246, i32 247, i32 248, i32 249, i32 250, i32 251, i32 252, i32 253, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_41: +; CHECK: [[REG41:r[0-9]+]] = #65 +; CHECK: vdeal(v1,v0,[[REG41]]) +define <256 x i8> @vdeal_41(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 64, i32 2, i32 66, i32 4, i32 68, i32 6, i32 70, i32 8, i32 72, i32 10, i32 74, i32 12, i32 76, i32 14, i32 78, i32 16, i32 80, i32 18, i32 82, i32 20, i32 84, i32 22, i32 86, i32 24, i32 88, i32 26, i32 90, i32 28, i32 92, i32 30, i32 94, i32 32, i32 96, i32 34, i32 98, i32 36, i32 100, i32 38, i32 102, i32 40, i32 104, i32 42, i32 106, i32 44, i32 108, i32 46, i32 110, i32 48, i32 112, i32 50, i32 114, i32 52, i32 116, i32 54, i32 118, i32 56, i32 120, i32 58, i32 122, i32 60, i32 124, i32 62, i32 126, i32 128, i32 192, i32 130, i32 194, i32 132, i32 196, i32 134, i32 198, i32 136, i32 200, i32 138, i32 202, i32 140, i32 204, i32 142, i32 206, i32 144, i32 208, i32 146, i32 210, i32 148, i32 212, i32 150, i32 214, i32 152, i32 216, i32 154, i32 218, i32 156, i32 220, i32 158, i32 222, i32 160, i32 224, i32 162, i32 226, i32 164, i32 228, i32 166, i32 230, i32 168, i32 232, i32 170, i32 234, i32 172, i32 236, i32 174, i32 238, i32 176, i32 240, i32 178, i32 242, i32 180, i32 244, i32 182, i32 246, i32 184, i32 248, i32 186, i32 250, i32 188, i32 252, i32 190, i32 254, i32 1, i32 65, i32 3, i32 67, i32 5, i32 69, i32 7, i32 71, i32 9, i32 73, i32 11, i32 75, i32 13, i32 77, i32 15, i32 79, i32 17, i32 81, i32 19, i32 83, i32 21, i32 85, i32 23, i32 87, i32 25, i32 89, i32 27, i32 91, i32 29, i32 93, i32 31, i32 95, i32 33, i32 97, i32 35, i32 99, i32 37, i32 101, i32 39, i32 103, i32 41, i32 105, i32 43, i32 107, i32 45, i32 109, i32 47, i32 111, i32 49, i32 113, i32 51, i32 115, i32 53, i32 117, i32 55, i32 119, i32 57, i32 121, i32 59, i32 123, i32 61, i32 125, i32 63, i32 127, i32 129, i32 193, i32 131, i32 195, i32 133, i32 197, i32 135, i32 199, i32 137, i32 201, i32 139, i32 203, i32 141, i32 205, i32 143, i32 207, i32 145, i32 209, i32 147, i32 211, i32 149, i32 213, i32 151, i32 215, i32 153, i32 217, i32 155, i32 219, i32 157, i32 221, i32 159, i32 223, i32 161, i32 225, i32 163, i32 227, i32 165, i32 229, i32 167, i32 231, i32 169, i32 233, i32 171, i32 235, i32 173, i32 237, i32 175, i32 239, i32 177, i32 241, i32 179, i32 243, i32 181, i32 245, i32 183, i32 247, i32 185, i32 249, i32 187, i32 251, i32 189, i32 253, i32 191, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_42: +; CHECK: [[REG42:r[0-9]+]] = #66 +; CHECK: vdeal(v1,v0,[[REG42]]) +define <256 x i8> @vdeal_42(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 64, i32 65, i32 4, i32 5, i32 68, i32 69, i32 8, i32 9, i32 72, i32 73, i32 12, i32 13, i32 76, i32 77, i32 16, i32 17, i32 80, i32 81, i32 20, i32 21, i32 84, i32 85, i32 24, i32 25, i32 88, i32 89, i32 28, i32 29, i32 92, i32 93, i32 32, i32 33, i32 96, i32 97, i32 36, i32 37, i32 100, i32 101, i32 40, i32 41, i32 104, i32 105, i32 44, i32 45, i32 108, i32 109, i32 48, i32 49, i32 112, i32 113, i32 52, i32 53, i32 116, i32 117, i32 56, i32 57, i32 120, i32 121, i32 60, i32 61, i32 124, i32 125, i32 128, i32 129, i32 192, i32 193, i32 132, i32 133, i32 196, i32 197, i32 136, i32 137, i32 200, i32 201, i32 140, i32 141, i32 204, i32 205, i32 144, i32 145, i32 208, i32 209, i32 148, i32 149, i32 212, i32 213, i32 152, i32 153, i32 216, i32 217, i32 156, i32 157, i32 220, i32 221, i32 160, i32 161, i32 224, i32 225, i32 164, i32 165, i32 228, i32 229, i32 168, i32 169, i32 232, i32 233, i32 172, i32 173, i32 236, i32 237, i32 176, i32 177, i32 240, i32 241, i32 180, i32 181, i32 244, i32 245, i32 184, i32 185, i32 248, i32 249, i32 188, i32 189, i32 252, i32 253, i32 2, i32 3, i32 66, i32 67, i32 6, i32 7, i32 70, i32 71, i32 10, i32 11, i32 74, i32 75, i32 14, i32 15, i32 78, i32 79, i32 18, i32 19, i32 82, i32 83, i32 22, i32 23, i32 86, i32 87, i32 26, i32 27, i32 90, i32 91, i32 30, i32 31, i32 94, i32 95, i32 34, i32 35, i32 98, i32 99, i32 38, i32 39, i32 102, i32 103, i32 42, i32 43, i32 106, i32 107, i32 46, i32 47, i32 110, i32 111, i32 50, i32 51, i32 114, i32 115, i32 54, i32 55, i32 118, i32 119, i32 58, i32 59, i32 122, i32 123, i32 62, i32 63, i32 126, i32 127, i32 130, i32 131, i32 194, i32 195, i32 134, i32 135, i32 198, i32 199, i32 138, i32 139, i32 202, i32 203, i32 142, i32 143, i32 206, i32 207, i32 146, i32 147, i32 210, i32 211, i32 150, i32 151, i32 214, i32 215, i32 154, i32 155, i32 218, i32 219, i32 158, i32 159, i32 222, i32 223, i32 162, i32 163, i32 226, i32 227, i32 166, i32 167, i32 230, i32 231, i32 170, i32 171, i32 234, i32 235, i32 174, i32 175, i32 238, i32 239, i32 178, i32 179, i32 242, i32 243, i32 182, i32 183, i32 246, i32 247, i32 186, i32 187, i32 250, i32 251, i32 190, i32 191, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_43: +; CHECK: [[REG43:r[0-9]+]] = #67 +; CHECK: vdeal(v1,v0,[[REG43]]) +define <256 x i8> @vdeal_43(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 2, i32 64, i32 66, i32 4, i32 6, i32 68, i32 70, i32 8, i32 10, i32 72, i32 74, i32 12, i32 14, i32 76, i32 78, i32 16, i32 18, i32 80, i32 82, i32 20, i32 22, i32 84, i32 86, i32 24, i32 26, i32 88, i32 90, i32 28, i32 30, i32 92, i32 94, i32 32, i32 34, i32 96, i32 98, i32 36, i32 38, i32 100, i32 102, i32 40, i32 42, i32 104, i32 106, i32 44, i32 46, i32 108, i32 110, i32 48, i32 50, i32 112, i32 114, i32 52, i32 54, i32 116, i32 118, i32 56, i32 58, i32 120, i32 122, i32 60, i32 62, i32 124, i32 126, i32 128, i32 130, i32 192, i32 194, i32 132, i32 134, i32 196, i32 198, i32 136, i32 138, i32 200, i32 202, i32 140, i32 142, i32 204, i32 206, i32 144, i32 146, i32 208, i32 210, i32 148, i32 150, i32 212, i32 214, i32 152, i32 154, i32 216, i32 218, i32 156, i32 158, i32 220, i32 222, i32 160, i32 162, i32 224, i32 226, i32 164, i32 166, i32 228, i32 230, i32 168, i32 170, i32 232, i32 234, i32 172, i32 174, i32 236, i32 238, i32 176, i32 178, i32 240, i32 242, i32 180, i32 182, i32 244, i32 246, i32 184, i32 186, i32 248, i32 250, i32 188, i32 190, i32 252, i32 254, i32 1, i32 3, i32 65, i32 67, i32 5, i32 7, i32 69, i32 71, i32 9, i32 11, i32 73, i32 75, i32 13, i32 15, i32 77, i32 79, i32 17, i32 19, i32 81, i32 83, i32 21, i32 23, i32 85, i32 87, i32 25, i32 27, i32 89, i32 91, i32 29, i32 31, i32 93, i32 95, i32 33, i32 35, i32 97, i32 99, i32 37, i32 39, i32 101, i32 103, i32 41, i32 43, i32 105, i32 107, i32 45, i32 47, i32 109, i32 111, i32 49, i32 51, i32 113, i32 115, i32 53, i32 55, i32 117, i32 119, i32 57, i32 59, i32 121, i32 123, i32 61, i32 63, i32 125, i32 127, i32 129, i32 131, i32 193, i32 195, i32 133, i32 135, i32 197, i32 199, i32 137, i32 139, i32 201, i32 203, i32 141, i32 143, i32 205, i32 207, i32 145, i32 147, i32 209, i32 211, i32 149, i32 151, i32 213, i32 215, i32 153, i32 155, i32 217, i32 219, i32 157, i32 159, i32 221, i32 223, i32 161, i32 163, i32 225, i32 227, i32 165, i32 167, i32 229, i32 231, i32 169, i32 171, i32 233, i32 235, i32 173, i32 175, i32 237, i32 239, i32 177, i32 179, i32 241, i32 243, i32 181, i32 183, i32 245, i32 247, i32 185, i32 187, i32 249, i32 251, i32 189, i32 191, i32 253, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_44: +; CHECK: [[REG44:r[0-9]+]] = #68 +; CHECK: vdeal(v1,v0,[[REG44]]) +define <256 x i8> @vdeal_44(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 2, i32 3, i32 64, i32 65, i32 66, i32 67, i32 8, i32 9, i32 10, i32 11, i32 72, i32 73, i32 74, i32 75, i32 16, i32 17, i32 18, i32 19, i32 80, i32 81, i32 82, i32 83, i32 24, i32 25, i32 26, i32 27, i32 88, i32 89, i32 90, i32 91, i32 32, i32 33, i32 34, i32 35, i32 96, i32 97, i32 98, i32 99, i32 40, i32 41, i32 42, i32 43, i32 104, i32 105, i32 106, i32 107, i32 48, i32 49, i32 50, i32 51, i32 112, i32 113, i32 114, i32 115, i32 56, i32 57, i32 58, i32 59, i32 120, i32 121, i32 122, i32 123, i32 128, i32 129, i32 130, i32 131, i32 192, i32 193, i32 194, i32 195, i32 136, i32 137, i32 138, i32 139, i32 200, i32 201, i32 202, i32 203, i32 144, i32 145, i32 146, i32 147, i32 208, i32 209, i32 210, i32 211, i32 152, i32 153, i32 154, i32 155, i32 216, i32 217, i32 218, i32 219, i32 160, i32 161, i32 162, i32 163, i32 224, i32 225, i32 226, i32 227, i32 168, i32 169, i32 170, i32 171, i32 232, i32 233, i32 234, i32 235, i32 176, i32 177, i32 178, i32 179, i32 240, i32 241, i32 242, i32 243, i32 184, i32 185, i32 186, i32 187, i32 248, i32 249, i32 250, i32 251, i32 4, i32 5, i32 6, i32 7, i32 68, i32 69, i32 70, i32 71, i32 12, i32 13, i32 14, i32 15, i32 76, i32 77, i32 78, i32 79, i32 20, i32 21, i32 22, i32 23, i32 84, i32 85, i32 86, i32 87, i32 28, i32 29, i32 30, i32 31, i32 92, i32 93, i32 94, i32 95, i32 36, i32 37, i32 38, i32 39, i32 100, i32 101, i32 102, i32 103, i32 44, i32 45, i32 46, i32 47, i32 108, i32 109, i32 110, i32 111, i32 52, i32 53, i32 54, i32 55, i32 116, i32 117, i32 118, i32 119, i32 60, i32 61, i32 62, i32 63, i32 124, i32 125, i32 126, i32 127, i32 132, i32 133, i32 134, i32 135, i32 196, i32 197, i32 198, i32 199, i32 140, i32 141, i32 142, i32 143, i32 204, i32 205, i32 206, i32 207, i32 148, i32 149, i32 150, i32 151, i32 212, i32 213, i32 214, i32 215, i32 156, i32 157, i32 158, i32 159, i32 220, i32 221, i32 222, i32 223, i32 164, i32 165, i32 166, i32 167, i32 228, i32 229, i32 230, i32 231, i32 172, i32 173, i32 174, i32 175, i32 236, i32 237, i32 238, i32 239, i32 180, i32 181, i32 182, i32 183, i32 244, i32 245, i32 246, i32 247, i32 188, i32 189, i32 190, i32 191, i32 252, i32 253, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_45: +; CHECK: [[REG45:r[0-9]+]] = #69 +; CHECK: vdeal(v1,v0,[[REG45]]) +define <256 x i8> @vdeal_45(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 4, i32 2, i32 6, i32 64, i32 68, i32 66, i32 70, i32 8, i32 12, i32 10, i32 14, i32 72, i32 76, i32 74, i32 78, i32 16, i32 20, i32 18, i32 22, i32 80, i32 84, i32 82, i32 86, i32 24, i32 28, i32 26, i32 30, i32 88, i32 92, i32 90, i32 94, i32 32, i32 36, i32 34, i32 38, i32 96, i32 100, i32 98, i32 102, i32 40, i32 44, i32 42, i32 46, i32 104, i32 108, i32 106, i32 110, i32 48, i32 52, i32 50, i32 54, i32 112, i32 116, i32 114, i32 118, i32 56, i32 60, i32 58, i32 62, i32 120, i32 124, i32 122, i32 126, i32 128, i32 132, i32 130, i32 134, i32 192, i32 196, i32 194, i32 198, i32 136, i32 140, i32 138, i32 142, i32 200, i32 204, i32 202, i32 206, i32 144, i32 148, i32 146, i32 150, i32 208, i32 212, i32 210, i32 214, i32 152, i32 156, i32 154, i32 158, i32 216, i32 220, i32 218, i32 222, i32 160, i32 164, i32 162, i32 166, i32 224, i32 228, i32 226, i32 230, i32 168, i32 172, i32 170, i32 174, i32 232, i32 236, i32 234, i32 238, i32 176, i32 180, i32 178, i32 182, i32 240, i32 244, i32 242, i32 246, i32 184, i32 188, i32 186, i32 190, i32 248, i32 252, i32 250, i32 254, i32 1, i32 5, i32 3, i32 7, i32 65, i32 69, i32 67, i32 71, i32 9, i32 13, i32 11, i32 15, i32 73, i32 77, i32 75, i32 79, i32 17, i32 21, i32 19, i32 23, i32 81, i32 85, i32 83, i32 87, i32 25, i32 29, i32 27, i32 31, i32 89, i32 93, i32 91, i32 95, i32 33, i32 37, i32 35, i32 39, i32 97, i32 101, i32 99, i32 103, i32 41, i32 45, i32 43, i32 47, i32 105, i32 109, i32 107, i32 111, i32 49, i32 53, i32 51, i32 55, i32 113, i32 117, i32 115, i32 119, i32 57, i32 61, i32 59, i32 63, i32 121, i32 125, i32 123, i32 127, i32 129, i32 133, i32 131, i32 135, i32 193, i32 197, i32 195, i32 199, i32 137, i32 141, i32 139, i32 143, i32 201, i32 205, i32 203, i32 207, i32 145, i32 149, i32 147, i32 151, i32 209, i32 213, i32 211, i32 215, i32 153, i32 157, i32 155, i32 159, i32 217, i32 221, i32 219, i32 223, i32 161, i32 165, i32 163, i32 167, i32 225, i32 229, i32 227, i32 231, i32 169, i32 173, i32 171, i32 175, i32 233, i32 237, i32 235, i32 239, i32 177, i32 181, i32 179, i32 183, i32 241, i32 245, i32 243, i32 247, i32 185, i32 189, i32 187, i32 191, i32 249, i32 253, i32 251, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_46: +; CHECK: [[REG46:r[0-9]+]] = #70 +; CHECK: vdeal(v1,v0,[[REG46]]) +define <256 x i8> @vdeal_46(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 4, i32 5, i32 64, i32 65, i32 68, i32 69, i32 8, i32 9, i32 12, i32 13, i32 72, i32 73, i32 76, i32 77, i32 16, i32 17, i32 20, i32 21, i32 80, i32 81, i32 84, i32 85, i32 24, i32 25, i32 28, i32 29, i32 88, i32 89, i32 92, i32 93, i32 32, i32 33, i32 36, i32 37, i32 96, i32 97, i32 100, i32 101, i32 40, i32 41, i32 44, i32 45, i32 104, i32 105, i32 108, i32 109, i32 48, i32 49, i32 52, i32 53, i32 112, i32 113, i32 116, i32 117, i32 56, i32 57, i32 60, i32 61, i32 120, i32 121, i32 124, i32 125, i32 128, i32 129, i32 132, i32 133, i32 192, i32 193, i32 196, i32 197, i32 136, i32 137, i32 140, i32 141, i32 200, i32 201, i32 204, i32 205, i32 144, i32 145, i32 148, i32 149, i32 208, i32 209, i32 212, i32 213, i32 152, i32 153, i32 156, i32 157, i32 216, i32 217, i32 220, i32 221, i32 160, i32 161, i32 164, i32 165, i32 224, i32 225, i32 228, i32 229, i32 168, i32 169, i32 172, i32 173, i32 232, i32 233, i32 236, i32 237, i32 176, i32 177, i32 180, i32 181, i32 240, i32 241, i32 244, i32 245, i32 184, i32 185, i32 188, i32 189, i32 248, i32 249, i32 252, i32 253, i32 2, i32 3, i32 6, i32 7, i32 66, i32 67, i32 70, i32 71, i32 10, i32 11, i32 14, i32 15, i32 74, i32 75, i32 78, i32 79, i32 18, i32 19, i32 22, i32 23, i32 82, i32 83, i32 86, i32 87, i32 26, i32 27, i32 30, i32 31, i32 90, i32 91, i32 94, i32 95, i32 34, i32 35, i32 38, i32 39, i32 98, i32 99, i32 102, i32 103, i32 42, i32 43, i32 46, i32 47, i32 106, i32 107, i32 110, i32 111, i32 50, i32 51, i32 54, i32 55, i32 114, i32 115, i32 118, i32 119, i32 58, i32 59, i32 62, i32 63, i32 122, i32 123, i32 126, i32 127, i32 130, i32 131, i32 134, i32 135, i32 194, i32 195, i32 198, i32 199, i32 138, i32 139, i32 142, i32 143, i32 202, i32 203, i32 206, i32 207, i32 146, i32 147, i32 150, i32 151, i32 210, i32 211, i32 214, i32 215, i32 154, i32 155, i32 158, i32 159, i32 218, i32 219, i32 222, i32 223, i32 162, i32 163, i32 166, i32 167, i32 226, i32 227, i32 230, i32 231, i32 170, i32 171, i32 174, i32 175, i32 234, i32 235, i32 238, i32 239, i32 178, i32 179, i32 182, i32 183, i32 242, i32 243, i32 246, i32 247, i32 186, i32 187, i32 190, i32 191, i32 250, i32 251, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_47: +; CHECK: [[REG47:r[0-9]+]] = #71 +; CHECK: vdeal(v1,v0,[[REG47]]) +define <256 x i8> @vdeal_47(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 2, i32 4, i32 6, i32 64, i32 66, i32 68, i32 70, i32 8, i32 10, i32 12, i32 14, i32 72, i32 74, i32 76, i32 78, i32 16, i32 18, i32 20, i32 22, i32 80, i32 82, i32 84, i32 86, i32 24, i32 26, i32 28, i32 30, i32 88, i32 90, i32 92, i32 94, i32 32, i32 34, i32 36, i32 38, i32 96, i32 98, i32 100, i32 102, i32 40, i32 42, i32 44, i32 46, i32 104, i32 106, i32 108, i32 110, i32 48, i32 50, i32 52, i32 54, i32 112, i32 114, i32 116, i32 118, i32 56, i32 58, i32 60, i32 62, i32 120, i32 122, i32 124, i32 126, i32 128, i32 130, i32 132, i32 134, i32 192, i32 194, i32 196, i32 198, i32 136, i32 138, i32 140, i32 142, i32 200, i32 202, i32 204, i32 206, i32 144, i32 146, i32 148, i32 150, i32 208, i32 210, i32 212, i32 214, i32 152, i32 154, i32 156, i32 158, i32 216, i32 218, i32 220, i32 222, i32 160, i32 162, i32 164, i32 166, i32 224, i32 226, i32 228, i32 230, i32 168, i32 170, i32 172, i32 174, i32 232, i32 234, i32 236, i32 238, i32 176, i32 178, i32 180, i32 182, i32 240, i32 242, i32 244, i32 246, i32 184, i32 186, i32 188, i32 190, i32 248, i32 250, i32 252, i32 254, i32 1, i32 3, i32 5, i32 7, i32 65, i32 67, i32 69, i32 71, i32 9, i32 11, i32 13, i32 15, i32 73, i32 75, i32 77, i32 79, i32 17, i32 19, i32 21, i32 23, i32 81, i32 83, i32 85, i32 87, i32 25, i32 27, i32 29, i32 31, i32 89, i32 91, i32 93, i32 95, i32 33, i32 35, i32 37, i32 39, i32 97, i32 99, i32 101, i32 103, i32 41, i32 43, i32 45, i32 47, i32 105, i32 107, i32 109, i32 111, i32 49, i32 51, i32 53, i32 55, i32 113, i32 115, i32 117, i32 119, i32 57, i32 59, i32 61, i32 63, i32 121, i32 123, i32 125, i32 127, i32 129, i32 131, i32 133, i32 135, i32 193, i32 195, i32 197, i32 199, i32 137, i32 139, i32 141, i32 143, i32 201, i32 203, i32 205, i32 207, i32 145, i32 147, i32 149, i32 151, i32 209, i32 211, i32 213, i32 215, i32 153, i32 155, i32 157, i32 159, i32 217, i32 219, i32 221, i32 223, i32 161, i32 163, i32 165, i32 167, i32 225, i32 227, i32 229, i32 231, i32 169, i32 171, i32 173, i32 175, i32 233, i32 235, i32 237, i32 239, i32 177, i32 179, i32 181, i32 183, i32 241, i32 243, i32 245, i32 247, i32 185, i32 187, i32 189, i32 191, i32 249, i32 251, i32 253, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_48: +; CHECK: [[REG48:r[0-9]+]] = #72 +; CHECK: vdeal(v1,v0,[[REG48]]) +define <256 x i8> @vdeal_48(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 64, i32 65, i32 66, i32 67, i32 68, i32 69, i32 70, i32 71, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 80, i32 81, i32 82, i32 83, i32 84, i32 85, i32 86, i32 87, i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 96, i32 97, i32 98, i32 99, i32 100, i32 101, i32 102, i32 103, i32 48, i32 49, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 112, i32 113, i32 114, i32 115, i32 116, i32 117, i32 118, i32 119, i32 128, i32 129, i32 130, i32 131, i32 132, i32 133, i32 134, i32 135, i32 192, i32 193, i32 194, i32 195, i32 196, i32 197, i32 198, i32 199, i32 144, i32 145, i32 146, i32 147, i32 148, i32 149, i32 150, i32 151, i32 208, i32 209, i32 210, i32 211, i32 212, i32 213, i32 214, i32 215, i32 160, i32 161, i32 162, i32 163, i32 164, i32 165, i32 166, i32 167, i32 224, i32 225, i32 226, i32 227, i32 228, i32 229, i32 230, i32 231, i32 176, i32 177, i32 178, i32 179, i32 180, i32 181, i32 182, i32 183, i32 240, i32 241, i32 242, i32 243, i32 244, i32 245, i32 246, i32 247, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 72, i32 73, i32 74, i32 75, i32 76, i32 77, i32 78, i32 79, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 88, i32 89, i32 90, i32 91, i32 92, i32 93, i32 94, i32 95, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 104, i32 105, i32 106, i32 107, i32 108, i32 109, i32 110, i32 111, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63, i32 120, i32 121, i32 122, i32 123, i32 124, i32 125, i32 126, i32 127, i32 136, i32 137, i32 138, i32 139, i32 140, i32 141, i32 142, i32 143, i32 200, i32 201, i32 202, i32 203, i32 204, i32 205, i32 206, i32 207, i32 152, i32 153, i32 154, i32 155, i32 156, i32 157, i32 158, i32 159, i32 216, i32 217, i32 218, i32 219, i32 220, i32 221, i32 222, i32 223, i32 168, i32 169, i32 170, i32 171, i32 172, i32 173, i32 174, i32 175, i32 232, i32 233, i32 234, i32 235, i32 236, i32 237, i32 238, i32 239, i32 184, i32 185, i32 186, i32 187, i32 188, i32 189, i32 190, i32 191, i32 248, i32 249, i32 250, i32 251, i32 252, i32 253, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_49: +; CHECK: [[REG49:r[0-9]+]] = #73 +; CHECK: vdeal(v1,v0,[[REG49]]) +define <256 x i8> @vdeal_49(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14, i32 64, i32 72, i32 66, i32 74, i32 68, i32 76, i32 70, i32 78, i32 16, i32 24, i32 18, i32 26, i32 20, i32 28, i32 22, i32 30, i32 80, i32 88, i32 82, i32 90, i32 84, i32 92, i32 86, i32 94, i32 32, i32 40, i32 34, i32 42, i32 36, i32 44, i32 38, i32 46, i32 96, i32 104, i32 98, i32 106, i32 100, i32 108, i32 102, i32 110, i32 48, i32 56, i32 50, i32 58, i32 52, i32 60, i32 54, i32 62, i32 112, i32 120, i32 114, i32 122, i32 116, i32 124, i32 118, i32 126, i32 128, i32 136, i32 130, i32 138, i32 132, i32 140, i32 134, i32 142, i32 192, i32 200, i32 194, i32 202, i32 196, i32 204, i32 198, i32 206, i32 144, i32 152, i32 146, i32 154, i32 148, i32 156, i32 150, i32 158, i32 208, i32 216, i32 210, i32 218, i32 212, i32 220, i32 214, i32 222, i32 160, i32 168, i32 162, i32 170, i32 164, i32 172, i32 166, i32 174, i32 224, i32 232, i32 226, i32 234, i32 228, i32 236, i32 230, i32 238, i32 176, i32 184, i32 178, i32 186, i32 180, i32 188, i32 182, i32 190, i32 240, i32 248, i32 242, i32 250, i32 244, i32 252, i32 246, i32 254, i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15, i32 65, i32 73, i32 67, i32 75, i32 69, i32 77, i32 71, i32 79, i32 17, i32 25, i32 19, i32 27, i32 21, i32 29, i32 23, i32 31, i32 81, i32 89, i32 83, i32 91, i32 85, i32 93, i32 87, i32 95, i32 33, i32 41, i32 35, i32 43, i32 37, i32 45, i32 39, i32 47, i32 97, i32 105, i32 99, i32 107, i32 101, i32 109, i32 103, i32 111, i32 49, i32 57, i32 51, i32 59, i32 53, i32 61, i32 55, i32 63, i32 113, i32 121, i32 115, i32 123, i32 117, i32 125, i32 119, i32 127, i32 129, i32 137, i32 131, i32 139, i32 133, i32 141, i32 135, i32 143, i32 193, i32 201, i32 195, i32 203, i32 197, i32 205, i32 199, i32 207, i32 145, i32 153, i32 147, i32 155, i32 149, i32 157, i32 151, i32 159, i32 209, i32 217, i32 211, i32 219, i32 213, i32 221, i32 215, i32 223, i32 161, i32 169, i32 163, i32 171, i32 165, i32 173, i32 167, i32 175, i32 225, i32 233, i32 227, i32 235, i32 229, i32 237, i32 231, i32 239, i32 177, i32 185, i32 179, i32 187, i32 181, i32 189, i32 183, i32 191, i32 241, i32 249, i32 243, i32 251, i32 245, i32 253, i32 247, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_4a: +; CHECK: [[REG4a:r[0-9]+]] = #74 +; CHECK: vdeal(v1,v0,[[REG4a]]) +define <256 x i8> @vdeal_4a(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 8, i32 9, i32 4, i32 5, i32 12, i32 13, i32 64, i32 65, i32 72, i32 73, i32 68, i32 69, i32 76, i32 77, i32 16, i32 17, i32 24, i32 25, i32 20, i32 21, i32 28, i32 29, i32 80, i32 81, i32 88, i32 89, i32 84, i32 85, i32 92, i32 93, i32 32, i32 33, i32 40, i32 41, i32 36, i32 37, i32 44, i32 45, i32 96, i32 97, i32 104, i32 105, i32 100, i32 101, i32 108, i32 109, i32 48, i32 49, i32 56, i32 57, i32 52, i32 53, i32 60, i32 61, i32 112, i32 113, i32 120, i32 121, i32 116, i32 117, i32 124, i32 125, i32 128, i32 129, i32 136, i32 137, i32 132, i32 133, i32 140, i32 141, i32 192, i32 193, i32 200, i32 201, i32 196, i32 197, i32 204, i32 205, i32 144, i32 145, i32 152, i32 153, i32 148, i32 149, i32 156, i32 157, i32 208, i32 209, i32 216, i32 217, i32 212, i32 213, i32 220, i32 221, i32 160, i32 161, i32 168, i32 169, i32 164, i32 165, i32 172, i32 173, i32 224, i32 225, i32 232, i32 233, i32 228, i32 229, i32 236, i32 237, i32 176, i32 177, i32 184, i32 185, i32 180, i32 181, i32 188, i32 189, i32 240, i32 241, i32 248, i32 249, i32 244, i32 245, i32 252, i32 253, i32 2, i32 3, i32 10, i32 11, i32 6, i32 7, i32 14, i32 15, i32 66, i32 67, i32 74, i32 75, i32 70, i32 71, i32 78, i32 79, i32 18, i32 19, i32 26, i32 27, i32 22, i32 23, i32 30, i32 31, i32 82, i32 83, i32 90, i32 91, i32 86, i32 87, i32 94, i32 95, i32 34, i32 35, i32 42, i32 43, i32 38, i32 39, i32 46, i32 47, i32 98, i32 99, i32 106, i32 107, i32 102, i32 103, i32 110, i32 111, i32 50, i32 51, i32 58, i32 59, i32 54, i32 55, i32 62, i32 63, i32 114, i32 115, i32 122, i32 123, i32 118, i32 119, i32 126, i32 127, i32 130, i32 131, i32 138, i32 139, i32 134, i32 135, i32 142, i32 143, i32 194, i32 195, i32 202, i32 203, i32 198, i32 199, i32 206, i32 207, i32 146, i32 147, i32 154, i32 155, i32 150, i32 151, i32 158, i32 159, i32 210, i32 211, i32 218, i32 219, i32 214, i32 215, i32 222, i32 223, i32 162, i32 163, i32 170, i32 171, i32 166, i32 167, i32 174, i32 175, i32 226, i32 227, i32 234, i32 235, i32 230, i32 231, i32 238, i32 239, i32 178, i32 179, i32 186, i32 187, i32 182, i32 183, i32 190, i32 191, i32 242, i32 243, i32 250, i32 251, i32 246, i32 247, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_4b: +; CHECK: [[REG4b:r[0-9]+]] = #75 +; CHECK: vdeal(v1,v0,[[REG4b]]) +define <256 x i8> @vdeal_4b(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 2, i32 8, i32 10, i32 4, i32 6, i32 12, i32 14, i32 64, i32 66, i32 72, i32 74, i32 68, i32 70, i32 76, i32 78, i32 16, i32 18, i32 24, i32 26, i32 20, i32 22, i32 28, i32 30, i32 80, i32 82, i32 88, i32 90, i32 84, i32 86, i32 92, i32 94, i32 32, i32 34, i32 40, i32 42, i32 36, i32 38, i32 44, i32 46, i32 96, i32 98, i32 104, i32 106, i32 100, i32 102, i32 108, i32 110, i32 48, i32 50, i32 56, i32 58, i32 52, i32 54, i32 60, i32 62, i32 112, i32 114, i32 120, i32 122, i32 116, i32 118, i32 124, i32 126, i32 128, i32 130, i32 136, i32 138, i32 132, i32 134, i32 140, i32 142, i32 192, i32 194, i32 200, i32 202, i32 196, i32 198, i32 204, i32 206, i32 144, i32 146, i32 152, i32 154, i32 148, i32 150, i32 156, i32 158, i32 208, i32 210, i32 216, i32 218, i32 212, i32 214, i32 220, i32 222, i32 160, i32 162, i32 168, i32 170, i32 164, i32 166, i32 172, i32 174, i32 224, i32 226, i32 232, i32 234, i32 228, i32 230, i32 236, i32 238, i32 176, i32 178, i32 184, i32 186, i32 180, i32 182, i32 188, i32 190, i32 240, i32 242, i32 248, i32 250, i32 244, i32 246, i32 252, i32 254, i32 1, i32 3, i32 9, i32 11, i32 5, i32 7, i32 13, i32 15, i32 65, i32 67, i32 73, i32 75, i32 69, i32 71, i32 77, i32 79, i32 17, i32 19, i32 25, i32 27, i32 21, i32 23, i32 29, i32 31, i32 81, i32 83, i32 89, i32 91, i32 85, i32 87, i32 93, i32 95, i32 33, i32 35, i32 41, i32 43, i32 37, i32 39, i32 45, i32 47, i32 97, i32 99, i32 105, i32 107, i32 101, i32 103, i32 109, i32 111, i32 49, i32 51, i32 57, i32 59, i32 53, i32 55, i32 61, i32 63, i32 113, i32 115, i32 121, i32 123, i32 117, i32 119, i32 125, i32 127, i32 129, i32 131, i32 137, i32 139, i32 133, i32 135, i32 141, i32 143, i32 193, i32 195, i32 201, i32 203, i32 197, i32 199, i32 205, i32 207, i32 145, i32 147, i32 153, i32 155, i32 149, i32 151, i32 157, i32 159, i32 209, i32 211, i32 217, i32 219, i32 213, i32 215, i32 221, i32 223, i32 161, i32 163, i32 169, i32 171, i32 165, i32 167, i32 173, i32 175, i32 225, i32 227, i32 233, i32 235, i32 229, i32 231, i32 237, i32 239, i32 177, i32 179, i32 185, i32 187, i32 181, i32 183, i32 189, i32 191, i32 241, i32 243, i32 249, i32 251, i32 245, i32 247, i32 253, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_4c: +; CHECK: [[REG4c:r[0-9]+]] = #76 +; CHECK: vdeal(v1,v0,[[REG4c]]) +define <256 x i8> @vdeal_4c(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 10, i32 11, i32 64, i32 65, i32 66, i32 67, i32 72, i32 73, i32 74, i32 75, i32 16, i32 17, i32 18, i32 19, i32 24, i32 25, i32 26, i32 27, i32 80, i32 81, i32 82, i32 83, i32 88, i32 89, i32 90, i32 91, i32 32, i32 33, i32 34, i32 35, i32 40, i32 41, i32 42, i32 43, i32 96, i32 97, i32 98, i32 99, i32 104, i32 105, i32 106, i32 107, i32 48, i32 49, i32 50, i32 51, i32 56, i32 57, i32 58, i32 59, i32 112, i32 113, i32 114, i32 115, i32 120, i32 121, i32 122, i32 123, i32 128, i32 129, i32 130, i32 131, i32 136, i32 137, i32 138, i32 139, i32 192, i32 193, i32 194, i32 195, i32 200, i32 201, i32 202, i32 203, i32 144, i32 145, i32 146, i32 147, i32 152, i32 153, i32 154, i32 155, i32 208, i32 209, i32 210, i32 211, i32 216, i32 217, i32 218, i32 219, i32 160, i32 161, i32 162, i32 163, i32 168, i32 169, i32 170, i32 171, i32 224, i32 225, i32 226, i32 227, i32 232, i32 233, i32 234, i32 235, i32 176, i32 177, i32 178, i32 179, i32 184, i32 185, i32 186, i32 187, i32 240, i32 241, i32 242, i32 243, i32 248, i32 249, i32 250, i32 251, i32 4, i32 5, i32 6, i32 7, i32 12, i32 13, i32 14, i32 15, i32 68, i32 69, i32 70, i32 71, i32 76, i32 77, i32 78, i32 79, i32 20, i32 21, i32 22, i32 23, i32 28, i32 29, i32 30, i32 31, i32 84, i32 85, i32 86, i32 87, i32 92, i32 93, i32 94, i32 95, i32 36, i32 37, i32 38, i32 39, i32 44, i32 45, i32 46, i32 47, i32 100, i32 101, i32 102, i32 103, i32 108, i32 109, i32 110, i32 111, i32 52, i32 53, i32 54, i32 55, i32 60, i32 61, i32 62, i32 63, i32 116, i32 117, i32 118, i32 119, i32 124, i32 125, i32 126, i32 127, i32 132, i32 133, i32 134, i32 135, i32 140, i32 141, i32 142, i32 143, i32 196, i32 197, i32 198, i32 199, i32 204, i32 205, i32 206, i32 207, i32 148, i32 149, i32 150, i32 151, i32 156, i32 157, i32 158, i32 159, i32 212, i32 213, i32 214, i32 215, i32 220, i32 221, i32 222, i32 223, i32 164, i32 165, i32 166, i32 167, i32 172, i32 173, i32 174, i32 175, i32 228, i32 229, i32 230, i32 231, i32 236, i32 237, i32 238, i32 239, i32 180, i32 181, i32 182, i32 183, i32 188, i32 189, i32 190, i32 191, i32 244, i32 245, i32 246, i32 247, i32 252, i32 253, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_4d: +; CHECK: [[REG4d:r[0-9]+]] = #77 +; CHECK: vdeal(v1,v0,[[REG4d]]) +define <256 x i8> @vdeal_4d(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 4, i32 2, i32 6, i32 8, i32 12, i32 10, i32 14, i32 64, i32 68, i32 66, i32 70, i32 72, i32 76, i32 74, i32 78, i32 16, i32 20, i32 18, i32 22, i32 24, i32 28, i32 26, i32 30, i32 80, i32 84, i32 82, i32 86, i32 88, i32 92, i32 90, i32 94, i32 32, i32 36, i32 34, i32 38, i32 40, i32 44, i32 42, i32 46, i32 96, i32 100, i32 98, i32 102, i32 104, i32 108, i32 106, i32 110, i32 48, i32 52, i32 50, i32 54, i32 56, i32 60, i32 58, i32 62, i32 112, i32 116, i32 114, i32 118, i32 120, i32 124, i32 122, i32 126, i32 128, i32 132, i32 130, i32 134, i32 136, i32 140, i32 138, i32 142, i32 192, i32 196, i32 194, i32 198, i32 200, i32 204, i32 202, i32 206, i32 144, i32 148, i32 146, i32 150, i32 152, i32 156, i32 154, i32 158, i32 208, i32 212, i32 210, i32 214, i32 216, i32 220, i32 218, i32 222, i32 160, i32 164, i32 162, i32 166, i32 168, i32 172, i32 170, i32 174, i32 224, i32 228, i32 226, i32 230, i32 232, i32 236, i32 234, i32 238, i32 176, i32 180, i32 178, i32 182, i32 184, i32 188, i32 186, i32 190, i32 240, i32 244, i32 242, i32 246, i32 248, i32 252, i32 250, i32 254, i32 1, i32 5, i32 3, i32 7, i32 9, i32 13, i32 11, i32 15, i32 65, i32 69, i32 67, i32 71, i32 73, i32 77, i32 75, i32 79, i32 17, i32 21, i32 19, i32 23, i32 25, i32 29, i32 27, i32 31, i32 81, i32 85, i32 83, i32 87, i32 89, i32 93, i32 91, i32 95, i32 33, i32 37, i32 35, i32 39, i32 41, i32 45, i32 43, i32 47, i32 97, i32 101, i32 99, i32 103, i32 105, i32 109, i32 107, i32 111, i32 49, i32 53, i32 51, i32 55, i32 57, i32 61, i32 59, i32 63, i32 113, i32 117, i32 115, i32 119, i32 121, i32 125, i32 123, i32 127, i32 129, i32 133, i32 131, i32 135, i32 137, i32 141, i32 139, i32 143, i32 193, i32 197, i32 195, i32 199, i32 201, i32 205, i32 203, i32 207, i32 145, i32 149, i32 147, i32 151, i32 153, i32 157, i32 155, i32 159, i32 209, i32 213, i32 211, i32 215, i32 217, i32 221, i32 219, i32 223, i32 161, i32 165, i32 163, i32 167, i32 169, i32 173, i32 171, i32 175, i32 225, i32 229, i32 227, i32 231, i32 233, i32 237, i32 235, i32 239, i32 177, i32 181, i32 179, i32 183, i32 185, i32 189, i32 187, i32 191, i32 241, i32 245, i32 243, i32 247, i32 249, i32 253, i32 251, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_4e: +; CHECK: [[REG4e:r[0-9]+]] = #78 +; CHECK: vdeal(v1,v0,[[REG4e]]) +define <256 x i8> @vdeal_4e(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 4, i32 5, i32 8, i32 9, i32 12, i32 13, i32 64, i32 65, i32 68, i32 69, i32 72, i32 73, i32 76, i32 77, i32 16, i32 17, i32 20, i32 21, i32 24, i32 25, i32 28, i32 29, i32 80, i32 81, i32 84, i32 85, i32 88, i32 89, i32 92, i32 93, i32 32, i32 33, i32 36, i32 37, i32 40, i32 41, i32 44, i32 45, i32 96, i32 97, i32 100, i32 101, i32 104, i32 105, i32 108, i32 109, i32 48, i32 49, i32 52, i32 53, i32 56, i32 57, i32 60, i32 61, i32 112, i32 113, i32 116, i32 117, i32 120, i32 121, i32 124, i32 125, i32 128, i32 129, i32 132, i32 133, i32 136, i32 137, i32 140, i32 141, i32 192, i32 193, i32 196, i32 197, i32 200, i32 201, i32 204, i32 205, i32 144, i32 145, i32 148, i32 149, i32 152, i32 153, i32 156, i32 157, i32 208, i32 209, i32 212, i32 213, i32 216, i32 217, i32 220, i32 221, i32 160, i32 161, i32 164, i32 165, i32 168, i32 169, i32 172, i32 173, i32 224, i32 225, i32 228, i32 229, i32 232, i32 233, i32 236, i32 237, i32 176, i32 177, i32 180, i32 181, i32 184, i32 185, i32 188, i32 189, i32 240, i32 241, i32 244, i32 245, i32 248, i32 249, i32 252, i32 253, i32 2, i32 3, i32 6, i32 7, i32 10, i32 11, i32 14, i32 15, i32 66, i32 67, i32 70, i32 71, i32 74, i32 75, i32 78, i32 79, i32 18, i32 19, i32 22, i32 23, i32 26, i32 27, i32 30, i32 31, i32 82, i32 83, i32 86, i32 87, i32 90, i32 91, i32 94, i32 95, i32 34, i32 35, i32 38, i32 39, i32 42, i32 43, i32 46, i32 47, i32 98, i32 99, i32 102, i32 103, i32 106, i32 107, i32 110, i32 111, i32 50, i32 51, i32 54, i32 55, i32 58, i32 59, i32 62, i32 63, i32 114, i32 115, i32 118, i32 119, i32 122, i32 123, i32 126, i32 127, i32 130, i32 131, i32 134, i32 135, i32 138, i32 139, i32 142, i32 143, i32 194, i32 195, i32 198, i32 199, i32 202, i32 203, i32 206, i32 207, i32 146, i32 147, i32 150, i32 151, i32 154, i32 155, i32 158, i32 159, i32 210, i32 211, i32 214, i32 215, i32 218, i32 219, i32 222, i32 223, i32 162, i32 163, i32 166, i32 167, i32 170, i32 171, i32 174, i32 175, i32 226, i32 227, i32 230, i32 231, i32 234, i32 235, i32 238, i32 239, i32 178, i32 179, i32 182, i32 183, i32 186, i32 187, i32 190, i32 191, i32 242, i32 243, i32 246, i32 247, i32 250, i32 251, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_4f: +; CHECK: [[REG4f:r[0-9]+]] = #79 +; CHECK: vdeal(v1,v0,[[REG4f]]) +define <256 x i8> @vdeal_4f(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 64, i32 66, i32 68, i32 70, i32 72, i32 74, i32 76, i32 78, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30, i32 80, i32 82, i32 84, i32 86, i32 88, i32 90, i32 92, i32 94, i32 32, i32 34, i32 36, i32 38, i32 40, i32 42, i32 44, i32 46, i32 96, i32 98, i32 100, i32 102, i32 104, i32 106, i32 108, i32 110, i32 48, i32 50, i32 52, i32 54, i32 56, i32 58, i32 60, i32 62, i32 112, i32 114, i32 116, i32 118, i32 120, i32 122, i32 124, i32 126, i32 128, i32 130, i32 132, i32 134, i32 136, i32 138, i32 140, i32 142, i32 192, i32 194, i32 196, i32 198, i32 200, i32 202, i32 204, i32 206, i32 144, i32 146, i32 148, i32 150, i32 152, i32 154, i32 156, i32 158, i32 208, i32 210, i32 212, i32 214, i32 216, i32 218, i32 220, i32 222, i32 160, i32 162, i32 164, i32 166, i32 168, i32 170, i32 172, i32 174, i32 224, i32 226, i32 228, i32 230, i32 232, i32 234, i32 236, i32 238, i32 176, i32 178, i32 180, i32 182, i32 184, i32 186, i32 188, i32 190, i32 240, i32 242, i32 244, i32 246, i32 248, i32 250, i32 252, i32 254, i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 65, i32 67, i32 69, i32 71, i32 73, i32 75, i32 77, i32 79, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31, i32 81, i32 83, i32 85, i32 87, i32 89, i32 91, i32 93, i32 95, i32 33, i32 35, i32 37, i32 39, i32 41, i32 43, i32 45, i32 47, i32 97, i32 99, i32 101, i32 103, i32 105, i32 107, i32 109, i32 111, i32 49, i32 51, i32 53, i32 55, i32 57, i32 59, i32 61, i32 63, i32 113, i32 115, i32 117, i32 119, i32 121, i32 123, i32 125, i32 127, i32 129, i32 131, i32 133, i32 135, i32 137, i32 139, i32 141, i32 143, i32 193, i32 195, i32 197, i32 199, i32 201, i32 203, i32 205, i32 207, i32 145, i32 147, i32 149, i32 151, i32 153, i32 155, i32 157, i32 159, i32 209, i32 211, i32 213, i32 215, i32 217, i32 219, i32 221, i32 223, i32 161, i32 163, i32 165, i32 167, i32 169, i32 171, i32 173, i32 175, i32 225, i32 227, i32 229, i32 231, i32 233, i32 235, i32 237, i32 239, i32 177, i32 179, i32 181, i32 183, i32 185, i32 187, i32 189, i32 191, i32 241, i32 243, i32 245, i32 247, i32 249, i32 251, i32 253, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_50: +; CHECK: [[REG50:r[0-9]+]] = #80 +; CHECK: vdeal(v1,v0,[[REG50]]) +define <256 x i8> @vdeal_50(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 64, i32 65, i32 66, i32 67, i32 68, i32 69, i32 70, i32 71, i32 72, i32 73, i32 74, i32 75, i32 76, i32 77, i32 78, i32 79, i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 96, i32 97, i32 98, i32 99, i32 100, i32 101, i32 102, i32 103, i32 104, i32 105, i32 106, i32 107, i32 108, i32 109, i32 110, i32 111, i32 128, i32 129, i32 130, i32 131, i32 132, i32 133, i32 134, i32 135, i32 136, i32 137, i32 138, i32 139, i32 140, i32 141, i32 142, i32 143, i32 192, i32 193, i32 194, i32 195, i32 196, i32 197, i32 198, i32 199, i32 200, i32 201, i32 202, i32 203, i32 204, i32 205, i32 206, i32 207, i32 160, i32 161, i32 162, i32 163, i32 164, i32 165, i32 166, i32 167, i32 168, i32 169, i32 170, i32 171, i32 172, i32 173, i32 174, i32 175, i32 224, i32 225, i32 226, i32 227, i32 228, i32 229, i32 230, i32 231, i32 232, i32 233, i32 234, i32 235, i32 236, i32 237, i32 238, i32 239, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 80, i32 81, i32 82, i32 83, i32 84, i32 85, i32 86, i32 87, i32 88, i32 89, i32 90, i32 91, i32 92, i32 93, i32 94, i32 95, i32 48, i32 49, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63, i32 112, i32 113, i32 114, i32 115, i32 116, i32 117, i32 118, i32 119, i32 120, i32 121, i32 122, i32 123, i32 124, i32 125, i32 126, i32 127, i32 144, i32 145, i32 146, i32 147, i32 148, i32 149, i32 150, i32 151, i32 152, i32 153, i32 154, i32 155, i32 156, i32 157, i32 158, i32 159, i32 208, i32 209, i32 210, i32 211, i32 212, i32 213, i32 214, i32 215, i32 216, i32 217, i32 218, i32 219, i32 220, i32 221, i32 222, i32 223, i32 176, i32 177, i32 178, i32 179, i32 180, i32 181, i32 182, i32 183, i32 184, i32 185, i32 186, i32 187, i32 188, i32 189, i32 190, i32 191, i32 240, i32 241, i32 242, i32 243, i32 244, i32 245, i32 246, i32 247, i32 248, i32 249, i32 250, i32 251, i32 252, i32 253, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_51: +; CHECK: [[REG51:r[0-9]+]] = #81 +; CHECK: vdeal(v1,v0,[[REG51]]) +define <256 x i8> @vdeal_51(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 16, i32 2, i32 18, i32 4, i32 20, i32 6, i32 22, i32 8, i32 24, i32 10, i32 26, i32 12, i32 28, i32 14, i32 30, i32 64, i32 80, i32 66, i32 82, i32 68, i32 84, i32 70, i32 86, i32 72, i32 88, i32 74, i32 90, i32 76, i32 92, i32 78, i32 94, i32 32, i32 48, i32 34, i32 50, i32 36, i32 52, i32 38, i32 54, i32 40, i32 56, i32 42, i32 58, i32 44, i32 60, i32 46, i32 62, i32 96, i32 112, i32 98, i32 114, i32 100, i32 116, i32 102, i32 118, i32 104, i32 120, i32 106, i32 122, i32 108, i32 124, i32 110, i32 126, i32 128, i32 144, i32 130, i32 146, i32 132, i32 148, i32 134, i32 150, i32 136, i32 152, i32 138, i32 154, i32 140, i32 156, i32 142, i32 158, i32 192, i32 208, i32 194, i32 210, i32 196, i32 212, i32 198, i32 214, i32 200, i32 216, i32 202, i32 218, i32 204, i32 220, i32 206, i32 222, i32 160, i32 176, i32 162, i32 178, i32 164, i32 180, i32 166, i32 182, i32 168, i32 184, i32 170, i32 186, i32 172, i32 188, i32 174, i32 190, i32 224, i32 240, i32 226, i32 242, i32 228, i32 244, i32 230, i32 246, i32 232, i32 248, i32 234, i32 250, i32 236, i32 252, i32 238, i32 254, i32 1, i32 17, i32 3, i32 19, i32 5, i32 21, i32 7, i32 23, i32 9, i32 25, i32 11, i32 27, i32 13, i32 29, i32 15, i32 31, i32 65, i32 81, i32 67, i32 83, i32 69, i32 85, i32 71, i32 87, i32 73, i32 89, i32 75, i32 91, i32 77, i32 93, i32 79, i32 95, i32 33, i32 49, i32 35, i32 51, i32 37, i32 53, i32 39, i32 55, i32 41, i32 57, i32 43, i32 59, i32 45, i32 61, i32 47, i32 63, i32 97, i32 113, i32 99, i32 115, i32 101, i32 117, i32 103, i32 119, i32 105, i32 121, i32 107, i32 123, i32 109, i32 125, i32 111, i32 127, i32 129, i32 145, i32 131, i32 147, i32 133, i32 149, i32 135, i32 151, i32 137, i32 153, i32 139, i32 155, i32 141, i32 157, i32 143, i32 159, i32 193, i32 209, i32 195, i32 211, i32 197, i32 213, i32 199, i32 215, i32 201, i32 217, i32 203, i32 219, i32 205, i32 221, i32 207, i32 223, i32 161, i32 177, i32 163, i32 179, i32 165, i32 181, i32 167, i32 183, i32 169, i32 185, i32 171, i32 187, i32 173, i32 189, i32 175, i32 191, i32 225, i32 241, i32 227, i32 243, i32 229, i32 245, i32 231, i32 247, i32 233, i32 249, i32 235, i32 251, i32 237, i32 253, i32 239, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_52: +; CHECK: [[REG52:r[0-9]+]] = #82 +; CHECK: vdeal(v1,v0,[[REG52]]) +define <256 x i8> @vdeal_52(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 16, i32 17, i32 4, i32 5, i32 20, i32 21, i32 8, i32 9, i32 24, i32 25, i32 12, i32 13, i32 28, i32 29, i32 64, i32 65, i32 80, i32 81, i32 68, i32 69, i32 84, i32 85, i32 72, i32 73, i32 88, i32 89, i32 76, i32 77, i32 92, i32 93, i32 32, i32 33, i32 48, i32 49, i32 36, i32 37, i32 52, i32 53, i32 40, i32 41, i32 56, i32 57, i32 44, i32 45, i32 60, i32 61, i32 96, i32 97, i32 112, i32 113, i32 100, i32 101, i32 116, i32 117, i32 104, i32 105, i32 120, i32 121, i32 108, i32 109, i32 124, i32 125, i32 128, i32 129, i32 144, i32 145, i32 132, i32 133, i32 148, i32 149, i32 136, i32 137, i32 152, i32 153, i32 140, i32 141, i32 156, i32 157, i32 192, i32 193, i32 208, i32 209, i32 196, i32 197, i32 212, i32 213, i32 200, i32 201, i32 216, i32 217, i32 204, i32 205, i32 220, i32 221, i32 160, i32 161, i32 176, i32 177, i32 164, i32 165, i32 180, i32 181, i32 168, i32 169, i32 184, i32 185, i32 172, i32 173, i32 188, i32 189, i32 224, i32 225, i32 240, i32 241, i32 228, i32 229, i32 244, i32 245, i32 232, i32 233, i32 248, i32 249, i32 236, i32 237, i32 252, i32 253, i32 2, i32 3, i32 18, i32 19, i32 6, i32 7, i32 22, i32 23, i32 10, i32 11, i32 26, i32 27, i32 14, i32 15, i32 30, i32 31, i32 66, i32 67, i32 82, i32 83, i32 70, i32 71, i32 86, i32 87, i32 74, i32 75, i32 90, i32 91, i32 78, i32 79, i32 94, i32 95, i32 34, i32 35, i32 50, i32 51, i32 38, i32 39, i32 54, i32 55, i32 42, i32 43, i32 58, i32 59, i32 46, i32 47, i32 62, i32 63, i32 98, i32 99, i32 114, i32 115, i32 102, i32 103, i32 118, i32 119, i32 106, i32 107, i32 122, i32 123, i32 110, i32 111, i32 126, i32 127, i32 130, i32 131, i32 146, i32 147, i32 134, i32 135, i32 150, i32 151, i32 138, i32 139, i32 154, i32 155, i32 142, i32 143, i32 158, i32 159, i32 194, i32 195, i32 210, i32 211, i32 198, i32 199, i32 214, i32 215, i32 202, i32 203, i32 218, i32 219, i32 206, i32 207, i32 222, i32 223, i32 162, i32 163, i32 178, i32 179, i32 166, i32 167, i32 182, i32 183, i32 170, i32 171, i32 186, i32 187, i32 174, i32 175, i32 190, i32 191, i32 226, i32 227, i32 242, i32 243, i32 230, i32 231, i32 246, i32 247, i32 234, i32 235, i32 250, i32 251, i32 238, i32 239, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_53: +; CHECK: [[REG53:r[0-9]+]] = #83 +; CHECK: vdeal(v1,v0,[[REG53]]) +define <256 x i8> @vdeal_53(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 2, i32 16, i32 18, i32 4, i32 6, i32 20, i32 22, i32 8, i32 10, i32 24, i32 26, i32 12, i32 14, i32 28, i32 30, i32 64, i32 66, i32 80, i32 82, i32 68, i32 70, i32 84, i32 86, i32 72, i32 74, i32 88, i32 90, i32 76, i32 78, i32 92, i32 94, i32 32, i32 34, i32 48, i32 50, i32 36, i32 38, i32 52, i32 54, i32 40, i32 42, i32 56, i32 58, i32 44, i32 46, i32 60, i32 62, i32 96, i32 98, i32 112, i32 114, i32 100, i32 102, i32 116, i32 118, i32 104, i32 106, i32 120, i32 122, i32 108, i32 110, i32 124, i32 126, i32 128, i32 130, i32 144, i32 146, i32 132, i32 134, i32 148, i32 150, i32 136, i32 138, i32 152, i32 154, i32 140, i32 142, i32 156, i32 158, i32 192, i32 194, i32 208, i32 210, i32 196, i32 198, i32 212, i32 214, i32 200, i32 202, i32 216, i32 218, i32 204, i32 206, i32 220, i32 222, i32 160, i32 162, i32 176, i32 178, i32 164, i32 166, i32 180, i32 182, i32 168, i32 170, i32 184, i32 186, i32 172, i32 174, i32 188, i32 190, i32 224, i32 226, i32 240, i32 242, i32 228, i32 230, i32 244, i32 246, i32 232, i32 234, i32 248, i32 250, i32 236, i32 238, i32 252, i32 254, i32 1, i32 3, i32 17, i32 19, i32 5, i32 7, i32 21, i32 23, i32 9, i32 11, i32 25, i32 27, i32 13, i32 15, i32 29, i32 31, i32 65, i32 67, i32 81, i32 83, i32 69, i32 71, i32 85, i32 87, i32 73, i32 75, i32 89, i32 91, i32 77, i32 79, i32 93, i32 95, i32 33, i32 35, i32 49, i32 51, i32 37, i32 39, i32 53, i32 55, i32 41, i32 43, i32 57, i32 59, i32 45, i32 47, i32 61, i32 63, i32 97, i32 99, i32 113, i32 115, i32 101, i32 103, i32 117, i32 119, i32 105, i32 107, i32 121, i32 123, i32 109, i32 111, i32 125, i32 127, i32 129, i32 131, i32 145, i32 147, i32 133, i32 135, i32 149, i32 151, i32 137, i32 139, i32 153, i32 155, i32 141, i32 143, i32 157, i32 159, i32 193, i32 195, i32 209, i32 211, i32 197, i32 199, i32 213, i32 215, i32 201, i32 203, i32 217, i32 219, i32 205, i32 207, i32 221, i32 223, i32 161, i32 163, i32 177, i32 179, i32 165, i32 167, i32 181, i32 183, i32 169, i32 171, i32 185, i32 187, i32 173, i32 175, i32 189, i32 191, i32 225, i32 227, i32 241, i32 243, i32 229, i32 231, i32 245, i32 247, i32 233, i32 235, i32 249, i32 251, i32 237, i32 239, i32 253, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_54: +; CHECK: [[REG54:r[0-9]+]] = #84 +; CHECK: vdeal(v1,v0,[[REG54]]) +define <256 x i8> @vdeal_54(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 2, i32 3, i32 16, i32 17, i32 18, i32 19, i32 8, i32 9, i32 10, i32 11, i32 24, i32 25, i32 26, i32 27, i32 64, i32 65, i32 66, i32 67, i32 80, i32 81, i32 82, i32 83, i32 72, i32 73, i32 74, i32 75, i32 88, i32 89, i32 90, i32 91, i32 32, i32 33, i32 34, i32 35, i32 48, i32 49, i32 50, i32 51, i32 40, i32 41, i32 42, i32 43, i32 56, i32 57, i32 58, i32 59, i32 96, i32 97, i32 98, i32 99, i32 112, i32 113, i32 114, i32 115, i32 104, i32 105, i32 106, i32 107, i32 120, i32 121, i32 122, i32 123, i32 128, i32 129, i32 130, i32 131, i32 144, i32 145, i32 146, i32 147, i32 136, i32 137, i32 138, i32 139, i32 152, i32 153, i32 154, i32 155, i32 192, i32 193, i32 194, i32 195, i32 208, i32 209, i32 210, i32 211, i32 200, i32 201, i32 202, i32 203, i32 216, i32 217, i32 218, i32 219, i32 160, i32 161, i32 162, i32 163, i32 176, i32 177, i32 178, i32 179, i32 168, i32 169, i32 170, i32 171, i32 184, i32 185, i32 186, i32 187, i32 224, i32 225, i32 226, i32 227, i32 240, i32 241, i32 242, i32 243, i32 232, i32 233, i32 234, i32 235, i32 248, i32 249, i32 250, i32 251, i32 4, i32 5, i32 6, i32 7, i32 20, i32 21, i32 22, i32 23, i32 12, i32 13, i32 14, i32 15, i32 28, i32 29, i32 30, i32 31, i32 68, i32 69, i32 70, i32 71, i32 84, i32 85, i32 86, i32 87, i32 76, i32 77, i32 78, i32 79, i32 92, i32 93, i32 94, i32 95, i32 36, i32 37, i32 38, i32 39, i32 52, i32 53, i32 54, i32 55, i32 44, i32 45, i32 46, i32 47, i32 60, i32 61, i32 62, i32 63, i32 100, i32 101, i32 102, i32 103, i32 116, i32 117, i32 118, i32 119, i32 108, i32 109, i32 110, i32 111, i32 124, i32 125, i32 126, i32 127, i32 132, i32 133, i32 134, i32 135, i32 148, i32 149, i32 150, i32 151, i32 140, i32 141, i32 142, i32 143, i32 156, i32 157, i32 158, i32 159, i32 196, i32 197, i32 198, i32 199, i32 212, i32 213, i32 214, i32 215, i32 204, i32 205, i32 206, i32 207, i32 220, i32 221, i32 222, i32 223, i32 164, i32 165, i32 166, i32 167, i32 180, i32 181, i32 182, i32 183, i32 172, i32 173, i32 174, i32 175, i32 188, i32 189, i32 190, i32 191, i32 228, i32 229, i32 230, i32 231, i32 244, i32 245, i32 246, i32 247, i32 236, i32 237, i32 238, i32 239, i32 252, i32 253, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_55: +; CHECK: [[REG55:r[0-9]+]] = #85 +; CHECK: vdeal(v1,v0,[[REG55]]) +define <256 x i8> @vdeal_55(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 4, i32 2, i32 6, i32 16, i32 20, i32 18, i32 22, i32 8, i32 12, i32 10, i32 14, i32 24, i32 28, i32 26, i32 30, i32 64, i32 68, i32 66, i32 70, i32 80, i32 84, i32 82, i32 86, i32 72, i32 76, i32 74, i32 78, i32 88, i32 92, i32 90, i32 94, i32 32, i32 36, i32 34, i32 38, i32 48, i32 52, i32 50, i32 54, i32 40, i32 44, i32 42, i32 46, i32 56, i32 60, i32 58, i32 62, i32 96, i32 100, i32 98, i32 102, i32 112, i32 116, i32 114, i32 118, i32 104, i32 108, i32 106, i32 110, i32 120, i32 124, i32 122, i32 126, i32 128, i32 132, i32 130, i32 134, i32 144, i32 148, i32 146, i32 150, i32 136, i32 140, i32 138, i32 142, i32 152, i32 156, i32 154, i32 158, i32 192, i32 196, i32 194, i32 198, i32 208, i32 212, i32 210, i32 214, i32 200, i32 204, i32 202, i32 206, i32 216, i32 220, i32 218, i32 222, i32 160, i32 164, i32 162, i32 166, i32 176, i32 180, i32 178, i32 182, i32 168, i32 172, i32 170, i32 174, i32 184, i32 188, i32 186, i32 190, i32 224, i32 228, i32 226, i32 230, i32 240, i32 244, i32 242, i32 246, i32 232, i32 236, i32 234, i32 238, i32 248, i32 252, i32 250, i32 254, i32 1, i32 5, i32 3, i32 7, i32 17, i32 21, i32 19, i32 23, i32 9, i32 13, i32 11, i32 15, i32 25, i32 29, i32 27, i32 31, i32 65, i32 69, i32 67, i32 71, i32 81, i32 85, i32 83, i32 87, i32 73, i32 77, i32 75, i32 79, i32 89, i32 93, i32 91, i32 95, i32 33, i32 37, i32 35, i32 39, i32 49, i32 53, i32 51, i32 55, i32 41, i32 45, i32 43, i32 47, i32 57, i32 61, i32 59, i32 63, i32 97, i32 101, i32 99, i32 103, i32 113, i32 117, i32 115, i32 119, i32 105, i32 109, i32 107, i32 111, i32 121, i32 125, i32 123, i32 127, i32 129, i32 133, i32 131, i32 135, i32 145, i32 149, i32 147, i32 151, i32 137, i32 141, i32 139, i32 143, i32 153, i32 157, i32 155, i32 159, i32 193, i32 197, i32 195, i32 199, i32 209, i32 213, i32 211, i32 215, i32 201, i32 205, i32 203, i32 207, i32 217, i32 221, i32 219, i32 223, i32 161, i32 165, i32 163, i32 167, i32 177, i32 181, i32 179, i32 183, i32 169, i32 173, i32 171, i32 175, i32 185, i32 189, i32 187, i32 191, i32 225, i32 229, i32 227, i32 231, i32 241, i32 245, i32 243, i32 247, i32 233, i32 237, i32 235, i32 239, i32 249, i32 253, i32 251, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_56: +; CHECK: [[REG56:r[0-9]+]] = #86 +; CHECK: vdeal(v1,v0,[[REG56]]) +define <256 x i8> @vdeal_56(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 4, i32 5, i32 16, i32 17, i32 20, i32 21, i32 8, i32 9, i32 12, i32 13, i32 24, i32 25, i32 28, i32 29, i32 64, i32 65, i32 68, i32 69, i32 80, i32 81, i32 84, i32 85, i32 72, i32 73, i32 76, i32 77, i32 88, i32 89, i32 92, i32 93, i32 32, i32 33, i32 36, i32 37, i32 48, i32 49, i32 52, i32 53, i32 40, i32 41, i32 44, i32 45, i32 56, i32 57, i32 60, i32 61, i32 96, i32 97, i32 100, i32 101, i32 112, i32 113, i32 116, i32 117, i32 104, i32 105, i32 108, i32 109, i32 120, i32 121, i32 124, i32 125, i32 128, i32 129, i32 132, i32 133, i32 144, i32 145, i32 148, i32 149, i32 136, i32 137, i32 140, i32 141, i32 152, i32 153, i32 156, i32 157, i32 192, i32 193, i32 196, i32 197, i32 208, i32 209, i32 212, i32 213, i32 200, i32 201, i32 204, i32 205, i32 216, i32 217, i32 220, i32 221, i32 160, i32 161, i32 164, i32 165, i32 176, i32 177, i32 180, i32 181, i32 168, i32 169, i32 172, i32 173, i32 184, i32 185, i32 188, i32 189, i32 224, i32 225, i32 228, i32 229, i32 240, i32 241, i32 244, i32 245, i32 232, i32 233, i32 236, i32 237, i32 248, i32 249, i32 252, i32 253, i32 2, i32 3, i32 6, i32 7, i32 18, i32 19, i32 22, i32 23, i32 10, i32 11, i32 14, i32 15, i32 26, i32 27, i32 30, i32 31, i32 66, i32 67, i32 70, i32 71, i32 82, i32 83, i32 86, i32 87, i32 74, i32 75, i32 78, i32 79, i32 90, i32 91, i32 94, i32 95, i32 34, i32 35, i32 38, i32 39, i32 50, i32 51, i32 54, i32 55, i32 42, i32 43, i32 46, i32 47, i32 58, i32 59, i32 62, i32 63, i32 98, i32 99, i32 102, i32 103, i32 114, i32 115, i32 118, i32 119, i32 106, i32 107, i32 110, i32 111, i32 122, i32 123, i32 126, i32 127, i32 130, i32 131, i32 134, i32 135, i32 146, i32 147, i32 150, i32 151, i32 138, i32 139, i32 142, i32 143, i32 154, i32 155, i32 158, i32 159, i32 194, i32 195, i32 198, i32 199, i32 210, i32 211, i32 214, i32 215, i32 202, i32 203, i32 206, i32 207, i32 218, i32 219, i32 222, i32 223, i32 162, i32 163, i32 166, i32 167, i32 178, i32 179, i32 182, i32 183, i32 170, i32 171, i32 174, i32 175, i32 186, i32 187, i32 190, i32 191, i32 226, i32 227, i32 230, i32 231, i32 242, i32 243, i32 246, i32 247, i32 234, i32 235, i32 238, i32 239, i32 250, i32 251, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_57: +; CHECK: [[REG57:r[0-9]+]] = #87 +; CHECK: vdeal(v1,v0,[[REG57]]) +define <256 x i8> @vdeal_57(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 2, i32 4, i32 6, i32 16, i32 18, i32 20, i32 22, i32 8, i32 10, i32 12, i32 14, i32 24, i32 26, i32 28, i32 30, i32 64, i32 66, i32 68, i32 70, i32 80, i32 82, i32 84, i32 86, i32 72, i32 74, i32 76, i32 78, i32 88, i32 90, i32 92, i32 94, i32 32, i32 34, i32 36, i32 38, i32 48, i32 50, i32 52, i32 54, i32 40, i32 42, i32 44, i32 46, i32 56, i32 58, i32 60, i32 62, i32 96, i32 98, i32 100, i32 102, i32 112, i32 114, i32 116, i32 118, i32 104, i32 106, i32 108, i32 110, i32 120, i32 122, i32 124, i32 126, i32 128, i32 130, i32 132, i32 134, i32 144, i32 146, i32 148, i32 150, i32 136, i32 138, i32 140, i32 142, i32 152, i32 154, i32 156, i32 158, i32 192, i32 194, i32 196, i32 198, i32 208, i32 210, i32 212, i32 214, i32 200, i32 202, i32 204, i32 206, i32 216, i32 218, i32 220, i32 222, i32 160, i32 162, i32 164, i32 166, i32 176, i32 178, i32 180, i32 182, i32 168, i32 170, i32 172, i32 174, i32 184, i32 186, i32 188, i32 190, i32 224, i32 226, i32 228, i32 230, i32 240, i32 242, i32 244, i32 246, i32 232, i32 234, i32 236, i32 238, i32 248, i32 250, i32 252, i32 254, i32 1, i32 3, i32 5, i32 7, i32 17, i32 19, i32 21, i32 23, i32 9, i32 11, i32 13, i32 15, i32 25, i32 27, i32 29, i32 31, i32 65, i32 67, i32 69, i32 71, i32 81, i32 83, i32 85, i32 87, i32 73, i32 75, i32 77, i32 79, i32 89, i32 91, i32 93, i32 95, i32 33, i32 35, i32 37, i32 39, i32 49, i32 51, i32 53, i32 55, i32 41, i32 43, i32 45, i32 47, i32 57, i32 59, i32 61, i32 63, i32 97, i32 99, i32 101, i32 103, i32 113, i32 115, i32 117, i32 119, i32 105, i32 107, i32 109, i32 111, i32 121, i32 123, i32 125, i32 127, i32 129, i32 131, i32 133, i32 135, i32 145, i32 147, i32 149, i32 151, i32 137, i32 139, i32 141, i32 143, i32 153, i32 155, i32 157, i32 159, i32 193, i32 195, i32 197, i32 199, i32 209, i32 211, i32 213, i32 215, i32 201, i32 203, i32 205, i32 207, i32 217, i32 219, i32 221, i32 223, i32 161, i32 163, i32 165, i32 167, i32 177, i32 179, i32 181, i32 183, i32 169, i32 171, i32 173, i32 175, i32 185, i32 187, i32 189, i32 191, i32 225, i32 227, i32 229, i32 231, i32 241, i32 243, i32 245, i32 247, i32 233, i32 235, i32 237, i32 239, i32 249, i32 251, i32 253, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_58: +; CHECK: [[REG58:r[0-9]+]] = #88 +; CHECK: vdeal(v1,v0,[[REG58]]) +define <256 x i8> @vdeal_58(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 64, i32 65, i32 66, i32 67, i32 68, i32 69, i32 70, i32 71, i32 80, i32 81, i32 82, i32 83, i32 84, i32 85, i32 86, i32 87, i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 48, i32 49, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 96, i32 97, i32 98, i32 99, i32 100, i32 101, i32 102, i32 103, i32 112, i32 113, i32 114, i32 115, i32 116, i32 117, i32 118, i32 119, i32 128, i32 129, i32 130, i32 131, i32 132, i32 133, i32 134, i32 135, i32 144, i32 145, i32 146, i32 147, i32 148, i32 149, i32 150, i32 151, i32 192, i32 193, i32 194, i32 195, i32 196, i32 197, i32 198, i32 199, i32 208, i32 209, i32 210, i32 211, i32 212, i32 213, i32 214, i32 215, i32 160, i32 161, i32 162, i32 163, i32 164, i32 165, i32 166, i32 167, i32 176, i32 177, i32 178, i32 179, i32 180, i32 181, i32 182, i32 183, i32 224, i32 225, i32 226, i32 227, i32 228, i32 229, i32 230, i32 231, i32 240, i32 241, i32 242, i32 243, i32 244, i32 245, i32 246, i32 247, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 72, i32 73, i32 74, i32 75, i32 76, i32 77, i32 78, i32 79, i32 88, i32 89, i32 90, i32 91, i32 92, i32 93, i32 94, i32 95, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63, i32 104, i32 105, i32 106, i32 107, i32 108, i32 109, i32 110, i32 111, i32 120, i32 121, i32 122, i32 123, i32 124, i32 125, i32 126, i32 127, i32 136, i32 137, i32 138, i32 139, i32 140, i32 141, i32 142, i32 143, i32 152, i32 153, i32 154, i32 155, i32 156, i32 157, i32 158, i32 159, i32 200, i32 201, i32 202, i32 203, i32 204, i32 205, i32 206, i32 207, i32 216, i32 217, i32 218, i32 219, i32 220, i32 221, i32 222, i32 223, i32 168, i32 169, i32 170, i32 171, i32 172, i32 173, i32 174, i32 175, i32 184, i32 185, i32 186, i32 187, i32 188, i32 189, i32 190, i32 191, i32 232, i32 233, i32 234, i32 235, i32 236, i32 237, i32 238, i32 239, i32 248, i32 249, i32 250, i32 251, i32 252, i32 253, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_59: +; CHECK: [[REG59:r[0-9]+]] = #89 +; CHECK: vdeal(v1,v0,[[REG59]]) +define <256 x i8> @vdeal_59(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14, i32 16, i32 24, i32 18, i32 26, i32 20, i32 28, i32 22, i32 30, i32 64, i32 72, i32 66, i32 74, i32 68, i32 76, i32 70, i32 78, i32 80, i32 88, i32 82, i32 90, i32 84, i32 92, i32 86, i32 94, i32 32, i32 40, i32 34, i32 42, i32 36, i32 44, i32 38, i32 46, i32 48, i32 56, i32 50, i32 58, i32 52, i32 60, i32 54, i32 62, i32 96, i32 104, i32 98, i32 106, i32 100, i32 108, i32 102, i32 110, i32 112, i32 120, i32 114, i32 122, i32 116, i32 124, i32 118, i32 126, i32 128, i32 136, i32 130, i32 138, i32 132, i32 140, i32 134, i32 142, i32 144, i32 152, i32 146, i32 154, i32 148, i32 156, i32 150, i32 158, i32 192, i32 200, i32 194, i32 202, i32 196, i32 204, i32 198, i32 206, i32 208, i32 216, i32 210, i32 218, i32 212, i32 220, i32 214, i32 222, i32 160, i32 168, i32 162, i32 170, i32 164, i32 172, i32 166, i32 174, i32 176, i32 184, i32 178, i32 186, i32 180, i32 188, i32 182, i32 190, i32 224, i32 232, i32 226, i32 234, i32 228, i32 236, i32 230, i32 238, i32 240, i32 248, i32 242, i32 250, i32 244, i32 252, i32 246, i32 254, i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15, i32 17, i32 25, i32 19, i32 27, i32 21, i32 29, i32 23, i32 31, i32 65, i32 73, i32 67, i32 75, i32 69, i32 77, i32 71, i32 79, i32 81, i32 89, i32 83, i32 91, i32 85, i32 93, i32 87, i32 95, i32 33, i32 41, i32 35, i32 43, i32 37, i32 45, i32 39, i32 47, i32 49, i32 57, i32 51, i32 59, i32 53, i32 61, i32 55, i32 63, i32 97, i32 105, i32 99, i32 107, i32 101, i32 109, i32 103, i32 111, i32 113, i32 121, i32 115, i32 123, i32 117, i32 125, i32 119, i32 127, i32 129, i32 137, i32 131, i32 139, i32 133, i32 141, i32 135, i32 143, i32 145, i32 153, i32 147, i32 155, i32 149, i32 157, i32 151, i32 159, i32 193, i32 201, i32 195, i32 203, i32 197, i32 205, i32 199, i32 207, i32 209, i32 217, i32 211, i32 219, i32 213, i32 221, i32 215, i32 223, i32 161, i32 169, i32 163, i32 171, i32 165, i32 173, i32 167, i32 175, i32 177, i32 185, i32 179, i32 187, i32 181, i32 189, i32 183, i32 191, i32 225, i32 233, i32 227, i32 235, i32 229, i32 237, i32 231, i32 239, i32 241, i32 249, i32 243, i32 251, i32 245, i32 253, i32 247, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_5a: +; CHECK: [[REG5a:r[0-9]+]] = #90 +; CHECK: vdeal(v1,v0,[[REG5a]]) +define <256 x i8> @vdeal_5a(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 8, i32 9, i32 4, i32 5, i32 12, i32 13, i32 16, i32 17, i32 24, i32 25, i32 20, i32 21, i32 28, i32 29, i32 64, i32 65, i32 72, i32 73, i32 68, i32 69, i32 76, i32 77, i32 80, i32 81, i32 88, i32 89, i32 84, i32 85, i32 92, i32 93, i32 32, i32 33, i32 40, i32 41, i32 36, i32 37, i32 44, i32 45, i32 48, i32 49, i32 56, i32 57, i32 52, i32 53, i32 60, i32 61, i32 96, i32 97, i32 104, i32 105, i32 100, i32 101, i32 108, i32 109, i32 112, i32 113, i32 120, i32 121, i32 116, i32 117, i32 124, i32 125, i32 128, i32 129, i32 136, i32 137, i32 132, i32 133, i32 140, i32 141, i32 144, i32 145, i32 152, i32 153, i32 148, i32 149, i32 156, i32 157, i32 192, i32 193, i32 200, i32 201, i32 196, i32 197, i32 204, i32 205, i32 208, i32 209, i32 216, i32 217, i32 212, i32 213, i32 220, i32 221, i32 160, i32 161, i32 168, i32 169, i32 164, i32 165, i32 172, i32 173, i32 176, i32 177, i32 184, i32 185, i32 180, i32 181, i32 188, i32 189, i32 224, i32 225, i32 232, i32 233, i32 228, i32 229, i32 236, i32 237, i32 240, i32 241, i32 248, i32 249, i32 244, i32 245, i32 252, i32 253, i32 2, i32 3, i32 10, i32 11, i32 6, i32 7, i32 14, i32 15, i32 18, i32 19, i32 26, i32 27, i32 22, i32 23, i32 30, i32 31, i32 66, i32 67, i32 74, i32 75, i32 70, i32 71, i32 78, i32 79, i32 82, i32 83, i32 90, i32 91, i32 86, i32 87, i32 94, i32 95, i32 34, i32 35, i32 42, i32 43, i32 38, i32 39, i32 46, i32 47, i32 50, i32 51, i32 58, i32 59, i32 54, i32 55, i32 62, i32 63, i32 98, i32 99, i32 106, i32 107, i32 102, i32 103, i32 110, i32 111, i32 114, i32 115, i32 122, i32 123, i32 118, i32 119, i32 126, i32 127, i32 130, i32 131, i32 138, i32 139, i32 134, i32 135, i32 142, i32 143, i32 146, i32 147, i32 154, i32 155, i32 150, i32 151, i32 158, i32 159, i32 194, i32 195, i32 202, i32 203, i32 198, i32 199, i32 206, i32 207, i32 210, i32 211, i32 218, i32 219, i32 214, i32 215, i32 222, i32 223, i32 162, i32 163, i32 170, i32 171, i32 166, i32 167, i32 174, i32 175, i32 178, i32 179, i32 186, i32 187, i32 182, i32 183, i32 190, i32 191, i32 226, i32 227, i32 234, i32 235, i32 230, i32 231, i32 238, i32 239, i32 242, i32 243, i32 250, i32 251, i32 246, i32 247, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_5b: +; CHECK: [[REG5b:r[0-9]+]] = #91 +; CHECK: vdeal(v1,v0,[[REG5b]]) +define <256 x i8> @vdeal_5b(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 2, i32 8, i32 10, i32 4, i32 6, i32 12, i32 14, i32 16, i32 18, i32 24, i32 26, i32 20, i32 22, i32 28, i32 30, i32 64, i32 66, i32 72, i32 74, i32 68, i32 70, i32 76, i32 78, i32 80, i32 82, i32 88, i32 90, i32 84, i32 86, i32 92, i32 94, i32 32, i32 34, i32 40, i32 42, i32 36, i32 38, i32 44, i32 46, i32 48, i32 50, i32 56, i32 58, i32 52, i32 54, i32 60, i32 62, i32 96, i32 98, i32 104, i32 106, i32 100, i32 102, i32 108, i32 110, i32 112, i32 114, i32 120, i32 122, i32 116, i32 118, i32 124, i32 126, i32 128, i32 130, i32 136, i32 138, i32 132, i32 134, i32 140, i32 142, i32 144, i32 146, i32 152, i32 154, i32 148, i32 150, i32 156, i32 158, i32 192, i32 194, i32 200, i32 202, i32 196, i32 198, i32 204, i32 206, i32 208, i32 210, i32 216, i32 218, i32 212, i32 214, i32 220, i32 222, i32 160, i32 162, i32 168, i32 170, i32 164, i32 166, i32 172, i32 174, i32 176, i32 178, i32 184, i32 186, i32 180, i32 182, i32 188, i32 190, i32 224, i32 226, i32 232, i32 234, i32 228, i32 230, i32 236, i32 238, i32 240, i32 242, i32 248, i32 250, i32 244, i32 246, i32 252, i32 254, i32 1, i32 3, i32 9, i32 11, i32 5, i32 7, i32 13, i32 15, i32 17, i32 19, i32 25, i32 27, i32 21, i32 23, i32 29, i32 31, i32 65, i32 67, i32 73, i32 75, i32 69, i32 71, i32 77, i32 79, i32 81, i32 83, i32 89, i32 91, i32 85, i32 87, i32 93, i32 95, i32 33, i32 35, i32 41, i32 43, i32 37, i32 39, i32 45, i32 47, i32 49, i32 51, i32 57, i32 59, i32 53, i32 55, i32 61, i32 63, i32 97, i32 99, i32 105, i32 107, i32 101, i32 103, i32 109, i32 111, i32 113, i32 115, i32 121, i32 123, i32 117, i32 119, i32 125, i32 127, i32 129, i32 131, i32 137, i32 139, i32 133, i32 135, i32 141, i32 143, i32 145, i32 147, i32 153, i32 155, i32 149, i32 151, i32 157, i32 159, i32 193, i32 195, i32 201, i32 203, i32 197, i32 199, i32 205, i32 207, i32 209, i32 211, i32 217, i32 219, i32 213, i32 215, i32 221, i32 223, i32 161, i32 163, i32 169, i32 171, i32 165, i32 167, i32 173, i32 175, i32 177, i32 179, i32 185, i32 187, i32 181, i32 183, i32 189, i32 191, i32 225, i32 227, i32 233, i32 235, i32 229, i32 231, i32 237, i32 239, i32 241, i32 243, i32 249, i32 251, i32 245, i32 247, i32 253, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_5c: +; CHECK: [[REG5c:r[0-9]+]] = #92 +; CHECK: vdeal(v1,v0,[[REG5c]]) +define <256 x i8> @vdeal_5c(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 10, i32 11, i32 16, i32 17, i32 18, i32 19, i32 24, i32 25, i32 26, i32 27, i32 64, i32 65, i32 66, i32 67, i32 72, i32 73, i32 74, i32 75, i32 80, i32 81, i32 82, i32 83, i32 88, i32 89, i32 90, i32 91, i32 32, i32 33, i32 34, i32 35, i32 40, i32 41, i32 42, i32 43, i32 48, i32 49, i32 50, i32 51, i32 56, i32 57, i32 58, i32 59, i32 96, i32 97, i32 98, i32 99, i32 104, i32 105, i32 106, i32 107, i32 112, i32 113, i32 114, i32 115, i32 120, i32 121, i32 122, i32 123, i32 128, i32 129, i32 130, i32 131, i32 136, i32 137, i32 138, i32 139, i32 144, i32 145, i32 146, i32 147, i32 152, i32 153, i32 154, i32 155, i32 192, i32 193, i32 194, i32 195, i32 200, i32 201, i32 202, i32 203, i32 208, i32 209, i32 210, i32 211, i32 216, i32 217, i32 218, i32 219, i32 160, i32 161, i32 162, i32 163, i32 168, i32 169, i32 170, i32 171, i32 176, i32 177, i32 178, i32 179, i32 184, i32 185, i32 186, i32 187, i32 224, i32 225, i32 226, i32 227, i32 232, i32 233, i32 234, i32 235, i32 240, i32 241, i32 242, i32 243, i32 248, i32 249, i32 250, i32 251, i32 4, i32 5, i32 6, i32 7, i32 12, i32 13, i32 14, i32 15, i32 20, i32 21, i32 22, i32 23, i32 28, i32 29, i32 30, i32 31, i32 68, i32 69, i32 70, i32 71, i32 76, i32 77, i32 78, i32 79, i32 84, i32 85, i32 86, i32 87, i32 92, i32 93, i32 94, i32 95, i32 36, i32 37, i32 38, i32 39, i32 44, i32 45, i32 46, i32 47, i32 52, i32 53, i32 54, i32 55, i32 60, i32 61, i32 62, i32 63, i32 100, i32 101, i32 102, i32 103, i32 108, i32 109, i32 110, i32 111, i32 116, i32 117, i32 118, i32 119, i32 124, i32 125, i32 126, i32 127, i32 132, i32 133, i32 134, i32 135, i32 140, i32 141, i32 142, i32 143, i32 148, i32 149, i32 150, i32 151, i32 156, i32 157, i32 158, i32 159, i32 196, i32 197, i32 198, i32 199, i32 204, i32 205, i32 206, i32 207, i32 212, i32 213, i32 214, i32 215, i32 220, i32 221, i32 222, i32 223, i32 164, i32 165, i32 166, i32 167, i32 172, i32 173, i32 174, i32 175, i32 180, i32 181, i32 182, i32 183, i32 188, i32 189, i32 190, i32 191, i32 228, i32 229, i32 230, i32 231, i32 236, i32 237, i32 238, i32 239, i32 244, i32 245, i32 246, i32 247, i32 252, i32 253, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_5d: +; CHECK: [[REG5d:r[0-9]+]] = #93 +; CHECK: vdeal(v1,v0,[[REG5d]]) +define <256 x i8> @vdeal_5d(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 4, i32 2, i32 6, i32 8, i32 12, i32 10, i32 14, i32 16, i32 20, i32 18, i32 22, i32 24, i32 28, i32 26, i32 30, i32 64, i32 68, i32 66, i32 70, i32 72, i32 76, i32 74, i32 78, i32 80, i32 84, i32 82, i32 86, i32 88, i32 92, i32 90, i32 94, i32 32, i32 36, i32 34, i32 38, i32 40, i32 44, i32 42, i32 46, i32 48, i32 52, i32 50, i32 54, i32 56, i32 60, i32 58, i32 62, i32 96, i32 100, i32 98, i32 102, i32 104, i32 108, i32 106, i32 110, i32 112, i32 116, i32 114, i32 118, i32 120, i32 124, i32 122, i32 126, i32 128, i32 132, i32 130, i32 134, i32 136, i32 140, i32 138, i32 142, i32 144, i32 148, i32 146, i32 150, i32 152, i32 156, i32 154, i32 158, i32 192, i32 196, i32 194, i32 198, i32 200, i32 204, i32 202, i32 206, i32 208, i32 212, i32 210, i32 214, i32 216, i32 220, i32 218, i32 222, i32 160, i32 164, i32 162, i32 166, i32 168, i32 172, i32 170, i32 174, i32 176, i32 180, i32 178, i32 182, i32 184, i32 188, i32 186, i32 190, i32 224, i32 228, i32 226, i32 230, i32 232, i32 236, i32 234, i32 238, i32 240, i32 244, i32 242, i32 246, i32 248, i32 252, i32 250, i32 254, i32 1, i32 5, i32 3, i32 7, i32 9, i32 13, i32 11, i32 15, i32 17, i32 21, i32 19, i32 23, i32 25, i32 29, i32 27, i32 31, i32 65, i32 69, i32 67, i32 71, i32 73, i32 77, i32 75, i32 79, i32 81, i32 85, i32 83, i32 87, i32 89, i32 93, i32 91, i32 95, i32 33, i32 37, i32 35, i32 39, i32 41, i32 45, i32 43, i32 47, i32 49, i32 53, i32 51, i32 55, i32 57, i32 61, i32 59, i32 63, i32 97, i32 101, i32 99, i32 103, i32 105, i32 109, i32 107, i32 111, i32 113, i32 117, i32 115, i32 119, i32 121, i32 125, i32 123, i32 127, i32 129, i32 133, i32 131, i32 135, i32 137, i32 141, i32 139, i32 143, i32 145, i32 149, i32 147, i32 151, i32 153, i32 157, i32 155, i32 159, i32 193, i32 197, i32 195, i32 199, i32 201, i32 205, i32 203, i32 207, i32 209, i32 213, i32 211, i32 215, i32 217, i32 221, i32 219, i32 223, i32 161, i32 165, i32 163, i32 167, i32 169, i32 173, i32 171, i32 175, i32 177, i32 181, i32 179, i32 183, i32 185, i32 189, i32 187, i32 191, i32 225, i32 229, i32 227, i32 231, i32 233, i32 237, i32 235, i32 239, i32 241, i32 245, i32 243, i32 247, i32 249, i32 253, i32 251, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_5e: +; CHECK: [[REG5e:r[0-9]+]] = #94 +; CHECK: vdeal(v1,v0,[[REG5e]]) +define <256 x i8> @vdeal_5e(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 4, i32 5, i32 8, i32 9, i32 12, i32 13, i32 16, i32 17, i32 20, i32 21, i32 24, i32 25, i32 28, i32 29, i32 64, i32 65, i32 68, i32 69, i32 72, i32 73, i32 76, i32 77, i32 80, i32 81, i32 84, i32 85, i32 88, i32 89, i32 92, i32 93, i32 32, i32 33, i32 36, i32 37, i32 40, i32 41, i32 44, i32 45, i32 48, i32 49, i32 52, i32 53, i32 56, i32 57, i32 60, i32 61, i32 96, i32 97, i32 100, i32 101, i32 104, i32 105, i32 108, i32 109, i32 112, i32 113, i32 116, i32 117, i32 120, i32 121, i32 124, i32 125, i32 128, i32 129, i32 132, i32 133, i32 136, i32 137, i32 140, i32 141, i32 144, i32 145, i32 148, i32 149, i32 152, i32 153, i32 156, i32 157, i32 192, i32 193, i32 196, i32 197, i32 200, i32 201, i32 204, i32 205, i32 208, i32 209, i32 212, i32 213, i32 216, i32 217, i32 220, i32 221, i32 160, i32 161, i32 164, i32 165, i32 168, i32 169, i32 172, i32 173, i32 176, i32 177, i32 180, i32 181, i32 184, i32 185, i32 188, i32 189, i32 224, i32 225, i32 228, i32 229, i32 232, i32 233, i32 236, i32 237, i32 240, i32 241, i32 244, i32 245, i32 248, i32 249, i32 252, i32 253, i32 2, i32 3, i32 6, i32 7, i32 10, i32 11, i32 14, i32 15, i32 18, i32 19, i32 22, i32 23, i32 26, i32 27, i32 30, i32 31, i32 66, i32 67, i32 70, i32 71, i32 74, i32 75, i32 78, i32 79, i32 82, i32 83, i32 86, i32 87, i32 90, i32 91, i32 94, i32 95, i32 34, i32 35, i32 38, i32 39, i32 42, i32 43, i32 46, i32 47, i32 50, i32 51, i32 54, i32 55, i32 58, i32 59, i32 62, i32 63, i32 98, i32 99, i32 102, i32 103, i32 106, i32 107, i32 110, i32 111, i32 114, i32 115, i32 118, i32 119, i32 122, i32 123, i32 126, i32 127, i32 130, i32 131, i32 134, i32 135, i32 138, i32 139, i32 142, i32 143, i32 146, i32 147, i32 150, i32 151, i32 154, i32 155, i32 158, i32 159, i32 194, i32 195, i32 198, i32 199, i32 202, i32 203, i32 206, i32 207, i32 210, i32 211, i32 214, i32 215, i32 218, i32 219, i32 222, i32 223, i32 162, i32 163, i32 166, i32 167, i32 170, i32 171, i32 174, i32 175, i32 178, i32 179, i32 182, i32 183, i32 186, i32 187, i32 190, i32 191, i32 226, i32 227, i32 230, i32 231, i32 234, i32 235, i32 238, i32 239, i32 242, i32 243, i32 246, i32 247, i32 250, i32 251, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_5f: +; CHECK: [[REG5f:r[0-9]+]] = #95 +; CHECK: vdeal(v1,v0,[[REG5f]]) +define <256 x i8> @vdeal_5f(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30, i32 64, i32 66, i32 68, i32 70, i32 72, i32 74, i32 76, i32 78, i32 80, i32 82, i32 84, i32 86, i32 88, i32 90, i32 92, i32 94, i32 32, i32 34, i32 36, i32 38, i32 40, i32 42, i32 44, i32 46, i32 48, i32 50, i32 52, i32 54, i32 56, i32 58, i32 60, i32 62, i32 96, i32 98, i32 100, i32 102, i32 104, i32 106, i32 108, i32 110, i32 112, i32 114, i32 116, i32 118, i32 120, i32 122, i32 124, i32 126, i32 128, i32 130, i32 132, i32 134, i32 136, i32 138, i32 140, i32 142, i32 144, i32 146, i32 148, i32 150, i32 152, i32 154, i32 156, i32 158, i32 192, i32 194, i32 196, i32 198, i32 200, i32 202, i32 204, i32 206, i32 208, i32 210, i32 212, i32 214, i32 216, i32 218, i32 220, i32 222, i32 160, i32 162, i32 164, i32 166, i32 168, i32 170, i32 172, i32 174, i32 176, i32 178, i32 180, i32 182, i32 184, i32 186, i32 188, i32 190, i32 224, i32 226, i32 228, i32 230, i32 232, i32 234, i32 236, i32 238, i32 240, i32 242, i32 244, i32 246, i32 248, i32 250, i32 252, i32 254, i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31, i32 65, i32 67, i32 69, i32 71, i32 73, i32 75, i32 77, i32 79, i32 81, i32 83, i32 85, i32 87, i32 89, i32 91, i32 93, i32 95, i32 33, i32 35, i32 37, i32 39, i32 41, i32 43, i32 45, i32 47, i32 49, i32 51, i32 53, i32 55, i32 57, i32 59, i32 61, i32 63, i32 97, i32 99, i32 101, i32 103, i32 105, i32 107, i32 109, i32 111, i32 113, i32 115, i32 117, i32 119, i32 121, i32 123, i32 125, i32 127, i32 129, i32 131, i32 133, i32 135, i32 137, i32 139, i32 141, i32 143, i32 145, i32 147, i32 149, i32 151, i32 153, i32 155, i32 157, i32 159, i32 193, i32 195, i32 197, i32 199, i32 201, i32 203, i32 205, i32 207, i32 209, i32 211, i32 213, i32 215, i32 217, i32 219, i32 221, i32 223, i32 161, i32 163, i32 165, i32 167, i32 169, i32 171, i32 173, i32 175, i32 177, i32 179, i32 181, i32 183, i32 185, i32 187, i32 189, i32 191, i32 225, i32 227, i32 229, i32 231, i32 233, i32 235, i32 237, i32 239, i32 241, i32 243, i32 245, i32 247, i32 249, i32 251, i32 253, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_60: +; CHECK: [[REG60:r[0-9]+]] = #96 +; CHECK: vdeal(v1,v0,[[REG60]]) +define <256 x i8> @vdeal_60(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 64, i32 65, i32 66, i32 67, i32 68, i32 69, i32 70, i32 71, i32 72, i32 73, i32 74, i32 75, i32 76, i32 77, i32 78, i32 79, i32 80, i32 81, i32 82, i32 83, i32 84, i32 85, i32 86, i32 87, i32 88, i32 89, i32 90, i32 91, i32 92, i32 93, i32 94, i32 95, i32 128, i32 129, i32 130, i32 131, i32 132, i32 133, i32 134, i32 135, i32 136, i32 137, i32 138, i32 139, i32 140, i32 141, i32 142, i32 143, i32 144, i32 145, i32 146, i32 147, i32 148, i32 149, i32 150, i32 151, i32 152, i32 153, i32 154, i32 155, i32 156, i32 157, i32 158, i32 159, i32 192, i32 193, i32 194, i32 195, i32 196, i32 197, i32 198, i32 199, i32 200, i32 201, i32 202, i32 203, i32 204, i32 205, i32 206, i32 207, i32 208, i32 209, i32 210, i32 211, i32 212, i32 213, i32 214, i32 215, i32 216, i32 217, i32 218, i32 219, i32 220, i32 221, i32 222, i32 223, i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 48, i32 49, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63, i32 96, i32 97, i32 98, i32 99, i32 100, i32 101, i32 102, i32 103, i32 104, i32 105, i32 106, i32 107, i32 108, i32 109, i32 110, i32 111, i32 112, i32 113, i32 114, i32 115, i32 116, i32 117, i32 118, i32 119, i32 120, i32 121, i32 122, i32 123, i32 124, i32 125, i32 126, i32 127, i32 160, i32 161, i32 162, i32 163, i32 164, i32 165, i32 166, i32 167, i32 168, i32 169, i32 170, i32 171, i32 172, i32 173, i32 174, i32 175, i32 176, i32 177, i32 178, i32 179, i32 180, i32 181, i32 182, i32 183, i32 184, i32 185, i32 186, i32 187, i32 188, i32 189, i32 190, i32 191, i32 224, i32 225, i32 226, i32 227, i32 228, i32 229, i32 230, i32 231, i32 232, i32 233, i32 234, i32 235, i32 236, i32 237, i32 238, i32 239, i32 240, i32 241, i32 242, i32 243, i32 244, i32 245, i32 246, i32 247, i32 248, i32 249, i32 250, i32 251, i32 252, i32 253, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_61: +; CHECK: [[REG61:r[0-9]+]] = #97 +; CHECK: vdeal(v1,v0,[[REG61]]) +define <256 x i8> @vdeal_61(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 32, i32 2, i32 34, i32 4, i32 36, i32 6, i32 38, i32 8, i32 40, i32 10, i32 42, i32 12, i32 44, i32 14, i32 46, i32 16, i32 48, i32 18, i32 50, i32 20, i32 52, i32 22, i32 54, i32 24, i32 56, i32 26, i32 58, i32 28, i32 60, i32 30, i32 62, i32 64, i32 96, i32 66, i32 98, i32 68, i32 100, i32 70, i32 102, i32 72, i32 104, i32 74, i32 106, i32 76, i32 108, i32 78, i32 110, i32 80, i32 112, i32 82, i32 114, i32 84, i32 116, i32 86, i32 118, i32 88, i32 120, i32 90, i32 122, i32 92, i32 124, i32 94, i32 126, i32 128, i32 160, i32 130, i32 162, i32 132, i32 164, i32 134, i32 166, i32 136, i32 168, i32 138, i32 170, i32 140, i32 172, i32 142, i32 174, i32 144, i32 176, i32 146, i32 178, i32 148, i32 180, i32 150, i32 182, i32 152, i32 184, i32 154, i32 186, i32 156, i32 188, i32 158, i32 190, i32 192, i32 224, i32 194, i32 226, i32 196, i32 228, i32 198, i32 230, i32 200, i32 232, i32 202, i32 234, i32 204, i32 236, i32 206, i32 238, i32 208, i32 240, i32 210, i32 242, i32 212, i32 244, i32 214, i32 246, i32 216, i32 248, i32 218, i32 250, i32 220, i32 252, i32 222, i32 254, i32 1, i32 33, i32 3, i32 35, i32 5, i32 37, i32 7, i32 39, i32 9, i32 41, i32 11, i32 43, i32 13, i32 45, i32 15, i32 47, i32 17, i32 49, i32 19, i32 51, i32 21, i32 53, i32 23, i32 55, i32 25, i32 57, i32 27, i32 59, i32 29, i32 61, i32 31, i32 63, i32 65, i32 97, i32 67, i32 99, i32 69, i32 101, i32 71, i32 103, i32 73, i32 105, i32 75, i32 107, i32 77, i32 109, i32 79, i32 111, i32 81, i32 113, i32 83, i32 115, i32 85, i32 117, i32 87, i32 119, i32 89, i32 121, i32 91, i32 123, i32 93, i32 125, i32 95, i32 127, i32 129, i32 161, i32 131, i32 163, i32 133, i32 165, i32 135, i32 167, i32 137, i32 169, i32 139, i32 171, i32 141, i32 173, i32 143, i32 175, i32 145, i32 177, i32 147, i32 179, i32 149, i32 181, i32 151, i32 183, i32 153, i32 185, i32 155, i32 187, i32 157, i32 189, i32 159, i32 191, i32 193, i32 225, i32 195, i32 227, i32 197, i32 229, i32 199, i32 231, i32 201, i32 233, i32 203, i32 235, i32 205, i32 237, i32 207, i32 239, i32 209, i32 241, i32 211, i32 243, i32 213, i32 245, i32 215, i32 247, i32 217, i32 249, i32 219, i32 251, i32 221, i32 253, i32 223, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_62: +; CHECK: [[REG62:r[0-9]+]] = #98 +; CHECK: vdeal(v1,v0,[[REG62]]) +define <256 x i8> @vdeal_62(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 32, i32 33, i32 4, i32 5, i32 36, i32 37, i32 8, i32 9, i32 40, i32 41, i32 12, i32 13, i32 44, i32 45, i32 16, i32 17, i32 48, i32 49, i32 20, i32 21, i32 52, i32 53, i32 24, i32 25, i32 56, i32 57, i32 28, i32 29, i32 60, i32 61, i32 64, i32 65, i32 96, i32 97, i32 68, i32 69, i32 100, i32 101, i32 72, i32 73, i32 104, i32 105, i32 76, i32 77, i32 108, i32 109, i32 80, i32 81, i32 112, i32 113, i32 84, i32 85, i32 116, i32 117, i32 88, i32 89, i32 120, i32 121, i32 92, i32 93, i32 124, i32 125, i32 128, i32 129, i32 160, i32 161, i32 132, i32 133, i32 164, i32 165, i32 136, i32 137, i32 168, i32 169, i32 140, i32 141, i32 172, i32 173, i32 144, i32 145, i32 176, i32 177, i32 148, i32 149, i32 180, i32 181, i32 152, i32 153, i32 184, i32 185, i32 156, i32 157, i32 188, i32 189, i32 192, i32 193, i32 224, i32 225, i32 196, i32 197, i32 228, i32 229, i32 200, i32 201, i32 232, i32 233, i32 204, i32 205, i32 236, i32 237, i32 208, i32 209, i32 240, i32 241, i32 212, i32 213, i32 244, i32 245, i32 216, i32 217, i32 248, i32 249, i32 220, i32 221, i32 252, i32 253, i32 2, i32 3, i32 34, i32 35, i32 6, i32 7, i32 38, i32 39, i32 10, i32 11, i32 42, i32 43, i32 14, i32 15, i32 46, i32 47, i32 18, i32 19, i32 50, i32 51, i32 22, i32 23, i32 54, i32 55, i32 26, i32 27, i32 58, i32 59, i32 30, i32 31, i32 62, i32 63, i32 66, i32 67, i32 98, i32 99, i32 70, i32 71, i32 102, i32 103, i32 74, i32 75, i32 106, i32 107, i32 78, i32 79, i32 110, i32 111, i32 82, i32 83, i32 114, i32 115, i32 86, i32 87, i32 118, i32 119, i32 90, i32 91, i32 122, i32 123, i32 94, i32 95, i32 126, i32 127, i32 130, i32 131, i32 162, i32 163, i32 134, i32 135, i32 166, i32 167, i32 138, i32 139, i32 170, i32 171, i32 142, i32 143, i32 174, i32 175, i32 146, i32 147, i32 178, i32 179, i32 150, i32 151, i32 182, i32 183, i32 154, i32 155, i32 186, i32 187, i32 158, i32 159, i32 190, i32 191, i32 194, i32 195, i32 226, i32 227, i32 198, i32 199, i32 230, i32 231, i32 202, i32 203, i32 234, i32 235, i32 206, i32 207, i32 238, i32 239, i32 210, i32 211, i32 242, i32 243, i32 214, i32 215, i32 246, i32 247, i32 218, i32 219, i32 250, i32 251, i32 222, i32 223, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_63: +; CHECK: [[REG63:r[0-9]+]] = #99 +; CHECK: vdeal(v1,v0,[[REG63]]) +define <256 x i8> @vdeal_63(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 2, i32 32, i32 34, i32 4, i32 6, i32 36, i32 38, i32 8, i32 10, i32 40, i32 42, i32 12, i32 14, i32 44, i32 46, i32 16, i32 18, i32 48, i32 50, i32 20, i32 22, i32 52, i32 54, i32 24, i32 26, i32 56, i32 58, i32 28, i32 30, i32 60, i32 62, i32 64, i32 66, i32 96, i32 98, i32 68, i32 70, i32 100, i32 102, i32 72, i32 74, i32 104, i32 106, i32 76, i32 78, i32 108, i32 110, i32 80, i32 82, i32 112, i32 114, i32 84, i32 86, i32 116, i32 118, i32 88, i32 90, i32 120, i32 122, i32 92, i32 94, i32 124, i32 126, i32 128, i32 130, i32 160, i32 162, i32 132, i32 134, i32 164, i32 166, i32 136, i32 138, i32 168, i32 170, i32 140, i32 142, i32 172, i32 174, i32 144, i32 146, i32 176, i32 178, i32 148, i32 150, i32 180, i32 182, i32 152, i32 154, i32 184, i32 186, i32 156, i32 158, i32 188, i32 190, i32 192, i32 194, i32 224, i32 226, i32 196, i32 198, i32 228, i32 230, i32 200, i32 202, i32 232, i32 234, i32 204, i32 206, i32 236, i32 238, i32 208, i32 210, i32 240, i32 242, i32 212, i32 214, i32 244, i32 246, i32 216, i32 218, i32 248, i32 250, i32 220, i32 222, i32 252, i32 254, i32 1, i32 3, i32 33, i32 35, i32 5, i32 7, i32 37, i32 39, i32 9, i32 11, i32 41, i32 43, i32 13, i32 15, i32 45, i32 47, i32 17, i32 19, i32 49, i32 51, i32 21, i32 23, i32 53, i32 55, i32 25, i32 27, i32 57, i32 59, i32 29, i32 31, i32 61, i32 63, i32 65, i32 67, i32 97, i32 99, i32 69, i32 71, i32 101, i32 103, i32 73, i32 75, i32 105, i32 107, i32 77, i32 79, i32 109, i32 111, i32 81, i32 83, i32 113, i32 115, i32 85, i32 87, i32 117, i32 119, i32 89, i32 91, i32 121, i32 123, i32 93, i32 95, i32 125, i32 127, i32 129, i32 131, i32 161, i32 163, i32 133, i32 135, i32 165, i32 167, i32 137, i32 139, i32 169, i32 171, i32 141, i32 143, i32 173, i32 175, i32 145, i32 147, i32 177, i32 179, i32 149, i32 151, i32 181, i32 183, i32 153, i32 155, i32 185, i32 187, i32 157, i32 159, i32 189, i32 191, i32 193, i32 195, i32 225, i32 227, i32 197, i32 199, i32 229, i32 231, i32 201, i32 203, i32 233, i32 235, i32 205, i32 207, i32 237, i32 239, i32 209, i32 211, i32 241, i32 243, i32 213, i32 215, i32 245, i32 247, i32 217, i32 219, i32 249, i32 251, i32 221, i32 223, i32 253, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_64: +; CHECK: [[REG64:r[0-9]+]] = #100 +; CHECK: vdeal(v1,v0,[[REG64]]) +define <256 x i8> @vdeal_64(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 2, i32 3, i32 32, i32 33, i32 34, i32 35, i32 8, i32 9, i32 10, i32 11, i32 40, i32 41, i32 42, i32 43, i32 16, i32 17, i32 18, i32 19, i32 48, i32 49, i32 50, i32 51, i32 24, i32 25, i32 26, i32 27, i32 56, i32 57, i32 58, i32 59, i32 64, i32 65, i32 66, i32 67, i32 96, i32 97, i32 98, i32 99, i32 72, i32 73, i32 74, i32 75, i32 104, i32 105, i32 106, i32 107, i32 80, i32 81, i32 82, i32 83, i32 112, i32 113, i32 114, i32 115, i32 88, i32 89, i32 90, i32 91, i32 120, i32 121, i32 122, i32 123, i32 128, i32 129, i32 130, i32 131, i32 160, i32 161, i32 162, i32 163, i32 136, i32 137, i32 138, i32 139, i32 168, i32 169, i32 170, i32 171, i32 144, i32 145, i32 146, i32 147, i32 176, i32 177, i32 178, i32 179, i32 152, i32 153, i32 154, i32 155, i32 184, i32 185, i32 186, i32 187, i32 192, i32 193, i32 194, i32 195, i32 224, i32 225, i32 226, i32 227, i32 200, i32 201, i32 202, i32 203, i32 232, i32 233, i32 234, i32 235, i32 208, i32 209, i32 210, i32 211, i32 240, i32 241, i32 242, i32 243, i32 216, i32 217, i32 218, i32 219, i32 248, i32 249, i32 250, i32 251, i32 4, i32 5, i32 6, i32 7, i32 36, i32 37, i32 38, i32 39, i32 12, i32 13, i32 14, i32 15, i32 44, i32 45, i32 46, i32 47, i32 20, i32 21, i32 22, i32 23, i32 52, i32 53, i32 54, i32 55, i32 28, i32 29, i32 30, i32 31, i32 60, i32 61, i32 62, i32 63, i32 68, i32 69, i32 70, i32 71, i32 100, i32 101, i32 102, i32 103, i32 76, i32 77, i32 78, i32 79, i32 108, i32 109, i32 110, i32 111, i32 84, i32 85, i32 86, i32 87, i32 116, i32 117, i32 118, i32 119, i32 92, i32 93, i32 94, i32 95, i32 124, i32 125, i32 126, i32 127, i32 132, i32 133, i32 134, i32 135, i32 164, i32 165, i32 166, i32 167, i32 140, i32 141, i32 142, i32 143, i32 172, i32 173, i32 174, i32 175, i32 148, i32 149, i32 150, i32 151, i32 180, i32 181, i32 182, i32 183, i32 156, i32 157, i32 158, i32 159, i32 188, i32 189, i32 190, i32 191, i32 196, i32 197, i32 198, i32 199, i32 228, i32 229, i32 230, i32 231, i32 204, i32 205, i32 206, i32 207, i32 236, i32 237, i32 238, i32 239, i32 212, i32 213, i32 214, i32 215, i32 244, i32 245, i32 246, i32 247, i32 220, i32 221, i32 222, i32 223, i32 252, i32 253, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_65: +; CHECK: [[REG65:r[0-9]+]] = #101 +; CHECK: vdeal(v1,v0,[[REG65]]) +define <256 x i8> @vdeal_65(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 4, i32 2, i32 6, i32 32, i32 36, i32 34, i32 38, i32 8, i32 12, i32 10, i32 14, i32 40, i32 44, i32 42, i32 46, i32 16, i32 20, i32 18, i32 22, i32 48, i32 52, i32 50, i32 54, i32 24, i32 28, i32 26, i32 30, i32 56, i32 60, i32 58, i32 62, i32 64, i32 68, i32 66, i32 70, i32 96, i32 100, i32 98, i32 102, i32 72, i32 76, i32 74, i32 78, i32 104, i32 108, i32 106, i32 110, i32 80, i32 84, i32 82, i32 86, i32 112, i32 116, i32 114, i32 118, i32 88, i32 92, i32 90, i32 94, i32 120, i32 124, i32 122, i32 126, i32 128, i32 132, i32 130, i32 134, i32 160, i32 164, i32 162, i32 166, i32 136, i32 140, i32 138, i32 142, i32 168, i32 172, i32 170, i32 174, i32 144, i32 148, i32 146, i32 150, i32 176, i32 180, i32 178, i32 182, i32 152, i32 156, i32 154, i32 158, i32 184, i32 188, i32 186, i32 190, i32 192, i32 196, i32 194, i32 198, i32 224, i32 228, i32 226, i32 230, i32 200, i32 204, i32 202, i32 206, i32 232, i32 236, i32 234, i32 238, i32 208, i32 212, i32 210, i32 214, i32 240, i32 244, i32 242, i32 246, i32 216, i32 220, i32 218, i32 222, i32 248, i32 252, i32 250, i32 254, i32 1, i32 5, i32 3, i32 7, i32 33, i32 37, i32 35, i32 39, i32 9, i32 13, i32 11, i32 15, i32 41, i32 45, i32 43, i32 47, i32 17, i32 21, i32 19, i32 23, i32 49, i32 53, i32 51, i32 55, i32 25, i32 29, i32 27, i32 31, i32 57, i32 61, i32 59, i32 63, i32 65, i32 69, i32 67, i32 71, i32 97, i32 101, i32 99, i32 103, i32 73, i32 77, i32 75, i32 79, i32 105, i32 109, i32 107, i32 111, i32 81, i32 85, i32 83, i32 87, i32 113, i32 117, i32 115, i32 119, i32 89, i32 93, i32 91, i32 95, i32 121, i32 125, i32 123, i32 127, i32 129, i32 133, i32 131, i32 135, i32 161, i32 165, i32 163, i32 167, i32 137, i32 141, i32 139, i32 143, i32 169, i32 173, i32 171, i32 175, i32 145, i32 149, i32 147, i32 151, i32 177, i32 181, i32 179, i32 183, i32 153, i32 157, i32 155, i32 159, i32 185, i32 189, i32 187, i32 191, i32 193, i32 197, i32 195, i32 199, i32 225, i32 229, i32 227, i32 231, i32 201, i32 205, i32 203, i32 207, i32 233, i32 237, i32 235, i32 239, i32 209, i32 213, i32 211, i32 215, i32 241, i32 245, i32 243, i32 247, i32 217, i32 221, i32 219, i32 223, i32 249, i32 253, i32 251, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_66: +; CHECK: [[REG66:r[0-9]+]] = #102 +; CHECK: vdeal(v1,v0,[[REG66]]) +define <256 x i8> @vdeal_66(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 4, i32 5, i32 32, i32 33, i32 36, i32 37, i32 8, i32 9, i32 12, i32 13, i32 40, i32 41, i32 44, i32 45, i32 16, i32 17, i32 20, i32 21, i32 48, i32 49, i32 52, i32 53, i32 24, i32 25, i32 28, i32 29, i32 56, i32 57, i32 60, i32 61, i32 64, i32 65, i32 68, i32 69, i32 96, i32 97, i32 100, i32 101, i32 72, i32 73, i32 76, i32 77, i32 104, i32 105, i32 108, i32 109, i32 80, i32 81, i32 84, i32 85, i32 112, i32 113, i32 116, i32 117, i32 88, i32 89, i32 92, i32 93, i32 120, i32 121, i32 124, i32 125, i32 128, i32 129, i32 132, i32 133, i32 160, i32 161, i32 164, i32 165, i32 136, i32 137, i32 140, i32 141, i32 168, i32 169, i32 172, i32 173, i32 144, i32 145, i32 148, i32 149, i32 176, i32 177, i32 180, i32 181, i32 152, i32 153, i32 156, i32 157, i32 184, i32 185, i32 188, i32 189, i32 192, i32 193, i32 196, i32 197, i32 224, i32 225, i32 228, i32 229, i32 200, i32 201, i32 204, i32 205, i32 232, i32 233, i32 236, i32 237, i32 208, i32 209, i32 212, i32 213, i32 240, i32 241, i32 244, i32 245, i32 216, i32 217, i32 220, i32 221, i32 248, i32 249, i32 252, i32 253, i32 2, i32 3, i32 6, i32 7, i32 34, i32 35, i32 38, i32 39, i32 10, i32 11, i32 14, i32 15, i32 42, i32 43, i32 46, i32 47, i32 18, i32 19, i32 22, i32 23, i32 50, i32 51, i32 54, i32 55, i32 26, i32 27, i32 30, i32 31, i32 58, i32 59, i32 62, i32 63, i32 66, i32 67, i32 70, i32 71, i32 98, i32 99, i32 102, i32 103, i32 74, i32 75, i32 78, i32 79, i32 106, i32 107, i32 110, i32 111, i32 82, i32 83, i32 86, i32 87, i32 114, i32 115, i32 118, i32 119, i32 90, i32 91, i32 94, i32 95, i32 122, i32 123, i32 126, i32 127, i32 130, i32 131, i32 134, i32 135, i32 162, i32 163, i32 166, i32 167, i32 138, i32 139, i32 142, i32 143, i32 170, i32 171, i32 174, i32 175, i32 146, i32 147, i32 150, i32 151, i32 178, i32 179, i32 182, i32 183, i32 154, i32 155, i32 158, i32 159, i32 186, i32 187, i32 190, i32 191, i32 194, i32 195, i32 198, i32 199, i32 226, i32 227, i32 230, i32 231, i32 202, i32 203, i32 206, i32 207, i32 234, i32 235, i32 238, i32 239, i32 210, i32 211, i32 214, i32 215, i32 242, i32 243, i32 246, i32 247, i32 218, i32 219, i32 222, i32 223, i32 250, i32 251, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_67: +; CHECK: [[REG67:r[0-9]+]] = #103 +; CHECK: vdeal(v1,v0,[[REG67]]) +define <256 x i8> @vdeal_67(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 2, i32 4, i32 6, i32 32, i32 34, i32 36, i32 38, i32 8, i32 10, i32 12, i32 14, i32 40, i32 42, i32 44, i32 46, i32 16, i32 18, i32 20, i32 22, i32 48, i32 50, i32 52, i32 54, i32 24, i32 26, i32 28, i32 30, i32 56, i32 58, i32 60, i32 62, i32 64, i32 66, i32 68, i32 70, i32 96, i32 98, i32 100, i32 102, i32 72, i32 74, i32 76, i32 78, i32 104, i32 106, i32 108, i32 110, i32 80, i32 82, i32 84, i32 86, i32 112, i32 114, i32 116, i32 118, i32 88, i32 90, i32 92, i32 94, i32 120, i32 122, i32 124, i32 126, i32 128, i32 130, i32 132, i32 134, i32 160, i32 162, i32 164, i32 166, i32 136, i32 138, i32 140, i32 142, i32 168, i32 170, i32 172, i32 174, i32 144, i32 146, i32 148, i32 150, i32 176, i32 178, i32 180, i32 182, i32 152, i32 154, i32 156, i32 158, i32 184, i32 186, i32 188, i32 190, i32 192, i32 194, i32 196, i32 198, i32 224, i32 226, i32 228, i32 230, i32 200, i32 202, i32 204, i32 206, i32 232, i32 234, i32 236, i32 238, i32 208, i32 210, i32 212, i32 214, i32 240, i32 242, i32 244, i32 246, i32 216, i32 218, i32 220, i32 222, i32 248, i32 250, i32 252, i32 254, i32 1, i32 3, i32 5, i32 7, i32 33, i32 35, i32 37, i32 39, i32 9, i32 11, i32 13, i32 15, i32 41, i32 43, i32 45, i32 47, i32 17, i32 19, i32 21, i32 23, i32 49, i32 51, i32 53, i32 55, i32 25, i32 27, i32 29, i32 31, i32 57, i32 59, i32 61, i32 63, i32 65, i32 67, i32 69, i32 71, i32 97, i32 99, i32 101, i32 103, i32 73, i32 75, i32 77, i32 79, i32 105, i32 107, i32 109, i32 111, i32 81, i32 83, i32 85, i32 87, i32 113, i32 115, i32 117, i32 119, i32 89, i32 91, i32 93, i32 95, i32 121, i32 123, i32 125, i32 127, i32 129, i32 131, i32 133, i32 135, i32 161, i32 163, i32 165, i32 167, i32 137, i32 139, i32 141, i32 143, i32 169, i32 171, i32 173, i32 175, i32 145, i32 147, i32 149, i32 151, i32 177, i32 179, i32 181, i32 183, i32 153, i32 155, i32 157, i32 159, i32 185, i32 187, i32 189, i32 191, i32 193, i32 195, i32 197, i32 199, i32 225, i32 227, i32 229, i32 231, i32 201, i32 203, i32 205, i32 207, i32 233, i32 235, i32 237, i32 239, i32 209, i32 211, i32 213, i32 215, i32 241, i32 243, i32 245, i32 247, i32 217, i32 219, i32 221, i32 223, i32 249, i32 251, i32 253, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_68: +; CHECK: [[REG68:r[0-9]+]] = #104 +; CHECK: vdeal(v1,v0,[[REG68]]) +define <256 x i8> @vdeal_68(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 48, i32 49, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 64, i32 65, i32 66, i32 67, i32 68, i32 69, i32 70, i32 71, i32 96, i32 97, i32 98, i32 99, i32 100, i32 101, i32 102, i32 103, i32 80, i32 81, i32 82, i32 83, i32 84, i32 85, i32 86, i32 87, i32 112, i32 113, i32 114, i32 115, i32 116, i32 117, i32 118, i32 119, i32 128, i32 129, i32 130, i32 131, i32 132, i32 133, i32 134, i32 135, i32 160, i32 161, i32 162, i32 163, i32 164, i32 165, i32 166, i32 167, i32 144, i32 145, i32 146, i32 147, i32 148, i32 149, i32 150, i32 151, i32 176, i32 177, i32 178, i32 179, i32 180, i32 181, i32 182, i32 183, i32 192, i32 193, i32 194, i32 195, i32 196, i32 197, i32 198, i32 199, i32 224, i32 225, i32 226, i32 227, i32 228, i32 229, i32 230, i32 231, i32 208, i32 209, i32 210, i32 211, i32 212, i32 213, i32 214, i32 215, i32 240, i32 241, i32 242, i32 243, i32 244, i32 245, i32 246, i32 247, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63, i32 72, i32 73, i32 74, i32 75, i32 76, i32 77, i32 78, i32 79, i32 104, i32 105, i32 106, i32 107, i32 108, i32 109, i32 110, i32 111, i32 88, i32 89, i32 90, i32 91, i32 92, i32 93, i32 94, i32 95, i32 120, i32 121, i32 122, i32 123, i32 124, i32 125, i32 126, i32 127, i32 136, i32 137, i32 138, i32 139, i32 140, i32 141, i32 142, i32 143, i32 168, i32 169, i32 170, i32 171, i32 172, i32 173, i32 174, i32 175, i32 152, i32 153, i32 154, i32 155, i32 156, i32 157, i32 158, i32 159, i32 184, i32 185, i32 186, i32 187, i32 188, i32 189, i32 190, i32 191, i32 200, i32 201, i32 202, i32 203, i32 204, i32 205, i32 206, i32 207, i32 232, i32 233, i32 234, i32 235, i32 236, i32 237, i32 238, i32 239, i32 216, i32 217, i32 218, i32 219, i32 220, i32 221, i32 222, i32 223, i32 248, i32 249, i32 250, i32 251, i32 252, i32 253, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_69: +; CHECK: [[REG69:r[0-9]+]] = #105 +; CHECK: vdeal(v1,v0,[[REG69]]) +define <256 x i8> @vdeal_69(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14, i32 32, i32 40, i32 34, i32 42, i32 36, i32 44, i32 38, i32 46, i32 16, i32 24, i32 18, i32 26, i32 20, i32 28, i32 22, i32 30, i32 48, i32 56, i32 50, i32 58, i32 52, i32 60, i32 54, i32 62, i32 64, i32 72, i32 66, i32 74, i32 68, i32 76, i32 70, i32 78, i32 96, i32 104, i32 98, i32 106, i32 100, i32 108, i32 102, i32 110, i32 80, i32 88, i32 82, i32 90, i32 84, i32 92, i32 86, i32 94, i32 112, i32 120, i32 114, i32 122, i32 116, i32 124, i32 118, i32 126, i32 128, i32 136, i32 130, i32 138, i32 132, i32 140, i32 134, i32 142, i32 160, i32 168, i32 162, i32 170, i32 164, i32 172, i32 166, i32 174, i32 144, i32 152, i32 146, i32 154, i32 148, i32 156, i32 150, i32 158, i32 176, i32 184, i32 178, i32 186, i32 180, i32 188, i32 182, i32 190, i32 192, i32 200, i32 194, i32 202, i32 196, i32 204, i32 198, i32 206, i32 224, i32 232, i32 226, i32 234, i32 228, i32 236, i32 230, i32 238, i32 208, i32 216, i32 210, i32 218, i32 212, i32 220, i32 214, i32 222, i32 240, i32 248, i32 242, i32 250, i32 244, i32 252, i32 246, i32 254, i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15, i32 33, i32 41, i32 35, i32 43, i32 37, i32 45, i32 39, i32 47, i32 17, i32 25, i32 19, i32 27, i32 21, i32 29, i32 23, i32 31, i32 49, i32 57, i32 51, i32 59, i32 53, i32 61, i32 55, i32 63, i32 65, i32 73, i32 67, i32 75, i32 69, i32 77, i32 71, i32 79, i32 97, i32 105, i32 99, i32 107, i32 101, i32 109, i32 103, i32 111, i32 81, i32 89, i32 83, i32 91, i32 85, i32 93, i32 87, i32 95, i32 113, i32 121, i32 115, i32 123, i32 117, i32 125, i32 119, i32 127, i32 129, i32 137, i32 131, i32 139, i32 133, i32 141, i32 135, i32 143, i32 161, i32 169, i32 163, i32 171, i32 165, i32 173, i32 167, i32 175, i32 145, i32 153, i32 147, i32 155, i32 149, i32 157, i32 151, i32 159, i32 177, i32 185, i32 179, i32 187, i32 181, i32 189, i32 183, i32 191, i32 193, i32 201, i32 195, i32 203, i32 197, i32 205, i32 199, i32 207, i32 225, i32 233, i32 227, i32 235, i32 229, i32 237, i32 231, i32 239, i32 209, i32 217, i32 211, i32 219, i32 213, i32 221, i32 215, i32 223, i32 241, i32 249, i32 243, i32 251, i32 245, i32 253, i32 247, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_6a: +; CHECK: [[REG6a:r[0-9]+]] = #106 +; CHECK: vdeal(v1,v0,[[REG6a]]) +define <256 x i8> @vdeal_6a(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 8, i32 9, i32 4, i32 5, i32 12, i32 13, i32 32, i32 33, i32 40, i32 41, i32 36, i32 37, i32 44, i32 45, i32 16, i32 17, i32 24, i32 25, i32 20, i32 21, i32 28, i32 29, i32 48, i32 49, i32 56, i32 57, i32 52, i32 53, i32 60, i32 61, i32 64, i32 65, i32 72, i32 73, i32 68, i32 69, i32 76, i32 77, i32 96, i32 97, i32 104, i32 105, i32 100, i32 101, i32 108, i32 109, i32 80, i32 81, i32 88, i32 89, i32 84, i32 85, i32 92, i32 93, i32 112, i32 113, i32 120, i32 121, i32 116, i32 117, i32 124, i32 125, i32 128, i32 129, i32 136, i32 137, i32 132, i32 133, i32 140, i32 141, i32 160, i32 161, i32 168, i32 169, i32 164, i32 165, i32 172, i32 173, i32 144, i32 145, i32 152, i32 153, i32 148, i32 149, i32 156, i32 157, i32 176, i32 177, i32 184, i32 185, i32 180, i32 181, i32 188, i32 189, i32 192, i32 193, i32 200, i32 201, i32 196, i32 197, i32 204, i32 205, i32 224, i32 225, i32 232, i32 233, i32 228, i32 229, i32 236, i32 237, i32 208, i32 209, i32 216, i32 217, i32 212, i32 213, i32 220, i32 221, i32 240, i32 241, i32 248, i32 249, i32 244, i32 245, i32 252, i32 253, i32 2, i32 3, i32 10, i32 11, i32 6, i32 7, i32 14, i32 15, i32 34, i32 35, i32 42, i32 43, i32 38, i32 39, i32 46, i32 47, i32 18, i32 19, i32 26, i32 27, i32 22, i32 23, i32 30, i32 31, i32 50, i32 51, i32 58, i32 59, i32 54, i32 55, i32 62, i32 63, i32 66, i32 67, i32 74, i32 75, i32 70, i32 71, i32 78, i32 79, i32 98, i32 99, i32 106, i32 107, i32 102, i32 103, i32 110, i32 111, i32 82, i32 83, i32 90, i32 91, i32 86, i32 87, i32 94, i32 95, i32 114, i32 115, i32 122, i32 123, i32 118, i32 119, i32 126, i32 127, i32 130, i32 131, i32 138, i32 139, i32 134, i32 135, i32 142, i32 143, i32 162, i32 163, i32 170, i32 171, i32 166, i32 167, i32 174, i32 175, i32 146, i32 147, i32 154, i32 155, i32 150, i32 151, i32 158, i32 159, i32 178, i32 179, i32 186, i32 187, i32 182, i32 183, i32 190, i32 191, i32 194, i32 195, i32 202, i32 203, i32 198, i32 199, i32 206, i32 207, i32 226, i32 227, i32 234, i32 235, i32 230, i32 231, i32 238, i32 239, i32 210, i32 211, i32 218, i32 219, i32 214, i32 215, i32 222, i32 223, i32 242, i32 243, i32 250, i32 251, i32 246, i32 247, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_6b: +; CHECK: [[REG6b:r[0-9]+]] = #107 +; CHECK: vdeal(v1,v0,[[REG6b]]) +define <256 x i8> @vdeal_6b(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 2, i32 8, i32 10, i32 4, i32 6, i32 12, i32 14, i32 32, i32 34, i32 40, i32 42, i32 36, i32 38, i32 44, i32 46, i32 16, i32 18, i32 24, i32 26, i32 20, i32 22, i32 28, i32 30, i32 48, i32 50, i32 56, i32 58, i32 52, i32 54, i32 60, i32 62, i32 64, i32 66, i32 72, i32 74, i32 68, i32 70, i32 76, i32 78, i32 96, i32 98, i32 104, i32 106, i32 100, i32 102, i32 108, i32 110, i32 80, i32 82, i32 88, i32 90, i32 84, i32 86, i32 92, i32 94, i32 112, i32 114, i32 120, i32 122, i32 116, i32 118, i32 124, i32 126, i32 128, i32 130, i32 136, i32 138, i32 132, i32 134, i32 140, i32 142, i32 160, i32 162, i32 168, i32 170, i32 164, i32 166, i32 172, i32 174, i32 144, i32 146, i32 152, i32 154, i32 148, i32 150, i32 156, i32 158, i32 176, i32 178, i32 184, i32 186, i32 180, i32 182, i32 188, i32 190, i32 192, i32 194, i32 200, i32 202, i32 196, i32 198, i32 204, i32 206, i32 224, i32 226, i32 232, i32 234, i32 228, i32 230, i32 236, i32 238, i32 208, i32 210, i32 216, i32 218, i32 212, i32 214, i32 220, i32 222, i32 240, i32 242, i32 248, i32 250, i32 244, i32 246, i32 252, i32 254, i32 1, i32 3, i32 9, i32 11, i32 5, i32 7, i32 13, i32 15, i32 33, i32 35, i32 41, i32 43, i32 37, i32 39, i32 45, i32 47, i32 17, i32 19, i32 25, i32 27, i32 21, i32 23, i32 29, i32 31, i32 49, i32 51, i32 57, i32 59, i32 53, i32 55, i32 61, i32 63, i32 65, i32 67, i32 73, i32 75, i32 69, i32 71, i32 77, i32 79, i32 97, i32 99, i32 105, i32 107, i32 101, i32 103, i32 109, i32 111, i32 81, i32 83, i32 89, i32 91, i32 85, i32 87, i32 93, i32 95, i32 113, i32 115, i32 121, i32 123, i32 117, i32 119, i32 125, i32 127, i32 129, i32 131, i32 137, i32 139, i32 133, i32 135, i32 141, i32 143, i32 161, i32 163, i32 169, i32 171, i32 165, i32 167, i32 173, i32 175, i32 145, i32 147, i32 153, i32 155, i32 149, i32 151, i32 157, i32 159, i32 177, i32 179, i32 185, i32 187, i32 181, i32 183, i32 189, i32 191, i32 193, i32 195, i32 201, i32 203, i32 197, i32 199, i32 205, i32 207, i32 225, i32 227, i32 233, i32 235, i32 229, i32 231, i32 237, i32 239, i32 209, i32 211, i32 217, i32 219, i32 213, i32 215, i32 221, i32 223, i32 241, i32 243, i32 249, i32 251, i32 245, i32 247, i32 253, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_6c: +; CHECK: [[REG6c:r[0-9]+]] = #108 +; CHECK: vdeal(v1,v0,[[REG6c]]) +define <256 x i8> @vdeal_6c(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 10, i32 11, i32 32, i32 33, i32 34, i32 35, i32 40, i32 41, i32 42, i32 43, i32 16, i32 17, i32 18, i32 19, i32 24, i32 25, i32 26, i32 27, i32 48, i32 49, i32 50, i32 51, i32 56, i32 57, i32 58, i32 59, i32 64, i32 65, i32 66, i32 67, i32 72, i32 73, i32 74, i32 75, i32 96, i32 97, i32 98, i32 99, i32 104, i32 105, i32 106, i32 107, i32 80, i32 81, i32 82, i32 83, i32 88, i32 89, i32 90, i32 91, i32 112, i32 113, i32 114, i32 115, i32 120, i32 121, i32 122, i32 123, i32 128, i32 129, i32 130, i32 131, i32 136, i32 137, i32 138, i32 139, i32 160, i32 161, i32 162, i32 163, i32 168, i32 169, i32 170, i32 171, i32 144, i32 145, i32 146, i32 147, i32 152, i32 153, i32 154, i32 155, i32 176, i32 177, i32 178, i32 179, i32 184, i32 185, i32 186, i32 187, i32 192, i32 193, i32 194, i32 195, i32 200, i32 201, i32 202, i32 203, i32 224, i32 225, i32 226, i32 227, i32 232, i32 233, i32 234, i32 235, i32 208, i32 209, i32 210, i32 211, i32 216, i32 217, i32 218, i32 219, i32 240, i32 241, i32 242, i32 243, i32 248, i32 249, i32 250, i32 251, i32 4, i32 5, i32 6, i32 7, i32 12, i32 13, i32 14, i32 15, i32 36, i32 37, i32 38, i32 39, i32 44, i32 45, i32 46, i32 47, i32 20, i32 21, i32 22, i32 23, i32 28, i32 29, i32 30, i32 31, i32 52, i32 53, i32 54, i32 55, i32 60, i32 61, i32 62, i32 63, i32 68, i32 69, i32 70, i32 71, i32 76, i32 77, i32 78, i32 79, i32 100, i32 101, i32 102, i32 103, i32 108, i32 109, i32 110, i32 111, i32 84, i32 85, i32 86, i32 87, i32 92, i32 93, i32 94, i32 95, i32 116, i32 117, i32 118, i32 119, i32 124, i32 125, i32 126, i32 127, i32 132, i32 133, i32 134, i32 135, i32 140, i32 141, i32 142, i32 143, i32 164, i32 165, i32 166, i32 167, i32 172, i32 173, i32 174, i32 175, i32 148, i32 149, i32 150, i32 151, i32 156, i32 157, i32 158, i32 159, i32 180, i32 181, i32 182, i32 183, i32 188, i32 189, i32 190, i32 191, i32 196, i32 197, i32 198, i32 199, i32 204, i32 205, i32 206, i32 207, i32 228, i32 229, i32 230, i32 231, i32 236, i32 237, i32 238, i32 239, i32 212, i32 213, i32 214, i32 215, i32 220, i32 221, i32 222, i32 223, i32 244, i32 245, i32 246, i32 247, i32 252, i32 253, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_6d: +; CHECK: [[REG6d:r[0-9]+]] = #109 +; CHECK: vdeal(v1,v0,[[REG6d]]) +define <256 x i8> @vdeal_6d(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 4, i32 2, i32 6, i32 8, i32 12, i32 10, i32 14, i32 32, i32 36, i32 34, i32 38, i32 40, i32 44, i32 42, i32 46, i32 16, i32 20, i32 18, i32 22, i32 24, i32 28, i32 26, i32 30, i32 48, i32 52, i32 50, i32 54, i32 56, i32 60, i32 58, i32 62, i32 64, i32 68, i32 66, i32 70, i32 72, i32 76, i32 74, i32 78, i32 96, i32 100, i32 98, i32 102, i32 104, i32 108, i32 106, i32 110, i32 80, i32 84, i32 82, i32 86, i32 88, i32 92, i32 90, i32 94, i32 112, i32 116, i32 114, i32 118, i32 120, i32 124, i32 122, i32 126, i32 128, i32 132, i32 130, i32 134, i32 136, i32 140, i32 138, i32 142, i32 160, i32 164, i32 162, i32 166, i32 168, i32 172, i32 170, i32 174, i32 144, i32 148, i32 146, i32 150, i32 152, i32 156, i32 154, i32 158, i32 176, i32 180, i32 178, i32 182, i32 184, i32 188, i32 186, i32 190, i32 192, i32 196, i32 194, i32 198, i32 200, i32 204, i32 202, i32 206, i32 224, i32 228, i32 226, i32 230, i32 232, i32 236, i32 234, i32 238, i32 208, i32 212, i32 210, i32 214, i32 216, i32 220, i32 218, i32 222, i32 240, i32 244, i32 242, i32 246, i32 248, i32 252, i32 250, i32 254, i32 1, i32 5, i32 3, i32 7, i32 9, i32 13, i32 11, i32 15, i32 33, i32 37, i32 35, i32 39, i32 41, i32 45, i32 43, i32 47, i32 17, i32 21, i32 19, i32 23, i32 25, i32 29, i32 27, i32 31, i32 49, i32 53, i32 51, i32 55, i32 57, i32 61, i32 59, i32 63, i32 65, i32 69, i32 67, i32 71, i32 73, i32 77, i32 75, i32 79, i32 97, i32 101, i32 99, i32 103, i32 105, i32 109, i32 107, i32 111, i32 81, i32 85, i32 83, i32 87, i32 89, i32 93, i32 91, i32 95, i32 113, i32 117, i32 115, i32 119, i32 121, i32 125, i32 123, i32 127, i32 129, i32 133, i32 131, i32 135, i32 137, i32 141, i32 139, i32 143, i32 161, i32 165, i32 163, i32 167, i32 169, i32 173, i32 171, i32 175, i32 145, i32 149, i32 147, i32 151, i32 153, i32 157, i32 155, i32 159, i32 177, i32 181, i32 179, i32 183, i32 185, i32 189, i32 187, i32 191, i32 193, i32 197, i32 195, i32 199, i32 201, i32 205, i32 203, i32 207, i32 225, i32 229, i32 227, i32 231, i32 233, i32 237, i32 235, i32 239, i32 209, i32 213, i32 211, i32 215, i32 217, i32 221, i32 219, i32 223, i32 241, i32 245, i32 243, i32 247, i32 249, i32 253, i32 251, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_6e: +; CHECK: [[REG6e:r[0-9]+]] = #110 +; CHECK: vdeal(v1,v0,[[REG6e]]) +define <256 x i8> @vdeal_6e(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 4, i32 5, i32 8, i32 9, i32 12, i32 13, i32 32, i32 33, i32 36, i32 37, i32 40, i32 41, i32 44, i32 45, i32 16, i32 17, i32 20, i32 21, i32 24, i32 25, i32 28, i32 29, i32 48, i32 49, i32 52, i32 53, i32 56, i32 57, i32 60, i32 61, i32 64, i32 65, i32 68, i32 69, i32 72, i32 73, i32 76, i32 77, i32 96, i32 97, i32 100, i32 101, i32 104, i32 105, i32 108, i32 109, i32 80, i32 81, i32 84, i32 85, i32 88, i32 89, i32 92, i32 93, i32 112, i32 113, i32 116, i32 117, i32 120, i32 121, i32 124, i32 125, i32 128, i32 129, i32 132, i32 133, i32 136, i32 137, i32 140, i32 141, i32 160, i32 161, i32 164, i32 165, i32 168, i32 169, i32 172, i32 173, i32 144, i32 145, i32 148, i32 149, i32 152, i32 153, i32 156, i32 157, i32 176, i32 177, i32 180, i32 181, i32 184, i32 185, i32 188, i32 189, i32 192, i32 193, i32 196, i32 197, i32 200, i32 201, i32 204, i32 205, i32 224, i32 225, i32 228, i32 229, i32 232, i32 233, i32 236, i32 237, i32 208, i32 209, i32 212, i32 213, i32 216, i32 217, i32 220, i32 221, i32 240, i32 241, i32 244, i32 245, i32 248, i32 249, i32 252, i32 253, i32 2, i32 3, i32 6, i32 7, i32 10, i32 11, i32 14, i32 15, i32 34, i32 35, i32 38, i32 39, i32 42, i32 43, i32 46, i32 47, i32 18, i32 19, i32 22, i32 23, i32 26, i32 27, i32 30, i32 31, i32 50, i32 51, i32 54, i32 55, i32 58, i32 59, i32 62, i32 63, i32 66, i32 67, i32 70, i32 71, i32 74, i32 75, i32 78, i32 79, i32 98, i32 99, i32 102, i32 103, i32 106, i32 107, i32 110, i32 111, i32 82, i32 83, i32 86, i32 87, i32 90, i32 91, i32 94, i32 95, i32 114, i32 115, i32 118, i32 119, i32 122, i32 123, i32 126, i32 127, i32 130, i32 131, i32 134, i32 135, i32 138, i32 139, i32 142, i32 143, i32 162, i32 163, i32 166, i32 167, i32 170, i32 171, i32 174, i32 175, i32 146, i32 147, i32 150, i32 151, i32 154, i32 155, i32 158, i32 159, i32 178, i32 179, i32 182, i32 183, i32 186, i32 187, i32 190, i32 191, i32 194, i32 195, i32 198, i32 199, i32 202, i32 203, i32 206, i32 207, i32 226, i32 227, i32 230, i32 231, i32 234, i32 235, i32 238, i32 239, i32 210, i32 211, i32 214, i32 215, i32 218, i32 219, i32 222, i32 223, i32 242, i32 243, i32 246, i32 247, i32 250, i32 251, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_6f: +; CHECK: [[REG6f:r[0-9]+]] = #111 +; CHECK: vdeal(v1,v0,[[REG6f]]) +define <256 x i8> @vdeal_6f(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 32, i32 34, i32 36, i32 38, i32 40, i32 42, i32 44, i32 46, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30, i32 48, i32 50, i32 52, i32 54, i32 56, i32 58, i32 60, i32 62, i32 64, i32 66, i32 68, i32 70, i32 72, i32 74, i32 76, i32 78, i32 96, i32 98, i32 100, i32 102, i32 104, i32 106, i32 108, i32 110, i32 80, i32 82, i32 84, i32 86, i32 88, i32 90, i32 92, i32 94, i32 112, i32 114, i32 116, i32 118, i32 120, i32 122, i32 124, i32 126, i32 128, i32 130, i32 132, i32 134, i32 136, i32 138, i32 140, i32 142, i32 160, i32 162, i32 164, i32 166, i32 168, i32 170, i32 172, i32 174, i32 144, i32 146, i32 148, i32 150, i32 152, i32 154, i32 156, i32 158, i32 176, i32 178, i32 180, i32 182, i32 184, i32 186, i32 188, i32 190, i32 192, i32 194, i32 196, i32 198, i32 200, i32 202, i32 204, i32 206, i32 224, i32 226, i32 228, i32 230, i32 232, i32 234, i32 236, i32 238, i32 208, i32 210, i32 212, i32 214, i32 216, i32 218, i32 220, i32 222, i32 240, i32 242, i32 244, i32 246, i32 248, i32 250, i32 252, i32 254, i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 33, i32 35, i32 37, i32 39, i32 41, i32 43, i32 45, i32 47, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31, i32 49, i32 51, i32 53, i32 55, i32 57, i32 59, i32 61, i32 63, i32 65, i32 67, i32 69, i32 71, i32 73, i32 75, i32 77, i32 79, i32 97, i32 99, i32 101, i32 103, i32 105, i32 107, i32 109, i32 111, i32 81, i32 83, i32 85, i32 87, i32 89, i32 91, i32 93, i32 95, i32 113, i32 115, i32 117, i32 119, i32 121, i32 123, i32 125, i32 127, i32 129, i32 131, i32 133, i32 135, i32 137, i32 139, i32 141, i32 143, i32 161, i32 163, i32 165, i32 167, i32 169, i32 171, i32 173, i32 175, i32 145, i32 147, i32 149, i32 151, i32 153, i32 155, i32 157, i32 159, i32 177, i32 179, i32 181, i32 183, i32 185, i32 187, i32 189, i32 191, i32 193, i32 195, i32 197, i32 199, i32 201, i32 203, i32 205, i32 207, i32 225, i32 227, i32 229, i32 231, i32 233, i32 235, i32 237, i32 239, i32 209, i32 211, i32 213, i32 215, i32 217, i32 219, i32 221, i32 223, i32 241, i32 243, i32 245, i32 247, i32 249, i32 251, i32 253, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_70: +; CHECK: [[REG70:r[0-9]+]] = #112 +; CHECK: vdeal(v1,v0,[[REG70]]) +define <256 x i8> @vdeal_70(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 64, i32 65, i32 66, i32 67, i32 68, i32 69, i32 70, i32 71, i32 72, i32 73, i32 74, i32 75, i32 76, i32 77, i32 78, i32 79, i32 96, i32 97, i32 98, i32 99, i32 100, i32 101, i32 102, i32 103, i32 104, i32 105, i32 106, i32 107, i32 108, i32 109, i32 110, i32 111, i32 128, i32 129, i32 130, i32 131, i32 132, i32 133, i32 134, i32 135, i32 136, i32 137, i32 138, i32 139, i32 140, i32 141, i32 142, i32 143, i32 160, i32 161, i32 162, i32 163, i32 164, i32 165, i32 166, i32 167, i32 168, i32 169, i32 170, i32 171, i32 172, i32 173, i32 174, i32 175, i32 192, i32 193, i32 194, i32 195, i32 196, i32 197, i32 198, i32 199, i32 200, i32 201, i32 202, i32 203, i32 204, i32 205, i32 206, i32 207, i32 224, i32 225, i32 226, i32 227, i32 228, i32 229, i32 230, i32 231, i32 232, i32 233, i32 234, i32 235, i32 236, i32 237, i32 238, i32 239, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 48, i32 49, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63, i32 80, i32 81, i32 82, i32 83, i32 84, i32 85, i32 86, i32 87, i32 88, i32 89, i32 90, i32 91, i32 92, i32 93, i32 94, i32 95, i32 112, i32 113, i32 114, i32 115, i32 116, i32 117, i32 118, i32 119, i32 120, i32 121, i32 122, i32 123, i32 124, i32 125, i32 126, i32 127, i32 144, i32 145, i32 146, i32 147, i32 148, i32 149, i32 150, i32 151, i32 152, i32 153, i32 154, i32 155, i32 156, i32 157, i32 158, i32 159, i32 176, i32 177, i32 178, i32 179, i32 180, i32 181, i32 182, i32 183, i32 184, i32 185, i32 186, i32 187, i32 188, i32 189, i32 190, i32 191, i32 208, i32 209, i32 210, i32 211, i32 212, i32 213, i32 214, i32 215, i32 216, i32 217, i32 218, i32 219, i32 220, i32 221, i32 222, i32 223, i32 240, i32 241, i32 242, i32 243, i32 244, i32 245, i32 246, i32 247, i32 248, i32 249, i32 250, i32 251, i32 252, i32 253, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_71: +; CHECK: [[REG71:r[0-9]+]] = #113 +; CHECK: vdeal(v1,v0,[[REG71]]) +define <256 x i8> @vdeal_71(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 16, i32 2, i32 18, i32 4, i32 20, i32 6, i32 22, i32 8, i32 24, i32 10, i32 26, i32 12, i32 28, i32 14, i32 30, i32 32, i32 48, i32 34, i32 50, i32 36, i32 52, i32 38, i32 54, i32 40, i32 56, i32 42, i32 58, i32 44, i32 60, i32 46, i32 62, i32 64, i32 80, i32 66, i32 82, i32 68, i32 84, i32 70, i32 86, i32 72, i32 88, i32 74, i32 90, i32 76, i32 92, i32 78, i32 94, i32 96, i32 112, i32 98, i32 114, i32 100, i32 116, i32 102, i32 118, i32 104, i32 120, i32 106, i32 122, i32 108, i32 124, i32 110, i32 126, i32 128, i32 144, i32 130, i32 146, i32 132, i32 148, i32 134, i32 150, i32 136, i32 152, i32 138, i32 154, i32 140, i32 156, i32 142, i32 158, i32 160, i32 176, i32 162, i32 178, i32 164, i32 180, i32 166, i32 182, i32 168, i32 184, i32 170, i32 186, i32 172, i32 188, i32 174, i32 190, i32 192, i32 208, i32 194, i32 210, i32 196, i32 212, i32 198, i32 214, i32 200, i32 216, i32 202, i32 218, i32 204, i32 220, i32 206, i32 222, i32 224, i32 240, i32 226, i32 242, i32 228, i32 244, i32 230, i32 246, i32 232, i32 248, i32 234, i32 250, i32 236, i32 252, i32 238, i32 254, i32 1, i32 17, i32 3, i32 19, i32 5, i32 21, i32 7, i32 23, i32 9, i32 25, i32 11, i32 27, i32 13, i32 29, i32 15, i32 31, i32 33, i32 49, i32 35, i32 51, i32 37, i32 53, i32 39, i32 55, i32 41, i32 57, i32 43, i32 59, i32 45, i32 61, i32 47, i32 63, i32 65, i32 81, i32 67, i32 83, i32 69, i32 85, i32 71, i32 87, i32 73, i32 89, i32 75, i32 91, i32 77, i32 93, i32 79, i32 95, i32 97, i32 113, i32 99, i32 115, i32 101, i32 117, i32 103, i32 119, i32 105, i32 121, i32 107, i32 123, i32 109, i32 125, i32 111, i32 127, i32 129, i32 145, i32 131, i32 147, i32 133, i32 149, i32 135, i32 151, i32 137, i32 153, i32 139, i32 155, i32 141, i32 157, i32 143, i32 159, i32 161, i32 177, i32 163, i32 179, i32 165, i32 181, i32 167, i32 183, i32 169, i32 185, i32 171, i32 187, i32 173, i32 189, i32 175, i32 191, i32 193, i32 209, i32 195, i32 211, i32 197, i32 213, i32 199, i32 215, i32 201, i32 217, i32 203, i32 219, i32 205, i32 221, i32 207, i32 223, i32 225, i32 241, i32 227, i32 243, i32 229, i32 245, i32 231, i32 247, i32 233, i32 249, i32 235, i32 251, i32 237, i32 253, i32 239, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_72: +; CHECK: [[REG72:r[0-9]+]] = #114 +; CHECK: vdeal(v1,v0,[[REG72]]) +define <256 x i8> @vdeal_72(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 16, i32 17, i32 4, i32 5, i32 20, i32 21, i32 8, i32 9, i32 24, i32 25, i32 12, i32 13, i32 28, i32 29, i32 32, i32 33, i32 48, i32 49, i32 36, i32 37, i32 52, i32 53, i32 40, i32 41, i32 56, i32 57, i32 44, i32 45, i32 60, i32 61, i32 64, i32 65, i32 80, i32 81, i32 68, i32 69, i32 84, i32 85, i32 72, i32 73, i32 88, i32 89, i32 76, i32 77, i32 92, i32 93, i32 96, i32 97, i32 112, i32 113, i32 100, i32 101, i32 116, i32 117, i32 104, i32 105, i32 120, i32 121, i32 108, i32 109, i32 124, i32 125, i32 128, i32 129, i32 144, i32 145, i32 132, i32 133, i32 148, i32 149, i32 136, i32 137, i32 152, i32 153, i32 140, i32 141, i32 156, i32 157, i32 160, i32 161, i32 176, i32 177, i32 164, i32 165, i32 180, i32 181, i32 168, i32 169, i32 184, i32 185, i32 172, i32 173, i32 188, i32 189, i32 192, i32 193, i32 208, i32 209, i32 196, i32 197, i32 212, i32 213, i32 200, i32 201, i32 216, i32 217, i32 204, i32 205, i32 220, i32 221, i32 224, i32 225, i32 240, i32 241, i32 228, i32 229, i32 244, i32 245, i32 232, i32 233, i32 248, i32 249, i32 236, i32 237, i32 252, i32 253, i32 2, i32 3, i32 18, i32 19, i32 6, i32 7, i32 22, i32 23, i32 10, i32 11, i32 26, i32 27, i32 14, i32 15, i32 30, i32 31, i32 34, i32 35, i32 50, i32 51, i32 38, i32 39, i32 54, i32 55, i32 42, i32 43, i32 58, i32 59, i32 46, i32 47, i32 62, i32 63, i32 66, i32 67, i32 82, i32 83, i32 70, i32 71, i32 86, i32 87, i32 74, i32 75, i32 90, i32 91, i32 78, i32 79, i32 94, i32 95, i32 98, i32 99, i32 114, i32 115, i32 102, i32 103, i32 118, i32 119, i32 106, i32 107, i32 122, i32 123, i32 110, i32 111, i32 126, i32 127, i32 130, i32 131, i32 146, i32 147, i32 134, i32 135, i32 150, i32 151, i32 138, i32 139, i32 154, i32 155, i32 142, i32 143, i32 158, i32 159, i32 162, i32 163, i32 178, i32 179, i32 166, i32 167, i32 182, i32 183, i32 170, i32 171, i32 186, i32 187, i32 174, i32 175, i32 190, i32 191, i32 194, i32 195, i32 210, i32 211, i32 198, i32 199, i32 214, i32 215, i32 202, i32 203, i32 218, i32 219, i32 206, i32 207, i32 222, i32 223, i32 226, i32 227, i32 242, i32 243, i32 230, i32 231, i32 246, i32 247, i32 234, i32 235, i32 250, i32 251, i32 238, i32 239, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_73: +; CHECK: [[REG73:r[0-9]+]] = #115 +; CHECK: vdeal(v1,v0,[[REG73]]) +define <256 x i8> @vdeal_73(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 2, i32 16, i32 18, i32 4, i32 6, i32 20, i32 22, i32 8, i32 10, i32 24, i32 26, i32 12, i32 14, i32 28, i32 30, i32 32, i32 34, i32 48, i32 50, i32 36, i32 38, i32 52, i32 54, i32 40, i32 42, i32 56, i32 58, i32 44, i32 46, i32 60, i32 62, i32 64, i32 66, i32 80, i32 82, i32 68, i32 70, i32 84, i32 86, i32 72, i32 74, i32 88, i32 90, i32 76, i32 78, i32 92, i32 94, i32 96, i32 98, i32 112, i32 114, i32 100, i32 102, i32 116, i32 118, i32 104, i32 106, i32 120, i32 122, i32 108, i32 110, i32 124, i32 126, i32 128, i32 130, i32 144, i32 146, i32 132, i32 134, i32 148, i32 150, i32 136, i32 138, i32 152, i32 154, i32 140, i32 142, i32 156, i32 158, i32 160, i32 162, i32 176, i32 178, i32 164, i32 166, i32 180, i32 182, i32 168, i32 170, i32 184, i32 186, i32 172, i32 174, i32 188, i32 190, i32 192, i32 194, i32 208, i32 210, i32 196, i32 198, i32 212, i32 214, i32 200, i32 202, i32 216, i32 218, i32 204, i32 206, i32 220, i32 222, i32 224, i32 226, i32 240, i32 242, i32 228, i32 230, i32 244, i32 246, i32 232, i32 234, i32 248, i32 250, i32 236, i32 238, i32 252, i32 254, i32 1, i32 3, i32 17, i32 19, i32 5, i32 7, i32 21, i32 23, i32 9, i32 11, i32 25, i32 27, i32 13, i32 15, i32 29, i32 31, i32 33, i32 35, i32 49, i32 51, i32 37, i32 39, i32 53, i32 55, i32 41, i32 43, i32 57, i32 59, i32 45, i32 47, i32 61, i32 63, i32 65, i32 67, i32 81, i32 83, i32 69, i32 71, i32 85, i32 87, i32 73, i32 75, i32 89, i32 91, i32 77, i32 79, i32 93, i32 95, i32 97, i32 99, i32 113, i32 115, i32 101, i32 103, i32 117, i32 119, i32 105, i32 107, i32 121, i32 123, i32 109, i32 111, i32 125, i32 127, i32 129, i32 131, i32 145, i32 147, i32 133, i32 135, i32 149, i32 151, i32 137, i32 139, i32 153, i32 155, i32 141, i32 143, i32 157, i32 159, i32 161, i32 163, i32 177, i32 179, i32 165, i32 167, i32 181, i32 183, i32 169, i32 171, i32 185, i32 187, i32 173, i32 175, i32 189, i32 191, i32 193, i32 195, i32 209, i32 211, i32 197, i32 199, i32 213, i32 215, i32 201, i32 203, i32 217, i32 219, i32 205, i32 207, i32 221, i32 223, i32 225, i32 227, i32 241, i32 243, i32 229, i32 231, i32 245, i32 247, i32 233, i32 235, i32 249, i32 251, i32 237, i32 239, i32 253, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_74: +; CHECK: [[REG74:r[0-9]+]] = #116 +; CHECK: vdeal(v1,v0,[[REG74]]) +define <256 x i8> @vdeal_74(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 2, i32 3, i32 16, i32 17, i32 18, i32 19, i32 8, i32 9, i32 10, i32 11, i32 24, i32 25, i32 26, i32 27, i32 32, i32 33, i32 34, i32 35, i32 48, i32 49, i32 50, i32 51, i32 40, i32 41, i32 42, i32 43, i32 56, i32 57, i32 58, i32 59, i32 64, i32 65, i32 66, i32 67, i32 80, i32 81, i32 82, i32 83, i32 72, i32 73, i32 74, i32 75, i32 88, i32 89, i32 90, i32 91, i32 96, i32 97, i32 98, i32 99, i32 112, i32 113, i32 114, i32 115, i32 104, i32 105, i32 106, i32 107, i32 120, i32 121, i32 122, i32 123, i32 128, i32 129, i32 130, i32 131, i32 144, i32 145, i32 146, i32 147, i32 136, i32 137, i32 138, i32 139, i32 152, i32 153, i32 154, i32 155, i32 160, i32 161, i32 162, i32 163, i32 176, i32 177, i32 178, i32 179, i32 168, i32 169, i32 170, i32 171, i32 184, i32 185, i32 186, i32 187, i32 192, i32 193, i32 194, i32 195, i32 208, i32 209, i32 210, i32 211, i32 200, i32 201, i32 202, i32 203, i32 216, i32 217, i32 218, i32 219, i32 224, i32 225, i32 226, i32 227, i32 240, i32 241, i32 242, i32 243, i32 232, i32 233, i32 234, i32 235, i32 248, i32 249, i32 250, i32 251, i32 4, i32 5, i32 6, i32 7, i32 20, i32 21, i32 22, i32 23, i32 12, i32 13, i32 14, i32 15, i32 28, i32 29, i32 30, i32 31, i32 36, i32 37, i32 38, i32 39, i32 52, i32 53, i32 54, i32 55, i32 44, i32 45, i32 46, i32 47, i32 60, i32 61, i32 62, i32 63, i32 68, i32 69, i32 70, i32 71, i32 84, i32 85, i32 86, i32 87, i32 76, i32 77, i32 78, i32 79, i32 92, i32 93, i32 94, i32 95, i32 100, i32 101, i32 102, i32 103, i32 116, i32 117, i32 118, i32 119, i32 108, i32 109, i32 110, i32 111, i32 124, i32 125, i32 126, i32 127, i32 132, i32 133, i32 134, i32 135, i32 148, i32 149, i32 150, i32 151, i32 140, i32 141, i32 142, i32 143, i32 156, i32 157, i32 158, i32 159, i32 164, i32 165, i32 166, i32 167, i32 180, i32 181, i32 182, i32 183, i32 172, i32 173, i32 174, i32 175, i32 188, i32 189, i32 190, i32 191, i32 196, i32 197, i32 198, i32 199, i32 212, i32 213, i32 214, i32 215, i32 204, i32 205, i32 206, i32 207, i32 220, i32 221, i32 222, i32 223, i32 228, i32 229, i32 230, i32 231, i32 244, i32 245, i32 246, i32 247, i32 236, i32 237, i32 238, i32 239, i32 252, i32 253, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_75: +; CHECK: [[REG75:r[0-9]+]] = #117 +; CHECK: vdeal(v1,v0,[[REG75]]) +define <256 x i8> @vdeal_75(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 4, i32 2, i32 6, i32 16, i32 20, i32 18, i32 22, i32 8, i32 12, i32 10, i32 14, i32 24, i32 28, i32 26, i32 30, i32 32, i32 36, i32 34, i32 38, i32 48, i32 52, i32 50, i32 54, i32 40, i32 44, i32 42, i32 46, i32 56, i32 60, i32 58, i32 62, i32 64, i32 68, i32 66, i32 70, i32 80, i32 84, i32 82, i32 86, i32 72, i32 76, i32 74, i32 78, i32 88, i32 92, i32 90, i32 94, i32 96, i32 100, i32 98, i32 102, i32 112, i32 116, i32 114, i32 118, i32 104, i32 108, i32 106, i32 110, i32 120, i32 124, i32 122, i32 126, i32 128, i32 132, i32 130, i32 134, i32 144, i32 148, i32 146, i32 150, i32 136, i32 140, i32 138, i32 142, i32 152, i32 156, i32 154, i32 158, i32 160, i32 164, i32 162, i32 166, i32 176, i32 180, i32 178, i32 182, i32 168, i32 172, i32 170, i32 174, i32 184, i32 188, i32 186, i32 190, i32 192, i32 196, i32 194, i32 198, i32 208, i32 212, i32 210, i32 214, i32 200, i32 204, i32 202, i32 206, i32 216, i32 220, i32 218, i32 222, i32 224, i32 228, i32 226, i32 230, i32 240, i32 244, i32 242, i32 246, i32 232, i32 236, i32 234, i32 238, i32 248, i32 252, i32 250, i32 254, i32 1, i32 5, i32 3, i32 7, i32 17, i32 21, i32 19, i32 23, i32 9, i32 13, i32 11, i32 15, i32 25, i32 29, i32 27, i32 31, i32 33, i32 37, i32 35, i32 39, i32 49, i32 53, i32 51, i32 55, i32 41, i32 45, i32 43, i32 47, i32 57, i32 61, i32 59, i32 63, i32 65, i32 69, i32 67, i32 71, i32 81, i32 85, i32 83, i32 87, i32 73, i32 77, i32 75, i32 79, i32 89, i32 93, i32 91, i32 95, i32 97, i32 101, i32 99, i32 103, i32 113, i32 117, i32 115, i32 119, i32 105, i32 109, i32 107, i32 111, i32 121, i32 125, i32 123, i32 127, i32 129, i32 133, i32 131, i32 135, i32 145, i32 149, i32 147, i32 151, i32 137, i32 141, i32 139, i32 143, i32 153, i32 157, i32 155, i32 159, i32 161, i32 165, i32 163, i32 167, i32 177, i32 181, i32 179, i32 183, i32 169, i32 173, i32 171, i32 175, i32 185, i32 189, i32 187, i32 191, i32 193, i32 197, i32 195, i32 199, i32 209, i32 213, i32 211, i32 215, i32 201, i32 205, i32 203, i32 207, i32 217, i32 221, i32 219, i32 223, i32 225, i32 229, i32 227, i32 231, i32 241, i32 245, i32 243, i32 247, i32 233, i32 237, i32 235, i32 239, i32 249, i32 253, i32 251, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_76: +; CHECK: [[REG76:r[0-9]+]] = #118 +; CHECK: vdeal(v1,v0,[[REG76]]) +define <256 x i8> @vdeal_76(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 4, i32 5, i32 16, i32 17, i32 20, i32 21, i32 8, i32 9, i32 12, i32 13, i32 24, i32 25, i32 28, i32 29, i32 32, i32 33, i32 36, i32 37, i32 48, i32 49, i32 52, i32 53, i32 40, i32 41, i32 44, i32 45, i32 56, i32 57, i32 60, i32 61, i32 64, i32 65, i32 68, i32 69, i32 80, i32 81, i32 84, i32 85, i32 72, i32 73, i32 76, i32 77, i32 88, i32 89, i32 92, i32 93, i32 96, i32 97, i32 100, i32 101, i32 112, i32 113, i32 116, i32 117, i32 104, i32 105, i32 108, i32 109, i32 120, i32 121, i32 124, i32 125, i32 128, i32 129, i32 132, i32 133, i32 144, i32 145, i32 148, i32 149, i32 136, i32 137, i32 140, i32 141, i32 152, i32 153, i32 156, i32 157, i32 160, i32 161, i32 164, i32 165, i32 176, i32 177, i32 180, i32 181, i32 168, i32 169, i32 172, i32 173, i32 184, i32 185, i32 188, i32 189, i32 192, i32 193, i32 196, i32 197, i32 208, i32 209, i32 212, i32 213, i32 200, i32 201, i32 204, i32 205, i32 216, i32 217, i32 220, i32 221, i32 224, i32 225, i32 228, i32 229, i32 240, i32 241, i32 244, i32 245, i32 232, i32 233, i32 236, i32 237, i32 248, i32 249, i32 252, i32 253, i32 2, i32 3, i32 6, i32 7, i32 18, i32 19, i32 22, i32 23, i32 10, i32 11, i32 14, i32 15, i32 26, i32 27, i32 30, i32 31, i32 34, i32 35, i32 38, i32 39, i32 50, i32 51, i32 54, i32 55, i32 42, i32 43, i32 46, i32 47, i32 58, i32 59, i32 62, i32 63, i32 66, i32 67, i32 70, i32 71, i32 82, i32 83, i32 86, i32 87, i32 74, i32 75, i32 78, i32 79, i32 90, i32 91, i32 94, i32 95, i32 98, i32 99, i32 102, i32 103, i32 114, i32 115, i32 118, i32 119, i32 106, i32 107, i32 110, i32 111, i32 122, i32 123, i32 126, i32 127, i32 130, i32 131, i32 134, i32 135, i32 146, i32 147, i32 150, i32 151, i32 138, i32 139, i32 142, i32 143, i32 154, i32 155, i32 158, i32 159, i32 162, i32 163, i32 166, i32 167, i32 178, i32 179, i32 182, i32 183, i32 170, i32 171, i32 174, i32 175, i32 186, i32 187, i32 190, i32 191, i32 194, i32 195, i32 198, i32 199, i32 210, i32 211, i32 214, i32 215, i32 202, i32 203, i32 206, i32 207, i32 218, i32 219, i32 222, i32 223, i32 226, i32 227, i32 230, i32 231, i32 242, i32 243, i32 246, i32 247, i32 234, i32 235, i32 238, i32 239, i32 250, i32 251, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_77: +; CHECK: [[REG77:r[0-9]+]] = #119 +; CHECK: vdeal(v1,v0,[[REG77]]) +define <256 x i8> @vdeal_77(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 2, i32 4, i32 6, i32 16, i32 18, i32 20, i32 22, i32 8, i32 10, i32 12, i32 14, i32 24, i32 26, i32 28, i32 30, i32 32, i32 34, i32 36, i32 38, i32 48, i32 50, i32 52, i32 54, i32 40, i32 42, i32 44, i32 46, i32 56, i32 58, i32 60, i32 62, i32 64, i32 66, i32 68, i32 70, i32 80, i32 82, i32 84, i32 86, i32 72, i32 74, i32 76, i32 78, i32 88, i32 90, i32 92, i32 94, i32 96, i32 98, i32 100, i32 102, i32 112, i32 114, i32 116, i32 118, i32 104, i32 106, i32 108, i32 110, i32 120, i32 122, i32 124, i32 126, i32 128, i32 130, i32 132, i32 134, i32 144, i32 146, i32 148, i32 150, i32 136, i32 138, i32 140, i32 142, i32 152, i32 154, i32 156, i32 158, i32 160, i32 162, i32 164, i32 166, i32 176, i32 178, i32 180, i32 182, i32 168, i32 170, i32 172, i32 174, i32 184, i32 186, i32 188, i32 190, i32 192, i32 194, i32 196, i32 198, i32 208, i32 210, i32 212, i32 214, i32 200, i32 202, i32 204, i32 206, i32 216, i32 218, i32 220, i32 222, i32 224, i32 226, i32 228, i32 230, i32 240, i32 242, i32 244, i32 246, i32 232, i32 234, i32 236, i32 238, i32 248, i32 250, i32 252, i32 254, i32 1, i32 3, i32 5, i32 7, i32 17, i32 19, i32 21, i32 23, i32 9, i32 11, i32 13, i32 15, i32 25, i32 27, i32 29, i32 31, i32 33, i32 35, i32 37, i32 39, i32 49, i32 51, i32 53, i32 55, i32 41, i32 43, i32 45, i32 47, i32 57, i32 59, i32 61, i32 63, i32 65, i32 67, i32 69, i32 71, i32 81, i32 83, i32 85, i32 87, i32 73, i32 75, i32 77, i32 79, i32 89, i32 91, i32 93, i32 95, i32 97, i32 99, i32 101, i32 103, i32 113, i32 115, i32 117, i32 119, i32 105, i32 107, i32 109, i32 111, i32 121, i32 123, i32 125, i32 127, i32 129, i32 131, i32 133, i32 135, i32 145, i32 147, i32 149, i32 151, i32 137, i32 139, i32 141, i32 143, i32 153, i32 155, i32 157, i32 159, i32 161, i32 163, i32 165, i32 167, i32 177, i32 179, i32 181, i32 183, i32 169, i32 171, i32 173, i32 175, i32 185, i32 187, i32 189, i32 191, i32 193, i32 195, i32 197, i32 199, i32 209, i32 211, i32 213, i32 215, i32 201, i32 203, i32 205, i32 207, i32 217, i32 219, i32 221, i32 223, i32 225, i32 227, i32 229, i32 231, i32 241, i32 243, i32 245, i32 247, i32 233, i32 235, i32 237, i32 239, i32 249, i32 251, i32 253, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_78: +; CHECK: [[REG78:r[0-9]+]] = #120 +; CHECK: vdeal(v1,v0,[[REG78]]) +define <256 x i8> @vdeal_78(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 48, i32 49, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 64, i32 65, i32 66, i32 67, i32 68, i32 69, i32 70, i32 71, i32 80, i32 81, i32 82, i32 83, i32 84, i32 85, i32 86, i32 87, i32 96, i32 97, i32 98, i32 99, i32 100, i32 101, i32 102, i32 103, i32 112, i32 113, i32 114, i32 115, i32 116, i32 117, i32 118, i32 119, i32 128, i32 129, i32 130, i32 131, i32 132, i32 133, i32 134, i32 135, i32 144, i32 145, i32 146, i32 147, i32 148, i32 149, i32 150, i32 151, i32 160, i32 161, i32 162, i32 163, i32 164, i32 165, i32 166, i32 167, i32 176, i32 177, i32 178, i32 179, i32 180, i32 181, i32 182, i32 183, i32 192, i32 193, i32 194, i32 195, i32 196, i32 197, i32 198, i32 199, i32 208, i32 209, i32 210, i32 211, i32 212, i32 213, i32 214, i32 215, i32 224, i32 225, i32 226, i32 227, i32 228, i32 229, i32 230, i32 231, i32 240, i32 241, i32 242, i32 243, i32 244, i32 245, i32 246, i32 247, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63, i32 72, i32 73, i32 74, i32 75, i32 76, i32 77, i32 78, i32 79, i32 88, i32 89, i32 90, i32 91, i32 92, i32 93, i32 94, i32 95, i32 104, i32 105, i32 106, i32 107, i32 108, i32 109, i32 110, i32 111, i32 120, i32 121, i32 122, i32 123, i32 124, i32 125, i32 126, i32 127, i32 136, i32 137, i32 138, i32 139, i32 140, i32 141, i32 142, i32 143, i32 152, i32 153, i32 154, i32 155, i32 156, i32 157, i32 158, i32 159, i32 168, i32 169, i32 170, i32 171, i32 172, i32 173, i32 174, i32 175, i32 184, i32 185, i32 186, i32 187, i32 188, i32 189, i32 190, i32 191, i32 200, i32 201, i32 202, i32 203, i32 204, i32 205, i32 206, i32 207, i32 216, i32 217, i32 218, i32 219, i32 220, i32 221, i32 222, i32 223, i32 232, i32 233, i32 234, i32 235, i32 236, i32 237, i32 238, i32 239, i32 248, i32 249, i32 250, i32 251, i32 252, i32 253, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_79: +; CHECK: [[REG79:r[0-9]+]] = #121 +; CHECK: vdeal(v1,v0,[[REG79]]) +define <256 x i8> @vdeal_79(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14, i32 16, i32 24, i32 18, i32 26, i32 20, i32 28, i32 22, i32 30, i32 32, i32 40, i32 34, i32 42, i32 36, i32 44, i32 38, i32 46, i32 48, i32 56, i32 50, i32 58, i32 52, i32 60, i32 54, i32 62, i32 64, i32 72, i32 66, i32 74, i32 68, i32 76, i32 70, i32 78, i32 80, i32 88, i32 82, i32 90, i32 84, i32 92, i32 86, i32 94, i32 96, i32 104, i32 98, i32 106, i32 100, i32 108, i32 102, i32 110, i32 112, i32 120, i32 114, i32 122, i32 116, i32 124, i32 118, i32 126, i32 128, i32 136, i32 130, i32 138, i32 132, i32 140, i32 134, i32 142, i32 144, i32 152, i32 146, i32 154, i32 148, i32 156, i32 150, i32 158, i32 160, i32 168, i32 162, i32 170, i32 164, i32 172, i32 166, i32 174, i32 176, i32 184, i32 178, i32 186, i32 180, i32 188, i32 182, i32 190, i32 192, i32 200, i32 194, i32 202, i32 196, i32 204, i32 198, i32 206, i32 208, i32 216, i32 210, i32 218, i32 212, i32 220, i32 214, i32 222, i32 224, i32 232, i32 226, i32 234, i32 228, i32 236, i32 230, i32 238, i32 240, i32 248, i32 242, i32 250, i32 244, i32 252, i32 246, i32 254, i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15, i32 17, i32 25, i32 19, i32 27, i32 21, i32 29, i32 23, i32 31, i32 33, i32 41, i32 35, i32 43, i32 37, i32 45, i32 39, i32 47, i32 49, i32 57, i32 51, i32 59, i32 53, i32 61, i32 55, i32 63, i32 65, i32 73, i32 67, i32 75, i32 69, i32 77, i32 71, i32 79, i32 81, i32 89, i32 83, i32 91, i32 85, i32 93, i32 87, i32 95, i32 97, i32 105, i32 99, i32 107, i32 101, i32 109, i32 103, i32 111, i32 113, i32 121, i32 115, i32 123, i32 117, i32 125, i32 119, i32 127, i32 129, i32 137, i32 131, i32 139, i32 133, i32 141, i32 135, i32 143, i32 145, i32 153, i32 147, i32 155, i32 149, i32 157, i32 151, i32 159, i32 161, i32 169, i32 163, i32 171, i32 165, i32 173, i32 167, i32 175, i32 177, i32 185, i32 179, i32 187, i32 181, i32 189, i32 183, i32 191, i32 193, i32 201, i32 195, i32 203, i32 197, i32 205, i32 199, i32 207, i32 209, i32 217, i32 211, i32 219, i32 213, i32 221, i32 215, i32 223, i32 225, i32 233, i32 227, i32 235, i32 229, i32 237, i32 231, i32 239, i32 241, i32 249, i32 243, i32 251, i32 245, i32 253, i32 247, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_7a: +; CHECK: [[REG7a:r[0-9]+]] = #122 +; CHECK: vdeal(v1,v0,[[REG7a]]) +define <256 x i8> @vdeal_7a(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 8, i32 9, i32 4, i32 5, i32 12, i32 13, i32 16, i32 17, i32 24, i32 25, i32 20, i32 21, i32 28, i32 29, i32 32, i32 33, i32 40, i32 41, i32 36, i32 37, i32 44, i32 45, i32 48, i32 49, i32 56, i32 57, i32 52, i32 53, i32 60, i32 61, i32 64, i32 65, i32 72, i32 73, i32 68, i32 69, i32 76, i32 77, i32 80, i32 81, i32 88, i32 89, i32 84, i32 85, i32 92, i32 93, i32 96, i32 97, i32 104, i32 105, i32 100, i32 101, i32 108, i32 109, i32 112, i32 113, i32 120, i32 121, i32 116, i32 117, i32 124, i32 125, i32 128, i32 129, i32 136, i32 137, i32 132, i32 133, i32 140, i32 141, i32 144, i32 145, i32 152, i32 153, i32 148, i32 149, i32 156, i32 157, i32 160, i32 161, i32 168, i32 169, i32 164, i32 165, i32 172, i32 173, i32 176, i32 177, i32 184, i32 185, i32 180, i32 181, i32 188, i32 189, i32 192, i32 193, i32 200, i32 201, i32 196, i32 197, i32 204, i32 205, i32 208, i32 209, i32 216, i32 217, i32 212, i32 213, i32 220, i32 221, i32 224, i32 225, i32 232, i32 233, i32 228, i32 229, i32 236, i32 237, i32 240, i32 241, i32 248, i32 249, i32 244, i32 245, i32 252, i32 253, i32 2, i32 3, i32 10, i32 11, i32 6, i32 7, i32 14, i32 15, i32 18, i32 19, i32 26, i32 27, i32 22, i32 23, i32 30, i32 31, i32 34, i32 35, i32 42, i32 43, i32 38, i32 39, i32 46, i32 47, i32 50, i32 51, i32 58, i32 59, i32 54, i32 55, i32 62, i32 63, i32 66, i32 67, i32 74, i32 75, i32 70, i32 71, i32 78, i32 79, i32 82, i32 83, i32 90, i32 91, i32 86, i32 87, i32 94, i32 95, i32 98, i32 99, i32 106, i32 107, i32 102, i32 103, i32 110, i32 111, i32 114, i32 115, i32 122, i32 123, i32 118, i32 119, i32 126, i32 127, i32 130, i32 131, i32 138, i32 139, i32 134, i32 135, i32 142, i32 143, i32 146, i32 147, i32 154, i32 155, i32 150, i32 151, i32 158, i32 159, i32 162, i32 163, i32 170, i32 171, i32 166, i32 167, i32 174, i32 175, i32 178, i32 179, i32 186, i32 187, i32 182, i32 183, i32 190, i32 191, i32 194, i32 195, i32 202, i32 203, i32 198, i32 199, i32 206, i32 207, i32 210, i32 211, i32 218, i32 219, i32 214, i32 215, i32 222, i32 223, i32 226, i32 227, i32 234, i32 235, i32 230, i32 231, i32 238, i32 239, i32 242, i32 243, i32 250, i32 251, i32 246, i32 247, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_7b: +; CHECK: [[REG7b:r[0-9]+]] = #123 +; CHECK: vdeal(v1,v0,[[REG7b]]) +define <256 x i8> @vdeal_7b(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 2, i32 8, i32 10, i32 4, i32 6, i32 12, i32 14, i32 16, i32 18, i32 24, i32 26, i32 20, i32 22, i32 28, i32 30, i32 32, i32 34, i32 40, i32 42, i32 36, i32 38, i32 44, i32 46, i32 48, i32 50, i32 56, i32 58, i32 52, i32 54, i32 60, i32 62, i32 64, i32 66, i32 72, i32 74, i32 68, i32 70, i32 76, i32 78, i32 80, i32 82, i32 88, i32 90, i32 84, i32 86, i32 92, i32 94, i32 96, i32 98, i32 104, i32 106, i32 100, i32 102, i32 108, i32 110, i32 112, i32 114, i32 120, i32 122, i32 116, i32 118, i32 124, i32 126, i32 128, i32 130, i32 136, i32 138, i32 132, i32 134, i32 140, i32 142, i32 144, i32 146, i32 152, i32 154, i32 148, i32 150, i32 156, i32 158, i32 160, i32 162, i32 168, i32 170, i32 164, i32 166, i32 172, i32 174, i32 176, i32 178, i32 184, i32 186, i32 180, i32 182, i32 188, i32 190, i32 192, i32 194, i32 200, i32 202, i32 196, i32 198, i32 204, i32 206, i32 208, i32 210, i32 216, i32 218, i32 212, i32 214, i32 220, i32 222, i32 224, i32 226, i32 232, i32 234, i32 228, i32 230, i32 236, i32 238, i32 240, i32 242, i32 248, i32 250, i32 244, i32 246, i32 252, i32 254, i32 1, i32 3, i32 9, i32 11, i32 5, i32 7, i32 13, i32 15, i32 17, i32 19, i32 25, i32 27, i32 21, i32 23, i32 29, i32 31, i32 33, i32 35, i32 41, i32 43, i32 37, i32 39, i32 45, i32 47, i32 49, i32 51, i32 57, i32 59, i32 53, i32 55, i32 61, i32 63, i32 65, i32 67, i32 73, i32 75, i32 69, i32 71, i32 77, i32 79, i32 81, i32 83, i32 89, i32 91, i32 85, i32 87, i32 93, i32 95, i32 97, i32 99, i32 105, i32 107, i32 101, i32 103, i32 109, i32 111, i32 113, i32 115, i32 121, i32 123, i32 117, i32 119, i32 125, i32 127, i32 129, i32 131, i32 137, i32 139, i32 133, i32 135, i32 141, i32 143, i32 145, i32 147, i32 153, i32 155, i32 149, i32 151, i32 157, i32 159, i32 161, i32 163, i32 169, i32 171, i32 165, i32 167, i32 173, i32 175, i32 177, i32 179, i32 185, i32 187, i32 181, i32 183, i32 189, i32 191, i32 193, i32 195, i32 201, i32 203, i32 197, i32 199, i32 205, i32 207, i32 209, i32 211, i32 217, i32 219, i32 213, i32 215, i32 221, i32 223, i32 225, i32 227, i32 233, i32 235, i32 229, i32 231, i32 237, i32 239, i32 241, i32 243, i32 249, i32 251, i32 245, i32 247, i32 253, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_7c: +; CHECK: [[REG7c:r[0-9]+]] = #124 +; CHECK: vdeal(v1,v0,[[REG7c]]) +define <256 x i8> @vdeal_7c(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 10, i32 11, i32 16, i32 17, i32 18, i32 19, i32 24, i32 25, i32 26, i32 27, i32 32, i32 33, i32 34, i32 35, i32 40, i32 41, i32 42, i32 43, i32 48, i32 49, i32 50, i32 51, i32 56, i32 57, i32 58, i32 59, i32 64, i32 65, i32 66, i32 67, i32 72, i32 73, i32 74, i32 75, i32 80, i32 81, i32 82, i32 83, i32 88, i32 89, i32 90, i32 91, i32 96, i32 97, i32 98, i32 99, i32 104, i32 105, i32 106, i32 107, i32 112, i32 113, i32 114, i32 115, i32 120, i32 121, i32 122, i32 123, i32 128, i32 129, i32 130, i32 131, i32 136, i32 137, i32 138, i32 139, i32 144, i32 145, i32 146, i32 147, i32 152, i32 153, i32 154, i32 155, i32 160, i32 161, i32 162, i32 163, i32 168, i32 169, i32 170, i32 171, i32 176, i32 177, i32 178, i32 179, i32 184, i32 185, i32 186, i32 187, i32 192, i32 193, i32 194, i32 195, i32 200, i32 201, i32 202, i32 203, i32 208, i32 209, i32 210, i32 211, i32 216, i32 217, i32 218, i32 219, i32 224, i32 225, i32 226, i32 227, i32 232, i32 233, i32 234, i32 235, i32 240, i32 241, i32 242, i32 243, i32 248, i32 249, i32 250, i32 251, i32 4, i32 5, i32 6, i32 7, i32 12, i32 13, i32 14, i32 15, i32 20, i32 21, i32 22, i32 23, i32 28, i32 29, i32 30, i32 31, i32 36, i32 37, i32 38, i32 39, i32 44, i32 45, i32 46, i32 47, i32 52, i32 53, i32 54, i32 55, i32 60, i32 61, i32 62, i32 63, i32 68, i32 69, i32 70, i32 71, i32 76, i32 77, i32 78, i32 79, i32 84, i32 85, i32 86, i32 87, i32 92, i32 93, i32 94, i32 95, i32 100, i32 101, i32 102, i32 103, i32 108, i32 109, i32 110, i32 111, i32 116, i32 117, i32 118, i32 119, i32 124, i32 125, i32 126, i32 127, i32 132, i32 133, i32 134, i32 135, i32 140, i32 141, i32 142, i32 143, i32 148, i32 149, i32 150, i32 151, i32 156, i32 157, i32 158, i32 159, i32 164, i32 165, i32 166, i32 167, i32 172, i32 173, i32 174, i32 175, i32 180, i32 181, i32 182, i32 183, i32 188, i32 189, i32 190, i32 191, i32 196, i32 197, i32 198, i32 199, i32 204, i32 205, i32 206, i32 207, i32 212, i32 213, i32 214, i32 215, i32 220, i32 221, i32 222, i32 223, i32 228, i32 229, i32 230, i32 231, i32 236, i32 237, i32 238, i32 239, i32 244, i32 245, i32 246, i32 247, i32 252, i32 253, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_7d: +; CHECK: [[REG7d:r[0-9]+]] = #125 +; CHECK: vdeal(v1,v0,[[REG7d]]) +define <256 x i8> @vdeal_7d(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 4, i32 2, i32 6, i32 8, i32 12, i32 10, i32 14, i32 16, i32 20, i32 18, i32 22, i32 24, i32 28, i32 26, i32 30, i32 32, i32 36, i32 34, i32 38, i32 40, i32 44, i32 42, i32 46, i32 48, i32 52, i32 50, i32 54, i32 56, i32 60, i32 58, i32 62, i32 64, i32 68, i32 66, i32 70, i32 72, i32 76, i32 74, i32 78, i32 80, i32 84, i32 82, i32 86, i32 88, i32 92, i32 90, i32 94, i32 96, i32 100, i32 98, i32 102, i32 104, i32 108, i32 106, i32 110, i32 112, i32 116, i32 114, i32 118, i32 120, i32 124, i32 122, i32 126, i32 128, i32 132, i32 130, i32 134, i32 136, i32 140, i32 138, i32 142, i32 144, i32 148, i32 146, i32 150, i32 152, i32 156, i32 154, i32 158, i32 160, i32 164, i32 162, i32 166, i32 168, i32 172, i32 170, i32 174, i32 176, i32 180, i32 178, i32 182, i32 184, i32 188, i32 186, i32 190, i32 192, i32 196, i32 194, i32 198, i32 200, i32 204, i32 202, i32 206, i32 208, i32 212, i32 210, i32 214, i32 216, i32 220, i32 218, i32 222, i32 224, i32 228, i32 226, i32 230, i32 232, i32 236, i32 234, i32 238, i32 240, i32 244, i32 242, i32 246, i32 248, i32 252, i32 250, i32 254, i32 1, i32 5, i32 3, i32 7, i32 9, i32 13, i32 11, i32 15, i32 17, i32 21, i32 19, i32 23, i32 25, i32 29, i32 27, i32 31, i32 33, i32 37, i32 35, i32 39, i32 41, i32 45, i32 43, i32 47, i32 49, i32 53, i32 51, i32 55, i32 57, i32 61, i32 59, i32 63, i32 65, i32 69, i32 67, i32 71, i32 73, i32 77, i32 75, i32 79, i32 81, i32 85, i32 83, i32 87, i32 89, i32 93, i32 91, i32 95, i32 97, i32 101, i32 99, i32 103, i32 105, i32 109, i32 107, i32 111, i32 113, i32 117, i32 115, i32 119, i32 121, i32 125, i32 123, i32 127, i32 129, i32 133, i32 131, i32 135, i32 137, i32 141, i32 139, i32 143, i32 145, i32 149, i32 147, i32 151, i32 153, i32 157, i32 155, i32 159, i32 161, i32 165, i32 163, i32 167, i32 169, i32 173, i32 171, i32 175, i32 177, i32 181, i32 179, i32 183, i32 185, i32 189, i32 187, i32 191, i32 193, i32 197, i32 195, i32 199, i32 201, i32 205, i32 203, i32 207, i32 209, i32 213, i32 211, i32 215, i32 217, i32 221, i32 219, i32 223, i32 225, i32 229, i32 227, i32 231, i32 233, i32 237, i32 235, i32 239, i32 241, i32 245, i32 243, i32 247, i32 249, i32 253, i32 251, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_7e: +; CHECK: [[REG7e:r[0-9]+]] = #126 +; CHECK: vdeal(v1,v0,[[REG7e]]) +define <256 x i8> @vdeal_7e(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 4, i32 5, i32 8, i32 9, i32 12, i32 13, i32 16, i32 17, i32 20, i32 21, i32 24, i32 25, i32 28, i32 29, i32 32, i32 33, i32 36, i32 37, i32 40, i32 41, i32 44, i32 45, i32 48, i32 49, i32 52, i32 53, i32 56, i32 57, i32 60, i32 61, i32 64, i32 65, i32 68, i32 69, i32 72, i32 73, i32 76, i32 77, i32 80, i32 81, i32 84, i32 85, i32 88, i32 89, i32 92, i32 93, i32 96, i32 97, i32 100, i32 101, i32 104, i32 105, i32 108, i32 109, i32 112, i32 113, i32 116, i32 117, i32 120, i32 121, i32 124, i32 125, i32 128, i32 129, i32 132, i32 133, i32 136, i32 137, i32 140, i32 141, i32 144, i32 145, i32 148, i32 149, i32 152, i32 153, i32 156, i32 157, i32 160, i32 161, i32 164, i32 165, i32 168, i32 169, i32 172, i32 173, i32 176, i32 177, i32 180, i32 181, i32 184, i32 185, i32 188, i32 189, i32 192, i32 193, i32 196, i32 197, i32 200, i32 201, i32 204, i32 205, i32 208, i32 209, i32 212, i32 213, i32 216, i32 217, i32 220, i32 221, i32 224, i32 225, i32 228, i32 229, i32 232, i32 233, i32 236, i32 237, i32 240, i32 241, i32 244, i32 245, i32 248, i32 249, i32 252, i32 253, i32 2, i32 3, i32 6, i32 7, i32 10, i32 11, i32 14, i32 15, i32 18, i32 19, i32 22, i32 23, i32 26, i32 27, i32 30, i32 31, i32 34, i32 35, i32 38, i32 39, i32 42, i32 43, i32 46, i32 47, i32 50, i32 51, i32 54, i32 55, i32 58, i32 59, i32 62, i32 63, i32 66, i32 67, i32 70, i32 71, i32 74, i32 75, i32 78, i32 79, i32 82, i32 83, i32 86, i32 87, i32 90, i32 91, i32 94, i32 95, i32 98, i32 99, i32 102, i32 103, i32 106, i32 107, i32 110, i32 111, i32 114, i32 115, i32 118, i32 119, i32 122, i32 123, i32 126, i32 127, i32 130, i32 131, i32 134, i32 135, i32 138, i32 139, i32 142, i32 143, i32 146, i32 147, i32 150, i32 151, i32 154, i32 155, i32 158, i32 159, i32 162, i32 163, i32 166, i32 167, i32 170, i32 171, i32 174, i32 175, i32 178, i32 179, i32 182, i32 183, i32 186, i32 187, i32 190, i32 191, i32 194, i32 195, i32 198, i32 199, i32 202, i32 203, i32 206, i32 207, i32 210, i32 211, i32 214, i32 215, i32 218, i32 219, i32 222, i32 223, i32 226, i32 227, i32 230, i32 231, i32 234, i32 235, i32 238, i32 239, i32 242, i32 243, i32 246, i32 247, i32 250, i32 251, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vdeal_7f: +; CHECK: [[REG7f:r[0-9]+]] = #127 +; CHECK: vdeal(v1,v0,[[REG7f]]) +define <256 x i8> @vdeal_7f(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30, i32 32, i32 34, i32 36, i32 38, i32 40, i32 42, i32 44, i32 46, i32 48, i32 50, i32 52, i32 54, i32 56, i32 58, i32 60, i32 62, i32 64, i32 66, i32 68, i32 70, i32 72, i32 74, i32 76, i32 78, i32 80, i32 82, i32 84, i32 86, i32 88, i32 90, i32 92, i32 94, i32 96, i32 98, i32 100, i32 102, i32 104, i32 106, i32 108, i32 110, i32 112, i32 114, i32 116, i32 118, i32 120, i32 122, i32 124, i32 126, i32 128, i32 130, i32 132, i32 134, i32 136, i32 138, i32 140, i32 142, i32 144, i32 146, i32 148, i32 150, i32 152, i32 154, i32 156, i32 158, i32 160, i32 162, i32 164, i32 166, i32 168, i32 170, i32 172, i32 174, i32 176, i32 178, i32 180, i32 182, i32 184, i32 186, i32 188, i32 190, i32 192, i32 194, i32 196, i32 198, i32 200, i32 202, i32 204, i32 206, i32 208, i32 210, i32 212, i32 214, i32 216, i32 218, i32 220, i32 222, i32 224, i32 226, i32 228, i32 230, i32 232, i32 234, i32 236, i32 238, i32 240, i32 242, i32 244, i32 246, i32 248, i32 250, i32 252, i32 254, i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31, i32 33, i32 35, i32 37, i32 39, i32 41, i32 43, i32 45, i32 47, i32 49, i32 51, i32 53, i32 55, i32 57, i32 59, i32 61, i32 63, i32 65, i32 67, i32 69, i32 71, i32 73, i32 75, i32 77, i32 79, i32 81, i32 83, i32 85, i32 87, i32 89, i32 91, i32 93, i32 95, i32 97, i32 99, i32 101, i32 103, i32 105, i32 107, i32 109, i32 111, i32 113, i32 115, i32 117, i32 119, i32 121, i32 123, i32 125, i32 127, i32 129, i32 131, i32 133, i32 135, i32 137, i32 139, i32 141, i32 143, i32 145, i32 147, i32 149, i32 151, i32 153, i32 155, i32 157, i32 159, i32 161, i32 163, i32 165, i32 167, i32 169, i32 171, i32 173, i32 175, i32 177, i32 179, i32 181, i32 183, i32 185, i32 187, i32 189, i32 191, i32 193, i32 195, i32 197, i32 199, i32 201, i32 203, i32 205, i32 207, i32 209, i32 211, i32 213, i32 215, i32 217, i32 219, i32 221, i32 223, i32 225, i32 227, i32 229, i32 231, i32 233, i32 235, i32 237, i32 239, i32 241, i32 243, i32 245, i32 247, i32 249, i32 251, i32 253, i32 255> + ret <256 x i8> %p +} + +attributes #0 = { nounwind readnone "target-cpu"="hexagonv60" "target-features"="+hvx,+hvx-length128b" } diff --git a/test/CodeGen/Hexagon/autohvx/deal-64b.ll b/test/CodeGen/Hexagon/autohvx/deal-64b.ll new file mode 100644 index 00000000000..92f05b58898 --- /dev/null +++ b/test/CodeGen/Hexagon/autohvx/deal-64b.ll @@ -0,0 +1,519 @@ +; RUN: llc -march=hexagon < %s | FileCheck %s + +; Check the individual vdeal shuffles for all 64 controls. +; Note: for shuffles with a single 2x2 transpose, vshuff is generated instead +; of vdeal. (For such cases vdeal and vshuff are equivalent.) + +; This is an identity shuffle: there should not be any shuffling code emitted. +; CHECK-LABEL: vdeal_00: +; CHECK-NOT: vdeal( +define <128 x i8> @vdeal_00(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 48, i32 49, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63, i32 64, i32 65, i32 66, i32 67, i32 68, i32 69, i32 70, i32 71, i32 72, i32 73, i32 74, i32 75, i32 76, i32 77, i32 78, i32 79, i32 80, i32 81, i32 82, i32 83, i32 84, i32 85, i32 86, i32 87, i32 88, i32 89, i32 90, i32 91, i32 92, i32 93, i32 94, i32 95, i32 96, i32 97, i32 98, i32 99, i32 100, i32 101, i32 102, i32 103, i32 104, i32 105, i32 106, i32 107, i32 108, i32 109, i32 110, i32 111, i32 112, i32 113, i32 114, i32 115, i32 116, i32 117, i32 118, i32 119, i32 120, i32 121, i32 122, i32 123, i32 124, i32 125, i32 126, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vdeal_01: +; CHECK: [[REG01:r[0-9]+]] = #1 +; CHECK: vshuff(v1,v0,[[REG01]]) +define <128 x i8> @vdeal_01(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 64, i32 2, i32 66, i32 4, i32 68, i32 6, i32 70, i32 8, i32 72, i32 10, i32 74, i32 12, i32 76, i32 14, i32 78, i32 16, i32 80, i32 18, i32 82, i32 20, i32 84, i32 22, i32 86, i32 24, i32 88, i32 26, i32 90, i32 28, i32 92, i32 30, i32 94, i32 32, i32 96, i32 34, i32 98, i32 36, i32 100, i32 38, i32 102, i32 40, i32 104, i32 42, i32 106, i32 44, i32 108, i32 46, i32 110, i32 48, i32 112, i32 50, i32 114, i32 52, i32 116, i32 54, i32 118, i32 56, i32 120, i32 58, i32 122, i32 60, i32 124, i32 62, i32 126, i32 1, i32 65, i32 3, i32 67, i32 5, i32 69, i32 7, i32 71, i32 9, i32 73, i32 11, i32 75, i32 13, i32 77, i32 15, i32 79, i32 17, i32 81, i32 19, i32 83, i32 21, i32 85, i32 23, i32 87, i32 25, i32 89, i32 27, i32 91, i32 29, i32 93, i32 31, i32 95, i32 33, i32 97, i32 35, i32 99, i32 37, i32 101, i32 39, i32 103, i32 41, i32 105, i32 43, i32 107, i32 45, i32 109, i32 47, i32 111, i32 49, i32 113, i32 51, i32 115, i32 53, i32 117, i32 55, i32 119, i32 57, i32 121, i32 59, i32 123, i32 61, i32 125, i32 63, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vdeal_02: +; CHECK: [[REG02:r[0-9]+]] = #2 +; CHECK: vshuff(v1,v0,[[REG02]]) +define <128 x i8> @vdeal_02(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 1, i32 64, i32 65, i32 4, i32 5, i32 68, i32 69, i32 8, i32 9, i32 72, i32 73, i32 12, i32 13, i32 76, i32 77, i32 16, i32 17, i32 80, i32 81, i32 20, i32 21, i32 84, i32 85, i32 24, i32 25, i32 88, i32 89, i32 28, i32 29, i32 92, i32 93, i32 32, i32 33, i32 96, i32 97, i32 36, i32 37, i32 100, i32 101, i32 40, i32 41, i32 104, i32 105, i32 44, i32 45, i32 108, i32 109, i32 48, i32 49, i32 112, i32 113, i32 52, i32 53, i32 116, i32 117, i32 56, i32 57, i32 120, i32 121, i32 60, i32 61, i32 124, i32 125, i32 2, i32 3, i32 66, i32 67, i32 6, i32 7, i32 70, i32 71, i32 10, i32 11, i32 74, i32 75, i32 14, i32 15, i32 78, i32 79, i32 18, i32 19, i32 82, i32 83, i32 22, i32 23, i32 86, i32 87, i32 26, i32 27, i32 90, i32 91, i32 30, i32 31, i32 94, i32 95, i32 34, i32 35, i32 98, i32 99, i32 38, i32 39, i32 102, i32 103, i32 42, i32 43, i32 106, i32 107, i32 46, i32 47, i32 110, i32 111, i32 50, i32 51, i32 114, i32 115, i32 54, i32 55, i32 118, i32 119, i32 58, i32 59, i32 122, i32 123, i32 62, i32 63, i32 126, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vdeal_03: +; CHECK: [[REG03:r[0-9]+]] = #3 +; CHECK: vdeal(v1,v0,[[REG03]]) +define <128 x i8> @vdeal_03(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 2, i32 64, i32 66, i32 4, i32 6, i32 68, i32 70, i32 8, i32 10, i32 72, i32 74, i32 12, i32 14, i32 76, i32 78, i32 16, i32 18, i32 80, i32 82, i32 20, i32 22, i32 84, i32 86, i32 24, i32 26, i32 88, i32 90, i32 28, i32 30, i32 92, i32 94, i32 32, i32 34, i32 96, i32 98, i32 36, i32 38, i32 100, i32 102, i32 40, i32 42, i32 104, i32 106, i32 44, i32 46, i32 108, i32 110, i32 48, i32 50, i32 112, i32 114, i32 52, i32 54, i32 116, i32 118, i32 56, i32 58, i32 120, i32 122, i32 60, i32 62, i32 124, i32 126, i32 1, i32 3, i32 65, i32 67, i32 5, i32 7, i32 69, i32 71, i32 9, i32 11, i32 73, i32 75, i32 13, i32 15, i32 77, i32 79, i32 17, i32 19, i32 81, i32 83, i32 21, i32 23, i32 85, i32 87, i32 25, i32 27, i32 89, i32 91, i32 29, i32 31, i32 93, i32 95, i32 33, i32 35, i32 97, i32 99, i32 37, i32 39, i32 101, i32 103, i32 41, i32 43, i32 105, i32 107, i32 45, i32 47, i32 109, i32 111, i32 49, i32 51, i32 113, i32 115, i32 53, i32 55, i32 117, i32 119, i32 57, i32 59, i32 121, i32 123, i32 61, i32 63, i32 125, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vdeal_04: +; CHECK: [[REG04:r[0-9]+]] = #4 +; CHECK: vshuff(v1,v0,[[REG04]]) +define <128 x i8> @vdeal_04(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 1, i32 2, i32 3, i32 64, i32 65, i32 66, i32 67, i32 8, i32 9, i32 10, i32 11, i32 72, i32 73, i32 74, i32 75, i32 16, i32 17, i32 18, i32 19, i32 80, i32 81, i32 82, i32 83, i32 24, i32 25, i32 26, i32 27, i32 88, i32 89, i32 90, i32 91, i32 32, i32 33, i32 34, i32 35, i32 96, i32 97, i32 98, i32 99, i32 40, i32 41, i32 42, i32 43, i32 104, i32 105, i32 106, i32 107, i32 48, i32 49, i32 50, i32 51, i32 112, i32 113, i32 114, i32 115, i32 56, i32 57, i32 58, i32 59, i32 120, i32 121, i32 122, i32 123, i32 4, i32 5, i32 6, i32 7, i32 68, i32 69, i32 70, i32 71, i32 12, i32 13, i32 14, i32 15, i32 76, i32 77, i32 78, i32 79, i32 20, i32 21, i32 22, i32 23, i32 84, i32 85, i32 86, i32 87, i32 28, i32 29, i32 30, i32 31, i32 92, i32 93, i32 94, i32 95, i32 36, i32 37, i32 38, i32 39, i32 100, i32 101, i32 102, i32 103, i32 44, i32 45, i32 46, i32 47, i32 108, i32 109, i32 110, i32 111, i32 52, i32 53, i32 54, i32 55, i32 116, i32 117, i32 118, i32 119, i32 60, i32 61, i32 62, i32 63, i32 124, i32 125, i32 126, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vdeal_05: +; CHECK: [[REG05:r[0-9]+]] = #5 +; CHECK: vdeal(v1,v0,[[REG05]]) +define <128 x i8> @vdeal_05(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 4, i32 2, i32 6, i32 64, i32 68, i32 66, i32 70, i32 8, i32 12, i32 10, i32 14, i32 72, i32 76, i32 74, i32 78, i32 16, i32 20, i32 18, i32 22, i32 80, i32 84, i32 82, i32 86, i32 24, i32 28, i32 26, i32 30, i32 88, i32 92, i32 90, i32 94, i32 32, i32 36, i32 34, i32 38, i32 96, i32 100, i32 98, i32 102, i32 40, i32 44, i32 42, i32 46, i32 104, i32 108, i32 106, i32 110, i32 48, i32 52, i32 50, i32 54, i32 112, i32 116, i32 114, i32 118, i32 56, i32 60, i32 58, i32 62, i32 120, i32 124, i32 122, i32 126, i32 1, i32 5, i32 3, i32 7, i32 65, i32 69, i32 67, i32 71, i32 9, i32 13, i32 11, i32 15, i32 73, i32 77, i32 75, i32 79, i32 17, i32 21, i32 19, i32 23, i32 81, i32 85, i32 83, i32 87, i32 25, i32 29, i32 27, i32 31, i32 89, i32 93, i32 91, i32 95, i32 33, i32 37, i32 35, i32 39, i32 97, i32 101, i32 99, i32 103, i32 41, i32 45, i32 43, i32 47, i32 105, i32 109, i32 107, i32 111, i32 49, i32 53, i32 51, i32 55, i32 113, i32 117, i32 115, i32 119, i32 57, i32 61, i32 59, i32 63, i32 121, i32 125, i32 123, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vdeal_06: +; CHECK: [[REG06:r[0-9]+]] = #6 +; CHECK: vdeal(v1,v0,[[REG06]]) +define <128 x i8> @vdeal_06(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 1, i32 4, i32 5, i32 64, i32 65, i32 68, i32 69, i32 8, i32 9, i32 12, i32 13, i32 72, i32 73, i32 76, i32 77, i32 16, i32 17, i32 20, i32 21, i32 80, i32 81, i32 84, i32 85, i32 24, i32 25, i32 28, i32 29, i32 88, i32 89, i32 92, i32 93, i32 32, i32 33, i32 36, i32 37, i32 96, i32 97, i32 100, i32 101, i32 40, i32 41, i32 44, i32 45, i32 104, i32 105, i32 108, i32 109, i32 48, i32 49, i32 52, i32 53, i32 112, i32 113, i32 116, i32 117, i32 56, i32 57, i32 60, i32 61, i32 120, i32 121, i32 124, i32 125, i32 2, i32 3, i32 6, i32 7, i32 66, i32 67, i32 70, i32 71, i32 10, i32 11, i32 14, i32 15, i32 74, i32 75, i32 78, i32 79, i32 18, i32 19, i32 22, i32 23, i32 82, i32 83, i32 86, i32 87, i32 26, i32 27, i32 30, i32 31, i32 90, i32 91, i32 94, i32 95, i32 34, i32 35, i32 38, i32 39, i32 98, i32 99, i32 102, i32 103, i32 42, i32 43, i32 46, i32 47, i32 106, i32 107, i32 110, i32 111, i32 50, i32 51, i32 54, i32 55, i32 114, i32 115, i32 118, i32 119, i32 58, i32 59, i32 62, i32 63, i32 122, i32 123, i32 126, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vdeal_07: +; CHECK: [[REG07:r[0-9]+]] = #7 +; CHECK: vdeal(v1,v0,[[REG07]]) +define <128 x i8> @vdeal_07(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 2, i32 4, i32 6, i32 64, i32 66, i32 68, i32 70, i32 8, i32 10, i32 12, i32 14, i32 72, i32 74, i32 76, i32 78, i32 16, i32 18, i32 20, i32 22, i32 80, i32 82, i32 84, i32 86, i32 24, i32 26, i32 28, i32 30, i32 88, i32 90, i32 92, i32 94, i32 32, i32 34, i32 36, i32 38, i32 96, i32 98, i32 100, i32 102, i32 40, i32 42, i32 44, i32 46, i32 104, i32 106, i32 108, i32 110, i32 48, i32 50, i32 52, i32 54, i32 112, i32 114, i32 116, i32 118, i32 56, i32 58, i32 60, i32 62, i32 120, i32 122, i32 124, i32 126, i32 1, i32 3, i32 5, i32 7, i32 65, i32 67, i32 69, i32 71, i32 9, i32 11, i32 13, i32 15, i32 73, i32 75, i32 77, i32 79, i32 17, i32 19, i32 21, i32 23, i32 81, i32 83, i32 85, i32 87, i32 25, i32 27, i32 29, i32 31, i32 89, i32 91, i32 93, i32 95, i32 33, i32 35, i32 37, i32 39, i32 97, i32 99, i32 101, i32 103, i32 41, i32 43, i32 45, i32 47, i32 105, i32 107, i32 109, i32 111, i32 49, i32 51, i32 53, i32 55, i32 113, i32 115, i32 117, i32 119, i32 57, i32 59, i32 61, i32 63, i32 121, i32 123, i32 125, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vdeal_08: +; CHECK: [[REG08:r[0-9]+]] = #8 +; CHECK: vshuff(v1,v0,[[REG08]]) +define <128 x i8> @vdeal_08(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 64, i32 65, i32 66, i32 67, i32 68, i32 69, i32 70, i32 71, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 80, i32 81, i32 82, i32 83, i32 84, i32 85, i32 86, i32 87, i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 96, i32 97, i32 98, i32 99, i32 100, i32 101, i32 102, i32 103, i32 48, i32 49, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 112, i32 113, i32 114, i32 115, i32 116, i32 117, i32 118, i32 119, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 72, i32 73, i32 74, i32 75, i32 76, i32 77, i32 78, i32 79, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 88, i32 89, i32 90, i32 91, i32 92, i32 93, i32 94, i32 95, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 104, i32 105, i32 106, i32 107, i32 108, i32 109, i32 110, i32 111, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63, i32 120, i32 121, i32 122, i32 123, i32 124, i32 125, i32 126, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vdeal_09: +; CHECK: [[REG09:r[0-9]+]] = #9 +; CHECK: vdeal(v1,v0,[[REG09]]) +define <128 x i8> @vdeal_09(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14, i32 64, i32 72, i32 66, i32 74, i32 68, i32 76, i32 70, i32 78, i32 16, i32 24, i32 18, i32 26, i32 20, i32 28, i32 22, i32 30, i32 80, i32 88, i32 82, i32 90, i32 84, i32 92, i32 86, i32 94, i32 32, i32 40, i32 34, i32 42, i32 36, i32 44, i32 38, i32 46, i32 96, i32 104, i32 98, i32 106, i32 100, i32 108, i32 102, i32 110, i32 48, i32 56, i32 50, i32 58, i32 52, i32 60, i32 54, i32 62, i32 112, i32 120, i32 114, i32 122, i32 116, i32 124, i32 118, i32 126, i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15, i32 65, i32 73, i32 67, i32 75, i32 69, i32 77, i32 71, i32 79, i32 17, i32 25, i32 19, i32 27, i32 21, i32 29, i32 23, i32 31, i32 81, i32 89, i32 83, i32 91, i32 85, i32 93, i32 87, i32 95, i32 33, i32 41, i32 35, i32 43, i32 37, i32 45, i32 39, i32 47, i32 97, i32 105, i32 99, i32 107, i32 101, i32 109, i32 103, i32 111, i32 49, i32 57, i32 51, i32 59, i32 53, i32 61, i32 55, i32 63, i32 113, i32 121, i32 115, i32 123, i32 117, i32 125, i32 119, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vdeal_0a: +; CHECK: [[REG0a:r[0-9]+]] = #10 +; CHECK: vdeal(v1,v0,[[REG0a]]) +define <128 x i8> @vdeal_0a(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 1, i32 8, i32 9, i32 4, i32 5, i32 12, i32 13, i32 64, i32 65, i32 72, i32 73, i32 68, i32 69, i32 76, i32 77, i32 16, i32 17, i32 24, i32 25, i32 20, i32 21, i32 28, i32 29, i32 80, i32 81, i32 88, i32 89, i32 84, i32 85, i32 92, i32 93, i32 32, i32 33, i32 40, i32 41, i32 36, i32 37, i32 44, i32 45, i32 96, i32 97, i32 104, i32 105, i32 100, i32 101, i32 108, i32 109, i32 48, i32 49, i32 56, i32 57, i32 52, i32 53, i32 60, i32 61, i32 112, i32 113, i32 120, i32 121, i32 116, i32 117, i32 124, i32 125, i32 2, i32 3, i32 10, i32 11, i32 6, i32 7, i32 14, i32 15, i32 66, i32 67, i32 74, i32 75, i32 70, i32 71, i32 78, i32 79, i32 18, i32 19, i32 26, i32 27, i32 22, i32 23, i32 30, i32 31, i32 82, i32 83, i32 90, i32 91, i32 86, i32 87, i32 94, i32 95, i32 34, i32 35, i32 42, i32 43, i32 38, i32 39, i32 46, i32 47, i32 98, i32 99, i32 106, i32 107, i32 102, i32 103, i32 110, i32 111, i32 50, i32 51, i32 58, i32 59, i32 54, i32 55, i32 62, i32 63, i32 114, i32 115, i32 122, i32 123, i32 118, i32 119, i32 126, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vdeal_0b: +; CHECK: [[REG0b:r[0-9]+]] = #11 +; CHECK: vdeal(v1,v0,[[REG0b]]) +define <128 x i8> @vdeal_0b(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 2, i32 8, i32 10, i32 4, i32 6, i32 12, i32 14, i32 64, i32 66, i32 72, i32 74, i32 68, i32 70, i32 76, i32 78, i32 16, i32 18, i32 24, i32 26, i32 20, i32 22, i32 28, i32 30, i32 80, i32 82, i32 88, i32 90, i32 84, i32 86, i32 92, i32 94, i32 32, i32 34, i32 40, i32 42, i32 36, i32 38, i32 44, i32 46, i32 96, i32 98, i32 104, i32 106, i32 100, i32 102, i32 108, i32 110, i32 48, i32 50, i32 56, i32 58, i32 52, i32 54, i32 60, i32 62, i32 112, i32 114, i32 120, i32 122, i32 116, i32 118, i32 124, i32 126, i32 1, i32 3, i32 9, i32 11, i32 5, i32 7, i32 13, i32 15, i32 65, i32 67, i32 73, i32 75, i32 69, i32 71, i32 77, i32 79, i32 17, i32 19, i32 25, i32 27, i32 21, i32 23, i32 29, i32 31, i32 81, i32 83, i32 89, i32 91, i32 85, i32 87, i32 93, i32 95, i32 33, i32 35, i32 41, i32 43, i32 37, i32 39, i32 45, i32 47, i32 97, i32 99, i32 105, i32 107, i32 101, i32 103, i32 109, i32 111, i32 49, i32 51, i32 57, i32 59, i32 53, i32 55, i32 61, i32 63, i32 113, i32 115, i32 121, i32 123, i32 117, i32 119, i32 125, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vdeal_0c: +; CHECK: [[REG0c:r[0-9]+]] = #12 +; CHECK: vdeal(v1,v0,[[REG0c]]) +define <128 x i8> @vdeal_0c(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 10, i32 11, i32 64, i32 65, i32 66, i32 67, i32 72, i32 73, i32 74, i32 75, i32 16, i32 17, i32 18, i32 19, i32 24, i32 25, i32 26, i32 27, i32 80, i32 81, i32 82, i32 83, i32 88, i32 89, i32 90, i32 91, i32 32, i32 33, i32 34, i32 35, i32 40, i32 41, i32 42, i32 43, i32 96, i32 97, i32 98, i32 99, i32 104, i32 105, i32 106, i32 107, i32 48, i32 49, i32 50, i32 51, i32 56, i32 57, i32 58, i32 59, i32 112, i32 113, i32 114, i32 115, i32 120, i32 121, i32 122, i32 123, i32 4, i32 5, i32 6, i32 7, i32 12, i32 13, i32 14, i32 15, i32 68, i32 69, i32 70, i32 71, i32 76, i32 77, i32 78, i32 79, i32 20, i32 21, i32 22, i32 23, i32 28, i32 29, i32 30, i32 31, i32 84, i32 85, i32 86, i32 87, i32 92, i32 93, i32 94, i32 95, i32 36, i32 37, i32 38, i32 39, i32 44, i32 45, i32 46, i32 47, i32 100, i32 101, i32 102, i32 103, i32 108, i32 109, i32 110, i32 111, i32 52, i32 53, i32 54, i32 55, i32 60, i32 61, i32 62, i32 63, i32 116, i32 117, i32 118, i32 119, i32 124, i32 125, i32 126, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vdeal_0d: +; CHECK: [[REG0d:r[0-9]+]] = #13 +; CHECK: vdeal(v1,v0,[[REG0d]]) +define <128 x i8> @vdeal_0d(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 4, i32 2, i32 6, i32 8, i32 12, i32 10, i32 14, i32 64, i32 68, i32 66, i32 70, i32 72, i32 76, i32 74, i32 78, i32 16, i32 20, i32 18, i32 22, i32 24, i32 28, i32 26, i32 30, i32 80, i32 84, i32 82, i32 86, i32 88, i32 92, i32 90, i32 94, i32 32, i32 36, i32 34, i32 38, i32 40, i32 44, i32 42, i32 46, i32 96, i32 100, i32 98, i32 102, i32 104, i32 108, i32 106, i32 110, i32 48, i32 52, i32 50, i32 54, i32 56, i32 60, i32 58, i32 62, i32 112, i32 116, i32 114, i32 118, i32 120, i32 124, i32 122, i32 126, i32 1, i32 5, i32 3, i32 7, i32 9, i32 13, i32 11, i32 15, i32 65, i32 69, i32 67, i32 71, i32 73, i32 77, i32 75, i32 79, i32 17, i32 21, i32 19, i32 23, i32 25, i32 29, i32 27, i32 31, i32 81, i32 85, i32 83, i32 87, i32 89, i32 93, i32 91, i32 95, i32 33, i32 37, i32 35, i32 39, i32 41, i32 45, i32 43, i32 47, i32 97, i32 101, i32 99, i32 103, i32 105, i32 109, i32 107, i32 111, i32 49, i32 53, i32 51, i32 55, i32 57, i32 61, i32 59, i32 63, i32 113, i32 117, i32 115, i32 119, i32 121, i32 125, i32 123, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vdeal_0e: +; CHECK: [[REG0e:r[0-9]+]] = #14 +; CHECK: vdeal(v1,v0,[[REG0e]]) +define <128 x i8> @vdeal_0e(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 1, i32 4, i32 5, i32 8, i32 9, i32 12, i32 13, i32 64, i32 65, i32 68, i32 69, i32 72, i32 73, i32 76, i32 77, i32 16, i32 17, i32 20, i32 21, i32 24, i32 25, i32 28, i32 29, i32 80, i32 81, i32 84, i32 85, i32 88, i32 89, i32 92, i32 93, i32 32, i32 33, i32 36, i32 37, i32 40, i32 41, i32 44, i32 45, i32 96, i32 97, i32 100, i32 101, i32 104, i32 105, i32 108, i32 109, i32 48, i32 49, i32 52, i32 53, i32 56, i32 57, i32 60, i32 61, i32 112, i32 113, i32 116, i32 117, i32 120, i32 121, i32 124, i32 125, i32 2, i32 3, i32 6, i32 7, i32 10, i32 11, i32 14, i32 15, i32 66, i32 67, i32 70, i32 71, i32 74, i32 75, i32 78, i32 79, i32 18, i32 19, i32 22, i32 23, i32 26, i32 27, i32 30, i32 31, i32 82, i32 83, i32 86, i32 87, i32 90, i32 91, i32 94, i32 95, i32 34, i32 35, i32 38, i32 39, i32 42, i32 43, i32 46, i32 47, i32 98, i32 99, i32 102, i32 103, i32 106, i32 107, i32 110, i32 111, i32 50, i32 51, i32 54, i32 55, i32 58, i32 59, i32 62, i32 63, i32 114, i32 115, i32 118, i32 119, i32 122, i32 123, i32 126, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vdeal_0f: +; CHECK: [[REG0f:r[0-9]+]] = #15 +; CHECK: vdeal(v1,v0,[[REG0f]]) +define <128 x i8> @vdeal_0f(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 64, i32 66, i32 68, i32 70, i32 72, i32 74, i32 76, i32 78, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30, i32 80, i32 82, i32 84, i32 86, i32 88, i32 90, i32 92, i32 94, i32 32, i32 34, i32 36, i32 38, i32 40, i32 42, i32 44, i32 46, i32 96, i32 98, i32 100, i32 102, i32 104, i32 106, i32 108, i32 110, i32 48, i32 50, i32 52, i32 54, i32 56, i32 58, i32 60, i32 62, i32 112, i32 114, i32 116, i32 118, i32 120, i32 122, i32 124, i32 126, i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 65, i32 67, i32 69, i32 71, i32 73, i32 75, i32 77, i32 79, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31, i32 81, i32 83, i32 85, i32 87, i32 89, i32 91, i32 93, i32 95, i32 33, i32 35, i32 37, i32 39, i32 41, i32 43, i32 45, i32 47, i32 97, i32 99, i32 101, i32 103, i32 105, i32 107, i32 109, i32 111, i32 49, i32 51, i32 53, i32 55, i32 57, i32 59, i32 61, i32 63, i32 113, i32 115, i32 117, i32 119, i32 121, i32 123, i32 125, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vdeal_10: +; CHECK: [[REG10:r[0-9]+]] = #16 +; CHECK: vshuff(v1,v0,[[REG10]]) +define <128 x i8> @vdeal_10(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 64, i32 65, i32 66, i32 67, i32 68, i32 69, i32 70, i32 71, i32 72, i32 73, i32 74, i32 75, i32 76, i32 77, i32 78, i32 79, i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 96, i32 97, i32 98, i32 99, i32 100, i32 101, i32 102, i32 103, i32 104, i32 105, i32 106, i32 107, i32 108, i32 109, i32 110, i32 111, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 80, i32 81, i32 82, i32 83, i32 84, i32 85, i32 86, i32 87, i32 88, i32 89, i32 90, i32 91, i32 92, i32 93, i32 94, i32 95, i32 48, i32 49, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63, i32 112, i32 113, i32 114, i32 115, i32 116, i32 117, i32 118, i32 119, i32 120, i32 121, i32 122, i32 123, i32 124, i32 125, i32 126, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vdeal_11: +; CHECK: [[REG11:r[0-9]+]] = #17 +; CHECK: vdeal(v1,v0,[[REG11]]) +define <128 x i8> @vdeal_11(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 16, i32 2, i32 18, i32 4, i32 20, i32 6, i32 22, i32 8, i32 24, i32 10, i32 26, i32 12, i32 28, i32 14, i32 30, i32 64, i32 80, i32 66, i32 82, i32 68, i32 84, i32 70, i32 86, i32 72, i32 88, i32 74, i32 90, i32 76, i32 92, i32 78, i32 94, i32 32, i32 48, i32 34, i32 50, i32 36, i32 52, i32 38, i32 54, i32 40, i32 56, i32 42, i32 58, i32 44, i32 60, i32 46, i32 62, i32 96, i32 112, i32 98, i32 114, i32 100, i32 116, i32 102, i32 118, i32 104, i32 120, i32 106, i32 122, i32 108, i32 124, i32 110, i32 126, i32 1, i32 17, i32 3, i32 19, i32 5, i32 21, i32 7, i32 23, i32 9, i32 25, i32 11, i32 27, i32 13, i32 29, i32 15, i32 31, i32 65, i32 81, i32 67, i32 83, i32 69, i32 85, i32 71, i32 87, i32 73, i32 89, i32 75, i32 91, i32 77, i32 93, i32 79, i32 95, i32 33, i32 49, i32 35, i32 51, i32 37, i32 53, i32 39, i32 55, i32 41, i32 57, i32 43, i32 59, i32 45, i32 61, i32 47, i32 63, i32 97, i32 113, i32 99, i32 115, i32 101, i32 117, i32 103, i32 119, i32 105, i32 121, i32 107, i32 123, i32 109, i32 125, i32 111, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vdeal_12: +; CHECK: [[REG12:r[0-9]+]] = #18 +; CHECK: vdeal(v1,v0,[[REG12]]) +define <128 x i8> @vdeal_12(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 1, i32 16, i32 17, i32 4, i32 5, i32 20, i32 21, i32 8, i32 9, i32 24, i32 25, i32 12, i32 13, i32 28, i32 29, i32 64, i32 65, i32 80, i32 81, i32 68, i32 69, i32 84, i32 85, i32 72, i32 73, i32 88, i32 89, i32 76, i32 77, i32 92, i32 93, i32 32, i32 33, i32 48, i32 49, i32 36, i32 37, i32 52, i32 53, i32 40, i32 41, i32 56, i32 57, i32 44, i32 45, i32 60, i32 61, i32 96, i32 97, i32 112, i32 113, i32 100, i32 101, i32 116, i32 117, i32 104, i32 105, i32 120, i32 121, i32 108, i32 109, i32 124, i32 125, i32 2, i32 3, i32 18, i32 19, i32 6, i32 7, i32 22, i32 23, i32 10, i32 11, i32 26, i32 27, i32 14, i32 15, i32 30, i32 31, i32 66, i32 67, i32 82, i32 83, i32 70, i32 71, i32 86, i32 87, i32 74, i32 75, i32 90, i32 91, i32 78, i32 79, i32 94, i32 95, i32 34, i32 35, i32 50, i32 51, i32 38, i32 39, i32 54, i32 55, i32 42, i32 43, i32 58, i32 59, i32 46, i32 47, i32 62, i32 63, i32 98, i32 99, i32 114, i32 115, i32 102, i32 103, i32 118, i32 119, i32 106, i32 107, i32 122, i32 123, i32 110, i32 111, i32 126, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vdeal_13: +; CHECK: [[REG13:r[0-9]+]] = #19 +; CHECK: vdeal(v1,v0,[[REG13]]) +define <128 x i8> @vdeal_13(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 2, i32 16, i32 18, i32 4, i32 6, i32 20, i32 22, i32 8, i32 10, i32 24, i32 26, i32 12, i32 14, i32 28, i32 30, i32 64, i32 66, i32 80, i32 82, i32 68, i32 70, i32 84, i32 86, i32 72, i32 74, i32 88, i32 90, i32 76, i32 78, i32 92, i32 94, i32 32, i32 34, i32 48, i32 50, i32 36, i32 38, i32 52, i32 54, i32 40, i32 42, i32 56, i32 58, i32 44, i32 46, i32 60, i32 62, i32 96, i32 98, i32 112, i32 114, i32 100, i32 102, i32 116, i32 118, i32 104, i32 106, i32 120, i32 122, i32 108, i32 110, i32 124, i32 126, i32 1, i32 3, i32 17, i32 19, i32 5, i32 7, i32 21, i32 23, i32 9, i32 11, i32 25, i32 27, i32 13, i32 15, i32 29, i32 31, i32 65, i32 67, i32 81, i32 83, i32 69, i32 71, i32 85, i32 87, i32 73, i32 75, i32 89, i32 91, i32 77, i32 79, i32 93, i32 95, i32 33, i32 35, i32 49, i32 51, i32 37, i32 39, i32 53, i32 55, i32 41, i32 43, i32 57, i32 59, i32 45, i32 47, i32 61, i32 63, i32 97, i32 99, i32 113, i32 115, i32 101, i32 103, i32 117, i32 119, i32 105, i32 107, i32 121, i32 123, i32 109, i32 111, i32 125, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vdeal_14: +; CHECK: [[REG14:r[0-9]+]] = #20 +; CHECK: vdeal(v1,v0,[[REG14]]) +define <128 x i8> @vdeal_14(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 1, i32 2, i32 3, i32 16, i32 17, i32 18, i32 19, i32 8, i32 9, i32 10, i32 11, i32 24, i32 25, i32 26, i32 27, i32 64, i32 65, i32 66, i32 67, i32 80, i32 81, i32 82, i32 83, i32 72, i32 73, i32 74, i32 75, i32 88, i32 89, i32 90, i32 91, i32 32, i32 33, i32 34, i32 35, i32 48, i32 49, i32 50, i32 51, i32 40, i32 41, i32 42, i32 43, i32 56, i32 57, i32 58, i32 59, i32 96, i32 97, i32 98, i32 99, i32 112, i32 113, i32 114, i32 115, i32 104, i32 105, i32 106, i32 107, i32 120, i32 121, i32 122, i32 123, i32 4, i32 5, i32 6, i32 7, i32 20, i32 21, i32 22, i32 23, i32 12, i32 13, i32 14, i32 15, i32 28, i32 29, i32 30, i32 31, i32 68, i32 69, i32 70, i32 71, i32 84, i32 85, i32 86, i32 87, i32 76, i32 77, i32 78, i32 79, i32 92, i32 93, i32 94, i32 95, i32 36, i32 37, i32 38, i32 39, i32 52, i32 53, i32 54, i32 55, i32 44, i32 45, i32 46, i32 47, i32 60, i32 61, i32 62, i32 63, i32 100, i32 101, i32 102, i32 103, i32 116, i32 117, i32 118, i32 119, i32 108, i32 109, i32 110, i32 111, i32 124, i32 125, i32 126, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vdeal_15: +; CHECK: [[REG15:r[0-9]+]] = #21 +; CHECK: vdeal(v1,v0,[[REG15]]) +define <128 x i8> @vdeal_15(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 4, i32 2, i32 6, i32 16, i32 20, i32 18, i32 22, i32 8, i32 12, i32 10, i32 14, i32 24, i32 28, i32 26, i32 30, i32 64, i32 68, i32 66, i32 70, i32 80, i32 84, i32 82, i32 86, i32 72, i32 76, i32 74, i32 78, i32 88, i32 92, i32 90, i32 94, i32 32, i32 36, i32 34, i32 38, i32 48, i32 52, i32 50, i32 54, i32 40, i32 44, i32 42, i32 46, i32 56, i32 60, i32 58, i32 62, i32 96, i32 100, i32 98, i32 102, i32 112, i32 116, i32 114, i32 118, i32 104, i32 108, i32 106, i32 110, i32 120, i32 124, i32 122, i32 126, i32 1, i32 5, i32 3, i32 7, i32 17, i32 21, i32 19, i32 23, i32 9, i32 13, i32 11, i32 15, i32 25, i32 29, i32 27, i32 31, i32 65, i32 69, i32 67, i32 71, i32 81, i32 85, i32 83, i32 87, i32 73, i32 77, i32 75, i32 79, i32 89, i32 93, i32 91, i32 95, i32 33, i32 37, i32 35, i32 39, i32 49, i32 53, i32 51, i32 55, i32 41, i32 45, i32 43, i32 47, i32 57, i32 61, i32 59, i32 63, i32 97, i32 101, i32 99, i32 103, i32 113, i32 117, i32 115, i32 119, i32 105, i32 109, i32 107, i32 111, i32 121, i32 125, i32 123, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vdeal_16: +; CHECK: [[REG16:r[0-9]+]] = #22 +; CHECK: vdeal(v1,v0,[[REG16]]) +define <128 x i8> @vdeal_16(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 1, i32 4, i32 5, i32 16, i32 17, i32 20, i32 21, i32 8, i32 9, i32 12, i32 13, i32 24, i32 25, i32 28, i32 29, i32 64, i32 65, i32 68, i32 69, i32 80, i32 81, i32 84, i32 85, i32 72, i32 73, i32 76, i32 77, i32 88, i32 89, i32 92, i32 93, i32 32, i32 33, i32 36, i32 37, i32 48, i32 49, i32 52, i32 53, i32 40, i32 41, i32 44, i32 45, i32 56, i32 57, i32 60, i32 61, i32 96, i32 97, i32 100, i32 101, i32 112, i32 113, i32 116, i32 117, i32 104, i32 105, i32 108, i32 109, i32 120, i32 121, i32 124, i32 125, i32 2, i32 3, i32 6, i32 7, i32 18, i32 19, i32 22, i32 23, i32 10, i32 11, i32 14, i32 15, i32 26, i32 27, i32 30, i32 31, i32 66, i32 67, i32 70, i32 71, i32 82, i32 83, i32 86, i32 87, i32 74, i32 75, i32 78, i32 79, i32 90, i32 91, i32 94, i32 95, i32 34, i32 35, i32 38, i32 39, i32 50, i32 51, i32 54, i32 55, i32 42, i32 43, i32 46, i32 47, i32 58, i32 59, i32 62, i32 63, i32 98, i32 99, i32 102, i32 103, i32 114, i32 115, i32 118, i32 119, i32 106, i32 107, i32 110, i32 111, i32 122, i32 123, i32 126, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vdeal_17: +; CHECK: [[REG17:r[0-9]+]] = #23 +; CHECK: vdeal(v1,v0,[[REG17]]) +define <128 x i8> @vdeal_17(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 2, i32 4, i32 6, i32 16, i32 18, i32 20, i32 22, i32 8, i32 10, i32 12, i32 14, i32 24, i32 26, i32 28, i32 30, i32 64, i32 66, i32 68, i32 70, i32 80, i32 82, i32 84, i32 86, i32 72, i32 74, i32 76, i32 78, i32 88, i32 90, i32 92, i32 94, i32 32, i32 34, i32 36, i32 38, i32 48, i32 50, i32 52, i32 54, i32 40, i32 42, i32 44, i32 46, i32 56, i32 58, i32 60, i32 62, i32 96, i32 98, i32 100, i32 102, i32 112, i32 114, i32 116, i32 118, i32 104, i32 106, i32 108, i32 110, i32 120, i32 122, i32 124, i32 126, i32 1, i32 3, i32 5, i32 7, i32 17, i32 19, i32 21, i32 23, i32 9, i32 11, i32 13, i32 15, i32 25, i32 27, i32 29, i32 31, i32 65, i32 67, i32 69, i32 71, i32 81, i32 83, i32 85, i32 87, i32 73, i32 75, i32 77, i32 79, i32 89, i32 91, i32 93, i32 95, i32 33, i32 35, i32 37, i32 39, i32 49, i32 51, i32 53, i32 55, i32 41, i32 43, i32 45, i32 47, i32 57, i32 59, i32 61, i32 63, i32 97, i32 99, i32 101, i32 103, i32 113, i32 115, i32 117, i32 119, i32 105, i32 107, i32 109, i32 111, i32 121, i32 123, i32 125, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vdeal_18: +; CHECK: [[REG18:r[0-9]+]] = #24 +; CHECK: vdeal(v1,v0,[[REG18]]) +define <128 x i8> @vdeal_18(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 64, i32 65, i32 66, i32 67, i32 68, i32 69, i32 70, i32 71, i32 80, i32 81, i32 82, i32 83, i32 84, i32 85, i32 86, i32 87, i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 48, i32 49, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 96, i32 97, i32 98, i32 99, i32 100, i32 101, i32 102, i32 103, i32 112, i32 113, i32 114, i32 115, i32 116, i32 117, i32 118, i32 119, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 72, i32 73, i32 74, i32 75, i32 76, i32 77, i32 78, i32 79, i32 88, i32 89, i32 90, i32 91, i32 92, i32 93, i32 94, i32 95, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63, i32 104, i32 105, i32 106, i32 107, i32 108, i32 109, i32 110, i32 111, i32 120, i32 121, i32 122, i32 123, i32 124, i32 125, i32 126, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vdeal_19: +; CHECK: [[REG19:r[0-9]+]] = #25 +; CHECK: vdeal(v1,v0,[[REG19]]) +define <128 x i8> @vdeal_19(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14, i32 16, i32 24, i32 18, i32 26, i32 20, i32 28, i32 22, i32 30, i32 64, i32 72, i32 66, i32 74, i32 68, i32 76, i32 70, i32 78, i32 80, i32 88, i32 82, i32 90, i32 84, i32 92, i32 86, i32 94, i32 32, i32 40, i32 34, i32 42, i32 36, i32 44, i32 38, i32 46, i32 48, i32 56, i32 50, i32 58, i32 52, i32 60, i32 54, i32 62, i32 96, i32 104, i32 98, i32 106, i32 100, i32 108, i32 102, i32 110, i32 112, i32 120, i32 114, i32 122, i32 116, i32 124, i32 118, i32 126, i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15, i32 17, i32 25, i32 19, i32 27, i32 21, i32 29, i32 23, i32 31, i32 65, i32 73, i32 67, i32 75, i32 69, i32 77, i32 71, i32 79, i32 81, i32 89, i32 83, i32 91, i32 85, i32 93, i32 87, i32 95, i32 33, i32 41, i32 35, i32 43, i32 37, i32 45, i32 39, i32 47, i32 49, i32 57, i32 51, i32 59, i32 53, i32 61, i32 55, i32 63, i32 97, i32 105, i32 99, i32 107, i32 101, i32 109, i32 103, i32 111, i32 113, i32 121, i32 115, i32 123, i32 117, i32 125, i32 119, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vdeal_1a: +; CHECK: [[REG1a:r[0-9]+]] = #26 +; CHECK: vdeal(v1,v0,[[REG1a]]) +define <128 x i8> @vdeal_1a(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 1, i32 8, i32 9, i32 4, i32 5, i32 12, i32 13, i32 16, i32 17, i32 24, i32 25, i32 20, i32 21, i32 28, i32 29, i32 64, i32 65, i32 72, i32 73, i32 68, i32 69, i32 76, i32 77, i32 80, i32 81, i32 88, i32 89, i32 84, i32 85, i32 92, i32 93, i32 32, i32 33, i32 40, i32 41, i32 36, i32 37, i32 44, i32 45, i32 48, i32 49, i32 56, i32 57, i32 52, i32 53, i32 60, i32 61, i32 96, i32 97, i32 104, i32 105, i32 100, i32 101, i32 108, i32 109, i32 112, i32 113, i32 120, i32 121, i32 116, i32 117, i32 124, i32 125, i32 2, i32 3, i32 10, i32 11, i32 6, i32 7, i32 14, i32 15, i32 18, i32 19, i32 26, i32 27, i32 22, i32 23, i32 30, i32 31, i32 66, i32 67, i32 74, i32 75, i32 70, i32 71, i32 78, i32 79, i32 82, i32 83, i32 90, i32 91, i32 86, i32 87, i32 94, i32 95, i32 34, i32 35, i32 42, i32 43, i32 38, i32 39, i32 46, i32 47, i32 50, i32 51, i32 58, i32 59, i32 54, i32 55, i32 62, i32 63, i32 98, i32 99, i32 106, i32 107, i32 102, i32 103, i32 110, i32 111, i32 114, i32 115, i32 122, i32 123, i32 118, i32 119, i32 126, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vdeal_1b: +; CHECK: [[REG1b:r[0-9]+]] = #27 +; CHECK: vdeal(v1,v0,[[REG1b]]) +define <128 x i8> @vdeal_1b(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 2, i32 8, i32 10, i32 4, i32 6, i32 12, i32 14, i32 16, i32 18, i32 24, i32 26, i32 20, i32 22, i32 28, i32 30, i32 64, i32 66, i32 72, i32 74, i32 68, i32 70, i32 76, i32 78, i32 80, i32 82, i32 88, i32 90, i32 84, i32 86, i32 92, i32 94, i32 32, i32 34, i32 40, i32 42, i32 36, i32 38, i32 44, i32 46, i32 48, i32 50, i32 56, i32 58, i32 52, i32 54, i32 60, i32 62, i32 96, i32 98, i32 104, i32 106, i32 100, i32 102, i32 108, i32 110, i32 112, i32 114, i32 120, i32 122, i32 116, i32 118, i32 124, i32 126, i32 1, i32 3, i32 9, i32 11, i32 5, i32 7, i32 13, i32 15, i32 17, i32 19, i32 25, i32 27, i32 21, i32 23, i32 29, i32 31, i32 65, i32 67, i32 73, i32 75, i32 69, i32 71, i32 77, i32 79, i32 81, i32 83, i32 89, i32 91, i32 85, i32 87, i32 93, i32 95, i32 33, i32 35, i32 41, i32 43, i32 37, i32 39, i32 45, i32 47, i32 49, i32 51, i32 57, i32 59, i32 53, i32 55, i32 61, i32 63, i32 97, i32 99, i32 105, i32 107, i32 101, i32 103, i32 109, i32 111, i32 113, i32 115, i32 121, i32 123, i32 117, i32 119, i32 125, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vdeal_1c: +; CHECK: [[REG1c:r[0-9]+]] = #28 +; CHECK: vdeal(v1,v0,[[REG1c]]) +define <128 x i8> @vdeal_1c(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 10, i32 11, i32 16, i32 17, i32 18, i32 19, i32 24, i32 25, i32 26, i32 27, i32 64, i32 65, i32 66, i32 67, i32 72, i32 73, i32 74, i32 75, i32 80, i32 81, i32 82, i32 83, i32 88, i32 89, i32 90, i32 91, i32 32, i32 33, i32 34, i32 35, i32 40, i32 41, i32 42, i32 43, i32 48, i32 49, i32 50, i32 51, i32 56, i32 57, i32 58, i32 59, i32 96, i32 97, i32 98, i32 99, i32 104, i32 105, i32 106, i32 107, i32 112, i32 113, i32 114, i32 115, i32 120, i32 121, i32 122, i32 123, i32 4, i32 5, i32 6, i32 7, i32 12, i32 13, i32 14, i32 15, i32 20, i32 21, i32 22, i32 23, i32 28, i32 29, i32 30, i32 31, i32 68, i32 69, i32 70, i32 71, i32 76, i32 77, i32 78, i32 79, i32 84, i32 85, i32 86, i32 87, i32 92, i32 93, i32 94, i32 95, i32 36, i32 37, i32 38, i32 39, i32 44, i32 45, i32 46, i32 47, i32 52, i32 53, i32 54, i32 55, i32 60, i32 61, i32 62, i32 63, i32 100, i32 101, i32 102, i32 103, i32 108, i32 109, i32 110, i32 111, i32 116, i32 117, i32 118, i32 119, i32 124, i32 125, i32 126, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vdeal_1d: +; CHECK: [[REG1d:r[0-9]+]] = #29 +; CHECK: vdeal(v1,v0,[[REG1d]]) +define <128 x i8> @vdeal_1d(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 4, i32 2, i32 6, i32 8, i32 12, i32 10, i32 14, i32 16, i32 20, i32 18, i32 22, i32 24, i32 28, i32 26, i32 30, i32 64, i32 68, i32 66, i32 70, i32 72, i32 76, i32 74, i32 78, i32 80, i32 84, i32 82, i32 86, i32 88, i32 92, i32 90, i32 94, i32 32, i32 36, i32 34, i32 38, i32 40, i32 44, i32 42, i32 46, i32 48, i32 52, i32 50, i32 54, i32 56, i32 60, i32 58, i32 62, i32 96, i32 100, i32 98, i32 102, i32 104, i32 108, i32 106, i32 110, i32 112, i32 116, i32 114, i32 118, i32 120, i32 124, i32 122, i32 126, i32 1, i32 5, i32 3, i32 7, i32 9, i32 13, i32 11, i32 15, i32 17, i32 21, i32 19, i32 23, i32 25, i32 29, i32 27, i32 31, i32 65, i32 69, i32 67, i32 71, i32 73, i32 77, i32 75, i32 79, i32 81, i32 85, i32 83, i32 87, i32 89, i32 93, i32 91, i32 95, i32 33, i32 37, i32 35, i32 39, i32 41, i32 45, i32 43, i32 47, i32 49, i32 53, i32 51, i32 55, i32 57, i32 61, i32 59, i32 63, i32 97, i32 101, i32 99, i32 103, i32 105, i32 109, i32 107, i32 111, i32 113, i32 117, i32 115, i32 119, i32 121, i32 125, i32 123, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vdeal_1e: +; CHECK: [[REG1e:r[0-9]+]] = #30 +; CHECK: vdeal(v1,v0,[[REG1e]]) +define <128 x i8> @vdeal_1e(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 1, i32 4, i32 5, i32 8, i32 9, i32 12, i32 13, i32 16, i32 17, i32 20, i32 21, i32 24, i32 25, i32 28, i32 29, i32 64, i32 65, i32 68, i32 69, i32 72, i32 73, i32 76, i32 77, i32 80, i32 81, i32 84, i32 85, i32 88, i32 89, i32 92, i32 93, i32 32, i32 33, i32 36, i32 37, i32 40, i32 41, i32 44, i32 45, i32 48, i32 49, i32 52, i32 53, i32 56, i32 57, i32 60, i32 61, i32 96, i32 97, i32 100, i32 101, i32 104, i32 105, i32 108, i32 109, i32 112, i32 113, i32 116, i32 117, i32 120, i32 121, i32 124, i32 125, i32 2, i32 3, i32 6, i32 7, i32 10, i32 11, i32 14, i32 15, i32 18, i32 19, i32 22, i32 23, i32 26, i32 27, i32 30, i32 31, i32 66, i32 67, i32 70, i32 71, i32 74, i32 75, i32 78, i32 79, i32 82, i32 83, i32 86, i32 87, i32 90, i32 91, i32 94, i32 95, i32 34, i32 35, i32 38, i32 39, i32 42, i32 43, i32 46, i32 47, i32 50, i32 51, i32 54, i32 55, i32 58, i32 59, i32 62, i32 63, i32 98, i32 99, i32 102, i32 103, i32 106, i32 107, i32 110, i32 111, i32 114, i32 115, i32 118, i32 119, i32 122, i32 123, i32 126, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vdeal_1f: +; CHECK: [[REG1f:r[0-9]+]] = #31 +; CHECK: vdeal(v1,v0,[[REG1f]]) +define <128 x i8> @vdeal_1f(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30, i32 64, i32 66, i32 68, i32 70, i32 72, i32 74, i32 76, i32 78, i32 80, i32 82, i32 84, i32 86, i32 88, i32 90, i32 92, i32 94, i32 32, i32 34, i32 36, i32 38, i32 40, i32 42, i32 44, i32 46, i32 48, i32 50, i32 52, i32 54, i32 56, i32 58, i32 60, i32 62, i32 96, i32 98, i32 100, i32 102, i32 104, i32 106, i32 108, i32 110, i32 112, i32 114, i32 116, i32 118, i32 120, i32 122, i32 124, i32 126, i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31, i32 65, i32 67, i32 69, i32 71, i32 73, i32 75, i32 77, i32 79, i32 81, i32 83, i32 85, i32 87, i32 89, i32 91, i32 93, i32 95, i32 33, i32 35, i32 37, i32 39, i32 41, i32 43, i32 45, i32 47, i32 49, i32 51, i32 53, i32 55, i32 57, i32 59, i32 61, i32 63, i32 97, i32 99, i32 101, i32 103, i32 105, i32 107, i32 109, i32 111, i32 113, i32 115, i32 117, i32 119, i32 121, i32 123, i32 125, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vdeal_20: +; CHECK: [[REG20:r[0-9]+]] = #32 +; CHECK: vshuff(v1,v0,[[REG20]]) +define <128 x i8> @vdeal_20(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 64, i32 65, i32 66, i32 67, i32 68, i32 69, i32 70, i32 71, i32 72, i32 73, i32 74, i32 75, i32 76, i32 77, i32 78, i32 79, i32 80, i32 81, i32 82, i32 83, i32 84, i32 85, i32 86, i32 87, i32 88, i32 89, i32 90, i32 91, i32 92, i32 93, i32 94, i32 95, i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 48, i32 49, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63, i32 96, i32 97, i32 98, i32 99, i32 100, i32 101, i32 102, i32 103, i32 104, i32 105, i32 106, i32 107, i32 108, i32 109, i32 110, i32 111, i32 112, i32 113, i32 114, i32 115, i32 116, i32 117, i32 118, i32 119, i32 120, i32 121, i32 122, i32 123, i32 124, i32 125, i32 126, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vdeal_21: +; CHECK: [[REG21:r[0-9]+]] = #33 +; CHECK: vdeal(v1,v0,[[REG21]]) +define <128 x i8> @vdeal_21(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 32, i32 2, i32 34, i32 4, i32 36, i32 6, i32 38, i32 8, i32 40, i32 10, i32 42, i32 12, i32 44, i32 14, i32 46, i32 16, i32 48, i32 18, i32 50, i32 20, i32 52, i32 22, i32 54, i32 24, i32 56, i32 26, i32 58, i32 28, i32 60, i32 30, i32 62, i32 64, i32 96, i32 66, i32 98, i32 68, i32 100, i32 70, i32 102, i32 72, i32 104, i32 74, i32 106, i32 76, i32 108, i32 78, i32 110, i32 80, i32 112, i32 82, i32 114, i32 84, i32 116, i32 86, i32 118, i32 88, i32 120, i32 90, i32 122, i32 92, i32 124, i32 94, i32 126, i32 1, i32 33, i32 3, i32 35, i32 5, i32 37, i32 7, i32 39, i32 9, i32 41, i32 11, i32 43, i32 13, i32 45, i32 15, i32 47, i32 17, i32 49, i32 19, i32 51, i32 21, i32 53, i32 23, i32 55, i32 25, i32 57, i32 27, i32 59, i32 29, i32 61, i32 31, i32 63, i32 65, i32 97, i32 67, i32 99, i32 69, i32 101, i32 71, i32 103, i32 73, i32 105, i32 75, i32 107, i32 77, i32 109, i32 79, i32 111, i32 81, i32 113, i32 83, i32 115, i32 85, i32 117, i32 87, i32 119, i32 89, i32 121, i32 91, i32 123, i32 93, i32 125, i32 95, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vdeal_22: +; CHECK: [[REG22:r[0-9]+]] = #34 +; CHECK: vdeal(v1,v0,[[REG22]]) +define <128 x i8> @vdeal_22(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 1, i32 32, i32 33, i32 4, i32 5, i32 36, i32 37, i32 8, i32 9, i32 40, i32 41, i32 12, i32 13, i32 44, i32 45, i32 16, i32 17, i32 48, i32 49, i32 20, i32 21, i32 52, i32 53, i32 24, i32 25, i32 56, i32 57, i32 28, i32 29, i32 60, i32 61, i32 64, i32 65, i32 96, i32 97, i32 68, i32 69, i32 100, i32 101, i32 72, i32 73, i32 104, i32 105, i32 76, i32 77, i32 108, i32 109, i32 80, i32 81, i32 112, i32 113, i32 84, i32 85, i32 116, i32 117, i32 88, i32 89, i32 120, i32 121, i32 92, i32 93, i32 124, i32 125, i32 2, i32 3, i32 34, i32 35, i32 6, i32 7, i32 38, i32 39, i32 10, i32 11, i32 42, i32 43, i32 14, i32 15, i32 46, i32 47, i32 18, i32 19, i32 50, i32 51, i32 22, i32 23, i32 54, i32 55, i32 26, i32 27, i32 58, i32 59, i32 30, i32 31, i32 62, i32 63, i32 66, i32 67, i32 98, i32 99, i32 70, i32 71, i32 102, i32 103, i32 74, i32 75, i32 106, i32 107, i32 78, i32 79, i32 110, i32 111, i32 82, i32 83, i32 114, i32 115, i32 86, i32 87, i32 118, i32 119, i32 90, i32 91, i32 122, i32 123, i32 94, i32 95, i32 126, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vdeal_23: +; CHECK: [[REG23:r[0-9]+]] = #35 +; CHECK: vdeal(v1,v0,[[REG23]]) +define <128 x i8> @vdeal_23(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 2, i32 32, i32 34, i32 4, i32 6, i32 36, i32 38, i32 8, i32 10, i32 40, i32 42, i32 12, i32 14, i32 44, i32 46, i32 16, i32 18, i32 48, i32 50, i32 20, i32 22, i32 52, i32 54, i32 24, i32 26, i32 56, i32 58, i32 28, i32 30, i32 60, i32 62, i32 64, i32 66, i32 96, i32 98, i32 68, i32 70, i32 100, i32 102, i32 72, i32 74, i32 104, i32 106, i32 76, i32 78, i32 108, i32 110, i32 80, i32 82, i32 112, i32 114, i32 84, i32 86, i32 116, i32 118, i32 88, i32 90, i32 120, i32 122, i32 92, i32 94, i32 124, i32 126, i32 1, i32 3, i32 33, i32 35, i32 5, i32 7, i32 37, i32 39, i32 9, i32 11, i32 41, i32 43, i32 13, i32 15, i32 45, i32 47, i32 17, i32 19, i32 49, i32 51, i32 21, i32 23, i32 53, i32 55, i32 25, i32 27, i32 57, i32 59, i32 29, i32 31, i32 61, i32 63, i32 65, i32 67, i32 97, i32 99, i32 69, i32 71, i32 101, i32 103, i32 73, i32 75, i32 105, i32 107, i32 77, i32 79, i32 109, i32 111, i32 81, i32 83, i32 113, i32 115, i32 85, i32 87, i32 117, i32 119, i32 89, i32 91, i32 121, i32 123, i32 93, i32 95, i32 125, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vdeal_24: +; CHECK: [[REG24:r[0-9]+]] = #36 +; CHECK: vdeal(v1,v0,[[REG24]]) +define <128 x i8> @vdeal_24(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 1, i32 2, i32 3, i32 32, i32 33, i32 34, i32 35, i32 8, i32 9, i32 10, i32 11, i32 40, i32 41, i32 42, i32 43, i32 16, i32 17, i32 18, i32 19, i32 48, i32 49, i32 50, i32 51, i32 24, i32 25, i32 26, i32 27, i32 56, i32 57, i32 58, i32 59, i32 64, i32 65, i32 66, i32 67, i32 96, i32 97, i32 98, i32 99, i32 72, i32 73, i32 74, i32 75, i32 104, i32 105, i32 106, i32 107, i32 80, i32 81, i32 82, i32 83, i32 112, i32 113, i32 114, i32 115, i32 88, i32 89, i32 90, i32 91, i32 120, i32 121, i32 122, i32 123, i32 4, i32 5, i32 6, i32 7, i32 36, i32 37, i32 38, i32 39, i32 12, i32 13, i32 14, i32 15, i32 44, i32 45, i32 46, i32 47, i32 20, i32 21, i32 22, i32 23, i32 52, i32 53, i32 54, i32 55, i32 28, i32 29, i32 30, i32 31, i32 60, i32 61, i32 62, i32 63, i32 68, i32 69, i32 70, i32 71, i32 100, i32 101, i32 102, i32 103, i32 76, i32 77, i32 78, i32 79, i32 108, i32 109, i32 110, i32 111, i32 84, i32 85, i32 86, i32 87, i32 116, i32 117, i32 118, i32 119, i32 92, i32 93, i32 94, i32 95, i32 124, i32 125, i32 126, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vdeal_25: +; CHECK: [[REG25:r[0-9]+]] = #37 +; CHECK: vdeal(v1,v0,[[REG25]]) +define <128 x i8> @vdeal_25(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 4, i32 2, i32 6, i32 32, i32 36, i32 34, i32 38, i32 8, i32 12, i32 10, i32 14, i32 40, i32 44, i32 42, i32 46, i32 16, i32 20, i32 18, i32 22, i32 48, i32 52, i32 50, i32 54, i32 24, i32 28, i32 26, i32 30, i32 56, i32 60, i32 58, i32 62, i32 64, i32 68, i32 66, i32 70, i32 96, i32 100, i32 98, i32 102, i32 72, i32 76, i32 74, i32 78, i32 104, i32 108, i32 106, i32 110, i32 80, i32 84, i32 82, i32 86, i32 112, i32 116, i32 114, i32 118, i32 88, i32 92, i32 90, i32 94, i32 120, i32 124, i32 122, i32 126, i32 1, i32 5, i32 3, i32 7, i32 33, i32 37, i32 35, i32 39, i32 9, i32 13, i32 11, i32 15, i32 41, i32 45, i32 43, i32 47, i32 17, i32 21, i32 19, i32 23, i32 49, i32 53, i32 51, i32 55, i32 25, i32 29, i32 27, i32 31, i32 57, i32 61, i32 59, i32 63, i32 65, i32 69, i32 67, i32 71, i32 97, i32 101, i32 99, i32 103, i32 73, i32 77, i32 75, i32 79, i32 105, i32 109, i32 107, i32 111, i32 81, i32 85, i32 83, i32 87, i32 113, i32 117, i32 115, i32 119, i32 89, i32 93, i32 91, i32 95, i32 121, i32 125, i32 123, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vdeal_26: +; CHECK: [[REG26:r[0-9]+]] = #38 +; CHECK: vdeal(v1,v0,[[REG26]]) +define <128 x i8> @vdeal_26(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 1, i32 4, i32 5, i32 32, i32 33, i32 36, i32 37, i32 8, i32 9, i32 12, i32 13, i32 40, i32 41, i32 44, i32 45, i32 16, i32 17, i32 20, i32 21, i32 48, i32 49, i32 52, i32 53, i32 24, i32 25, i32 28, i32 29, i32 56, i32 57, i32 60, i32 61, i32 64, i32 65, i32 68, i32 69, i32 96, i32 97, i32 100, i32 101, i32 72, i32 73, i32 76, i32 77, i32 104, i32 105, i32 108, i32 109, i32 80, i32 81, i32 84, i32 85, i32 112, i32 113, i32 116, i32 117, i32 88, i32 89, i32 92, i32 93, i32 120, i32 121, i32 124, i32 125, i32 2, i32 3, i32 6, i32 7, i32 34, i32 35, i32 38, i32 39, i32 10, i32 11, i32 14, i32 15, i32 42, i32 43, i32 46, i32 47, i32 18, i32 19, i32 22, i32 23, i32 50, i32 51, i32 54, i32 55, i32 26, i32 27, i32 30, i32 31, i32 58, i32 59, i32 62, i32 63, i32 66, i32 67, i32 70, i32 71, i32 98, i32 99, i32 102, i32 103, i32 74, i32 75, i32 78, i32 79, i32 106, i32 107, i32 110, i32 111, i32 82, i32 83, i32 86, i32 87, i32 114, i32 115, i32 118, i32 119, i32 90, i32 91, i32 94, i32 95, i32 122, i32 123, i32 126, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vdeal_27: +; CHECK: [[REG27:r[0-9]+]] = #39 +; CHECK: vdeal(v1,v0,[[REG27]]) +define <128 x i8> @vdeal_27(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 2, i32 4, i32 6, i32 32, i32 34, i32 36, i32 38, i32 8, i32 10, i32 12, i32 14, i32 40, i32 42, i32 44, i32 46, i32 16, i32 18, i32 20, i32 22, i32 48, i32 50, i32 52, i32 54, i32 24, i32 26, i32 28, i32 30, i32 56, i32 58, i32 60, i32 62, i32 64, i32 66, i32 68, i32 70, i32 96, i32 98, i32 100, i32 102, i32 72, i32 74, i32 76, i32 78, i32 104, i32 106, i32 108, i32 110, i32 80, i32 82, i32 84, i32 86, i32 112, i32 114, i32 116, i32 118, i32 88, i32 90, i32 92, i32 94, i32 120, i32 122, i32 124, i32 126, i32 1, i32 3, i32 5, i32 7, i32 33, i32 35, i32 37, i32 39, i32 9, i32 11, i32 13, i32 15, i32 41, i32 43, i32 45, i32 47, i32 17, i32 19, i32 21, i32 23, i32 49, i32 51, i32 53, i32 55, i32 25, i32 27, i32 29, i32 31, i32 57, i32 59, i32 61, i32 63, i32 65, i32 67, i32 69, i32 71, i32 97, i32 99, i32 101, i32 103, i32 73, i32 75, i32 77, i32 79, i32 105, i32 107, i32 109, i32 111, i32 81, i32 83, i32 85, i32 87, i32 113, i32 115, i32 117, i32 119, i32 89, i32 91, i32 93, i32 95, i32 121, i32 123, i32 125, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vdeal_28: +; CHECK: [[REG28:r[0-9]+]] = #40 +; CHECK: vdeal(v1,v0,[[REG28]]) +define <128 x i8> @vdeal_28(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 48, i32 49, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 64, i32 65, i32 66, i32 67, i32 68, i32 69, i32 70, i32 71, i32 96, i32 97, i32 98, i32 99, i32 100, i32 101, i32 102, i32 103, i32 80, i32 81, i32 82, i32 83, i32 84, i32 85, i32 86, i32 87, i32 112, i32 113, i32 114, i32 115, i32 116, i32 117, i32 118, i32 119, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63, i32 72, i32 73, i32 74, i32 75, i32 76, i32 77, i32 78, i32 79, i32 104, i32 105, i32 106, i32 107, i32 108, i32 109, i32 110, i32 111, i32 88, i32 89, i32 90, i32 91, i32 92, i32 93, i32 94, i32 95, i32 120, i32 121, i32 122, i32 123, i32 124, i32 125, i32 126, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vdeal_29: +; CHECK: [[REG29:r[0-9]+]] = #41 +; CHECK: vdeal(v1,v0,[[REG29]]) +define <128 x i8> @vdeal_29(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14, i32 32, i32 40, i32 34, i32 42, i32 36, i32 44, i32 38, i32 46, i32 16, i32 24, i32 18, i32 26, i32 20, i32 28, i32 22, i32 30, i32 48, i32 56, i32 50, i32 58, i32 52, i32 60, i32 54, i32 62, i32 64, i32 72, i32 66, i32 74, i32 68, i32 76, i32 70, i32 78, i32 96, i32 104, i32 98, i32 106, i32 100, i32 108, i32 102, i32 110, i32 80, i32 88, i32 82, i32 90, i32 84, i32 92, i32 86, i32 94, i32 112, i32 120, i32 114, i32 122, i32 116, i32 124, i32 118, i32 126, i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15, i32 33, i32 41, i32 35, i32 43, i32 37, i32 45, i32 39, i32 47, i32 17, i32 25, i32 19, i32 27, i32 21, i32 29, i32 23, i32 31, i32 49, i32 57, i32 51, i32 59, i32 53, i32 61, i32 55, i32 63, i32 65, i32 73, i32 67, i32 75, i32 69, i32 77, i32 71, i32 79, i32 97, i32 105, i32 99, i32 107, i32 101, i32 109, i32 103, i32 111, i32 81, i32 89, i32 83, i32 91, i32 85, i32 93, i32 87, i32 95, i32 113, i32 121, i32 115, i32 123, i32 117, i32 125, i32 119, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vdeal_2a: +; CHECK: [[REG2a:r[0-9]+]] = #42 +; CHECK: vdeal(v1,v0,[[REG2a]]) +define <128 x i8> @vdeal_2a(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 1, i32 8, i32 9, i32 4, i32 5, i32 12, i32 13, i32 32, i32 33, i32 40, i32 41, i32 36, i32 37, i32 44, i32 45, i32 16, i32 17, i32 24, i32 25, i32 20, i32 21, i32 28, i32 29, i32 48, i32 49, i32 56, i32 57, i32 52, i32 53, i32 60, i32 61, i32 64, i32 65, i32 72, i32 73, i32 68, i32 69, i32 76, i32 77, i32 96, i32 97, i32 104, i32 105, i32 100, i32 101, i32 108, i32 109, i32 80, i32 81, i32 88, i32 89, i32 84, i32 85, i32 92, i32 93, i32 112, i32 113, i32 120, i32 121, i32 116, i32 117, i32 124, i32 125, i32 2, i32 3, i32 10, i32 11, i32 6, i32 7, i32 14, i32 15, i32 34, i32 35, i32 42, i32 43, i32 38, i32 39, i32 46, i32 47, i32 18, i32 19, i32 26, i32 27, i32 22, i32 23, i32 30, i32 31, i32 50, i32 51, i32 58, i32 59, i32 54, i32 55, i32 62, i32 63, i32 66, i32 67, i32 74, i32 75, i32 70, i32 71, i32 78, i32 79, i32 98, i32 99, i32 106, i32 107, i32 102, i32 103, i32 110, i32 111, i32 82, i32 83, i32 90, i32 91, i32 86, i32 87, i32 94, i32 95, i32 114, i32 115, i32 122, i32 123, i32 118, i32 119, i32 126, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vdeal_2b: +; CHECK: [[REG2b:r[0-9]+]] = #43 +; CHECK: vdeal(v1,v0,[[REG2b]]) +define <128 x i8> @vdeal_2b(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 2, i32 8, i32 10, i32 4, i32 6, i32 12, i32 14, i32 32, i32 34, i32 40, i32 42, i32 36, i32 38, i32 44, i32 46, i32 16, i32 18, i32 24, i32 26, i32 20, i32 22, i32 28, i32 30, i32 48, i32 50, i32 56, i32 58, i32 52, i32 54, i32 60, i32 62, i32 64, i32 66, i32 72, i32 74, i32 68, i32 70, i32 76, i32 78, i32 96, i32 98, i32 104, i32 106, i32 100, i32 102, i32 108, i32 110, i32 80, i32 82, i32 88, i32 90, i32 84, i32 86, i32 92, i32 94, i32 112, i32 114, i32 120, i32 122, i32 116, i32 118, i32 124, i32 126, i32 1, i32 3, i32 9, i32 11, i32 5, i32 7, i32 13, i32 15, i32 33, i32 35, i32 41, i32 43, i32 37, i32 39, i32 45, i32 47, i32 17, i32 19, i32 25, i32 27, i32 21, i32 23, i32 29, i32 31, i32 49, i32 51, i32 57, i32 59, i32 53, i32 55, i32 61, i32 63, i32 65, i32 67, i32 73, i32 75, i32 69, i32 71, i32 77, i32 79, i32 97, i32 99, i32 105, i32 107, i32 101, i32 103, i32 109, i32 111, i32 81, i32 83, i32 89, i32 91, i32 85, i32 87, i32 93, i32 95, i32 113, i32 115, i32 121, i32 123, i32 117, i32 119, i32 125, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vdeal_2c: +; CHECK: [[REG2c:r[0-9]+]] = #44 +; CHECK: vdeal(v1,v0,[[REG2c]]) +define <128 x i8> @vdeal_2c(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 10, i32 11, i32 32, i32 33, i32 34, i32 35, i32 40, i32 41, i32 42, i32 43, i32 16, i32 17, i32 18, i32 19, i32 24, i32 25, i32 26, i32 27, i32 48, i32 49, i32 50, i32 51, i32 56, i32 57, i32 58, i32 59, i32 64, i32 65, i32 66, i32 67, i32 72, i32 73, i32 74, i32 75, i32 96, i32 97, i32 98, i32 99, i32 104, i32 105, i32 106, i32 107, i32 80, i32 81, i32 82, i32 83, i32 88, i32 89, i32 90, i32 91, i32 112, i32 113, i32 114, i32 115, i32 120, i32 121, i32 122, i32 123, i32 4, i32 5, i32 6, i32 7, i32 12, i32 13, i32 14, i32 15, i32 36, i32 37, i32 38, i32 39, i32 44, i32 45, i32 46, i32 47, i32 20, i32 21, i32 22, i32 23, i32 28, i32 29, i32 30, i32 31, i32 52, i32 53, i32 54, i32 55, i32 60, i32 61, i32 62, i32 63, i32 68, i32 69, i32 70, i32 71, i32 76, i32 77, i32 78, i32 79, i32 100, i32 101, i32 102, i32 103, i32 108, i32 109, i32 110, i32 111, i32 84, i32 85, i32 86, i32 87, i32 92, i32 93, i32 94, i32 95, i32 116, i32 117, i32 118, i32 119, i32 124, i32 125, i32 126, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vdeal_2d: +; CHECK: [[REG2d:r[0-9]+]] = #45 +; CHECK: vdeal(v1,v0,[[REG2d]]) +define <128 x i8> @vdeal_2d(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 4, i32 2, i32 6, i32 8, i32 12, i32 10, i32 14, i32 32, i32 36, i32 34, i32 38, i32 40, i32 44, i32 42, i32 46, i32 16, i32 20, i32 18, i32 22, i32 24, i32 28, i32 26, i32 30, i32 48, i32 52, i32 50, i32 54, i32 56, i32 60, i32 58, i32 62, i32 64, i32 68, i32 66, i32 70, i32 72, i32 76, i32 74, i32 78, i32 96, i32 100, i32 98, i32 102, i32 104, i32 108, i32 106, i32 110, i32 80, i32 84, i32 82, i32 86, i32 88, i32 92, i32 90, i32 94, i32 112, i32 116, i32 114, i32 118, i32 120, i32 124, i32 122, i32 126, i32 1, i32 5, i32 3, i32 7, i32 9, i32 13, i32 11, i32 15, i32 33, i32 37, i32 35, i32 39, i32 41, i32 45, i32 43, i32 47, i32 17, i32 21, i32 19, i32 23, i32 25, i32 29, i32 27, i32 31, i32 49, i32 53, i32 51, i32 55, i32 57, i32 61, i32 59, i32 63, i32 65, i32 69, i32 67, i32 71, i32 73, i32 77, i32 75, i32 79, i32 97, i32 101, i32 99, i32 103, i32 105, i32 109, i32 107, i32 111, i32 81, i32 85, i32 83, i32 87, i32 89, i32 93, i32 91, i32 95, i32 113, i32 117, i32 115, i32 119, i32 121, i32 125, i32 123, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vdeal_2e: +; CHECK: [[REG2e:r[0-9]+]] = #46 +; CHECK: vdeal(v1,v0,[[REG2e]]) +define <128 x i8> @vdeal_2e(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 1, i32 4, i32 5, i32 8, i32 9, i32 12, i32 13, i32 32, i32 33, i32 36, i32 37, i32 40, i32 41, i32 44, i32 45, i32 16, i32 17, i32 20, i32 21, i32 24, i32 25, i32 28, i32 29, i32 48, i32 49, i32 52, i32 53, i32 56, i32 57, i32 60, i32 61, i32 64, i32 65, i32 68, i32 69, i32 72, i32 73, i32 76, i32 77, i32 96, i32 97, i32 100, i32 101, i32 104, i32 105, i32 108, i32 109, i32 80, i32 81, i32 84, i32 85, i32 88, i32 89, i32 92, i32 93, i32 112, i32 113, i32 116, i32 117, i32 120, i32 121, i32 124, i32 125, i32 2, i32 3, i32 6, i32 7, i32 10, i32 11, i32 14, i32 15, i32 34, i32 35, i32 38, i32 39, i32 42, i32 43, i32 46, i32 47, i32 18, i32 19, i32 22, i32 23, i32 26, i32 27, i32 30, i32 31, i32 50, i32 51, i32 54, i32 55, i32 58, i32 59, i32 62, i32 63, i32 66, i32 67, i32 70, i32 71, i32 74, i32 75, i32 78, i32 79, i32 98, i32 99, i32 102, i32 103, i32 106, i32 107, i32 110, i32 111, i32 82, i32 83, i32 86, i32 87, i32 90, i32 91, i32 94, i32 95, i32 114, i32 115, i32 118, i32 119, i32 122, i32 123, i32 126, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vdeal_2f: +; CHECK: [[REG2f:r[0-9]+]] = #47 +; CHECK: vdeal(v1,v0,[[REG2f]]) +define <128 x i8> @vdeal_2f(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 32, i32 34, i32 36, i32 38, i32 40, i32 42, i32 44, i32 46, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30, i32 48, i32 50, i32 52, i32 54, i32 56, i32 58, i32 60, i32 62, i32 64, i32 66, i32 68, i32 70, i32 72, i32 74, i32 76, i32 78, i32 96, i32 98, i32 100, i32 102, i32 104, i32 106, i32 108, i32 110, i32 80, i32 82, i32 84, i32 86, i32 88, i32 90, i32 92, i32 94, i32 112, i32 114, i32 116, i32 118, i32 120, i32 122, i32 124, i32 126, i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 33, i32 35, i32 37, i32 39, i32 41, i32 43, i32 45, i32 47, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31, i32 49, i32 51, i32 53, i32 55, i32 57, i32 59, i32 61, i32 63, i32 65, i32 67, i32 69, i32 71, i32 73, i32 75, i32 77, i32 79, i32 97, i32 99, i32 101, i32 103, i32 105, i32 107, i32 109, i32 111, i32 81, i32 83, i32 85, i32 87, i32 89, i32 91, i32 93, i32 95, i32 113, i32 115, i32 117, i32 119, i32 121, i32 123, i32 125, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vdeal_30: +; CHECK: [[REG30:r[0-9]+]] = #48 +; CHECK: vdeal(v1,v0,[[REG30]]) +define <128 x i8> @vdeal_30(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 64, i32 65, i32 66, i32 67, i32 68, i32 69, i32 70, i32 71, i32 72, i32 73, i32 74, i32 75, i32 76, i32 77, i32 78, i32 79, i32 96, i32 97, i32 98, i32 99, i32 100, i32 101, i32 102, i32 103, i32 104, i32 105, i32 106, i32 107, i32 108, i32 109, i32 110, i32 111, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 48, i32 49, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63, i32 80, i32 81, i32 82, i32 83, i32 84, i32 85, i32 86, i32 87, i32 88, i32 89, i32 90, i32 91, i32 92, i32 93, i32 94, i32 95, i32 112, i32 113, i32 114, i32 115, i32 116, i32 117, i32 118, i32 119, i32 120, i32 121, i32 122, i32 123, i32 124, i32 125, i32 126, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vdeal_31: +; CHECK: [[REG31:r[0-9]+]] = #49 +; CHECK: vdeal(v1,v0,[[REG31]]) +define <128 x i8> @vdeal_31(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 16, i32 2, i32 18, i32 4, i32 20, i32 6, i32 22, i32 8, i32 24, i32 10, i32 26, i32 12, i32 28, i32 14, i32 30, i32 32, i32 48, i32 34, i32 50, i32 36, i32 52, i32 38, i32 54, i32 40, i32 56, i32 42, i32 58, i32 44, i32 60, i32 46, i32 62, i32 64, i32 80, i32 66, i32 82, i32 68, i32 84, i32 70, i32 86, i32 72, i32 88, i32 74, i32 90, i32 76, i32 92, i32 78, i32 94, i32 96, i32 112, i32 98, i32 114, i32 100, i32 116, i32 102, i32 118, i32 104, i32 120, i32 106, i32 122, i32 108, i32 124, i32 110, i32 126, i32 1, i32 17, i32 3, i32 19, i32 5, i32 21, i32 7, i32 23, i32 9, i32 25, i32 11, i32 27, i32 13, i32 29, i32 15, i32 31, i32 33, i32 49, i32 35, i32 51, i32 37, i32 53, i32 39, i32 55, i32 41, i32 57, i32 43, i32 59, i32 45, i32 61, i32 47, i32 63, i32 65, i32 81, i32 67, i32 83, i32 69, i32 85, i32 71, i32 87, i32 73, i32 89, i32 75, i32 91, i32 77, i32 93, i32 79, i32 95, i32 97, i32 113, i32 99, i32 115, i32 101, i32 117, i32 103, i32 119, i32 105, i32 121, i32 107, i32 123, i32 109, i32 125, i32 111, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vdeal_32: +; CHECK: [[REG32:r[0-9]+]] = #50 +; CHECK: vdeal(v1,v0,[[REG32]]) +define <128 x i8> @vdeal_32(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 1, i32 16, i32 17, i32 4, i32 5, i32 20, i32 21, i32 8, i32 9, i32 24, i32 25, i32 12, i32 13, i32 28, i32 29, i32 32, i32 33, i32 48, i32 49, i32 36, i32 37, i32 52, i32 53, i32 40, i32 41, i32 56, i32 57, i32 44, i32 45, i32 60, i32 61, i32 64, i32 65, i32 80, i32 81, i32 68, i32 69, i32 84, i32 85, i32 72, i32 73, i32 88, i32 89, i32 76, i32 77, i32 92, i32 93, i32 96, i32 97, i32 112, i32 113, i32 100, i32 101, i32 116, i32 117, i32 104, i32 105, i32 120, i32 121, i32 108, i32 109, i32 124, i32 125, i32 2, i32 3, i32 18, i32 19, i32 6, i32 7, i32 22, i32 23, i32 10, i32 11, i32 26, i32 27, i32 14, i32 15, i32 30, i32 31, i32 34, i32 35, i32 50, i32 51, i32 38, i32 39, i32 54, i32 55, i32 42, i32 43, i32 58, i32 59, i32 46, i32 47, i32 62, i32 63, i32 66, i32 67, i32 82, i32 83, i32 70, i32 71, i32 86, i32 87, i32 74, i32 75, i32 90, i32 91, i32 78, i32 79, i32 94, i32 95, i32 98, i32 99, i32 114, i32 115, i32 102, i32 103, i32 118, i32 119, i32 106, i32 107, i32 122, i32 123, i32 110, i32 111, i32 126, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vdeal_33: +; CHECK: [[REG33:r[0-9]+]] = #51 +; CHECK: vdeal(v1,v0,[[REG33]]) +define <128 x i8> @vdeal_33(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 2, i32 16, i32 18, i32 4, i32 6, i32 20, i32 22, i32 8, i32 10, i32 24, i32 26, i32 12, i32 14, i32 28, i32 30, i32 32, i32 34, i32 48, i32 50, i32 36, i32 38, i32 52, i32 54, i32 40, i32 42, i32 56, i32 58, i32 44, i32 46, i32 60, i32 62, i32 64, i32 66, i32 80, i32 82, i32 68, i32 70, i32 84, i32 86, i32 72, i32 74, i32 88, i32 90, i32 76, i32 78, i32 92, i32 94, i32 96, i32 98, i32 112, i32 114, i32 100, i32 102, i32 116, i32 118, i32 104, i32 106, i32 120, i32 122, i32 108, i32 110, i32 124, i32 126, i32 1, i32 3, i32 17, i32 19, i32 5, i32 7, i32 21, i32 23, i32 9, i32 11, i32 25, i32 27, i32 13, i32 15, i32 29, i32 31, i32 33, i32 35, i32 49, i32 51, i32 37, i32 39, i32 53, i32 55, i32 41, i32 43, i32 57, i32 59, i32 45, i32 47, i32 61, i32 63, i32 65, i32 67, i32 81, i32 83, i32 69, i32 71, i32 85, i32 87, i32 73, i32 75, i32 89, i32 91, i32 77, i32 79, i32 93, i32 95, i32 97, i32 99, i32 113, i32 115, i32 101, i32 103, i32 117, i32 119, i32 105, i32 107, i32 121, i32 123, i32 109, i32 111, i32 125, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vdeal_34: +; CHECK: [[REG34:r[0-9]+]] = #52 +; CHECK: vdeal(v1,v0,[[REG34]]) +define <128 x i8> @vdeal_34(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 1, i32 2, i32 3, i32 16, i32 17, i32 18, i32 19, i32 8, i32 9, i32 10, i32 11, i32 24, i32 25, i32 26, i32 27, i32 32, i32 33, i32 34, i32 35, i32 48, i32 49, i32 50, i32 51, i32 40, i32 41, i32 42, i32 43, i32 56, i32 57, i32 58, i32 59, i32 64, i32 65, i32 66, i32 67, i32 80, i32 81, i32 82, i32 83, i32 72, i32 73, i32 74, i32 75, i32 88, i32 89, i32 90, i32 91, i32 96, i32 97, i32 98, i32 99, i32 112, i32 113, i32 114, i32 115, i32 104, i32 105, i32 106, i32 107, i32 120, i32 121, i32 122, i32 123, i32 4, i32 5, i32 6, i32 7, i32 20, i32 21, i32 22, i32 23, i32 12, i32 13, i32 14, i32 15, i32 28, i32 29, i32 30, i32 31, i32 36, i32 37, i32 38, i32 39, i32 52, i32 53, i32 54, i32 55, i32 44, i32 45, i32 46, i32 47, i32 60, i32 61, i32 62, i32 63, i32 68, i32 69, i32 70, i32 71, i32 84, i32 85, i32 86, i32 87, i32 76, i32 77, i32 78, i32 79, i32 92, i32 93, i32 94, i32 95, i32 100, i32 101, i32 102, i32 103, i32 116, i32 117, i32 118, i32 119, i32 108, i32 109, i32 110, i32 111, i32 124, i32 125, i32 126, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vdeal_35: +; CHECK: [[REG35:r[0-9]+]] = #53 +; CHECK: vdeal(v1,v0,[[REG35]]) +define <128 x i8> @vdeal_35(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 4, i32 2, i32 6, i32 16, i32 20, i32 18, i32 22, i32 8, i32 12, i32 10, i32 14, i32 24, i32 28, i32 26, i32 30, i32 32, i32 36, i32 34, i32 38, i32 48, i32 52, i32 50, i32 54, i32 40, i32 44, i32 42, i32 46, i32 56, i32 60, i32 58, i32 62, i32 64, i32 68, i32 66, i32 70, i32 80, i32 84, i32 82, i32 86, i32 72, i32 76, i32 74, i32 78, i32 88, i32 92, i32 90, i32 94, i32 96, i32 100, i32 98, i32 102, i32 112, i32 116, i32 114, i32 118, i32 104, i32 108, i32 106, i32 110, i32 120, i32 124, i32 122, i32 126, i32 1, i32 5, i32 3, i32 7, i32 17, i32 21, i32 19, i32 23, i32 9, i32 13, i32 11, i32 15, i32 25, i32 29, i32 27, i32 31, i32 33, i32 37, i32 35, i32 39, i32 49, i32 53, i32 51, i32 55, i32 41, i32 45, i32 43, i32 47, i32 57, i32 61, i32 59, i32 63, i32 65, i32 69, i32 67, i32 71, i32 81, i32 85, i32 83, i32 87, i32 73, i32 77, i32 75, i32 79, i32 89, i32 93, i32 91, i32 95, i32 97, i32 101, i32 99, i32 103, i32 113, i32 117, i32 115, i32 119, i32 105, i32 109, i32 107, i32 111, i32 121, i32 125, i32 123, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vdeal_36: +; CHECK: [[REG36:r[0-9]+]] = #54 +; CHECK: vdeal(v1,v0,[[REG36]]) +define <128 x i8> @vdeal_36(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 1, i32 4, i32 5, i32 16, i32 17, i32 20, i32 21, i32 8, i32 9, i32 12, i32 13, i32 24, i32 25, i32 28, i32 29, i32 32, i32 33, i32 36, i32 37, i32 48, i32 49, i32 52, i32 53, i32 40, i32 41, i32 44, i32 45, i32 56, i32 57, i32 60, i32 61, i32 64, i32 65, i32 68, i32 69, i32 80, i32 81, i32 84, i32 85, i32 72, i32 73, i32 76, i32 77, i32 88, i32 89, i32 92, i32 93, i32 96, i32 97, i32 100, i32 101, i32 112, i32 113, i32 116, i32 117, i32 104, i32 105, i32 108, i32 109, i32 120, i32 121, i32 124, i32 125, i32 2, i32 3, i32 6, i32 7, i32 18, i32 19, i32 22, i32 23, i32 10, i32 11, i32 14, i32 15, i32 26, i32 27, i32 30, i32 31, i32 34, i32 35, i32 38, i32 39, i32 50, i32 51, i32 54, i32 55, i32 42, i32 43, i32 46, i32 47, i32 58, i32 59, i32 62, i32 63, i32 66, i32 67, i32 70, i32 71, i32 82, i32 83, i32 86, i32 87, i32 74, i32 75, i32 78, i32 79, i32 90, i32 91, i32 94, i32 95, i32 98, i32 99, i32 102, i32 103, i32 114, i32 115, i32 118, i32 119, i32 106, i32 107, i32 110, i32 111, i32 122, i32 123, i32 126, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vdeal_37: +; CHECK: [[REG37:r[0-9]+]] = #55 +; CHECK: vdeal(v1,v0,[[REG37]]) +define <128 x i8> @vdeal_37(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 2, i32 4, i32 6, i32 16, i32 18, i32 20, i32 22, i32 8, i32 10, i32 12, i32 14, i32 24, i32 26, i32 28, i32 30, i32 32, i32 34, i32 36, i32 38, i32 48, i32 50, i32 52, i32 54, i32 40, i32 42, i32 44, i32 46, i32 56, i32 58, i32 60, i32 62, i32 64, i32 66, i32 68, i32 70, i32 80, i32 82, i32 84, i32 86, i32 72, i32 74, i32 76, i32 78, i32 88, i32 90, i32 92, i32 94, i32 96, i32 98, i32 100, i32 102, i32 112, i32 114, i32 116, i32 118, i32 104, i32 106, i32 108, i32 110, i32 120, i32 122, i32 124, i32 126, i32 1, i32 3, i32 5, i32 7, i32 17, i32 19, i32 21, i32 23, i32 9, i32 11, i32 13, i32 15, i32 25, i32 27, i32 29, i32 31, i32 33, i32 35, i32 37, i32 39, i32 49, i32 51, i32 53, i32 55, i32 41, i32 43, i32 45, i32 47, i32 57, i32 59, i32 61, i32 63, i32 65, i32 67, i32 69, i32 71, i32 81, i32 83, i32 85, i32 87, i32 73, i32 75, i32 77, i32 79, i32 89, i32 91, i32 93, i32 95, i32 97, i32 99, i32 101, i32 103, i32 113, i32 115, i32 117, i32 119, i32 105, i32 107, i32 109, i32 111, i32 121, i32 123, i32 125, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vdeal_38: +; CHECK: [[REG38:r[0-9]+]] = #56 +; CHECK: vdeal(v1,v0,[[REG38]]) +define <128 x i8> @vdeal_38(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 48, i32 49, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 64, i32 65, i32 66, i32 67, i32 68, i32 69, i32 70, i32 71, i32 80, i32 81, i32 82, i32 83, i32 84, i32 85, i32 86, i32 87, i32 96, i32 97, i32 98, i32 99, i32 100, i32 101, i32 102, i32 103, i32 112, i32 113, i32 114, i32 115, i32 116, i32 117, i32 118, i32 119, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63, i32 72, i32 73, i32 74, i32 75, i32 76, i32 77, i32 78, i32 79, i32 88, i32 89, i32 90, i32 91, i32 92, i32 93, i32 94, i32 95, i32 104, i32 105, i32 106, i32 107, i32 108, i32 109, i32 110, i32 111, i32 120, i32 121, i32 122, i32 123, i32 124, i32 125, i32 126, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vdeal_39: +; CHECK: [[REG39:r[0-9]+]] = #57 +; CHECK: vdeal(v1,v0,[[REG39]]) +define <128 x i8> @vdeal_39(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14, i32 16, i32 24, i32 18, i32 26, i32 20, i32 28, i32 22, i32 30, i32 32, i32 40, i32 34, i32 42, i32 36, i32 44, i32 38, i32 46, i32 48, i32 56, i32 50, i32 58, i32 52, i32 60, i32 54, i32 62, i32 64, i32 72, i32 66, i32 74, i32 68, i32 76, i32 70, i32 78, i32 80, i32 88, i32 82, i32 90, i32 84, i32 92, i32 86, i32 94, i32 96, i32 104, i32 98, i32 106, i32 100, i32 108, i32 102, i32 110, i32 112, i32 120, i32 114, i32 122, i32 116, i32 124, i32 118, i32 126, i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15, i32 17, i32 25, i32 19, i32 27, i32 21, i32 29, i32 23, i32 31, i32 33, i32 41, i32 35, i32 43, i32 37, i32 45, i32 39, i32 47, i32 49, i32 57, i32 51, i32 59, i32 53, i32 61, i32 55, i32 63, i32 65, i32 73, i32 67, i32 75, i32 69, i32 77, i32 71, i32 79, i32 81, i32 89, i32 83, i32 91, i32 85, i32 93, i32 87, i32 95, i32 97, i32 105, i32 99, i32 107, i32 101, i32 109, i32 103, i32 111, i32 113, i32 121, i32 115, i32 123, i32 117, i32 125, i32 119, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vdeal_3a: +; CHECK: [[REG3a:r[0-9]+]] = #58 +; CHECK: vdeal(v1,v0,[[REG3a]]) +define <128 x i8> @vdeal_3a(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 1, i32 8, i32 9, i32 4, i32 5, i32 12, i32 13, i32 16, i32 17, i32 24, i32 25, i32 20, i32 21, i32 28, i32 29, i32 32, i32 33, i32 40, i32 41, i32 36, i32 37, i32 44, i32 45, i32 48, i32 49, i32 56, i32 57, i32 52, i32 53, i32 60, i32 61, i32 64, i32 65, i32 72, i32 73, i32 68, i32 69, i32 76, i32 77, i32 80, i32 81, i32 88, i32 89, i32 84, i32 85, i32 92, i32 93, i32 96, i32 97, i32 104, i32 105, i32 100, i32 101, i32 108, i32 109, i32 112, i32 113, i32 120, i32 121, i32 116, i32 117, i32 124, i32 125, i32 2, i32 3, i32 10, i32 11, i32 6, i32 7, i32 14, i32 15, i32 18, i32 19, i32 26, i32 27, i32 22, i32 23, i32 30, i32 31, i32 34, i32 35, i32 42, i32 43, i32 38, i32 39, i32 46, i32 47, i32 50, i32 51, i32 58, i32 59, i32 54, i32 55, i32 62, i32 63, i32 66, i32 67, i32 74, i32 75, i32 70, i32 71, i32 78, i32 79, i32 82, i32 83, i32 90, i32 91, i32 86, i32 87, i32 94, i32 95, i32 98, i32 99, i32 106, i32 107, i32 102, i32 103, i32 110, i32 111, i32 114, i32 115, i32 122, i32 123, i32 118, i32 119, i32 126, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vdeal_3b: +; CHECK: [[REG3b:r[0-9]+]] = #59 +; CHECK: vdeal(v1,v0,[[REG3b]]) +define <128 x i8> @vdeal_3b(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 2, i32 8, i32 10, i32 4, i32 6, i32 12, i32 14, i32 16, i32 18, i32 24, i32 26, i32 20, i32 22, i32 28, i32 30, i32 32, i32 34, i32 40, i32 42, i32 36, i32 38, i32 44, i32 46, i32 48, i32 50, i32 56, i32 58, i32 52, i32 54, i32 60, i32 62, i32 64, i32 66, i32 72, i32 74, i32 68, i32 70, i32 76, i32 78, i32 80, i32 82, i32 88, i32 90, i32 84, i32 86, i32 92, i32 94, i32 96, i32 98, i32 104, i32 106, i32 100, i32 102, i32 108, i32 110, i32 112, i32 114, i32 120, i32 122, i32 116, i32 118, i32 124, i32 126, i32 1, i32 3, i32 9, i32 11, i32 5, i32 7, i32 13, i32 15, i32 17, i32 19, i32 25, i32 27, i32 21, i32 23, i32 29, i32 31, i32 33, i32 35, i32 41, i32 43, i32 37, i32 39, i32 45, i32 47, i32 49, i32 51, i32 57, i32 59, i32 53, i32 55, i32 61, i32 63, i32 65, i32 67, i32 73, i32 75, i32 69, i32 71, i32 77, i32 79, i32 81, i32 83, i32 89, i32 91, i32 85, i32 87, i32 93, i32 95, i32 97, i32 99, i32 105, i32 107, i32 101, i32 103, i32 109, i32 111, i32 113, i32 115, i32 121, i32 123, i32 117, i32 119, i32 125, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vdeal_3c: +; CHECK: [[REG3c:r[0-9]+]] = #60 +; CHECK: vdeal(v1,v0,[[REG3c]]) +define <128 x i8> @vdeal_3c(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 10, i32 11, i32 16, i32 17, i32 18, i32 19, i32 24, i32 25, i32 26, i32 27, i32 32, i32 33, i32 34, i32 35, i32 40, i32 41, i32 42, i32 43, i32 48, i32 49, i32 50, i32 51, i32 56, i32 57, i32 58, i32 59, i32 64, i32 65, i32 66, i32 67, i32 72, i32 73, i32 74, i32 75, i32 80, i32 81, i32 82, i32 83, i32 88, i32 89, i32 90, i32 91, i32 96, i32 97, i32 98, i32 99, i32 104, i32 105, i32 106, i32 107, i32 112, i32 113, i32 114, i32 115, i32 120, i32 121, i32 122, i32 123, i32 4, i32 5, i32 6, i32 7, i32 12, i32 13, i32 14, i32 15, i32 20, i32 21, i32 22, i32 23, i32 28, i32 29, i32 30, i32 31, i32 36, i32 37, i32 38, i32 39, i32 44, i32 45, i32 46, i32 47, i32 52, i32 53, i32 54, i32 55, i32 60, i32 61, i32 62, i32 63, i32 68, i32 69, i32 70, i32 71, i32 76, i32 77, i32 78, i32 79, i32 84, i32 85, i32 86, i32 87, i32 92, i32 93, i32 94, i32 95, i32 100, i32 101, i32 102, i32 103, i32 108, i32 109, i32 110, i32 111, i32 116, i32 117, i32 118, i32 119, i32 124, i32 125, i32 126, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vdeal_3d: +; CHECK: [[REG3d:r[0-9]+]] = #61 +; CHECK: vdeal(v1,v0,[[REG3d]]) +define <128 x i8> @vdeal_3d(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 4, i32 2, i32 6, i32 8, i32 12, i32 10, i32 14, i32 16, i32 20, i32 18, i32 22, i32 24, i32 28, i32 26, i32 30, i32 32, i32 36, i32 34, i32 38, i32 40, i32 44, i32 42, i32 46, i32 48, i32 52, i32 50, i32 54, i32 56, i32 60, i32 58, i32 62, i32 64, i32 68, i32 66, i32 70, i32 72, i32 76, i32 74, i32 78, i32 80, i32 84, i32 82, i32 86, i32 88, i32 92, i32 90, i32 94, i32 96, i32 100, i32 98, i32 102, i32 104, i32 108, i32 106, i32 110, i32 112, i32 116, i32 114, i32 118, i32 120, i32 124, i32 122, i32 126, i32 1, i32 5, i32 3, i32 7, i32 9, i32 13, i32 11, i32 15, i32 17, i32 21, i32 19, i32 23, i32 25, i32 29, i32 27, i32 31, i32 33, i32 37, i32 35, i32 39, i32 41, i32 45, i32 43, i32 47, i32 49, i32 53, i32 51, i32 55, i32 57, i32 61, i32 59, i32 63, i32 65, i32 69, i32 67, i32 71, i32 73, i32 77, i32 75, i32 79, i32 81, i32 85, i32 83, i32 87, i32 89, i32 93, i32 91, i32 95, i32 97, i32 101, i32 99, i32 103, i32 105, i32 109, i32 107, i32 111, i32 113, i32 117, i32 115, i32 119, i32 121, i32 125, i32 123, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vdeal_3e: +; CHECK: [[REG3e:r[0-9]+]] = #62 +; CHECK: vdeal(v1,v0,[[REG3e]]) +define <128 x i8> @vdeal_3e(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 1, i32 4, i32 5, i32 8, i32 9, i32 12, i32 13, i32 16, i32 17, i32 20, i32 21, i32 24, i32 25, i32 28, i32 29, i32 32, i32 33, i32 36, i32 37, i32 40, i32 41, i32 44, i32 45, i32 48, i32 49, i32 52, i32 53, i32 56, i32 57, i32 60, i32 61, i32 64, i32 65, i32 68, i32 69, i32 72, i32 73, i32 76, i32 77, i32 80, i32 81, i32 84, i32 85, i32 88, i32 89, i32 92, i32 93, i32 96, i32 97, i32 100, i32 101, i32 104, i32 105, i32 108, i32 109, i32 112, i32 113, i32 116, i32 117, i32 120, i32 121, i32 124, i32 125, i32 2, i32 3, i32 6, i32 7, i32 10, i32 11, i32 14, i32 15, i32 18, i32 19, i32 22, i32 23, i32 26, i32 27, i32 30, i32 31, i32 34, i32 35, i32 38, i32 39, i32 42, i32 43, i32 46, i32 47, i32 50, i32 51, i32 54, i32 55, i32 58, i32 59, i32 62, i32 63, i32 66, i32 67, i32 70, i32 71, i32 74, i32 75, i32 78, i32 79, i32 82, i32 83, i32 86, i32 87, i32 90, i32 91, i32 94, i32 95, i32 98, i32 99, i32 102, i32 103, i32 106, i32 107, i32 110, i32 111, i32 114, i32 115, i32 118, i32 119, i32 122, i32 123, i32 126, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vdeal_3f: +; CHECK: [[REG3f:r[0-9]+]] = #63 +; CHECK: vdeal(v1,v0,[[REG3f]]) +define <128 x i8> @vdeal_3f(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30, i32 32, i32 34, i32 36, i32 38, i32 40, i32 42, i32 44, i32 46, i32 48, i32 50, i32 52, i32 54, i32 56, i32 58, i32 60, i32 62, i32 64, i32 66, i32 68, i32 70, i32 72, i32 74, i32 76, i32 78, i32 80, i32 82, i32 84, i32 86, i32 88, i32 90, i32 92, i32 94, i32 96, i32 98, i32 100, i32 102, i32 104, i32 106, i32 108, i32 110, i32 112, i32 114, i32 116, i32 118, i32 120, i32 122, i32 124, i32 126, i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31, i32 33, i32 35, i32 37, i32 39, i32 41, i32 43, i32 45, i32 47, i32 49, i32 51, i32 53, i32 55, i32 57, i32 59, i32 61, i32 63, i32 65, i32 67, i32 69, i32 71, i32 73, i32 75, i32 77, i32 79, i32 81, i32 83, i32 85, i32 87, i32 89, i32 91, i32 93, i32 95, i32 97, i32 99, i32 101, i32 103, i32 105, i32 107, i32 109, i32 111, i32 113, i32 115, i32 117, i32 119, i32 121, i32 123, i32 125, i32 127> + ret <128 x i8> %p +} + +attributes #0 = { nounwind readnone "target-cpu"="hexagonv60" "target-features"="+hvx,+hvx-length64b" } diff --git a/test/CodeGen/Hexagon/autohvx/delta-128b.ll b/test/CodeGen/Hexagon/autohvx/delta-128b.ll new file mode 100644 index 00000000000..fe221edeb41 --- /dev/null +++ b/test/CodeGen/Hexagon/autohvx/delta-128b.ll @@ -0,0 +1,115 @@ +; RUN: llc -march=hexagon < %s | FileCheck %s + +; CHECK-LABEL: test_0000 +; CHECK: vdelta +define <128 x i8> @test_0000(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; CHECK-LABEL: test_0001 +; CHECK: vdelta +define <128 x i8> @test_0001(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; CHECK-LABEL: test_0002 +; CHECK: vdelta +define <128 x i8> @test_0002(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; CHECK-LABEL: test_0003 +; CHECK: vdelta +define <128 x i8> @test_0003(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; CHECK-LABEL: test_0004 +; CHECK: vdelta +define <128 x i8> @test_0004(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; CHECK-LABEL: test_0005 +; CHECK: vdelta +define <128 x i8> @test_0005(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; CHECK-LABEL: test_0006 +; CHECK: vdelta +define <128 x i8> @test_0006(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; CHECK-LABEL: test_0007 +; CHECK: vdelta +define <128 x i8> @test_0007(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; CHECK-LABEL: test_0008 +; CHECK: vdelta +define <128 x i8> @test_0008(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; CHECK-LABEL: test_0009 +; CHECK: vdelta +define <128 x i8> @test_0009(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; CHECK-LABEL: test_000a +; CHECK: vdelta +define <128 x i8> @test_000a(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; CHECK-LABEL: test_000b +; CHECK: vdelta +define <128 x i8> @test_000b(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; CHECK-LABEL: test_000c +; CHECK: vdelta +define <128 x i8> @test_000c(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; CHECK-LABEL: test_000d +; CHECK: vdelta +define <128 x i8> @test_000d(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; CHECK-LABEL: test_000e +; CHECK: vdelta +define <128 x i8> @test_000e(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; CHECK-LABEL: test_000f +; CHECK: vdelta +define <128 x i8> @test_000f(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +attributes #0 = { nounwind readnone "target-cpu"="hexagonv60" "target-features"="+hvx,+hvx-length128b" } diff --git a/test/CodeGen/Hexagon/autohvx/delta-64b.ll b/test/CodeGen/Hexagon/autohvx/delta-64b.ll new file mode 100644 index 00000000000..c4961f549e5 --- /dev/null +++ b/test/CodeGen/Hexagon/autohvx/delta-64b.ll @@ -0,0 +1,115 @@ +; RUN: llc -march=hexagon < %s | FileCheck %s + +; CHECK-LABEL: test_0000 +; CHECK: vdelta +define <64 x i8> @test_0000(<64 x i8> %v0) #0 { + %p = shufflevector <64 x i8> %v0, <64 x i8> undef, <64 x i32> + ret <64 x i8> %p +} + +; CHECK-LABEL: test_0001 +; CHECK: vdelta +define <64 x i8> @test_0001(<64 x i8> %v0) #0 { + %p = shufflevector <64 x i8> %v0, <64 x i8> undef, <64 x i32> + ret <64 x i8> %p +} + +; CHECK-LABEL: test_0002 +; CHECK: vdelta +define <64 x i8> @test_0002(<64 x i8> %v0) #0 { + %p = shufflevector <64 x i8> %v0, <64 x i8> undef, <64 x i32> + ret <64 x i8> %p +} + +; CHECK-LABEL: test_0003 +; CHECK: vdelta +define <64 x i8> @test_0003(<64 x i8> %v0) #0 { + %p = shufflevector <64 x i8> %v0, <64 x i8> undef, <64 x i32> + ret <64 x i8> %p +} + +; CHECK-LABEL: test_0004 +; CHECK: vdelta +define <64 x i8> @test_0004(<64 x i8> %v0) #0 { + %p = shufflevector <64 x i8> %v0, <64 x i8> undef, <64 x i32> + ret <64 x i8> %p +} + +; CHECK-LABEL: test_0005 +; CHECK: vdelta +define <64 x i8> @test_0005(<64 x i8> %v0) #0 { + %p = shufflevector <64 x i8> %v0, <64 x i8> undef, <64 x i32> + ret <64 x i8> %p +} + +; CHECK-LABEL: test_0006 +; CHECK: vdelta +define <64 x i8> @test_0006(<64 x i8> %v0) #0 { + %p = shufflevector <64 x i8> %v0, <64 x i8> undef, <64 x i32> + ret <64 x i8> %p +} + +; CHECK-LABEL: test_0007 +; CHECK: vdelta +define <64 x i8> @test_0007(<64 x i8> %v0) #0 { + %p = shufflevector <64 x i8> %v0, <64 x i8> undef, <64 x i32> + ret <64 x i8> %p +} + +; CHECK-LABEL: test_0008 +; CHECK: vdelta +define <64 x i8> @test_0008(<64 x i8> %v0) #0 { + %p = shufflevector <64 x i8> %v0, <64 x i8> undef, <64 x i32> + ret <64 x i8> %p +} + +; CHECK-LABEL: test_0009 +; CHECK: vdelta +define <64 x i8> @test_0009(<64 x i8> %v0) #0 { + %p = shufflevector <64 x i8> %v0, <64 x i8> undef, <64 x i32> + ret <64 x i8> %p +} + +; CHECK-LABEL: test_000a +; CHECK: vdelta +define <64 x i8> @test_000a(<64 x i8> %v0) #0 { + %p = shufflevector <64 x i8> %v0, <64 x i8> undef, <64 x i32> + ret <64 x i8> %p +} + +; CHECK-LABEL: test_000b +; CHECK: vdelta +define <64 x i8> @test_000b(<64 x i8> %v0) #0 { + %p = shufflevector <64 x i8> %v0, <64 x i8> undef, <64 x i32> + ret <64 x i8> %p +} + +; CHECK-LABEL: test_000c +; CHECK: vdelta +define <64 x i8> @test_000c(<64 x i8> %v0) #0 { + %p = shufflevector <64 x i8> %v0, <64 x i8> undef, <64 x i32> + ret <64 x i8> %p +} + +; CHECK-LABEL: test_000d +; CHECK: vdelta +define <64 x i8> @test_000d(<64 x i8> %v0) #0 { + %p = shufflevector <64 x i8> %v0, <64 x i8> undef, <64 x i32> + ret <64 x i8> %p +} + +; CHECK-LABEL: test_000e +; CHECK: vdelta +define <64 x i8> @test_000e(<64 x i8> %v0) #0 { + %p = shufflevector <64 x i8> %v0, <64 x i8> undef, <64 x i32> + ret <64 x i8> %p +} + +; CHECK-LABEL: test_000f +; CHECK: vdelta +define <64 x i8> @test_000f(<64 x i8> %v0) #0 { + %p = shufflevector <64 x i8> %v0, <64 x i8> undef, <64 x i32> + ret <64 x i8> %p +} + +attributes #0 = { nounwind readnone "target-cpu"="hexagonv60" "target-features"="+hvx,+hvx-length64b" } diff --git a/test/CodeGen/Hexagon/autohvx/delta2-64b.ll b/test/CodeGen/Hexagon/autohvx/delta2-64b.ll new file mode 100644 index 00000000000..59f56446e34 --- /dev/null +++ b/test/CodeGen/Hexagon/autohvx/delta2-64b.ll @@ -0,0 +1,195 @@ +; RUN: llc -march=hexagon < %s | FileCheck %s + +; CHECK-LABEL: test_0000 +; CHECK-DAG: vdelta +; CHECK-DAG: vdelta +; CHECK-DAG: vdelta +; CHECK-DAG: vdelta +; CHECK-DAG: vmux +; CHECK-DAG: vmux +define <128 x i8> @test_0000(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; CHECK-LABEL: test_0001 +; CHECK-DAG: vdelta +; CHECK-DAG: vdelta +; CHECK-DAG: vdelta +; CHECK-DAG: vdelta +; CHECK-DAG: vmux +; CHECK-DAG: vmux +define <128 x i8> @test_0001(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; CHECK-LABEL: test_0002 +; CHECK-DAG: vdelta +; CHECK-DAG: vdelta +; CHECK-DAG: vdelta +; CHECK-DAG: vdelta +; CHECK-DAG: vmux +; CHECK-DAG: vmux +define <128 x i8> @test_0002(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; CHECK-LABEL: test_0003 +; CHECK-DAG: vdelta +; CHECK-DAG: vdelta +; CHECK-DAG: vdelta +; CHECK-DAG: vdelta +; CHECK-DAG: vmux +; CHECK-DAG: vmux +define <128 x i8> @test_0003(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; CHECK-LABEL: test_0004 +; CHECK-DAG: vdelta +; CHECK-DAG: vdelta +; CHECK-DAG: vdelta +; CHECK-DAG: vdelta +; CHECK-DAG: vmux +; CHECK-DAG: vmux +define <128 x i8> @test_0004(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; CHECK-LABEL: test_0005 +; CHECK-DAG: vdelta +; CHECK-DAG: vdelta +; CHECK-DAG: vdelta +; CHECK-DAG: vdelta +; CHECK-DAG: vmux +; CHECK-DAG: vmux +define <128 x i8> @test_0005(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; CHECK-LABEL: test_0006 +; CHECK-DAG: vdelta +; CHECK-DAG: vdelta +; CHECK-DAG: vdelta +; CHECK-DAG: vdelta +; CHECK-DAG: vmux +; CHECK-DAG: vmux +define <128 x i8> @test_0006(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; CHECK-LABEL: test_0007 +; CHECK-DAG: vdelta +; CHECK-DAG: vdelta +; CHECK-DAG: vdelta +; CHECK-DAG: vdelta +; CHECK-DAG: vmux +; CHECK-DAG: vmux +define <128 x i8> @test_0007(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; CHECK-LABEL: test_0008 +; CHECK-DAG: vdelta +; CHECK-DAG: vdelta +; CHECK-DAG: vdelta +; CHECK-DAG: vdelta +; CHECK-DAG: vmux +; CHECK-DAG: vmux +define <128 x i8> @test_0008(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; CHECK-LABEL: test_0009 +; CHECK-DAG: vdelta +; CHECK-DAG: vdelta +; CHECK-DAG: vdelta +; CHECK-DAG: vdelta +; CHECK-DAG: vmux +; CHECK-DAG: vmux +define <128 x i8> @test_0009(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; CHECK-LABEL: test_000a +; CHECK-DAG: vdelta +; CHECK-DAG: vdelta +; CHECK-DAG: vdelta +; CHECK-DAG: vdelta +; CHECK-DAG: vmux +; CHECK-DAG: vmux +define <128 x i8> @test_000a(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; CHECK-LABEL: test_000b +; CHECK-DAG: vdelta +; CHECK-DAG: vdelta +; CHECK-DAG: vdelta +; CHECK-DAG: vdelta +; CHECK-DAG: vmux +; CHECK-DAG: vmux +define <128 x i8> @test_000b(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; CHECK-LABEL: test_000c +; CHECK-DAG: vdelta +; CHECK-DAG: vdelta +; CHECK-DAG: vdelta +; CHECK-DAG: vdelta +; CHECK-DAG: vmux +; CHECK-DAG: vmux +define <128 x i8> @test_000c(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; CHECK-LABEL: test_000d +; CHECK-DAG: vdelta +; CHECK-DAG: vdelta +; CHECK-DAG: vdelta +; CHECK-DAG: vdelta +; CHECK-DAG: vmux +; CHECK-DAG: vmux +define <128 x i8> @test_000d(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; CHECK-LABEL: test_000e +; CHECK-DAG: vdelta +; CHECK-DAG: vdelta +; CHECK-DAG: vdelta +; CHECK-DAG: vdelta +; CHECK-DAG: vmux +; CHECK-DAG: vmux +define <128 x i8> @test_000e(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; CHECK-LABEL: test_000f +; CHECK-DAG: vdelta +; CHECK-DAG: vdelta +; CHECK-DAG: vdelta +; CHECK-DAG: vdelta +; CHECK-DAG: vmux +; CHECK-DAG: vmux +define <128 x i8> @test_000f(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +attributes #0 = { nounwind readnone "target-cpu"="hexagonv60" "target-features"="+hvx,+hvx-length64b" } diff --git a/test/CodeGen/Hexagon/autohvx/extract-element.ll b/test/CodeGen/Hexagon/autohvx/extract-element.ll new file mode 100644 index 00000000000..10d8822a460 --- /dev/null +++ b/test/CodeGen/Hexagon/autohvx/extract-element.ll @@ -0,0 +1,73 @@ +; RUN: llc -march=hexagon < %s | FileCheck %s +; Check that extract-element is handled. + +; CHECK-LABEL: ext_00: +; CHECK: r[[R000:[0-9]+]] = and(r0,#3) +; CHECK: r[[R001:[0-9]+]] = vextract(v0,r0) +; CHECK-DAG: r[[R002:[0-9]+]] = asl(r[[R000]],#3) +; CHECK-DAG: r[[R003:[0-9]+]] = #8 +; CHECK: r0 = extractu(r[[R001]],r[[R003]]:[[R002]]) +define i8 @ext_00(<64 x i8> %a0, i32 %a1) #0 { +b2: + %v3 = extractelement <64 x i8> %a0, i32 %a1 + ret i8 %v3 +} + +; CHECK-LABEL: ext_10: +; CHECK: r[[R100:[0-9]+]] = and(r0,#3) +; CHECK: r[[R101:[0-9]+]] = vextract(v0,r0) +; CHECK-DAG: r[[R102:[0-9]+]] = asl(r[[R100]],#3) +; CHECK-DAG: r[[R103:[0-9]+]] = #8 +; CHECK: r0 = extractu(r[[R101]],r[[R103]]:[[R102]]) +define i8 @ext_10(<128 x i8> %a0, i32 %a1) #1 { +b2: + %v3 = extractelement <128 x i8> %a0, i32 %a1 + ret i8 %v3 +} + +; CHECK-LABEL: ext_01: +; CHECK-DAG: r[[R010:[0-9]+]] = asl(r0,#1) +; CHECK-DAG: r[[R011:[0-9]+]] = and(r0,#1) +; CHECK-DAG: r[[R012:[0-9]+]] = #16 +; CHECK: r[[R013:[0-9]+]] = asl(r[[R011]],#4) +; CHECK: r[[R014:[0-9]+]] = vextract(v0,r[[R010]]) +; CHECK: r0 = extractu(r[[R014]],r[[R012]]:[[R013]]) +define i16 @ext_01(<32 x i16> %a0, i32 %a1) #0 { +b2: + %v3 = extractelement <32 x i16> %a0, i32 %a1 + ret i16 %v3 +} + +; CHECK-LABEL: ext_11: +; CHECK-DAG: r[[R110:[0-9]+]] = asl(r0,#1) +; CHECK-DAG: r[[R111:[0-9]+]] = and(r0,#1) +; CHECK-DAG: r[[R112:[0-9]+]] = #16 +; CHECK: r[[R113:[0-9]+]] = asl(r[[R111]],#4) +; CHECK: r[[R114:[0-9]+]] = vextract(v0,r[[R110]]) +; CHECK: r0 = extractu(r[[R114]],r[[R112]]:[[R113]]) +define i16 @ext_11(<64 x i16> %a0, i32 %a1) #1 { +b2: + %v3 = extractelement <64 x i16> %a0, i32 %a1 + ret i16 %v3 +} + +; CHECK-LABEL: ext_02: +; CHECK: [[R020:r[0-9]+]] = asl(r0,#2) +; CHECK: r0 = vextract(v0,[[R020]]) +define i32 @ext_02(<16 x i32> %a0, i32 %a1) #0 { +b2: + %v3 = extractelement <16 x i32> %a0, i32 %a1 + ret i32 %v3 +} + +; CHECK-LABEL: ext_12: +; CHECK: [[R120:r[0-9]+]] = asl(r0,#2) +; CHECK: r0 = vextract(v0,[[R120]]) +define i32 @ext_12(<32 x i32> %a0, i32 %a1) #1 { +b2: + %v3 = extractelement <32 x i32> %a0, i32 %a1 + ret i32 %v3 +} + +attributes #0 = { nounwind readnone "target-cpu"="hexagonv60" "target-features"="+hvx,+hvx-length64b" } +attributes #1 = { nounwind readnone "target-cpu"="hexagonv60" "target-features"="+hvx,+hvx-length128b" } diff --git a/test/CodeGen/Hexagon/autohvx/reg-sequence.ll b/test/CodeGen/Hexagon/autohvx/reg-sequence.ll new file mode 100644 index 00000000000..9ef7e41e766 --- /dev/null +++ b/test/CodeGen/Hexagon/autohvx/reg-sequence.ll @@ -0,0 +1,157 @@ +; RUN: llc -march=hexagon < %s | FileCheck %s + +; This testcase is to check that we use REG_SEQUENCE for reordering whole +; vectors. +; Note: some of the vcombines generated are unnecessary. If the codegen +; improves to eliminate them, this testcase will need to be updated. + +; CHECK-LABEL: test_00: +; CHECK: v1 = v0 +; Result: v1:0 = vcombine(v0,v0) +define <128 x i8> @test_00(<128 x i8> %a0, <128 x i8> %a1) #0 { +b2: + %v3 = shufflevector <128 x i8> %a0, <128 x i8> %a1, <128 x i32> + ret <128 x i8> %v3 +} + +; CHECK-LABEL: test_01: +; CHECK-NOT: = +; Result: v1:0 = vcombine(v1,v0) +define <128 x i8> @test_01(<128 x i8> %a0, <128 x i8> %a1) #0 { +b2: + %v3 = shufflevector <128 x i8> %a0, <128 x i8> %a1, <128 x i32> + ret <128 x i8> %v3 +} + +; CHECK-LABEL: test_02: +; CHECK: v1 = v2 +; Result: v1:0 = vcombine(v2,v0) +define <128 x i8> @test_02(<128 x i8> %a0, <128 x i8> %a1) #0 { +b2: + %v3 = shufflevector <128 x i8> %a0, <128 x i8> %a1, <128 x i32> + ret <128 x i8> %v3 +} + +; CHECK-LABEL: test_03: +; CHECK: v1 = v3 +; Result: v1:0 = vcombine(v3,v0) +define <128 x i8> @test_03(<128 x i8> %a0, <128 x i8> %a1) #0 { +b2: + %v3 = shufflevector <128 x i8> %a0, <128 x i8> %a1, <128 x i32> + ret <128 x i8> %v3 +} + +; CHECK-LABEL: test_10: +; CHECK: vcombine(v0,v1) +; Result: v1:0 = vcombine(v0,v1) +define <128 x i8> @test_10(<128 x i8> %a0, <128 x i8> %a1) #0 { +b2: + %v3 = shufflevector <128 x i8> %a0, <128 x i8> %a1, <128 x i32> + ret <128 x i8> %v3 +} + +; CHECK-LABEL: test_11: +; CHECK: v0 = v1 +; Result: v1:0 = vcombine(v1,v1) +define <128 x i8> @test_11(<128 x i8> %a0, <128 x i8> %a1) #0 { +b2: + %v3 = shufflevector <128 x i8> %a0, <128 x i8> %a1, <128 x i32> + ret <128 x i8> %v3 +} + +; CHECK-LABEL: test_12: +; CHECK: vcombine(v2,v1) +; Result: v1:0 = vcombine(v2,v1) +define <128 x i8> @test_12(<128 x i8> %a0, <128 x i8> %a1) #0 { +b2: + %v3 = shufflevector <128 x i8> %a0, <128 x i8> %a1, <128 x i32> + ret <128 x i8> %v3 +} + +; CHECK-LABEL: test_13: +; CHECK: v2 = v1 +; CHECK: vcombine(v3,v2) +; Result: v1:0 = vcombine(v3,v1) +define <128 x i8> @test_13(<128 x i8> %a0, <128 x i8> %a1) #0 { +b2: + %v3 = shufflevector <128 x i8> %a0, <128 x i8> %a1, <128 x i32> + ret <128 x i8> %v3 +} + +; CHECK-LABEL: test_20: +; CHECK: v3 = v0 +; CHECK: vcombine(v3,v2) +; Result: v1:0 = vcombine(v0,v2) +define <128 x i8> @test_20(<128 x i8> %a0, <128 x i8> %a1) #0 { +b2: + %v3 = shufflevector <128 x i8> %a0, <128 x i8> %a1, <128 x i32> + ret <128 x i8> %v3 +} + +; CHECK-LABEL: test_21: +; CHECK: v3 = v1 +; CHECK: vcombine(v3,v2) +; Result: v1:0 = vcombine(v1,v2) +define <128 x i8> @test_21(<128 x i8> %a0, <128 x i8> %a1) #0 { +b2: + %v3 = shufflevector <128 x i8> %a0, <128 x i8> %a1, <128 x i32> + ret <128 x i8> %v3 +} + +; CHECK-LABEL: test_22: +; CHECK: v3 = v2 +; CHECK: vcombine(v3,v2) +; Result: v1:0 = vcombine(v2,v2) +define <128 x i8> @test_22(<128 x i8> %a0, <128 x i8> %a1) #0 { +b2: + %v3 = shufflevector <128 x i8> %a0, <128 x i8> %a1, <128 x i32> + ret <128 x i8> %v3 +} + +; CHECK-LABEL: test_23: +; CHECK: vcombine(v3,v2) +; Result: v1:0 = vcombine(v3,v2) +define <128 x i8> @test_23(<128 x i8> %a0, <128 x i8> %a1) #0 { +b2: + %v3 = shufflevector <128 x i8> %a0, <128 x i8> %a1, <128 x i32> + ret <128 x i8> %v3 +} + +; CHECK-LABEL: test_30: +; CHECK: vcombine(v0,v3) +; Result: v1:0 = vcombine(v0,v3) +define <128 x i8> @test_30(<128 x i8> %a0, <128 x i8> %a1) #0 { +b2: + %v3 = shufflevector <128 x i8> %a0, <128 x i8> %a1, <128 x i32> + ret <128 x i8> %v3 +} + +; CHECK-LABEL: test_31: +; CHECK: v0 = v3 +; Result: v1:0 = vcombine(v1,v3) +define <128 x i8> @test_31(<128 x i8> %a0, <128 x i8> %a1) #0 { +b2: + %v3 = shufflevector <128 x i8> %a0, <128 x i8> %a1, <128 x i32> + ret <128 x i8> %v3 +} + +; CHECK-LABEL: test_32: +; CHECK: vcombine(v2,v3) +; Result: v1:0 = vcombine(v2,v3) +define <128 x i8> @test_32(<128 x i8> %a0, <128 x i8> %a1) #0 { +b2: + %v3 = shufflevector <128 x i8> %a0, <128 x i8> %a1, <128 x i32> + ret <128 x i8> %v3 +} + +; CHECK-LABEL: test_33: +; CHECK: v2 = v3 +; CHECK: vcombine(v3,v2) +; Result: v1:0 = vcombine(v3,v3) +define <128 x i8> @test_33(<128 x i8> %a0, <128 x i8> %a1) #0 { +b2: + %v3 = shufflevector <128 x i8> %a0, <128 x i8> %a1, <128 x i32> + ret <128 x i8> %v3 +} + +attributes #0 = { nounwind readnone "target-cpu"="hexagonv60" "target-features"="+hvx,+hvx-length64b" } diff --git a/test/CodeGen/Hexagon/autohvx/shuff-128b.ll b/test/CodeGen/Hexagon/autohvx/shuff-128b.ll new file mode 100644 index 00000000000..efaa530ff65 --- /dev/null +++ b/test/CodeGen/Hexagon/autohvx/shuff-128b.ll @@ -0,0 +1,1029 @@ +; RUN: llc -march=hexagon < %s | FileCheck %s + +; Check the individual vshuff shuffles for all 128 controls. + +; This is an identity shuffle: there should not be any shuffling code emitted. +; CHECK-LABEL: vshuff_00: +; CHECK-NOT: vshuff( +define <256 x i8> @vshuff_00(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 48, i32 49, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63, i32 64, i32 65, i32 66, i32 67, i32 68, i32 69, i32 70, i32 71, i32 72, i32 73, i32 74, i32 75, i32 76, i32 77, i32 78, i32 79, i32 80, i32 81, i32 82, i32 83, i32 84, i32 85, i32 86, i32 87, i32 88, i32 89, i32 90, i32 91, i32 92, i32 93, i32 94, i32 95, i32 96, i32 97, i32 98, i32 99, i32 100, i32 101, i32 102, i32 103, i32 104, i32 105, i32 106, i32 107, i32 108, i32 109, i32 110, i32 111, i32 112, i32 113, i32 114, i32 115, i32 116, i32 117, i32 118, i32 119, i32 120, i32 121, i32 122, i32 123, i32 124, i32 125, i32 126, i32 127, i32 128, i32 129, i32 130, i32 131, i32 132, i32 133, i32 134, i32 135, i32 136, i32 137, i32 138, i32 139, i32 140, i32 141, i32 142, i32 143, i32 144, i32 145, i32 146, i32 147, i32 148, i32 149, i32 150, i32 151, i32 152, i32 153, i32 154, i32 155, i32 156, i32 157, i32 158, i32 159, i32 160, i32 161, i32 162, i32 163, i32 164, i32 165, i32 166, i32 167, i32 168, i32 169, i32 170, i32 171, i32 172, i32 173, i32 174, i32 175, i32 176, i32 177, i32 178, i32 179, i32 180, i32 181, i32 182, i32 183, i32 184, i32 185, i32 186, i32 187, i32 188, i32 189, i32 190, i32 191, i32 192, i32 193, i32 194, i32 195, i32 196, i32 197, i32 198, i32 199, i32 200, i32 201, i32 202, i32 203, i32 204, i32 205, i32 206, i32 207, i32 208, i32 209, i32 210, i32 211, i32 212, i32 213, i32 214, i32 215, i32 216, i32 217, i32 218, i32 219, i32 220, i32 221, i32 222, i32 223, i32 224, i32 225, i32 226, i32 227, i32 228, i32 229, i32 230, i32 231, i32 232, i32 233, i32 234, i32 235, i32 236, i32 237, i32 238, i32 239, i32 240, i32 241, i32 242, i32 243, i32 244, i32 245, i32 246, i32 247, i32 248, i32 249, i32 250, i32 251, i32 252, i32 253, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_01: +; CHECK: [[REG01:r[0-9]+]] = #1 +; CHECK: vshuff(v1,v0,[[REG01]]) +define <256 x i8> @vshuff_01(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 128, i32 2, i32 130, i32 4, i32 132, i32 6, i32 134, i32 8, i32 136, i32 10, i32 138, i32 12, i32 140, i32 14, i32 142, i32 16, i32 144, i32 18, i32 146, i32 20, i32 148, i32 22, i32 150, i32 24, i32 152, i32 26, i32 154, i32 28, i32 156, i32 30, i32 158, i32 32, i32 160, i32 34, i32 162, i32 36, i32 164, i32 38, i32 166, i32 40, i32 168, i32 42, i32 170, i32 44, i32 172, i32 46, i32 174, i32 48, i32 176, i32 50, i32 178, i32 52, i32 180, i32 54, i32 182, i32 56, i32 184, i32 58, i32 186, i32 60, i32 188, i32 62, i32 190, i32 64, i32 192, i32 66, i32 194, i32 68, i32 196, i32 70, i32 198, i32 72, i32 200, i32 74, i32 202, i32 76, i32 204, i32 78, i32 206, i32 80, i32 208, i32 82, i32 210, i32 84, i32 212, i32 86, i32 214, i32 88, i32 216, i32 90, i32 218, i32 92, i32 220, i32 94, i32 222, i32 96, i32 224, i32 98, i32 226, i32 100, i32 228, i32 102, i32 230, i32 104, i32 232, i32 106, i32 234, i32 108, i32 236, i32 110, i32 238, i32 112, i32 240, i32 114, i32 242, i32 116, i32 244, i32 118, i32 246, i32 120, i32 248, i32 122, i32 250, i32 124, i32 252, i32 126, i32 254, i32 1, i32 129, i32 3, i32 131, i32 5, i32 133, i32 7, i32 135, i32 9, i32 137, i32 11, i32 139, i32 13, i32 141, i32 15, i32 143, i32 17, i32 145, i32 19, i32 147, i32 21, i32 149, i32 23, i32 151, i32 25, i32 153, i32 27, i32 155, i32 29, i32 157, i32 31, i32 159, i32 33, i32 161, i32 35, i32 163, i32 37, i32 165, i32 39, i32 167, i32 41, i32 169, i32 43, i32 171, i32 45, i32 173, i32 47, i32 175, i32 49, i32 177, i32 51, i32 179, i32 53, i32 181, i32 55, i32 183, i32 57, i32 185, i32 59, i32 187, i32 61, i32 189, i32 63, i32 191, i32 65, i32 193, i32 67, i32 195, i32 69, i32 197, i32 71, i32 199, i32 73, i32 201, i32 75, i32 203, i32 77, i32 205, i32 79, i32 207, i32 81, i32 209, i32 83, i32 211, i32 85, i32 213, i32 87, i32 215, i32 89, i32 217, i32 91, i32 219, i32 93, i32 221, i32 95, i32 223, i32 97, i32 225, i32 99, i32 227, i32 101, i32 229, i32 103, i32 231, i32 105, i32 233, i32 107, i32 235, i32 109, i32 237, i32 111, i32 239, i32 113, i32 241, i32 115, i32 243, i32 117, i32 245, i32 119, i32 247, i32 121, i32 249, i32 123, i32 251, i32 125, i32 253, i32 127, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_02: +; CHECK: [[REG02:r[0-9]+]] = #2 +; CHECK: vshuff(v1,v0,[[REG02]]) +define <256 x i8> @vshuff_02(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 128, i32 129, i32 4, i32 5, i32 132, i32 133, i32 8, i32 9, i32 136, i32 137, i32 12, i32 13, i32 140, i32 141, i32 16, i32 17, i32 144, i32 145, i32 20, i32 21, i32 148, i32 149, i32 24, i32 25, i32 152, i32 153, i32 28, i32 29, i32 156, i32 157, i32 32, i32 33, i32 160, i32 161, i32 36, i32 37, i32 164, i32 165, i32 40, i32 41, i32 168, i32 169, i32 44, i32 45, i32 172, i32 173, i32 48, i32 49, i32 176, i32 177, i32 52, i32 53, i32 180, i32 181, i32 56, i32 57, i32 184, i32 185, i32 60, i32 61, i32 188, i32 189, i32 64, i32 65, i32 192, i32 193, i32 68, i32 69, i32 196, i32 197, i32 72, i32 73, i32 200, i32 201, i32 76, i32 77, i32 204, i32 205, i32 80, i32 81, i32 208, i32 209, i32 84, i32 85, i32 212, i32 213, i32 88, i32 89, i32 216, i32 217, i32 92, i32 93, i32 220, i32 221, i32 96, i32 97, i32 224, i32 225, i32 100, i32 101, i32 228, i32 229, i32 104, i32 105, i32 232, i32 233, i32 108, i32 109, i32 236, i32 237, i32 112, i32 113, i32 240, i32 241, i32 116, i32 117, i32 244, i32 245, i32 120, i32 121, i32 248, i32 249, i32 124, i32 125, i32 252, i32 253, i32 2, i32 3, i32 130, i32 131, i32 6, i32 7, i32 134, i32 135, i32 10, i32 11, i32 138, i32 139, i32 14, i32 15, i32 142, i32 143, i32 18, i32 19, i32 146, i32 147, i32 22, i32 23, i32 150, i32 151, i32 26, i32 27, i32 154, i32 155, i32 30, i32 31, i32 158, i32 159, i32 34, i32 35, i32 162, i32 163, i32 38, i32 39, i32 166, i32 167, i32 42, i32 43, i32 170, i32 171, i32 46, i32 47, i32 174, i32 175, i32 50, i32 51, i32 178, i32 179, i32 54, i32 55, i32 182, i32 183, i32 58, i32 59, i32 186, i32 187, i32 62, i32 63, i32 190, i32 191, i32 66, i32 67, i32 194, i32 195, i32 70, i32 71, i32 198, i32 199, i32 74, i32 75, i32 202, i32 203, i32 78, i32 79, i32 206, i32 207, i32 82, i32 83, i32 210, i32 211, i32 86, i32 87, i32 214, i32 215, i32 90, i32 91, i32 218, i32 219, i32 94, i32 95, i32 222, i32 223, i32 98, i32 99, i32 226, i32 227, i32 102, i32 103, i32 230, i32 231, i32 106, i32 107, i32 234, i32 235, i32 110, i32 111, i32 238, i32 239, i32 114, i32 115, i32 242, i32 243, i32 118, i32 119, i32 246, i32 247, i32 122, i32 123, i32 250, i32 251, i32 126, i32 127, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_03: +; CHECK: [[REG03:r[0-9]+]] = #3 +; CHECK: vshuff(v1,v0,[[REG03]]) +define <256 x i8> @vshuff_03(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 128, i32 1, i32 129, i32 4, i32 132, i32 5, i32 133, i32 8, i32 136, i32 9, i32 137, i32 12, i32 140, i32 13, i32 141, i32 16, i32 144, i32 17, i32 145, i32 20, i32 148, i32 21, i32 149, i32 24, i32 152, i32 25, i32 153, i32 28, i32 156, i32 29, i32 157, i32 32, i32 160, i32 33, i32 161, i32 36, i32 164, i32 37, i32 165, i32 40, i32 168, i32 41, i32 169, i32 44, i32 172, i32 45, i32 173, i32 48, i32 176, i32 49, i32 177, i32 52, i32 180, i32 53, i32 181, i32 56, i32 184, i32 57, i32 185, i32 60, i32 188, i32 61, i32 189, i32 64, i32 192, i32 65, i32 193, i32 68, i32 196, i32 69, i32 197, i32 72, i32 200, i32 73, i32 201, i32 76, i32 204, i32 77, i32 205, i32 80, i32 208, i32 81, i32 209, i32 84, i32 212, i32 85, i32 213, i32 88, i32 216, i32 89, i32 217, i32 92, i32 220, i32 93, i32 221, i32 96, i32 224, i32 97, i32 225, i32 100, i32 228, i32 101, i32 229, i32 104, i32 232, i32 105, i32 233, i32 108, i32 236, i32 109, i32 237, i32 112, i32 240, i32 113, i32 241, i32 116, i32 244, i32 117, i32 245, i32 120, i32 248, i32 121, i32 249, i32 124, i32 252, i32 125, i32 253, i32 2, i32 130, i32 3, i32 131, i32 6, i32 134, i32 7, i32 135, i32 10, i32 138, i32 11, i32 139, i32 14, i32 142, i32 15, i32 143, i32 18, i32 146, i32 19, i32 147, i32 22, i32 150, i32 23, i32 151, i32 26, i32 154, i32 27, i32 155, i32 30, i32 158, i32 31, i32 159, i32 34, i32 162, i32 35, i32 163, i32 38, i32 166, i32 39, i32 167, i32 42, i32 170, i32 43, i32 171, i32 46, i32 174, i32 47, i32 175, i32 50, i32 178, i32 51, i32 179, i32 54, i32 182, i32 55, i32 183, i32 58, i32 186, i32 59, i32 187, i32 62, i32 190, i32 63, i32 191, i32 66, i32 194, i32 67, i32 195, i32 70, i32 198, i32 71, i32 199, i32 74, i32 202, i32 75, i32 203, i32 78, i32 206, i32 79, i32 207, i32 82, i32 210, i32 83, i32 211, i32 86, i32 214, i32 87, i32 215, i32 90, i32 218, i32 91, i32 219, i32 94, i32 222, i32 95, i32 223, i32 98, i32 226, i32 99, i32 227, i32 102, i32 230, i32 103, i32 231, i32 106, i32 234, i32 107, i32 235, i32 110, i32 238, i32 111, i32 239, i32 114, i32 242, i32 115, i32 243, i32 118, i32 246, i32 119, i32 247, i32 122, i32 250, i32 123, i32 251, i32 126, i32 254, i32 127, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_04: +; CHECK: [[REG04:r[0-9]+]] = #4 +; CHECK: vshuff(v1,v0,[[REG04]]) +define <256 x i8> @vshuff_04(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 2, i32 3, i32 128, i32 129, i32 130, i32 131, i32 8, i32 9, i32 10, i32 11, i32 136, i32 137, i32 138, i32 139, i32 16, i32 17, i32 18, i32 19, i32 144, i32 145, i32 146, i32 147, i32 24, i32 25, i32 26, i32 27, i32 152, i32 153, i32 154, i32 155, i32 32, i32 33, i32 34, i32 35, i32 160, i32 161, i32 162, i32 163, i32 40, i32 41, i32 42, i32 43, i32 168, i32 169, i32 170, i32 171, i32 48, i32 49, i32 50, i32 51, i32 176, i32 177, i32 178, i32 179, i32 56, i32 57, i32 58, i32 59, i32 184, i32 185, i32 186, i32 187, i32 64, i32 65, i32 66, i32 67, i32 192, i32 193, i32 194, i32 195, i32 72, i32 73, i32 74, i32 75, i32 200, i32 201, i32 202, i32 203, i32 80, i32 81, i32 82, i32 83, i32 208, i32 209, i32 210, i32 211, i32 88, i32 89, i32 90, i32 91, i32 216, i32 217, i32 218, i32 219, i32 96, i32 97, i32 98, i32 99, i32 224, i32 225, i32 226, i32 227, i32 104, i32 105, i32 106, i32 107, i32 232, i32 233, i32 234, i32 235, i32 112, i32 113, i32 114, i32 115, i32 240, i32 241, i32 242, i32 243, i32 120, i32 121, i32 122, i32 123, i32 248, i32 249, i32 250, i32 251, i32 4, i32 5, i32 6, i32 7, i32 132, i32 133, i32 134, i32 135, i32 12, i32 13, i32 14, i32 15, i32 140, i32 141, i32 142, i32 143, i32 20, i32 21, i32 22, i32 23, i32 148, i32 149, i32 150, i32 151, i32 28, i32 29, i32 30, i32 31, i32 156, i32 157, i32 158, i32 159, i32 36, i32 37, i32 38, i32 39, i32 164, i32 165, i32 166, i32 167, i32 44, i32 45, i32 46, i32 47, i32 172, i32 173, i32 174, i32 175, i32 52, i32 53, i32 54, i32 55, i32 180, i32 181, i32 182, i32 183, i32 60, i32 61, i32 62, i32 63, i32 188, i32 189, i32 190, i32 191, i32 68, i32 69, i32 70, i32 71, i32 196, i32 197, i32 198, i32 199, i32 76, i32 77, i32 78, i32 79, i32 204, i32 205, i32 206, i32 207, i32 84, i32 85, i32 86, i32 87, i32 212, i32 213, i32 214, i32 215, i32 92, i32 93, i32 94, i32 95, i32 220, i32 221, i32 222, i32 223, i32 100, i32 101, i32 102, i32 103, i32 228, i32 229, i32 230, i32 231, i32 108, i32 109, i32 110, i32 111, i32 236, i32 237, i32 238, i32 239, i32 116, i32 117, i32 118, i32 119, i32 244, i32 245, i32 246, i32 247, i32 124, i32 125, i32 126, i32 127, i32 252, i32 253, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_05: +; CHECK: [[REG05:r[0-9]+]] = #5 +; CHECK: vshuff(v1,v0,[[REG05]]) +define <256 x i8> @vshuff_05(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 128, i32 2, i32 130, i32 1, i32 129, i32 3, i32 131, i32 8, i32 136, i32 10, i32 138, i32 9, i32 137, i32 11, i32 139, i32 16, i32 144, i32 18, i32 146, i32 17, i32 145, i32 19, i32 147, i32 24, i32 152, i32 26, i32 154, i32 25, i32 153, i32 27, i32 155, i32 32, i32 160, i32 34, i32 162, i32 33, i32 161, i32 35, i32 163, i32 40, i32 168, i32 42, i32 170, i32 41, i32 169, i32 43, i32 171, i32 48, i32 176, i32 50, i32 178, i32 49, i32 177, i32 51, i32 179, i32 56, i32 184, i32 58, i32 186, i32 57, i32 185, i32 59, i32 187, i32 64, i32 192, i32 66, i32 194, i32 65, i32 193, i32 67, i32 195, i32 72, i32 200, i32 74, i32 202, i32 73, i32 201, i32 75, i32 203, i32 80, i32 208, i32 82, i32 210, i32 81, i32 209, i32 83, i32 211, i32 88, i32 216, i32 90, i32 218, i32 89, i32 217, i32 91, i32 219, i32 96, i32 224, i32 98, i32 226, i32 97, i32 225, i32 99, i32 227, i32 104, i32 232, i32 106, i32 234, i32 105, i32 233, i32 107, i32 235, i32 112, i32 240, i32 114, i32 242, i32 113, i32 241, i32 115, i32 243, i32 120, i32 248, i32 122, i32 250, i32 121, i32 249, i32 123, i32 251, i32 4, i32 132, i32 6, i32 134, i32 5, i32 133, i32 7, i32 135, i32 12, i32 140, i32 14, i32 142, i32 13, i32 141, i32 15, i32 143, i32 20, i32 148, i32 22, i32 150, i32 21, i32 149, i32 23, i32 151, i32 28, i32 156, i32 30, i32 158, i32 29, i32 157, i32 31, i32 159, i32 36, i32 164, i32 38, i32 166, i32 37, i32 165, i32 39, i32 167, i32 44, i32 172, i32 46, i32 174, i32 45, i32 173, i32 47, i32 175, i32 52, i32 180, i32 54, i32 182, i32 53, i32 181, i32 55, i32 183, i32 60, i32 188, i32 62, i32 190, i32 61, i32 189, i32 63, i32 191, i32 68, i32 196, i32 70, i32 198, i32 69, i32 197, i32 71, i32 199, i32 76, i32 204, i32 78, i32 206, i32 77, i32 205, i32 79, i32 207, i32 84, i32 212, i32 86, i32 214, i32 85, i32 213, i32 87, i32 215, i32 92, i32 220, i32 94, i32 222, i32 93, i32 221, i32 95, i32 223, i32 100, i32 228, i32 102, i32 230, i32 101, i32 229, i32 103, i32 231, i32 108, i32 236, i32 110, i32 238, i32 109, i32 237, i32 111, i32 239, i32 116, i32 244, i32 118, i32 246, i32 117, i32 245, i32 119, i32 247, i32 124, i32 252, i32 126, i32 254, i32 125, i32 253, i32 127, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_06: +; CHECK: [[REG06:r[0-9]+]] = #6 +; CHECK: vshuff(v1,v0,[[REG06]]) +define <256 x i8> @vshuff_06(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 128, i32 129, i32 2, i32 3, i32 130, i32 131, i32 8, i32 9, i32 136, i32 137, i32 10, i32 11, i32 138, i32 139, i32 16, i32 17, i32 144, i32 145, i32 18, i32 19, i32 146, i32 147, i32 24, i32 25, i32 152, i32 153, i32 26, i32 27, i32 154, i32 155, i32 32, i32 33, i32 160, i32 161, i32 34, i32 35, i32 162, i32 163, i32 40, i32 41, i32 168, i32 169, i32 42, i32 43, i32 170, i32 171, i32 48, i32 49, i32 176, i32 177, i32 50, i32 51, i32 178, i32 179, i32 56, i32 57, i32 184, i32 185, i32 58, i32 59, i32 186, i32 187, i32 64, i32 65, i32 192, i32 193, i32 66, i32 67, i32 194, i32 195, i32 72, i32 73, i32 200, i32 201, i32 74, i32 75, i32 202, i32 203, i32 80, i32 81, i32 208, i32 209, i32 82, i32 83, i32 210, i32 211, i32 88, i32 89, i32 216, i32 217, i32 90, i32 91, i32 218, i32 219, i32 96, i32 97, i32 224, i32 225, i32 98, i32 99, i32 226, i32 227, i32 104, i32 105, i32 232, i32 233, i32 106, i32 107, i32 234, i32 235, i32 112, i32 113, i32 240, i32 241, i32 114, i32 115, i32 242, i32 243, i32 120, i32 121, i32 248, i32 249, i32 122, i32 123, i32 250, i32 251, i32 4, i32 5, i32 132, i32 133, i32 6, i32 7, i32 134, i32 135, i32 12, i32 13, i32 140, i32 141, i32 14, i32 15, i32 142, i32 143, i32 20, i32 21, i32 148, i32 149, i32 22, i32 23, i32 150, i32 151, i32 28, i32 29, i32 156, i32 157, i32 30, i32 31, i32 158, i32 159, i32 36, i32 37, i32 164, i32 165, i32 38, i32 39, i32 166, i32 167, i32 44, i32 45, i32 172, i32 173, i32 46, i32 47, i32 174, i32 175, i32 52, i32 53, i32 180, i32 181, i32 54, i32 55, i32 182, i32 183, i32 60, i32 61, i32 188, i32 189, i32 62, i32 63, i32 190, i32 191, i32 68, i32 69, i32 196, i32 197, i32 70, i32 71, i32 198, i32 199, i32 76, i32 77, i32 204, i32 205, i32 78, i32 79, i32 206, i32 207, i32 84, i32 85, i32 212, i32 213, i32 86, i32 87, i32 214, i32 215, i32 92, i32 93, i32 220, i32 221, i32 94, i32 95, i32 222, i32 223, i32 100, i32 101, i32 228, i32 229, i32 102, i32 103, i32 230, i32 231, i32 108, i32 109, i32 236, i32 237, i32 110, i32 111, i32 238, i32 239, i32 116, i32 117, i32 244, i32 245, i32 118, i32 119, i32 246, i32 247, i32 124, i32 125, i32 252, i32 253, i32 126, i32 127, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_07: +; CHECK: [[REG07:r[0-9]+]] = #7 +; CHECK: vshuff(v1,v0,[[REG07]]) +define <256 x i8> @vshuff_07(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 128, i32 1, i32 129, i32 2, i32 130, i32 3, i32 131, i32 8, i32 136, i32 9, i32 137, i32 10, i32 138, i32 11, i32 139, i32 16, i32 144, i32 17, i32 145, i32 18, i32 146, i32 19, i32 147, i32 24, i32 152, i32 25, i32 153, i32 26, i32 154, i32 27, i32 155, i32 32, i32 160, i32 33, i32 161, i32 34, i32 162, i32 35, i32 163, i32 40, i32 168, i32 41, i32 169, i32 42, i32 170, i32 43, i32 171, i32 48, i32 176, i32 49, i32 177, i32 50, i32 178, i32 51, i32 179, i32 56, i32 184, i32 57, i32 185, i32 58, i32 186, i32 59, i32 187, i32 64, i32 192, i32 65, i32 193, i32 66, i32 194, i32 67, i32 195, i32 72, i32 200, i32 73, i32 201, i32 74, i32 202, i32 75, i32 203, i32 80, i32 208, i32 81, i32 209, i32 82, i32 210, i32 83, i32 211, i32 88, i32 216, i32 89, i32 217, i32 90, i32 218, i32 91, i32 219, i32 96, i32 224, i32 97, i32 225, i32 98, i32 226, i32 99, i32 227, i32 104, i32 232, i32 105, i32 233, i32 106, i32 234, i32 107, i32 235, i32 112, i32 240, i32 113, i32 241, i32 114, i32 242, i32 115, i32 243, i32 120, i32 248, i32 121, i32 249, i32 122, i32 250, i32 123, i32 251, i32 4, i32 132, i32 5, i32 133, i32 6, i32 134, i32 7, i32 135, i32 12, i32 140, i32 13, i32 141, i32 14, i32 142, i32 15, i32 143, i32 20, i32 148, i32 21, i32 149, i32 22, i32 150, i32 23, i32 151, i32 28, i32 156, i32 29, i32 157, i32 30, i32 158, i32 31, i32 159, i32 36, i32 164, i32 37, i32 165, i32 38, i32 166, i32 39, i32 167, i32 44, i32 172, i32 45, i32 173, i32 46, i32 174, i32 47, i32 175, i32 52, i32 180, i32 53, i32 181, i32 54, i32 182, i32 55, i32 183, i32 60, i32 188, i32 61, i32 189, i32 62, i32 190, i32 63, i32 191, i32 68, i32 196, i32 69, i32 197, i32 70, i32 198, i32 71, i32 199, i32 76, i32 204, i32 77, i32 205, i32 78, i32 206, i32 79, i32 207, i32 84, i32 212, i32 85, i32 213, i32 86, i32 214, i32 87, i32 215, i32 92, i32 220, i32 93, i32 221, i32 94, i32 222, i32 95, i32 223, i32 100, i32 228, i32 101, i32 229, i32 102, i32 230, i32 103, i32 231, i32 108, i32 236, i32 109, i32 237, i32 110, i32 238, i32 111, i32 239, i32 116, i32 244, i32 117, i32 245, i32 118, i32 246, i32 119, i32 247, i32 124, i32 252, i32 125, i32 253, i32 126, i32 254, i32 127, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_08: +; CHECK: [[REG08:r[0-9]+]] = #8 +; CHECK: vshuff(v1,v0,[[REG08]]) +define <256 x i8> @vshuff_08(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 128, i32 129, i32 130, i32 131, i32 132, i32 133, i32 134, i32 135, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 144, i32 145, i32 146, i32 147, i32 148, i32 149, i32 150, i32 151, i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 160, i32 161, i32 162, i32 163, i32 164, i32 165, i32 166, i32 167, i32 48, i32 49, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 176, i32 177, i32 178, i32 179, i32 180, i32 181, i32 182, i32 183, i32 64, i32 65, i32 66, i32 67, i32 68, i32 69, i32 70, i32 71, i32 192, i32 193, i32 194, i32 195, i32 196, i32 197, i32 198, i32 199, i32 80, i32 81, i32 82, i32 83, i32 84, i32 85, i32 86, i32 87, i32 208, i32 209, i32 210, i32 211, i32 212, i32 213, i32 214, i32 215, i32 96, i32 97, i32 98, i32 99, i32 100, i32 101, i32 102, i32 103, i32 224, i32 225, i32 226, i32 227, i32 228, i32 229, i32 230, i32 231, i32 112, i32 113, i32 114, i32 115, i32 116, i32 117, i32 118, i32 119, i32 240, i32 241, i32 242, i32 243, i32 244, i32 245, i32 246, i32 247, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 136, i32 137, i32 138, i32 139, i32 140, i32 141, i32 142, i32 143, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 152, i32 153, i32 154, i32 155, i32 156, i32 157, i32 158, i32 159, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 168, i32 169, i32 170, i32 171, i32 172, i32 173, i32 174, i32 175, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63, i32 184, i32 185, i32 186, i32 187, i32 188, i32 189, i32 190, i32 191, i32 72, i32 73, i32 74, i32 75, i32 76, i32 77, i32 78, i32 79, i32 200, i32 201, i32 202, i32 203, i32 204, i32 205, i32 206, i32 207, i32 88, i32 89, i32 90, i32 91, i32 92, i32 93, i32 94, i32 95, i32 216, i32 217, i32 218, i32 219, i32 220, i32 221, i32 222, i32 223, i32 104, i32 105, i32 106, i32 107, i32 108, i32 109, i32 110, i32 111, i32 232, i32 233, i32 234, i32 235, i32 236, i32 237, i32 238, i32 239, i32 120, i32 121, i32 122, i32 123, i32 124, i32 125, i32 126, i32 127, i32 248, i32 249, i32 250, i32 251, i32 252, i32 253, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_09: +; CHECK: [[REG09:r[0-9]+]] = #9 +; CHECK: vshuff(v1,v0,[[REG09]]) +define <256 x i8> @vshuff_09(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 128, i32 2, i32 130, i32 4, i32 132, i32 6, i32 134, i32 1, i32 129, i32 3, i32 131, i32 5, i32 133, i32 7, i32 135, i32 16, i32 144, i32 18, i32 146, i32 20, i32 148, i32 22, i32 150, i32 17, i32 145, i32 19, i32 147, i32 21, i32 149, i32 23, i32 151, i32 32, i32 160, i32 34, i32 162, i32 36, i32 164, i32 38, i32 166, i32 33, i32 161, i32 35, i32 163, i32 37, i32 165, i32 39, i32 167, i32 48, i32 176, i32 50, i32 178, i32 52, i32 180, i32 54, i32 182, i32 49, i32 177, i32 51, i32 179, i32 53, i32 181, i32 55, i32 183, i32 64, i32 192, i32 66, i32 194, i32 68, i32 196, i32 70, i32 198, i32 65, i32 193, i32 67, i32 195, i32 69, i32 197, i32 71, i32 199, i32 80, i32 208, i32 82, i32 210, i32 84, i32 212, i32 86, i32 214, i32 81, i32 209, i32 83, i32 211, i32 85, i32 213, i32 87, i32 215, i32 96, i32 224, i32 98, i32 226, i32 100, i32 228, i32 102, i32 230, i32 97, i32 225, i32 99, i32 227, i32 101, i32 229, i32 103, i32 231, i32 112, i32 240, i32 114, i32 242, i32 116, i32 244, i32 118, i32 246, i32 113, i32 241, i32 115, i32 243, i32 117, i32 245, i32 119, i32 247, i32 8, i32 136, i32 10, i32 138, i32 12, i32 140, i32 14, i32 142, i32 9, i32 137, i32 11, i32 139, i32 13, i32 141, i32 15, i32 143, i32 24, i32 152, i32 26, i32 154, i32 28, i32 156, i32 30, i32 158, i32 25, i32 153, i32 27, i32 155, i32 29, i32 157, i32 31, i32 159, i32 40, i32 168, i32 42, i32 170, i32 44, i32 172, i32 46, i32 174, i32 41, i32 169, i32 43, i32 171, i32 45, i32 173, i32 47, i32 175, i32 56, i32 184, i32 58, i32 186, i32 60, i32 188, i32 62, i32 190, i32 57, i32 185, i32 59, i32 187, i32 61, i32 189, i32 63, i32 191, i32 72, i32 200, i32 74, i32 202, i32 76, i32 204, i32 78, i32 206, i32 73, i32 201, i32 75, i32 203, i32 77, i32 205, i32 79, i32 207, i32 88, i32 216, i32 90, i32 218, i32 92, i32 220, i32 94, i32 222, i32 89, i32 217, i32 91, i32 219, i32 93, i32 221, i32 95, i32 223, i32 104, i32 232, i32 106, i32 234, i32 108, i32 236, i32 110, i32 238, i32 105, i32 233, i32 107, i32 235, i32 109, i32 237, i32 111, i32 239, i32 120, i32 248, i32 122, i32 250, i32 124, i32 252, i32 126, i32 254, i32 121, i32 249, i32 123, i32 251, i32 125, i32 253, i32 127, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_0a: +; CHECK: [[REG0a:r[0-9]+]] = #10 +; CHECK: vshuff(v1,v0,[[REG0a]]) +define <256 x i8> @vshuff_0a(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 128, i32 129, i32 4, i32 5, i32 132, i32 133, i32 2, i32 3, i32 130, i32 131, i32 6, i32 7, i32 134, i32 135, i32 16, i32 17, i32 144, i32 145, i32 20, i32 21, i32 148, i32 149, i32 18, i32 19, i32 146, i32 147, i32 22, i32 23, i32 150, i32 151, i32 32, i32 33, i32 160, i32 161, i32 36, i32 37, i32 164, i32 165, i32 34, i32 35, i32 162, i32 163, i32 38, i32 39, i32 166, i32 167, i32 48, i32 49, i32 176, i32 177, i32 52, i32 53, i32 180, i32 181, i32 50, i32 51, i32 178, i32 179, i32 54, i32 55, i32 182, i32 183, i32 64, i32 65, i32 192, i32 193, i32 68, i32 69, i32 196, i32 197, i32 66, i32 67, i32 194, i32 195, i32 70, i32 71, i32 198, i32 199, i32 80, i32 81, i32 208, i32 209, i32 84, i32 85, i32 212, i32 213, i32 82, i32 83, i32 210, i32 211, i32 86, i32 87, i32 214, i32 215, i32 96, i32 97, i32 224, i32 225, i32 100, i32 101, i32 228, i32 229, i32 98, i32 99, i32 226, i32 227, i32 102, i32 103, i32 230, i32 231, i32 112, i32 113, i32 240, i32 241, i32 116, i32 117, i32 244, i32 245, i32 114, i32 115, i32 242, i32 243, i32 118, i32 119, i32 246, i32 247, i32 8, i32 9, i32 136, i32 137, i32 12, i32 13, i32 140, i32 141, i32 10, i32 11, i32 138, i32 139, i32 14, i32 15, i32 142, i32 143, i32 24, i32 25, i32 152, i32 153, i32 28, i32 29, i32 156, i32 157, i32 26, i32 27, i32 154, i32 155, i32 30, i32 31, i32 158, i32 159, i32 40, i32 41, i32 168, i32 169, i32 44, i32 45, i32 172, i32 173, i32 42, i32 43, i32 170, i32 171, i32 46, i32 47, i32 174, i32 175, i32 56, i32 57, i32 184, i32 185, i32 60, i32 61, i32 188, i32 189, i32 58, i32 59, i32 186, i32 187, i32 62, i32 63, i32 190, i32 191, i32 72, i32 73, i32 200, i32 201, i32 76, i32 77, i32 204, i32 205, i32 74, i32 75, i32 202, i32 203, i32 78, i32 79, i32 206, i32 207, i32 88, i32 89, i32 216, i32 217, i32 92, i32 93, i32 220, i32 221, i32 90, i32 91, i32 218, i32 219, i32 94, i32 95, i32 222, i32 223, i32 104, i32 105, i32 232, i32 233, i32 108, i32 109, i32 236, i32 237, i32 106, i32 107, i32 234, i32 235, i32 110, i32 111, i32 238, i32 239, i32 120, i32 121, i32 248, i32 249, i32 124, i32 125, i32 252, i32 253, i32 122, i32 123, i32 250, i32 251, i32 126, i32 127, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_0b: +; CHECK: [[REG0b:r[0-9]+]] = #11 +; CHECK: vshuff(v1,v0,[[REG0b]]) +define <256 x i8> @vshuff_0b(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 128, i32 1, i32 129, i32 4, i32 132, i32 5, i32 133, i32 2, i32 130, i32 3, i32 131, i32 6, i32 134, i32 7, i32 135, i32 16, i32 144, i32 17, i32 145, i32 20, i32 148, i32 21, i32 149, i32 18, i32 146, i32 19, i32 147, i32 22, i32 150, i32 23, i32 151, i32 32, i32 160, i32 33, i32 161, i32 36, i32 164, i32 37, i32 165, i32 34, i32 162, i32 35, i32 163, i32 38, i32 166, i32 39, i32 167, i32 48, i32 176, i32 49, i32 177, i32 52, i32 180, i32 53, i32 181, i32 50, i32 178, i32 51, i32 179, i32 54, i32 182, i32 55, i32 183, i32 64, i32 192, i32 65, i32 193, i32 68, i32 196, i32 69, i32 197, i32 66, i32 194, i32 67, i32 195, i32 70, i32 198, i32 71, i32 199, i32 80, i32 208, i32 81, i32 209, i32 84, i32 212, i32 85, i32 213, i32 82, i32 210, i32 83, i32 211, i32 86, i32 214, i32 87, i32 215, i32 96, i32 224, i32 97, i32 225, i32 100, i32 228, i32 101, i32 229, i32 98, i32 226, i32 99, i32 227, i32 102, i32 230, i32 103, i32 231, i32 112, i32 240, i32 113, i32 241, i32 116, i32 244, i32 117, i32 245, i32 114, i32 242, i32 115, i32 243, i32 118, i32 246, i32 119, i32 247, i32 8, i32 136, i32 9, i32 137, i32 12, i32 140, i32 13, i32 141, i32 10, i32 138, i32 11, i32 139, i32 14, i32 142, i32 15, i32 143, i32 24, i32 152, i32 25, i32 153, i32 28, i32 156, i32 29, i32 157, i32 26, i32 154, i32 27, i32 155, i32 30, i32 158, i32 31, i32 159, i32 40, i32 168, i32 41, i32 169, i32 44, i32 172, i32 45, i32 173, i32 42, i32 170, i32 43, i32 171, i32 46, i32 174, i32 47, i32 175, i32 56, i32 184, i32 57, i32 185, i32 60, i32 188, i32 61, i32 189, i32 58, i32 186, i32 59, i32 187, i32 62, i32 190, i32 63, i32 191, i32 72, i32 200, i32 73, i32 201, i32 76, i32 204, i32 77, i32 205, i32 74, i32 202, i32 75, i32 203, i32 78, i32 206, i32 79, i32 207, i32 88, i32 216, i32 89, i32 217, i32 92, i32 220, i32 93, i32 221, i32 90, i32 218, i32 91, i32 219, i32 94, i32 222, i32 95, i32 223, i32 104, i32 232, i32 105, i32 233, i32 108, i32 236, i32 109, i32 237, i32 106, i32 234, i32 107, i32 235, i32 110, i32 238, i32 111, i32 239, i32 120, i32 248, i32 121, i32 249, i32 124, i32 252, i32 125, i32 253, i32 122, i32 250, i32 123, i32 251, i32 126, i32 254, i32 127, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_0c: +; CHECK: [[REG0c:r[0-9]+]] = #12 +; CHECK: vshuff(v1,v0,[[REG0c]]) +define <256 x i8> @vshuff_0c(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 2, i32 3, i32 128, i32 129, i32 130, i32 131, i32 4, i32 5, i32 6, i32 7, i32 132, i32 133, i32 134, i32 135, i32 16, i32 17, i32 18, i32 19, i32 144, i32 145, i32 146, i32 147, i32 20, i32 21, i32 22, i32 23, i32 148, i32 149, i32 150, i32 151, i32 32, i32 33, i32 34, i32 35, i32 160, i32 161, i32 162, i32 163, i32 36, i32 37, i32 38, i32 39, i32 164, i32 165, i32 166, i32 167, i32 48, i32 49, i32 50, i32 51, i32 176, i32 177, i32 178, i32 179, i32 52, i32 53, i32 54, i32 55, i32 180, i32 181, i32 182, i32 183, i32 64, i32 65, i32 66, i32 67, i32 192, i32 193, i32 194, i32 195, i32 68, i32 69, i32 70, i32 71, i32 196, i32 197, i32 198, i32 199, i32 80, i32 81, i32 82, i32 83, i32 208, i32 209, i32 210, i32 211, i32 84, i32 85, i32 86, i32 87, i32 212, i32 213, i32 214, i32 215, i32 96, i32 97, i32 98, i32 99, i32 224, i32 225, i32 226, i32 227, i32 100, i32 101, i32 102, i32 103, i32 228, i32 229, i32 230, i32 231, i32 112, i32 113, i32 114, i32 115, i32 240, i32 241, i32 242, i32 243, i32 116, i32 117, i32 118, i32 119, i32 244, i32 245, i32 246, i32 247, i32 8, i32 9, i32 10, i32 11, i32 136, i32 137, i32 138, i32 139, i32 12, i32 13, i32 14, i32 15, i32 140, i32 141, i32 142, i32 143, i32 24, i32 25, i32 26, i32 27, i32 152, i32 153, i32 154, i32 155, i32 28, i32 29, i32 30, i32 31, i32 156, i32 157, i32 158, i32 159, i32 40, i32 41, i32 42, i32 43, i32 168, i32 169, i32 170, i32 171, i32 44, i32 45, i32 46, i32 47, i32 172, i32 173, i32 174, i32 175, i32 56, i32 57, i32 58, i32 59, i32 184, i32 185, i32 186, i32 187, i32 60, i32 61, i32 62, i32 63, i32 188, i32 189, i32 190, i32 191, i32 72, i32 73, i32 74, i32 75, i32 200, i32 201, i32 202, i32 203, i32 76, i32 77, i32 78, i32 79, i32 204, i32 205, i32 206, i32 207, i32 88, i32 89, i32 90, i32 91, i32 216, i32 217, i32 218, i32 219, i32 92, i32 93, i32 94, i32 95, i32 220, i32 221, i32 222, i32 223, i32 104, i32 105, i32 106, i32 107, i32 232, i32 233, i32 234, i32 235, i32 108, i32 109, i32 110, i32 111, i32 236, i32 237, i32 238, i32 239, i32 120, i32 121, i32 122, i32 123, i32 248, i32 249, i32 250, i32 251, i32 124, i32 125, i32 126, i32 127, i32 252, i32 253, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_0d: +; CHECK: [[REG0d:r[0-9]+]] = #13 +; CHECK: vshuff(v1,v0,[[REG0d]]) +define <256 x i8> @vshuff_0d(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 128, i32 2, i32 130, i32 1, i32 129, i32 3, i32 131, i32 4, i32 132, i32 6, i32 134, i32 5, i32 133, i32 7, i32 135, i32 16, i32 144, i32 18, i32 146, i32 17, i32 145, i32 19, i32 147, i32 20, i32 148, i32 22, i32 150, i32 21, i32 149, i32 23, i32 151, i32 32, i32 160, i32 34, i32 162, i32 33, i32 161, i32 35, i32 163, i32 36, i32 164, i32 38, i32 166, i32 37, i32 165, i32 39, i32 167, i32 48, i32 176, i32 50, i32 178, i32 49, i32 177, i32 51, i32 179, i32 52, i32 180, i32 54, i32 182, i32 53, i32 181, i32 55, i32 183, i32 64, i32 192, i32 66, i32 194, i32 65, i32 193, i32 67, i32 195, i32 68, i32 196, i32 70, i32 198, i32 69, i32 197, i32 71, i32 199, i32 80, i32 208, i32 82, i32 210, i32 81, i32 209, i32 83, i32 211, i32 84, i32 212, i32 86, i32 214, i32 85, i32 213, i32 87, i32 215, i32 96, i32 224, i32 98, i32 226, i32 97, i32 225, i32 99, i32 227, i32 100, i32 228, i32 102, i32 230, i32 101, i32 229, i32 103, i32 231, i32 112, i32 240, i32 114, i32 242, i32 113, i32 241, i32 115, i32 243, i32 116, i32 244, i32 118, i32 246, i32 117, i32 245, i32 119, i32 247, i32 8, i32 136, i32 10, i32 138, i32 9, i32 137, i32 11, i32 139, i32 12, i32 140, i32 14, i32 142, i32 13, i32 141, i32 15, i32 143, i32 24, i32 152, i32 26, i32 154, i32 25, i32 153, i32 27, i32 155, i32 28, i32 156, i32 30, i32 158, i32 29, i32 157, i32 31, i32 159, i32 40, i32 168, i32 42, i32 170, i32 41, i32 169, i32 43, i32 171, i32 44, i32 172, i32 46, i32 174, i32 45, i32 173, i32 47, i32 175, i32 56, i32 184, i32 58, i32 186, i32 57, i32 185, i32 59, i32 187, i32 60, i32 188, i32 62, i32 190, i32 61, i32 189, i32 63, i32 191, i32 72, i32 200, i32 74, i32 202, i32 73, i32 201, i32 75, i32 203, i32 76, i32 204, i32 78, i32 206, i32 77, i32 205, i32 79, i32 207, i32 88, i32 216, i32 90, i32 218, i32 89, i32 217, i32 91, i32 219, i32 92, i32 220, i32 94, i32 222, i32 93, i32 221, i32 95, i32 223, i32 104, i32 232, i32 106, i32 234, i32 105, i32 233, i32 107, i32 235, i32 108, i32 236, i32 110, i32 238, i32 109, i32 237, i32 111, i32 239, i32 120, i32 248, i32 122, i32 250, i32 121, i32 249, i32 123, i32 251, i32 124, i32 252, i32 126, i32 254, i32 125, i32 253, i32 127, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_0e: +; CHECK: [[REG0e:r[0-9]+]] = #14 +; CHECK: vshuff(v1,v0,[[REG0e]]) +define <256 x i8> @vshuff_0e(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 128, i32 129, i32 2, i32 3, i32 130, i32 131, i32 4, i32 5, i32 132, i32 133, i32 6, i32 7, i32 134, i32 135, i32 16, i32 17, i32 144, i32 145, i32 18, i32 19, i32 146, i32 147, i32 20, i32 21, i32 148, i32 149, i32 22, i32 23, i32 150, i32 151, i32 32, i32 33, i32 160, i32 161, i32 34, i32 35, i32 162, i32 163, i32 36, i32 37, i32 164, i32 165, i32 38, i32 39, i32 166, i32 167, i32 48, i32 49, i32 176, i32 177, i32 50, i32 51, i32 178, i32 179, i32 52, i32 53, i32 180, i32 181, i32 54, i32 55, i32 182, i32 183, i32 64, i32 65, i32 192, i32 193, i32 66, i32 67, i32 194, i32 195, i32 68, i32 69, i32 196, i32 197, i32 70, i32 71, i32 198, i32 199, i32 80, i32 81, i32 208, i32 209, i32 82, i32 83, i32 210, i32 211, i32 84, i32 85, i32 212, i32 213, i32 86, i32 87, i32 214, i32 215, i32 96, i32 97, i32 224, i32 225, i32 98, i32 99, i32 226, i32 227, i32 100, i32 101, i32 228, i32 229, i32 102, i32 103, i32 230, i32 231, i32 112, i32 113, i32 240, i32 241, i32 114, i32 115, i32 242, i32 243, i32 116, i32 117, i32 244, i32 245, i32 118, i32 119, i32 246, i32 247, i32 8, i32 9, i32 136, i32 137, i32 10, i32 11, i32 138, i32 139, i32 12, i32 13, i32 140, i32 141, i32 14, i32 15, i32 142, i32 143, i32 24, i32 25, i32 152, i32 153, i32 26, i32 27, i32 154, i32 155, i32 28, i32 29, i32 156, i32 157, i32 30, i32 31, i32 158, i32 159, i32 40, i32 41, i32 168, i32 169, i32 42, i32 43, i32 170, i32 171, i32 44, i32 45, i32 172, i32 173, i32 46, i32 47, i32 174, i32 175, i32 56, i32 57, i32 184, i32 185, i32 58, i32 59, i32 186, i32 187, i32 60, i32 61, i32 188, i32 189, i32 62, i32 63, i32 190, i32 191, i32 72, i32 73, i32 200, i32 201, i32 74, i32 75, i32 202, i32 203, i32 76, i32 77, i32 204, i32 205, i32 78, i32 79, i32 206, i32 207, i32 88, i32 89, i32 216, i32 217, i32 90, i32 91, i32 218, i32 219, i32 92, i32 93, i32 220, i32 221, i32 94, i32 95, i32 222, i32 223, i32 104, i32 105, i32 232, i32 233, i32 106, i32 107, i32 234, i32 235, i32 108, i32 109, i32 236, i32 237, i32 110, i32 111, i32 238, i32 239, i32 120, i32 121, i32 248, i32 249, i32 122, i32 123, i32 250, i32 251, i32 124, i32 125, i32 252, i32 253, i32 126, i32 127, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_0f: +; CHECK: [[REG0f:r[0-9]+]] = #15 +; CHECK: vshuff(v1,v0,[[REG0f]]) +define <256 x i8> @vshuff_0f(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 128, i32 1, i32 129, i32 2, i32 130, i32 3, i32 131, i32 4, i32 132, i32 5, i32 133, i32 6, i32 134, i32 7, i32 135, i32 16, i32 144, i32 17, i32 145, i32 18, i32 146, i32 19, i32 147, i32 20, i32 148, i32 21, i32 149, i32 22, i32 150, i32 23, i32 151, i32 32, i32 160, i32 33, i32 161, i32 34, i32 162, i32 35, i32 163, i32 36, i32 164, i32 37, i32 165, i32 38, i32 166, i32 39, i32 167, i32 48, i32 176, i32 49, i32 177, i32 50, i32 178, i32 51, i32 179, i32 52, i32 180, i32 53, i32 181, i32 54, i32 182, i32 55, i32 183, i32 64, i32 192, i32 65, i32 193, i32 66, i32 194, i32 67, i32 195, i32 68, i32 196, i32 69, i32 197, i32 70, i32 198, i32 71, i32 199, i32 80, i32 208, i32 81, i32 209, i32 82, i32 210, i32 83, i32 211, i32 84, i32 212, i32 85, i32 213, i32 86, i32 214, i32 87, i32 215, i32 96, i32 224, i32 97, i32 225, i32 98, i32 226, i32 99, i32 227, i32 100, i32 228, i32 101, i32 229, i32 102, i32 230, i32 103, i32 231, i32 112, i32 240, i32 113, i32 241, i32 114, i32 242, i32 115, i32 243, i32 116, i32 244, i32 117, i32 245, i32 118, i32 246, i32 119, i32 247, i32 8, i32 136, i32 9, i32 137, i32 10, i32 138, i32 11, i32 139, i32 12, i32 140, i32 13, i32 141, i32 14, i32 142, i32 15, i32 143, i32 24, i32 152, i32 25, i32 153, i32 26, i32 154, i32 27, i32 155, i32 28, i32 156, i32 29, i32 157, i32 30, i32 158, i32 31, i32 159, i32 40, i32 168, i32 41, i32 169, i32 42, i32 170, i32 43, i32 171, i32 44, i32 172, i32 45, i32 173, i32 46, i32 174, i32 47, i32 175, i32 56, i32 184, i32 57, i32 185, i32 58, i32 186, i32 59, i32 187, i32 60, i32 188, i32 61, i32 189, i32 62, i32 190, i32 63, i32 191, i32 72, i32 200, i32 73, i32 201, i32 74, i32 202, i32 75, i32 203, i32 76, i32 204, i32 77, i32 205, i32 78, i32 206, i32 79, i32 207, i32 88, i32 216, i32 89, i32 217, i32 90, i32 218, i32 91, i32 219, i32 92, i32 220, i32 93, i32 221, i32 94, i32 222, i32 95, i32 223, i32 104, i32 232, i32 105, i32 233, i32 106, i32 234, i32 107, i32 235, i32 108, i32 236, i32 109, i32 237, i32 110, i32 238, i32 111, i32 239, i32 120, i32 248, i32 121, i32 249, i32 122, i32 250, i32 123, i32 251, i32 124, i32 252, i32 125, i32 253, i32 126, i32 254, i32 127, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_10: +; CHECK: [[REG10:r[0-9]+]] = #16 +; CHECK: vshuff(v1,v0,[[REG10]]) +define <256 x i8> @vshuff_10(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 128, i32 129, i32 130, i32 131, i32 132, i32 133, i32 134, i32 135, i32 136, i32 137, i32 138, i32 139, i32 140, i32 141, i32 142, i32 143, i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 160, i32 161, i32 162, i32 163, i32 164, i32 165, i32 166, i32 167, i32 168, i32 169, i32 170, i32 171, i32 172, i32 173, i32 174, i32 175, i32 64, i32 65, i32 66, i32 67, i32 68, i32 69, i32 70, i32 71, i32 72, i32 73, i32 74, i32 75, i32 76, i32 77, i32 78, i32 79, i32 192, i32 193, i32 194, i32 195, i32 196, i32 197, i32 198, i32 199, i32 200, i32 201, i32 202, i32 203, i32 204, i32 205, i32 206, i32 207, i32 96, i32 97, i32 98, i32 99, i32 100, i32 101, i32 102, i32 103, i32 104, i32 105, i32 106, i32 107, i32 108, i32 109, i32 110, i32 111, i32 224, i32 225, i32 226, i32 227, i32 228, i32 229, i32 230, i32 231, i32 232, i32 233, i32 234, i32 235, i32 236, i32 237, i32 238, i32 239, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 144, i32 145, i32 146, i32 147, i32 148, i32 149, i32 150, i32 151, i32 152, i32 153, i32 154, i32 155, i32 156, i32 157, i32 158, i32 159, i32 48, i32 49, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63, i32 176, i32 177, i32 178, i32 179, i32 180, i32 181, i32 182, i32 183, i32 184, i32 185, i32 186, i32 187, i32 188, i32 189, i32 190, i32 191, i32 80, i32 81, i32 82, i32 83, i32 84, i32 85, i32 86, i32 87, i32 88, i32 89, i32 90, i32 91, i32 92, i32 93, i32 94, i32 95, i32 208, i32 209, i32 210, i32 211, i32 212, i32 213, i32 214, i32 215, i32 216, i32 217, i32 218, i32 219, i32 220, i32 221, i32 222, i32 223, i32 112, i32 113, i32 114, i32 115, i32 116, i32 117, i32 118, i32 119, i32 120, i32 121, i32 122, i32 123, i32 124, i32 125, i32 126, i32 127, i32 240, i32 241, i32 242, i32 243, i32 244, i32 245, i32 246, i32 247, i32 248, i32 249, i32 250, i32 251, i32 252, i32 253, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_11: +; CHECK: [[REG11:r[0-9]+]] = #17 +; CHECK: vshuff(v1,v0,[[REG11]]) +define <256 x i8> @vshuff_11(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 128, i32 2, i32 130, i32 4, i32 132, i32 6, i32 134, i32 8, i32 136, i32 10, i32 138, i32 12, i32 140, i32 14, i32 142, i32 1, i32 129, i32 3, i32 131, i32 5, i32 133, i32 7, i32 135, i32 9, i32 137, i32 11, i32 139, i32 13, i32 141, i32 15, i32 143, i32 32, i32 160, i32 34, i32 162, i32 36, i32 164, i32 38, i32 166, i32 40, i32 168, i32 42, i32 170, i32 44, i32 172, i32 46, i32 174, i32 33, i32 161, i32 35, i32 163, i32 37, i32 165, i32 39, i32 167, i32 41, i32 169, i32 43, i32 171, i32 45, i32 173, i32 47, i32 175, i32 64, i32 192, i32 66, i32 194, i32 68, i32 196, i32 70, i32 198, i32 72, i32 200, i32 74, i32 202, i32 76, i32 204, i32 78, i32 206, i32 65, i32 193, i32 67, i32 195, i32 69, i32 197, i32 71, i32 199, i32 73, i32 201, i32 75, i32 203, i32 77, i32 205, i32 79, i32 207, i32 96, i32 224, i32 98, i32 226, i32 100, i32 228, i32 102, i32 230, i32 104, i32 232, i32 106, i32 234, i32 108, i32 236, i32 110, i32 238, i32 97, i32 225, i32 99, i32 227, i32 101, i32 229, i32 103, i32 231, i32 105, i32 233, i32 107, i32 235, i32 109, i32 237, i32 111, i32 239, i32 16, i32 144, i32 18, i32 146, i32 20, i32 148, i32 22, i32 150, i32 24, i32 152, i32 26, i32 154, i32 28, i32 156, i32 30, i32 158, i32 17, i32 145, i32 19, i32 147, i32 21, i32 149, i32 23, i32 151, i32 25, i32 153, i32 27, i32 155, i32 29, i32 157, i32 31, i32 159, i32 48, i32 176, i32 50, i32 178, i32 52, i32 180, i32 54, i32 182, i32 56, i32 184, i32 58, i32 186, i32 60, i32 188, i32 62, i32 190, i32 49, i32 177, i32 51, i32 179, i32 53, i32 181, i32 55, i32 183, i32 57, i32 185, i32 59, i32 187, i32 61, i32 189, i32 63, i32 191, i32 80, i32 208, i32 82, i32 210, i32 84, i32 212, i32 86, i32 214, i32 88, i32 216, i32 90, i32 218, i32 92, i32 220, i32 94, i32 222, i32 81, i32 209, i32 83, i32 211, i32 85, i32 213, i32 87, i32 215, i32 89, i32 217, i32 91, i32 219, i32 93, i32 221, i32 95, i32 223, i32 112, i32 240, i32 114, i32 242, i32 116, i32 244, i32 118, i32 246, i32 120, i32 248, i32 122, i32 250, i32 124, i32 252, i32 126, i32 254, i32 113, i32 241, i32 115, i32 243, i32 117, i32 245, i32 119, i32 247, i32 121, i32 249, i32 123, i32 251, i32 125, i32 253, i32 127, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_12: +; CHECK: [[REG12:r[0-9]+]] = #18 +; CHECK: vshuff(v1,v0,[[REG12]]) +define <256 x i8> @vshuff_12(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 128, i32 129, i32 4, i32 5, i32 132, i32 133, i32 8, i32 9, i32 136, i32 137, i32 12, i32 13, i32 140, i32 141, i32 2, i32 3, i32 130, i32 131, i32 6, i32 7, i32 134, i32 135, i32 10, i32 11, i32 138, i32 139, i32 14, i32 15, i32 142, i32 143, i32 32, i32 33, i32 160, i32 161, i32 36, i32 37, i32 164, i32 165, i32 40, i32 41, i32 168, i32 169, i32 44, i32 45, i32 172, i32 173, i32 34, i32 35, i32 162, i32 163, i32 38, i32 39, i32 166, i32 167, i32 42, i32 43, i32 170, i32 171, i32 46, i32 47, i32 174, i32 175, i32 64, i32 65, i32 192, i32 193, i32 68, i32 69, i32 196, i32 197, i32 72, i32 73, i32 200, i32 201, i32 76, i32 77, i32 204, i32 205, i32 66, i32 67, i32 194, i32 195, i32 70, i32 71, i32 198, i32 199, i32 74, i32 75, i32 202, i32 203, i32 78, i32 79, i32 206, i32 207, i32 96, i32 97, i32 224, i32 225, i32 100, i32 101, i32 228, i32 229, i32 104, i32 105, i32 232, i32 233, i32 108, i32 109, i32 236, i32 237, i32 98, i32 99, i32 226, i32 227, i32 102, i32 103, i32 230, i32 231, i32 106, i32 107, i32 234, i32 235, i32 110, i32 111, i32 238, i32 239, i32 16, i32 17, i32 144, i32 145, i32 20, i32 21, i32 148, i32 149, i32 24, i32 25, i32 152, i32 153, i32 28, i32 29, i32 156, i32 157, i32 18, i32 19, i32 146, i32 147, i32 22, i32 23, i32 150, i32 151, i32 26, i32 27, i32 154, i32 155, i32 30, i32 31, i32 158, i32 159, i32 48, i32 49, i32 176, i32 177, i32 52, i32 53, i32 180, i32 181, i32 56, i32 57, i32 184, i32 185, i32 60, i32 61, i32 188, i32 189, i32 50, i32 51, i32 178, i32 179, i32 54, i32 55, i32 182, i32 183, i32 58, i32 59, i32 186, i32 187, i32 62, i32 63, i32 190, i32 191, i32 80, i32 81, i32 208, i32 209, i32 84, i32 85, i32 212, i32 213, i32 88, i32 89, i32 216, i32 217, i32 92, i32 93, i32 220, i32 221, i32 82, i32 83, i32 210, i32 211, i32 86, i32 87, i32 214, i32 215, i32 90, i32 91, i32 218, i32 219, i32 94, i32 95, i32 222, i32 223, i32 112, i32 113, i32 240, i32 241, i32 116, i32 117, i32 244, i32 245, i32 120, i32 121, i32 248, i32 249, i32 124, i32 125, i32 252, i32 253, i32 114, i32 115, i32 242, i32 243, i32 118, i32 119, i32 246, i32 247, i32 122, i32 123, i32 250, i32 251, i32 126, i32 127, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_13: +; CHECK: [[REG13:r[0-9]+]] = #19 +; CHECK: vshuff(v1,v0,[[REG13]]) +define <256 x i8> @vshuff_13(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 128, i32 1, i32 129, i32 4, i32 132, i32 5, i32 133, i32 8, i32 136, i32 9, i32 137, i32 12, i32 140, i32 13, i32 141, i32 2, i32 130, i32 3, i32 131, i32 6, i32 134, i32 7, i32 135, i32 10, i32 138, i32 11, i32 139, i32 14, i32 142, i32 15, i32 143, i32 32, i32 160, i32 33, i32 161, i32 36, i32 164, i32 37, i32 165, i32 40, i32 168, i32 41, i32 169, i32 44, i32 172, i32 45, i32 173, i32 34, i32 162, i32 35, i32 163, i32 38, i32 166, i32 39, i32 167, i32 42, i32 170, i32 43, i32 171, i32 46, i32 174, i32 47, i32 175, i32 64, i32 192, i32 65, i32 193, i32 68, i32 196, i32 69, i32 197, i32 72, i32 200, i32 73, i32 201, i32 76, i32 204, i32 77, i32 205, i32 66, i32 194, i32 67, i32 195, i32 70, i32 198, i32 71, i32 199, i32 74, i32 202, i32 75, i32 203, i32 78, i32 206, i32 79, i32 207, i32 96, i32 224, i32 97, i32 225, i32 100, i32 228, i32 101, i32 229, i32 104, i32 232, i32 105, i32 233, i32 108, i32 236, i32 109, i32 237, i32 98, i32 226, i32 99, i32 227, i32 102, i32 230, i32 103, i32 231, i32 106, i32 234, i32 107, i32 235, i32 110, i32 238, i32 111, i32 239, i32 16, i32 144, i32 17, i32 145, i32 20, i32 148, i32 21, i32 149, i32 24, i32 152, i32 25, i32 153, i32 28, i32 156, i32 29, i32 157, i32 18, i32 146, i32 19, i32 147, i32 22, i32 150, i32 23, i32 151, i32 26, i32 154, i32 27, i32 155, i32 30, i32 158, i32 31, i32 159, i32 48, i32 176, i32 49, i32 177, i32 52, i32 180, i32 53, i32 181, i32 56, i32 184, i32 57, i32 185, i32 60, i32 188, i32 61, i32 189, i32 50, i32 178, i32 51, i32 179, i32 54, i32 182, i32 55, i32 183, i32 58, i32 186, i32 59, i32 187, i32 62, i32 190, i32 63, i32 191, i32 80, i32 208, i32 81, i32 209, i32 84, i32 212, i32 85, i32 213, i32 88, i32 216, i32 89, i32 217, i32 92, i32 220, i32 93, i32 221, i32 82, i32 210, i32 83, i32 211, i32 86, i32 214, i32 87, i32 215, i32 90, i32 218, i32 91, i32 219, i32 94, i32 222, i32 95, i32 223, i32 112, i32 240, i32 113, i32 241, i32 116, i32 244, i32 117, i32 245, i32 120, i32 248, i32 121, i32 249, i32 124, i32 252, i32 125, i32 253, i32 114, i32 242, i32 115, i32 243, i32 118, i32 246, i32 119, i32 247, i32 122, i32 250, i32 123, i32 251, i32 126, i32 254, i32 127, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_14: +; CHECK: [[REG14:r[0-9]+]] = #20 +; CHECK: vshuff(v1,v0,[[REG14]]) +define <256 x i8> @vshuff_14(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 2, i32 3, i32 128, i32 129, i32 130, i32 131, i32 8, i32 9, i32 10, i32 11, i32 136, i32 137, i32 138, i32 139, i32 4, i32 5, i32 6, i32 7, i32 132, i32 133, i32 134, i32 135, i32 12, i32 13, i32 14, i32 15, i32 140, i32 141, i32 142, i32 143, i32 32, i32 33, i32 34, i32 35, i32 160, i32 161, i32 162, i32 163, i32 40, i32 41, i32 42, i32 43, i32 168, i32 169, i32 170, i32 171, i32 36, i32 37, i32 38, i32 39, i32 164, i32 165, i32 166, i32 167, i32 44, i32 45, i32 46, i32 47, i32 172, i32 173, i32 174, i32 175, i32 64, i32 65, i32 66, i32 67, i32 192, i32 193, i32 194, i32 195, i32 72, i32 73, i32 74, i32 75, i32 200, i32 201, i32 202, i32 203, i32 68, i32 69, i32 70, i32 71, i32 196, i32 197, i32 198, i32 199, i32 76, i32 77, i32 78, i32 79, i32 204, i32 205, i32 206, i32 207, i32 96, i32 97, i32 98, i32 99, i32 224, i32 225, i32 226, i32 227, i32 104, i32 105, i32 106, i32 107, i32 232, i32 233, i32 234, i32 235, i32 100, i32 101, i32 102, i32 103, i32 228, i32 229, i32 230, i32 231, i32 108, i32 109, i32 110, i32 111, i32 236, i32 237, i32 238, i32 239, i32 16, i32 17, i32 18, i32 19, i32 144, i32 145, i32 146, i32 147, i32 24, i32 25, i32 26, i32 27, i32 152, i32 153, i32 154, i32 155, i32 20, i32 21, i32 22, i32 23, i32 148, i32 149, i32 150, i32 151, i32 28, i32 29, i32 30, i32 31, i32 156, i32 157, i32 158, i32 159, i32 48, i32 49, i32 50, i32 51, i32 176, i32 177, i32 178, i32 179, i32 56, i32 57, i32 58, i32 59, i32 184, i32 185, i32 186, i32 187, i32 52, i32 53, i32 54, i32 55, i32 180, i32 181, i32 182, i32 183, i32 60, i32 61, i32 62, i32 63, i32 188, i32 189, i32 190, i32 191, i32 80, i32 81, i32 82, i32 83, i32 208, i32 209, i32 210, i32 211, i32 88, i32 89, i32 90, i32 91, i32 216, i32 217, i32 218, i32 219, i32 84, i32 85, i32 86, i32 87, i32 212, i32 213, i32 214, i32 215, i32 92, i32 93, i32 94, i32 95, i32 220, i32 221, i32 222, i32 223, i32 112, i32 113, i32 114, i32 115, i32 240, i32 241, i32 242, i32 243, i32 120, i32 121, i32 122, i32 123, i32 248, i32 249, i32 250, i32 251, i32 116, i32 117, i32 118, i32 119, i32 244, i32 245, i32 246, i32 247, i32 124, i32 125, i32 126, i32 127, i32 252, i32 253, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_15: +; CHECK: [[REG15:r[0-9]+]] = #21 +; CHECK: vshuff(v1,v0,[[REG15]]) +define <256 x i8> @vshuff_15(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 128, i32 2, i32 130, i32 1, i32 129, i32 3, i32 131, i32 8, i32 136, i32 10, i32 138, i32 9, i32 137, i32 11, i32 139, i32 4, i32 132, i32 6, i32 134, i32 5, i32 133, i32 7, i32 135, i32 12, i32 140, i32 14, i32 142, i32 13, i32 141, i32 15, i32 143, i32 32, i32 160, i32 34, i32 162, i32 33, i32 161, i32 35, i32 163, i32 40, i32 168, i32 42, i32 170, i32 41, i32 169, i32 43, i32 171, i32 36, i32 164, i32 38, i32 166, i32 37, i32 165, i32 39, i32 167, i32 44, i32 172, i32 46, i32 174, i32 45, i32 173, i32 47, i32 175, i32 64, i32 192, i32 66, i32 194, i32 65, i32 193, i32 67, i32 195, i32 72, i32 200, i32 74, i32 202, i32 73, i32 201, i32 75, i32 203, i32 68, i32 196, i32 70, i32 198, i32 69, i32 197, i32 71, i32 199, i32 76, i32 204, i32 78, i32 206, i32 77, i32 205, i32 79, i32 207, i32 96, i32 224, i32 98, i32 226, i32 97, i32 225, i32 99, i32 227, i32 104, i32 232, i32 106, i32 234, i32 105, i32 233, i32 107, i32 235, i32 100, i32 228, i32 102, i32 230, i32 101, i32 229, i32 103, i32 231, i32 108, i32 236, i32 110, i32 238, i32 109, i32 237, i32 111, i32 239, i32 16, i32 144, i32 18, i32 146, i32 17, i32 145, i32 19, i32 147, i32 24, i32 152, i32 26, i32 154, i32 25, i32 153, i32 27, i32 155, i32 20, i32 148, i32 22, i32 150, i32 21, i32 149, i32 23, i32 151, i32 28, i32 156, i32 30, i32 158, i32 29, i32 157, i32 31, i32 159, i32 48, i32 176, i32 50, i32 178, i32 49, i32 177, i32 51, i32 179, i32 56, i32 184, i32 58, i32 186, i32 57, i32 185, i32 59, i32 187, i32 52, i32 180, i32 54, i32 182, i32 53, i32 181, i32 55, i32 183, i32 60, i32 188, i32 62, i32 190, i32 61, i32 189, i32 63, i32 191, i32 80, i32 208, i32 82, i32 210, i32 81, i32 209, i32 83, i32 211, i32 88, i32 216, i32 90, i32 218, i32 89, i32 217, i32 91, i32 219, i32 84, i32 212, i32 86, i32 214, i32 85, i32 213, i32 87, i32 215, i32 92, i32 220, i32 94, i32 222, i32 93, i32 221, i32 95, i32 223, i32 112, i32 240, i32 114, i32 242, i32 113, i32 241, i32 115, i32 243, i32 120, i32 248, i32 122, i32 250, i32 121, i32 249, i32 123, i32 251, i32 116, i32 244, i32 118, i32 246, i32 117, i32 245, i32 119, i32 247, i32 124, i32 252, i32 126, i32 254, i32 125, i32 253, i32 127, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_16: +; CHECK: [[REG16:r[0-9]+]] = #22 +; CHECK: vshuff(v1,v0,[[REG16]]) +define <256 x i8> @vshuff_16(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 128, i32 129, i32 2, i32 3, i32 130, i32 131, i32 8, i32 9, i32 136, i32 137, i32 10, i32 11, i32 138, i32 139, i32 4, i32 5, i32 132, i32 133, i32 6, i32 7, i32 134, i32 135, i32 12, i32 13, i32 140, i32 141, i32 14, i32 15, i32 142, i32 143, i32 32, i32 33, i32 160, i32 161, i32 34, i32 35, i32 162, i32 163, i32 40, i32 41, i32 168, i32 169, i32 42, i32 43, i32 170, i32 171, i32 36, i32 37, i32 164, i32 165, i32 38, i32 39, i32 166, i32 167, i32 44, i32 45, i32 172, i32 173, i32 46, i32 47, i32 174, i32 175, i32 64, i32 65, i32 192, i32 193, i32 66, i32 67, i32 194, i32 195, i32 72, i32 73, i32 200, i32 201, i32 74, i32 75, i32 202, i32 203, i32 68, i32 69, i32 196, i32 197, i32 70, i32 71, i32 198, i32 199, i32 76, i32 77, i32 204, i32 205, i32 78, i32 79, i32 206, i32 207, i32 96, i32 97, i32 224, i32 225, i32 98, i32 99, i32 226, i32 227, i32 104, i32 105, i32 232, i32 233, i32 106, i32 107, i32 234, i32 235, i32 100, i32 101, i32 228, i32 229, i32 102, i32 103, i32 230, i32 231, i32 108, i32 109, i32 236, i32 237, i32 110, i32 111, i32 238, i32 239, i32 16, i32 17, i32 144, i32 145, i32 18, i32 19, i32 146, i32 147, i32 24, i32 25, i32 152, i32 153, i32 26, i32 27, i32 154, i32 155, i32 20, i32 21, i32 148, i32 149, i32 22, i32 23, i32 150, i32 151, i32 28, i32 29, i32 156, i32 157, i32 30, i32 31, i32 158, i32 159, i32 48, i32 49, i32 176, i32 177, i32 50, i32 51, i32 178, i32 179, i32 56, i32 57, i32 184, i32 185, i32 58, i32 59, i32 186, i32 187, i32 52, i32 53, i32 180, i32 181, i32 54, i32 55, i32 182, i32 183, i32 60, i32 61, i32 188, i32 189, i32 62, i32 63, i32 190, i32 191, i32 80, i32 81, i32 208, i32 209, i32 82, i32 83, i32 210, i32 211, i32 88, i32 89, i32 216, i32 217, i32 90, i32 91, i32 218, i32 219, i32 84, i32 85, i32 212, i32 213, i32 86, i32 87, i32 214, i32 215, i32 92, i32 93, i32 220, i32 221, i32 94, i32 95, i32 222, i32 223, i32 112, i32 113, i32 240, i32 241, i32 114, i32 115, i32 242, i32 243, i32 120, i32 121, i32 248, i32 249, i32 122, i32 123, i32 250, i32 251, i32 116, i32 117, i32 244, i32 245, i32 118, i32 119, i32 246, i32 247, i32 124, i32 125, i32 252, i32 253, i32 126, i32 127, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_17: +; CHECK: [[REG17:r[0-9]+]] = #23 +; CHECK: vshuff(v1,v0,[[REG17]]) +define <256 x i8> @vshuff_17(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 128, i32 1, i32 129, i32 2, i32 130, i32 3, i32 131, i32 8, i32 136, i32 9, i32 137, i32 10, i32 138, i32 11, i32 139, i32 4, i32 132, i32 5, i32 133, i32 6, i32 134, i32 7, i32 135, i32 12, i32 140, i32 13, i32 141, i32 14, i32 142, i32 15, i32 143, i32 32, i32 160, i32 33, i32 161, i32 34, i32 162, i32 35, i32 163, i32 40, i32 168, i32 41, i32 169, i32 42, i32 170, i32 43, i32 171, i32 36, i32 164, i32 37, i32 165, i32 38, i32 166, i32 39, i32 167, i32 44, i32 172, i32 45, i32 173, i32 46, i32 174, i32 47, i32 175, i32 64, i32 192, i32 65, i32 193, i32 66, i32 194, i32 67, i32 195, i32 72, i32 200, i32 73, i32 201, i32 74, i32 202, i32 75, i32 203, i32 68, i32 196, i32 69, i32 197, i32 70, i32 198, i32 71, i32 199, i32 76, i32 204, i32 77, i32 205, i32 78, i32 206, i32 79, i32 207, i32 96, i32 224, i32 97, i32 225, i32 98, i32 226, i32 99, i32 227, i32 104, i32 232, i32 105, i32 233, i32 106, i32 234, i32 107, i32 235, i32 100, i32 228, i32 101, i32 229, i32 102, i32 230, i32 103, i32 231, i32 108, i32 236, i32 109, i32 237, i32 110, i32 238, i32 111, i32 239, i32 16, i32 144, i32 17, i32 145, i32 18, i32 146, i32 19, i32 147, i32 24, i32 152, i32 25, i32 153, i32 26, i32 154, i32 27, i32 155, i32 20, i32 148, i32 21, i32 149, i32 22, i32 150, i32 23, i32 151, i32 28, i32 156, i32 29, i32 157, i32 30, i32 158, i32 31, i32 159, i32 48, i32 176, i32 49, i32 177, i32 50, i32 178, i32 51, i32 179, i32 56, i32 184, i32 57, i32 185, i32 58, i32 186, i32 59, i32 187, i32 52, i32 180, i32 53, i32 181, i32 54, i32 182, i32 55, i32 183, i32 60, i32 188, i32 61, i32 189, i32 62, i32 190, i32 63, i32 191, i32 80, i32 208, i32 81, i32 209, i32 82, i32 210, i32 83, i32 211, i32 88, i32 216, i32 89, i32 217, i32 90, i32 218, i32 91, i32 219, i32 84, i32 212, i32 85, i32 213, i32 86, i32 214, i32 87, i32 215, i32 92, i32 220, i32 93, i32 221, i32 94, i32 222, i32 95, i32 223, i32 112, i32 240, i32 113, i32 241, i32 114, i32 242, i32 115, i32 243, i32 120, i32 248, i32 121, i32 249, i32 122, i32 250, i32 123, i32 251, i32 116, i32 244, i32 117, i32 245, i32 118, i32 246, i32 119, i32 247, i32 124, i32 252, i32 125, i32 253, i32 126, i32 254, i32 127, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_18: +; CHECK: [[REG18:r[0-9]+]] = #24 +; CHECK: vshuff(v1,v0,[[REG18]]) +define <256 x i8> @vshuff_18(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 128, i32 129, i32 130, i32 131, i32 132, i32 133, i32 134, i32 135, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 136, i32 137, i32 138, i32 139, i32 140, i32 141, i32 142, i32 143, i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 160, i32 161, i32 162, i32 163, i32 164, i32 165, i32 166, i32 167, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 168, i32 169, i32 170, i32 171, i32 172, i32 173, i32 174, i32 175, i32 64, i32 65, i32 66, i32 67, i32 68, i32 69, i32 70, i32 71, i32 192, i32 193, i32 194, i32 195, i32 196, i32 197, i32 198, i32 199, i32 72, i32 73, i32 74, i32 75, i32 76, i32 77, i32 78, i32 79, i32 200, i32 201, i32 202, i32 203, i32 204, i32 205, i32 206, i32 207, i32 96, i32 97, i32 98, i32 99, i32 100, i32 101, i32 102, i32 103, i32 224, i32 225, i32 226, i32 227, i32 228, i32 229, i32 230, i32 231, i32 104, i32 105, i32 106, i32 107, i32 108, i32 109, i32 110, i32 111, i32 232, i32 233, i32 234, i32 235, i32 236, i32 237, i32 238, i32 239, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 144, i32 145, i32 146, i32 147, i32 148, i32 149, i32 150, i32 151, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 152, i32 153, i32 154, i32 155, i32 156, i32 157, i32 158, i32 159, i32 48, i32 49, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 176, i32 177, i32 178, i32 179, i32 180, i32 181, i32 182, i32 183, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63, i32 184, i32 185, i32 186, i32 187, i32 188, i32 189, i32 190, i32 191, i32 80, i32 81, i32 82, i32 83, i32 84, i32 85, i32 86, i32 87, i32 208, i32 209, i32 210, i32 211, i32 212, i32 213, i32 214, i32 215, i32 88, i32 89, i32 90, i32 91, i32 92, i32 93, i32 94, i32 95, i32 216, i32 217, i32 218, i32 219, i32 220, i32 221, i32 222, i32 223, i32 112, i32 113, i32 114, i32 115, i32 116, i32 117, i32 118, i32 119, i32 240, i32 241, i32 242, i32 243, i32 244, i32 245, i32 246, i32 247, i32 120, i32 121, i32 122, i32 123, i32 124, i32 125, i32 126, i32 127, i32 248, i32 249, i32 250, i32 251, i32 252, i32 253, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_19: +; CHECK: [[REG19:r[0-9]+]] = #25 +; CHECK: vshuff(v1,v0,[[REG19]]) +define <256 x i8> @vshuff_19(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 128, i32 2, i32 130, i32 4, i32 132, i32 6, i32 134, i32 1, i32 129, i32 3, i32 131, i32 5, i32 133, i32 7, i32 135, i32 8, i32 136, i32 10, i32 138, i32 12, i32 140, i32 14, i32 142, i32 9, i32 137, i32 11, i32 139, i32 13, i32 141, i32 15, i32 143, i32 32, i32 160, i32 34, i32 162, i32 36, i32 164, i32 38, i32 166, i32 33, i32 161, i32 35, i32 163, i32 37, i32 165, i32 39, i32 167, i32 40, i32 168, i32 42, i32 170, i32 44, i32 172, i32 46, i32 174, i32 41, i32 169, i32 43, i32 171, i32 45, i32 173, i32 47, i32 175, i32 64, i32 192, i32 66, i32 194, i32 68, i32 196, i32 70, i32 198, i32 65, i32 193, i32 67, i32 195, i32 69, i32 197, i32 71, i32 199, i32 72, i32 200, i32 74, i32 202, i32 76, i32 204, i32 78, i32 206, i32 73, i32 201, i32 75, i32 203, i32 77, i32 205, i32 79, i32 207, i32 96, i32 224, i32 98, i32 226, i32 100, i32 228, i32 102, i32 230, i32 97, i32 225, i32 99, i32 227, i32 101, i32 229, i32 103, i32 231, i32 104, i32 232, i32 106, i32 234, i32 108, i32 236, i32 110, i32 238, i32 105, i32 233, i32 107, i32 235, i32 109, i32 237, i32 111, i32 239, i32 16, i32 144, i32 18, i32 146, i32 20, i32 148, i32 22, i32 150, i32 17, i32 145, i32 19, i32 147, i32 21, i32 149, i32 23, i32 151, i32 24, i32 152, i32 26, i32 154, i32 28, i32 156, i32 30, i32 158, i32 25, i32 153, i32 27, i32 155, i32 29, i32 157, i32 31, i32 159, i32 48, i32 176, i32 50, i32 178, i32 52, i32 180, i32 54, i32 182, i32 49, i32 177, i32 51, i32 179, i32 53, i32 181, i32 55, i32 183, i32 56, i32 184, i32 58, i32 186, i32 60, i32 188, i32 62, i32 190, i32 57, i32 185, i32 59, i32 187, i32 61, i32 189, i32 63, i32 191, i32 80, i32 208, i32 82, i32 210, i32 84, i32 212, i32 86, i32 214, i32 81, i32 209, i32 83, i32 211, i32 85, i32 213, i32 87, i32 215, i32 88, i32 216, i32 90, i32 218, i32 92, i32 220, i32 94, i32 222, i32 89, i32 217, i32 91, i32 219, i32 93, i32 221, i32 95, i32 223, i32 112, i32 240, i32 114, i32 242, i32 116, i32 244, i32 118, i32 246, i32 113, i32 241, i32 115, i32 243, i32 117, i32 245, i32 119, i32 247, i32 120, i32 248, i32 122, i32 250, i32 124, i32 252, i32 126, i32 254, i32 121, i32 249, i32 123, i32 251, i32 125, i32 253, i32 127, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_1a: +; CHECK: [[REG1a:r[0-9]+]] = #26 +; CHECK: vshuff(v1,v0,[[REG1a]]) +define <256 x i8> @vshuff_1a(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 128, i32 129, i32 4, i32 5, i32 132, i32 133, i32 2, i32 3, i32 130, i32 131, i32 6, i32 7, i32 134, i32 135, i32 8, i32 9, i32 136, i32 137, i32 12, i32 13, i32 140, i32 141, i32 10, i32 11, i32 138, i32 139, i32 14, i32 15, i32 142, i32 143, i32 32, i32 33, i32 160, i32 161, i32 36, i32 37, i32 164, i32 165, i32 34, i32 35, i32 162, i32 163, i32 38, i32 39, i32 166, i32 167, i32 40, i32 41, i32 168, i32 169, i32 44, i32 45, i32 172, i32 173, i32 42, i32 43, i32 170, i32 171, i32 46, i32 47, i32 174, i32 175, i32 64, i32 65, i32 192, i32 193, i32 68, i32 69, i32 196, i32 197, i32 66, i32 67, i32 194, i32 195, i32 70, i32 71, i32 198, i32 199, i32 72, i32 73, i32 200, i32 201, i32 76, i32 77, i32 204, i32 205, i32 74, i32 75, i32 202, i32 203, i32 78, i32 79, i32 206, i32 207, i32 96, i32 97, i32 224, i32 225, i32 100, i32 101, i32 228, i32 229, i32 98, i32 99, i32 226, i32 227, i32 102, i32 103, i32 230, i32 231, i32 104, i32 105, i32 232, i32 233, i32 108, i32 109, i32 236, i32 237, i32 106, i32 107, i32 234, i32 235, i32 110, i32 111, i32 238, i32 239, i32 16, i32 17, i32 144, i32 145, i32 20, i32 21, i32 148, i32 149, i32 18, i32 19, i32 146, i32 147, i32 22, i32 23, i32 150, i32 151, i32 24, i32 25, i32 152, i32 153, i32 28, i32 29, i32 156, i32 157, i32 26, i32 27, i32 154, i32 155, i32 30, i32 31, i32 158, i32 159, i32 48, i32 49, i32 176, i32 177, i32 52, i32 53, i32 180, i32 181, i32 50, i32 51, i32 178, i32 179, i32 54, i32 55, i32 182, i32 183, i32 56, i32 57, i32 184, i32 185, i32 60, i32 61, i32 188, i32 189, i32 58, i32 59, i32 186, i32 187, i32 62, i32 63, i32 190, i32 191, i32 80, i32 81, i32 208, i32 209, i32 84, i32 85, i32 212, i32 213, i32 82, i32 83, i32 210, i32 211, i32 86, i32 87, i32 214, i32 215, i32 88, i32 89, i32 216, i32 217, i32 92, i32 93, i32 220, i32 221, i32 90, i32 91, i32 218, i32 219, i32 94, i32 95, i32 222, i32 223, i32 112, i32 113, i32 240, i32 241, i32 116, i32 117, i32 244, i32 245, i32 114, i32 115, i32 242, i32 243, i32 118, i32 119, i32 246, i32 247, i32 120, i32 121, i32 248, i32 249, i32 124, i32 125, i32 252, i32 253, i32 122, i32 123, i32 250, i32 251, i32 126, i32 127, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_1b: +; CHECK: [[REG1b:r[0-9]+]] = #27 +; CHECK: vshuff(v1,v0,[[REG1b]]) +define <256 x i8> @vshuff_1b(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 128, i32 1, i32 129, i32 4, i32 132, i32 5, i32 133, i32 2, i32 130, i32 3, i32 131, i32 6, i32 134, i32 7, i32 135, i32 8, i32 136, i32 9, i32 137, i32 12, i32 140, i32 13, i32 141, i32 10, i32 138, i32 11, i32 139, i32 14, i32 142, i32 15, i32 143, i32 32, i32 160, i32 33, i32 161, i32 36, i32 164, i32 37, i32 165, i32 34, i32 162, i32 35, i32 163, i32 38, i32 166, i32 39, i32 167, i32 40, i32 168, i32 41, i32 169, i32 44, i32 172, i32 45, i32 173, i32 42, i32 170, i32 43, i32 171, i32 46, i32 174, i32 47, i32 175, i32 64, i32 192, i32 65, i32 193, i32 68, i32 196, i32 69, i32 197, i32 66, i32 194, i32 67, i32 195, i32 70, i32 198, i32 71, i32 199, i32 72, i32 200, i32 73, i32 201, i32 76, i32 204, i32 77, i32 205, i32 74, i32 202, i32 75, i32 203, i32 78, i32 206, i32 79, i32 207, i32 96, i32 224, i32 97, i32 225, i32 100, i32 228, i32 101, i32 229, i32 98, i32 226, i32 99, i32 227, i32 102, i32 230, i32 103, i32 231, i32 104, i32 232, i32 105, i32 233, i32 108, i32 236, i32 109, i32 237, i32 106, i32 234, i32 107, i32 235, i32 110, i32 238, i32 111, i32 239, i32 16, i32 144, i32 17, i32 145, i32 20, i32 148, i32 21, i32 149, i32 18, i32 146, i32 19, i32 147, i32 22, i32 150, i32 23, i32 151, i32 24, i32 152, i32 25, i32 153, i32 28, i32 156, i32 29, i32 157, i32 26, i32 154, i32 27, i32 155, i32 30, i32 158, i32 31, i32 159, i32 48, i32 176, i32 49, i32 177, i32 52, i32 180, i32 53, i32 181, i32 50, i32 178, i32 51, i32 179, i32 54, i32 182, i32 55, i32 183, i32 56, i32 184, i32 57, i32 185, i32 60, i32 188, i32 61, i32 189, i32 58, i32 186, i32 59, i32 187, i32 62, i32 190, i32 63, i32 191, i32 80, i32 208, i32 81, i32 209, i32 84, i32 212, i32 85, i32 213, i32 82, i32 210, i32 83, i32 211, i32 86, i32 214, i32 87, i32 215, i32 88, i32 216, i32 89, i32 217, i32 92, i32 220, i32 93, i32 221, i32 90, i32 218, i32 91, i32 219, i32 94, i32 222, i32 95, i32 223, i32 112, i32 240, i32 113, i32 241, i32 116, i32 244, i32 117, i32 245, i32 114, i32 242, i32 115, i32 243, i32 118, i32 246, i32 119, i32 247, i32 120, i32 248, i32 121, i32 249, i32 124, i32 252, i32 125, i32 253, i32 122, i32 250, i32 123, i32 251, i32 126, i32 254, i32 127, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_1c: +; CHECK: [[REG1c:r[0-9]+]] = #28 +; CHECK: vshuff(v1,v0,[[REG1c]]) +define <256 x i8> @vshuff_1c(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 2, i32 3, i32 128, i32 129, i32 130, i32 131, i32 4, i32 5, i32 6, i32 7, i32 132, i32 133, i32 134, i32 135, i32 8, i32 9, i32 10, i32 11, i32 136, i32 137, i32 138, i32 139, i32 12, i32 13, i32 14, i32 15, i32 140, i32 141, i32 142, i32 143, i32 32, i32 33, i32 34, i32 35, i32 160, i32 161, i32 162, i32 163, i32 36, i32 37, i32 38, i32 39, i32 164, i32 165, i32 166, i32 167, i32 40, i32 41, i32 42, i32 43, i32 168, i32 169, i32 170, i32 171, i32 44, i32 45, i32 46, i32 47, i32 172, i32 173, i32 174, i32 175, i32 64, i32 65, i32 66, i32 67, i32 192, i32 193, i32 194, i32 195, i32 68, i32 69, i32 70, i32 71, i32 196, i32 197, i32 198, i32 199, i32 72, i32 73, i32 74, i32 75, i32 200, i32 201, i32 202, i32 203, i32 76, i32 77, i32 78, i32 79, i32 204, i32 205, i32 206, i32 207, i32 96, i32 97, i32 98, i32 99, i32 224, i32 225, i32 226, i32 227, i32 100, i32 101, i32 102, i32 103, i32 228, i32 229, i32 230, i32 231, i32 104, i32 105, i32 106, i32 107, i32 232, i32 233, i32 234, i32 235, i32 108, i32 109, i32 110, i32 111, i32 236, i32 237, i32 238, i32 239, i32 16, i32 17, i32 18, i32 19, i32 144, i32 145, i32 146, i32 147, i32 20, i32 21, i32 22, i32 23, i32 148, i32 149, i32 150, i32 151, i32 24, i32 25, i32 26, i32 27, i32 152, i32 153, i32 154, i32 155, i32 28, i32 29, i32 30, i32 31, i32 156, i32 157, i32 158, i32 159, i32 48, i32 49, i32 50, i32 51, i32 176, i32 177, i32 178, i32 179, i32 52, i32 53, i32 54, i32 55, i32 180, i32 181, i32 182, i32 183, i32 56, i32 57, i32 58, i32 59, i32 184, i32 185, i32 186, i32 187, i32 60, i32 61, i32 62, i32 63, i32 188, i32 189, i32 190, i32 191, i32 80, i32 81, i32 82, i32 83, i32 208, i32 209, i32 210, i32 211, i32 84, i32 85, i32 86, i32 87, i32 212, i32 213, i32 214, i32 215, i32 88, i32 89, i32 90, i32 91, i32 216, i32 217, i32 218, i32 219, i32 92, i32 93, i32 94, i32 95, i32 220, i32 221, i32 222, i32 223, i32 112, i32 113, i32 114, i32 115, i32 240, i32 241, i32 242, i32 243, i32 116, i32 117, i32 118, i32 119, i32 244, i32 245, i32 246, i32 247, i32 120, i32 121, i32 122, i32 123, i32 248, i32 249, i32 250, i32 251, i32 124, i32 125, i32 126, i32 127, i32 252, i32 253, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_1d: +; CHECK: [[REG1d:r[0-9]+]] = #29 +; CHECK: vshuff(v1,v0,[[REG1d]]) +define <256 x i8> @vshuff_1d(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 128, i32 2, i32 130, i32 1, i32 129, i32 3, i32 131, i32 4, i32 132, i32 6, i32 134, i32 5, i32 133, i32 7, i32 135, i32 8, i32 136, i32 10, i32 138, i32 9, i32 137, i32 11, i32 139, i32 12, i32 140, i32 14, i32 142, i32 13, i32 141, i32 15, i32 143, i32 32, i32 160, i32 34, i32 162, i32 33, i32 161, i32 35, i32 163, i32 36, i32 164, i32 38, i32 166, i32 37, i32 165, i32 39, i32 167, i32 40, i32 168, i32 42, i32 170, i32 41, i32 169, i32 43, i32 171, i32 44, i32 172, i32 46, i32 174, i32 45, i32 173, i32 47, i32 175, i32 64, i32 192, i32 66, i32 194, i32 65, i32 193, i32 67, i32 195, i32 68, i32 196, i32 70, i32 198, i32 69, i32 197, i32 71, i32 199, i32 72, i32 200, i32 74, i32 202, i32 73, i32 201, i32 75, i32 203, i32 76, i32 204, i32 78, i32 206, i32 77, i32 205, i32 79, i32 207, i32 96, i32 224, i32 98, i32 226, i32 97, i32 225, i32 99, i32 227, i32 100, i32 228, i32 102, i32 230, i32 101, i32 229, i32 103, i32 231, i32 104, i32 232, i32 106, i32 234, i32 105, i32 233, i32 107, i32 235, i32 108, i32 236, i32 110, i32 238, i32 109, i32 237, i32 111, i32 239, i32 16, i32 144, i32 18, i32 146, i32 17, i32 145, i32 19, i32 147, i32 20, i32 148, i32 22, i32 150, i32 21, i32 149, i32 23, i32 151, i32 24, i32 152, i32 26, i32 154, i32 25, i32 153, i32 27, i32 155, i32 28, i32 156, i32 30, i32 158, i32 29, i32 157, i32 31, i32 159, i32 48, i32 176, i32 50, i32 178, i32 49, i32 177, i32 51, i32 179, i32 52, i32 180, i32 54, i32 182, i32 53, i32 181, i32 55, i32 183, i32 56, i32 184, i32 58, i32 186, i32 57, i32 185, i32 59, i32 187, i32 60, i32 188, i32 62, i32 190, i32 61, i32 189, i32 63, i32 191, i32 80, i32 208, i32 82, i32 210, i32 81, i32 209, i32 83, i32 211, i32 84, i32 212, i32 86, i32 214, i32 85, i32 213, i32 87, i32 215, i32 88, i32 216, i32 90, i32 218, i32 89, i32 217, i32 91, i32 219, i32 92, i32 220, i32 94, i32 222, i32 93, i32 221, i32 95, i32 223, i32 112, i32 240, i32 114, i32 242, i32 113, i32 241, i32 115, i32 243, i32 116, i32 244, i32 118, i32 246, i32 117, i32 245, i32 119, i32 247, i32 120, i32 248, i32 122, i32 250, i32 121, i32 249, i32 123, i32 251, i32 124, i32 252, i32 126, i32 254, i32 125, i32 253, i32 127, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_1e: +; CHECK: [[REG1e:r[0-9]+]] = #30 +; CHECK: vshuff(v1,v0,[[REG1e]]) +define <256 x i8> @vshuff_1e(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 128, i32 129, i32 2, i32 3, i32 130, i32 131, i32 4, i32 5, i32 132, i32 133, i32 6, i32 7, i32 134, i32 135, i32 8, i32 9, i32 136, i32 137, i32 10, i32 11, i32 138, i32 139, i32 12, i32 13, i32 140, i32 141, i32 14, i32 15, i32 142, i32 143, i32 32, i32 33, i32 160, i32 161, i32 34, i32 35, i32 162, i32 163, i32 36, i32 37, i32 164, i32 165, i32 38, i32 39, i32 166, i32 167, i32 40, i32 41, i32 168, i32 169, i32 42, i32 43, i32 170, i32 171, i32 44, i32 45, i32 172, i32 173, i32 46, i32 47, i32 174, i32 175, i32 64, i32 65, i32 192, i32 193, i32 66, i32 67, i32 194, i32 195, i32 68, i32 69, i32 196, i32 197, i32 70, i32 71, i32 198, i32 199, i32 72, i32 73, i32 200, i32 201, i32 74, i32 75, i32 202, i32 203, i32 76, i32 77, i32 204, i32 205, i32 78, i32 79, i32 206, i32 207, i32 96, i32 97, i32 224, i32 225, i32 98, i32 99, i32 226, i32 227, i32 100, i32 101, i32 228, i32 229, i32 102, i32 103, i32 230, i32 231, i32 104, i32 105, i32 232, i32 233, i32 106, i32 107, i32 234, i32 235, i32 108, i32 109, i32 236, i32 237, i32 110, i32 111, i32 238, i32 239, i32 16, i32 17, i32 144, i32 145, i32 18, i32 19, i32 146, i32 147, i32 20, i32 21, i32 148, i32 149, i32 22, i32 23, i32 150, i32 151, i32 24, i32 25, i32 152, i32 153, i32 26, i32 27, i32 154, i32 155, i32 28, i32 29, i32 156, i32 157, i32 30, i32 31, i32 158, i32 159, i32 48, i32 49, i32 176, i32 177, i32 50, i32 51, i32 178, i32 179, i32 52, i32 53, i32 180, i32 181, i32 54, i32 55, i32 182, i32 183, i32 56, i32 57, i32 184, i32 185, i32 58, i32 59, i32 186, i32 187, i32 60, i32 61, i32 188, i32 189, i32 62, i32 63, i32 190, i32 191, i32 80, i32 81, i32 208, i32 209, i32 82, i32 83, i32 210, i32 211, i32 84, i32 85, i32 212, i32 213, i32 86, i32 87, i32 214, i32 215, i32 88, i32 89, i32 216, i32 217, i32 90, i32 91, i32 218, i32 219, i32 92, i32 93, i32 220, i32 221, i32 94, i32 95, i32 222, i32 223, i32 112, i32 113, i32 240, i32 241, i32 114, i32 115, i32 242, i32 243, i32 116, i32 117, i32 244, i32 245, i32 118, i32 119, i32 246, i32 247, i32 120, i32 121, i32 248, i32 249, i32 122, i32 123, i32 250, i32 251, i32 124, i32 125, i32 252, i32 253, i32 126, i32 127, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_1f: +; CHECK: [[REG1f:r[0-9]+]] = #31 +; CHECK: vshuff(v1,v0,[[REG1f]]) +define <256 x i8> @vshuff_1f(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 128, i32 1, i32 129, i32 2, i32 130, i32 3, i32 131, i32 4, i32 132, i32 5, i32 133, i32 6, i32 134, i32 7, i32 135, i32 8, i32 136, i32 9, i32 137, i32 10, i32 138, i32 11, i32 139, i32 12, i32 140, i32 13, i32 141, i32 14, i32 142, i32 15, i32 143, i32 32, i32 160, i32 33, i32 161, i32 34, i32 162, i32 35, i32 163, i32 36, i32 164, i32 37, i32 165, i32 38, i32 166, i32 39, i32 167, i32 40, i32 168, i32 41, i32 169, i32 42, i32 170, i32 43, i32 171, i32 44, i32 172, i32 45, i32 173, i32 46, i32 174, i32 47, i32 175, i32 64, i32 192, i32 65, i32 193, i32 66, i32 194, i32 67, i32 195, i32 68, i32 196, i32 69, i32 197, i32 70, i32 198, i32 71, i32 199, i32 72, i32 200, i32 73, i32 201, i32 74, i32 202, i32 75, i32 203, i32 76, i32 204, i32 77, i32 205, i32 78, i32 206, i32 79, i32 207, i32 96, i32 224, i32 97, i32 225, i32 98, i32 226, i32 99, i32 227, i32 100, i32 228, i32 101, i32 229, i32 102, i32 230, i32 103, i32 231, i32 104, i32 232, i32 105, i32 233, i32 106, i32 234, i32 107, i32 235, i32 108, i32 236, i32 109, i32 237, i32 110, i32 238, i32 111, i32 239, i32 16, i32 144, i32 17, i32 145, i32 18, i32 146, i32 19, i32 147, i32 20, i32 148, i32 21, i32 149, i32 22, i32 150, i32 23, i32 151, i32 24, i32 152, i32 25, i32 153, i32 26, i32 154, i32 27, i32 155, i32 28, i32 156, i32 29, i32 157, i32 30, i32 158, i32 31, i32 159, i32 48, i32 176, i32 49, i32 177, i32 50, i32 178, i32 51, i32 179, i32 52, i32 180, i32 53, i32 181, i32 54, i32 182, i32 55, i32 183, i32 56, i32 184, i32 57, i32 185, i32 58, i32 186, i32 59, i32 187, i32 60, i32 188, i32 61, i32 189, i32 62, i32 190, i32 63, i32 191, i32 80, i32 208, i32 81, i32 209, i32 82, i32 210, i32 83, i32 211, i32 84, i32 212, i32 85, i32 213, i32 86, i32 214, i32 87, i32 215, i32 88, i32 216, i32 89, i32 217, i32 90, i32 218, i32 91, i32 219, i32 92, i32 220, i32 93, i32 221, i32 94, i32 222, i32 95, i32 223, i32 112, i32 240, i32 113, i32 241, i32 114, i32 242, i32 115, i32 243, i32 116, i32 244, i32 117, i32 245, i32 118, i32 246, i32 119, i32 247, i32 120, i32 248, i32 121, i32 249, i32 122, i32 250, i32 123, i32 251, i32 124, i32 252, i32 125, i32 253, i32 126, i32 254, i32 127, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_20: +; CHECK: [[REG20:r[0-9]+]] = #32 +; CHECK: vshuff(v1,v0,[[REG20]]) +define <256 x i8> @vshuff_20(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 128, i32 129, i32 130, i32 131, i32 132, i32 133, i32 134, i32 135, i32 136, i32 137, i32 138, i32 139, i32 140, i32 141, i32 142, i32 143, i32 144, i32 145, i32 146, i32 147, i32 148, i32 149, i32 150, i32 151, i32 152, i32 153, i32 154, i32 155, i32 156, i32 157, i32 158, i32 159, i32 64, i32 65, i32 66, i32 67, i32 68, i32 69, i32 70, i32 71, i32 72, i32 73, i32 74, i32 75, i32 76, i32 77, i32 78, i32 79, i32 80, i32 81, i32 82, i32 83, i32 84, i32 85, i32 86, i32 87, i32 88, i32 89, i32 90, i32 91, i32 92, i32 93, i32 94, i32 95, i32 192, i32 193, i32 194, i32 195, i32 196, i32 197, i32 198, i32 199, i32 200, i32 201, i32 202, i32 203, i32 204, i32 205, i32 206, i32 207, i32 208, i32 209, i32 210, i32 211, i32 212, i32 213, i32 214, i32 215, i32 216, i32 217, i32 218, i32 219, i32 220, i32 221, i32 222, i32 223, i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 48, i32 49, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63, i32 160, i32 161, i32 162, i32 163, i32 164, i32 165, i32 166, i32 167, i32 168, i32 169, i32 170, i32 171, i32 172, i32 173, i32 174, i32 175, i32 176, i32 177, i32 178, i32 179, i32 180, i32 181, i32 182, i32 183, i32 184, i32 185, i32 186, i32 187, i32 188, i32 189, i32 190, i32 191, i32 96, i32 97, i32 98, i32 99, i32 100, i32 101, i32 102, i32 103, i32 104, i32 105, i32 106, i32 107, i32 108, i32 109, i32 110, i32 111, i32 112, i32 113, i32 114, i32 115, i32 116, i32 117, i32 118, i32 119, i32 120, i32 121, i32 122, i32 123, i32 124, i32 125, i32 126, i32 127, i32 224, i32 225, i32 226, i32 227, i32 228, i32 229, i32 230, i32 231, i32 232, i32 233, i32 234, i32 235, i32 236, i32 237, i32 238, i32 239, i32 240, i32 241, i32 242, i32 243, i32 244, i32 245, i32 246, i32 247, i32 248, i32 249, i32 250, i32 251, i32 252, i32 253, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_21: +; CHECK: [[REG21:r[0-9]+]] = #33 +; CHECK: vshuff(v1,v0,[[REG21]]) +define <256 x i8> @vshuff_21(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 128, i32 2, i32 130, i32 4, i32 132, i32 6, i32 134, i32 8, i32 136, i32 10, i32 138, i32 12, i32 140, i32 14, i32 142, i32 16, i32 144, i32 18, i32 146, i32 20, i32 148, i32 22, i32 150, i32 24, i32 152, i32 26, i32 154, i32 28, i32 156, i32 30, i32 158, i32 1, i32 129, i32 3, i32 131, i32 5, i32 133, i32 7, i32 135, i32 9, i32 137, i32 11, i32 139, i32 13, i32 141, i32 15, i32 143, i32 17, i32 145, i32 19, i32 147, i32 21, i32 149, i32 23, i32 151, i32 25, i32 153, i32 27, i32 155, i32 29, i32 157, i32 31, i32 159, i32 64, i32 192, i32 66, i32 194, i32 68, i32 196, i32 70, i32 198, i32 72, i32 200, i32 74, i32 202, i32 76, i32 204, i32 78, i32 206, i32 80, i32 208, i32 82, i32 210, i32 84, i32 212, i32 86, i32 214, i32 88, i32 216, i32 90, i32 218, i32 92, i32 220, i32 94, i32 222, i32 65, i32 193, i32 67, i32 195, i32 69, i32 197, i32 71, i32 199, i32 73, i32 201, i32 75, i32 203, i32 77, i32 205, i32 79, i32 207, i32 81, i32 209, i32 83, i32 211, i32 85, i32 213, i32 87, i32 215, i32 89, i32 217, i32 91, i32 219, i32 93, i32 221, i32 95, i32 223, i32 32, i32 160, i32 34, i32 162, i32 36, i32 164, i32 38, i32 166, i32 40, i32 168, i32 42, i32 170, i32 44, i32 172, i32 46, i32 174, i32 48, i32 176, i32 50, i32 178, i32 52, i32 180, i32 54, i32 182, i32 56, i32 184, i32 58, i32 186, i32 60, i32 188, i32 62, i32 190, i32 33, i32 161, i32 35, i32 163, i32 37, i32 165, i32 39, i32 167, i32 41, i32 169, i32 43, i32 171, i32 45, i32 173, i32 47, i32 175, i32 49, i32 177, i32 51, i32 179, i32 53, i32 181, i32 55, i32 183, i32 57, i32 185, i32 59, i32 187, i32 61, i32 189, i32 63, i32 191, i32 96, i32 224, i32 98, i32 226, i32 100, i32 228, i32 102, i32 230, i32 104, i32 232, i32 106, i32 234, i32 108, i32 236, i32 110, i32 238, i32 112, i32 240, i32 114, i32 242, i32 116, i32 244, i32 118, i32 246, i32 120, i32 248, i32 122, i32 250, i32 124, i32 252, i32 126, i32 254, i32 97, i32 225, i32 99, i32 227, i32 101, i32 229, i32 103, i32 231, i32 105, i32 233, i32 107, i32 235, i32 109, i32 237, i32 111, i32 239, i32 113, i32 241, i32 115, i32 243, i32 117, i32 245, i32 119, i32 247, i32 121, i32 249, i32 123, i32 251, i32 125, i32 253, i32 127, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_22: +; CHECK: [[REG22:r[0-9]+]] = #34 +; CHECK: vshuff(v1,v0,[[REG22]]) +define <256 x i8> @vshuff_22(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 128, i32 129, i32 4, i32 5, i32 132, i32 133, i32 8, i32 9, i32 136, i32 137, i32 12, i32 13, i32 140, i32 141, i32 16, i32 17, i32 144, i32 145, i32 20, i32 21, i32 148, i32 149, i32 24, i32 25, i32 152, i32 153, i32 28, i32 29, i32 156, i32 157, i32 2, i32 3, i32 130, i32 131, i32 6, i32 7, i32 134, i32 135, i32 10, i32 11, i32 138, i32 139, i32 14, i32 15, i32 142, i32 143, i32 18, i32 19, i32 146, i32 147, i32 22, i32 23, i32 150, i32 151, i32 26, i32 27, i32 154, i32 155, i32 30, i32 31, i32 158, i32 159, i32 64, i32 65, i32 192, i32 193, i32 68, i32 69, i32 196, i32 197, i32 72, i32 73, i32 200, i32 201, i32 76, i32 77, i32 204, i32 205, i32 80, i32 81, i32 208, i32 209, i32 84, i32 85, i32 212, i32 213, i32 88, i32 89, i32 216, i32 217, i32 92, i32 93, i32 220, i32 221, i32 66, i32 67, i32 194, i32 195, i32 70, i32 71, i32 198, i32 199, i32 74, i32 75, i32 202, i32 203, i32 78, i32 79, i32 206, i32 207, i32 82, i32 83, i32 210, i32 211, i32 86, i32 87, i32 214, i32 215, i32 90, i32 91, i32 218, i32 219, i32 94, i32 95, i32 222, i32 223, i32 32, i32 33, i32 160, i32 161, i32 36, i32 37, i32 164, i32 165, i32 40, i32 41, i32 168, i32 169, i32 44, i32 45, i32 172, i32 173, i32 48, i32 49, i32 176, i32 177, i32 52, i32 53, i32 180, i32 181, i32 56, i32 57, i32 184, i32 185, i32 60, i32 61, i32 188, i32 189, i32 34, i32 35, i32 162, i32 163, i32 38, i32 39, i32 166, i32 167, i32 42, i32 43, i32 170, i32 171, i32 46, i32 47, i32 174, i32 175, i32 50, i32 51, i32 178, i32 179, i32 54, i32 55, i32 182, i32 183, i32 58, i32 59, i32 186, i32 187, i32 62, i32 63, i32 190, i32 191, i32 96, i32 97, i32 224, i32 225, i32 100, i32 101, i32 228, i32 229, i32 104, i32 105, i32 232, i32 233, i32 108, i32 109, i32 236, i32 237, i32 112, i32 113, i32 240, i32 241, i32 116, i32 117, i32 244, i32 245, i32 120, i32 121, i32 248, i32 249, i32 124, i32 125, i32 252, i32 253, i32 98, i32 99, i32 226, i32 227, i32 102, i32 103, i32 230, i32 231, i32 106, i32 107, i32 234, i32 235, i32 110, i32 111, i32 238, i32 239, i32 114, i32 115, i32 242, i32 243, i32 118, i32 119, i32 246, i32 247, i32 122, i32 123, i32 250, i32 251, i32 126, i32 127, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_23: +; CHECK: [[REG23:r[0-9]+]] = #35 +; CHECK: vshuff(v1,v0,[[REG23]]) +define <256 x i8> @vshuff_23(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 128, i32 1, i32 129, i32 4, i32 132, i32 5, i32 133, i32 8, i32 136, i32 9, i32 137, i32 12, i32 140, i32 13, i32 141, i32 16, i32 144, i32 17, i32 145, i32 20, i32 148, i32 21, i32 149, i32 24, i32 152, i32 25, i32 153, i32 28, i32 156, i32 29, i32 157, i32 2, i32 130, i32 3, i32 131, i32 6, i32 134, i32 7, i32 135, i32 10, i32 138, i32 11, i32 139, i32 14, i32 142, i32 15, i32 143, i32 18, i32 146, i32 19, i32 147, i32 22, i32 150, i32 23, i32 151, i32 26, i32 154, i32 27, i32 155, i32 30, i32 158, i32 31, i32 159, i32 64, i32 192, i32 65, i32 193, i32 68, i32 196, i32 69, i32 197, i32 72, i32 200, i32 73, i32 201, i32 76, i32 204, i32 77, i32 205, i32 80, i32 208, i32 81, i32 209, i32 84, i32 212, i32 85, i32 213, i32 88, i32 216, i32 89, i32 217, i32 92, i32 220, i32 93, i32 221, i32 66, i32 194, i32 67, i32 195, i32 70, i32 198, i32 71, i32 199, i32 74, i32 202, i32 75, i32 203, i32 78, i32 206, i32 79, i32 207, i32 82, i32 210, i32 83, i32 211, i32 86, i32 214, i32 87, i32 215, i32 90, i32 218, i32 91, i32 219, i32 94, i32 222, i32 95, i32 223, i32 32, i32 160, i32 33, i32 161, i32 36, i32 164, i32 37, i32 165, i32 40, i32 168, i32 41, i32 169, i32 44, i32 172, i32 45, i32 173, i32 48, i32 176, i32 49, i32 177, i32 52, i32 180, i32 53, i32 181, i32 56, i32 184, i32 57, i32 185, i32 60, i32 188, i32 61, i32 189, i32 34, i32 162, i32 35, i32 163, i32 38, i32 166, i32 39, i32 167, i32 42, i32 170, i32 43, i32 171, i32 46, i32 174, i32 47, i32 175, i32 50, i32 178, i32 51, i32 179, i32 54, i32 182, i32 55, i32 183, i32 58, i32 186, i32 59, i32 187, i32 62, i32 190, i32 63, i32 191, i32 96, i32 224, i32 97, i32 225, i32 100, i32 228, i32 101, i32 229, i32 104, i32 232, i32 105, i32 233, i32 108, i32 236, i32 109, i32 237, i32 112, i32 240, i32 113, i32 241, i32 116, i32 244, i32 117, i32 245, i32 120, i32 248, i32 121, i32 249, i32 124, i32 252, i32 125, i32 253, i32 98, i32 226, i32 99, i32 227, i32 102, i32 230, i32 103, i32 231, i32 106, i32 234, i32 107, i32 235, i32 110, i32 238, i32 111, i32 239, i32 114, i32 242, i32 115, i32 243, i32 118, i32 246, i32 119, i32 247, i32 122, i32 250, i32 123, i32 251, i32 126, i32 254, i32 127, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_24: +; CHECK: [[REG24:r[0-9]+]] = #36 +; CHECK: vshuff(v1,v0,[[REG24]]) +define <256 x i8> @vshuff_24(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 2, i32 3, i32 128, i32 129, i32 130, i32 131, i32 8, i32 9, i32 10, i32 11, i32 136, i32 137, i32 138, i32 139, i32 16, i32 17, i32 18, i32 19, i32 144, i32 145, i32 146, i32 147, i32 24, i32 25, i32 26, i32 27, i32 152, i32 153, i32 154, i32 155, i32 4, i32 5, i32 6, i32 7, i32 132, i32 133, i32 134, i32 135, i32 12, i32 13, i32 14, i32 15, i32 140, i32 141, i32 142, i32 143, i32 20, i32 21, i32 22, i32 23, i32 148, i32 149, i32 150, i32 151, i32 28, i32 29, i32 30, i32 31, i32 156, i32 157, i32 158, i32 159, i32 64, i32 65, i32 66, i32 67, i32 192, i32 193, i32 194, i32 195, i32 72, i32 73, i32 74, i32 75, i32 200, i32 201, i32 202, i32 203, i32 80, i32 81, i32 82, i32 83, i32 208, i32 209, i32 210, i32 211, i32 88, i32 89, i32 90, i32 91, i32 216, i32 217, i32 218, i32 219, i32 68, i32 69, i32 70, i32 71, i32 196, i32 197, i32 198, i32 199, i32 76, i32 77, i32 78, i32 79, i32 204, i32 205, i32 206, i32 207, i32 84, i32 85, i32 86, i32 87, i32 212, i32 213, i32 214, i32 215, i32 92, i32 93, i32 94, i32 95, i32 220, i32 221, i32 222, i32 223, i32 32, i32 33, i32 34, i32 35, i32 160, i32 161, i32 162, i32 163, i32 40, i32 41, i32 42, i32 43, i32 168, i32 169, i32 170, i32 171, i32 48, i32 49, i32 50, i32 51, i32 176, i32 177, i32 178, i32 179, i32 56, i32 57, i32 58, i32 59, i32 184, i32 185, i32 186, i32 187, i32 36, i32 37, i32 38, i32 39, i32 164, i32 165, i32 166, i32 167, i32 44, i32 45, i32 46, i32 47, i32 172, i32 173, i32 174, i32 175, i32 52, i32 53, i32 54, i32 55, i32 180, i32 181, i32 182, i32 183, i32 60, i32 61, i32 62, i32 63, i32 188, i32 189, i32 190, i32 191, i32 96, i32 97, i32 98, i32 99, i32 224, i32 225, i32 226, i32 227, i32 104, i32 105, i32 106, i32 107, i32 232, i32 233, i32 234, i32 235, i32 112, i32 113, i32 114, i32 115, i32 240, i32 241, i32 242, i32 243, i32 120, i32 121, i32 122, i32 123, i32 248, i32 249, i32 250, i32 251, i32 100, i32 101, i32 102, i32 103, i32 228, i32 229, i32 230, i32 231, i32 108, i32 109, i32 110, i32 111, i32 236, i32 237, i32 238, i32 239, i32 116, i32 117, i32 118, i32 119, i32 244, i32 245, i32 246, i32 247, i32 124, i32 125, i32 126, i32 127, i32 252, i32 253, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_25: +; CHECK: [[REG25:r[0-9]+]] = #37 +; CHECK: vshuff(v1,v0,[[REG25]]) +define <256 x i8> @vshuff_25(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 128, i32 2, i32 130, i32 1, i32 129, i32 3, i32 131, i32 8, i32 136, i32 10, i32 138, i32 9, i32 137, i32 11, i32 139, i32 16, i32 144, i32 18, i32 146, i32 17, i32 145, i32 19, i32 147, i32 24, i32 152, i32 26, i32 154, i32 25, i32 153, i32 27, i32 155, i32 4, i32 132, i32 6, i32 134, i32 5, i32 133, i32 7, i32 135, i32 12, i32 140, i32 14, i32 142, i32 13, i32 141, i32 15, i32 143, i32 20, i32 148, i32 22, i32 150, i32 21, i32 149, i32 23, i32 151, i32 28, i32 156, i32 30, i32 158, i32 29, i32 157, i32 31, i32 159, i32 64, i32 192, i32 66, i32 194, i32 65, i32 193, i32 67, i32 195, i32 72, i32 200, i32 74, i32 202, i32 73, i32 201, i32 75, i32 203, i32 80, i32 208, i32 82, i32 210, i32 81, i32 209, i32 83, i32 211, i32 88, i32 216, i32 90, i32 218, i32 89, i32 217, i32 91, i32 219, i32 68, i32 196, i32 70, i32 198, i32 69, i32 197, i32 71, i32 199, i32 76, i32 204, i32 78, i32 206, i32 77, i32 205, i32 79, i32 207, i32 84, i32 212, i32 86, i32 214, i32 85, i32 213, i32 87, i32 215, i32 92, i32 220, i32 94, i32 222, i32 93, i32 221, i32 95, i32 223, i32 32, i32 160, i32 34, i32 162, i32 33, i32 161, i32 35, i32 163, i32 40, i32 168, i32 42, i32 170, i32 41, i32 169, i32 43, i32 171, i32 48, i32 176, i32 50, i32 178, i32 49, i32 177, i32 51, i32 179, i32 56, i32 184, i32 58, i32 186, i32 57, i32 185, i32 59, i32 187, i32 36, i32 164, i32 38, i32 166, i32 37, i32 165, i32 39, i32 167, i32 44, i32 172, i32 46, i32 174, i32 45, i32 173, i32 47, i32 175, i32 52, i32 180, i32 54, i32 182, i32 53, i32 181, i32 55, i32 183, i32 60, i32 188, i32 62, i32 190, i32 61, i32 189, i32 63, i32 191, i32 96, i32 224, i32 98, i32 226, i32 97, i32 225, i32 99, i32 227, i32 104, i32 232, i32 106, i32 234, i32 105, i32 233, i32 107, i32 235, i32 112, i32 240, i32 114, i32 242, i32 113, i32 241, i32 115, i32 243, i32 120, i32 248, i32 122, i32 250, i32 121, i32 249, i32 123, i32 251, i32 100, i32 228, i32 102, i32 230, i32 101, i32 229, i32 103, i32 231, i32 108, i32 236, i32 110, i32 238, i32 109, i32 237, i32 111, i32 239, i32 116, i32 244, i32 118, i32 246, i32 117, i32 245, i32 119, i32 247, i32 124, i32 252, i32 126, i32 254, i32 125, i32 253, i32 127, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_26: +; CHECK: [[REG26:r[0-9]+]] = #38 +; CHECK: vshuff(v1,v0,[[REG26]]) +define <256 x i8> @vshuff_26(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 128, i32 129, i32 2, i32 3, i32 130, i32 131, i32 8, i32 9, i32 136, i32 137, i32 10, i32 11, i32 138, i32 139, i32 16, i32 17, i32 144, i32 145, i32 18, i32 19, i32 146, i32 147, i32 24, i32 25, i32 152, i32 153, i32 26, i32 27, i32 154, i32 155, i32 4, i32 5, i32 132, i32 133, i32 6, i32 7, i32 134, i32 135, i32 12, i32 13, i32 140, i32 141, i32 14, i32 15, i32 142, i32 143, i32 20, i32 21, i32 148, i32 149, i32 22, i32 23, i32 150, i32 151, i32 28, i32 29, i32 156, i32 157, i32 30, i32 31, i32 158, i32 159, i32 64, i32 65, i32 192, i32 193, i32 66, i32 67, i32 194, i32 195, i32 72, i32 73, i32 200, i32 201, i32 74, i32 75, i32 202, i32 203, i32 80, i32 81, i32 208, i32 209, i32 82, i32 83, i32 210, i32 211, i32 88, i32 89, i32 216, i32 217, i32 90, i32 91, i32 218, i32 219, i32 68, i32 69, i32 196, i32 197, i32 70, i32 71, i32 198, i32 199, i32 76, i32 77, i32 204, i32 205, i32 78, i32 79, i32 206, i32 207, i32 84, i32 85, i32 212, i32 213, i32 86, i32 87, i32 214, i32 215, i32 92, i32 93, i32 220, i32 221, i32 94, i32 95, i32 222, i32 223, i32 32, i32 33, i32 160, i32 161, i32 34, i32 35, i32 162, i32 163, i32 40, i32 41, i32 168, i32 169, i32 42, i32 43, i32 170, i32 171, i32 48, i32 49, i32 176, i32 177, i32 50, i32 51, i32 178, i32 179, i32 56, i32 57, i32 184, i32 185, i32 58, i32 59, i32 186, i32 187, i32 36, i32 37, i32 164, i32 165, i32 38, i32 39, i32 166, i32 167, i32 44, i32 45, i32 172, i32 173, i32 46, i32 47, i32 174, i32 175, i32 52, i32 53, i32 180, i32 181, i32 54, i32 55, i32 182, i32 183, i32 60, i32 61, i32 188, i32 189, i32 62, i32 63, i32 190, i32 191, i32 96, i32 97, i32 224, i32 225, i32 98, i32 99, i32 226, i32 227, i32 104, i32 105, i32 232, i32 233, i32 106, i32 107, i32 234, i32 235, i32 112, i32 113, i32 240, i32 241, i32 114, i32 115, i32 242, i32 243, i32 120, i32 121, i32 248, i32 249, i32 122, i32 123, i32 250, i32 251, i32 100, i32 101, i32 228, i32 229, i32 102, i32 103, i32 230, i32 231, i32 108, i32 109, i32 236, i32 237, i32 110, i32 111, i32 238, i32 239, i32 116, i32 117, i32 244, i32 245, i32 118, i32 119, i32 246, i32 247, i32 124, i32 125, i32 252, i32 253, i32 126, i32 127, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_27: +; CHECK: [[REG27:r[0-9]+]] = #39 +; CHECK: vshuff(v1,v0,[[REG27]]) +define <256 x i8> @vshuff_27(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 128, i32 1, i32 129, i32 2, i32 130, i32 3, i32 131, i32 8, i32 136, i32 9, i32 137, i32 10, i32 138, i32 11, i32 139, i32 16, i32 144, i32 17, i32 145, i32 18, i32 146, i32 19, i32 147, i32 24, i32 152, i32 25, i32 153, i32 26, i32 154, i32 27, i32 155, i32 4, i32 132, i32 5, i32 133, i32 6, i32 134, i32 7, i32 135, i32 12, i32 140, i32 13, i32 141, i32 14, i32 142, i32 15, i32 143, i32 20, i32 148, i32 21, i32 149, i32 22, i32 150, i32 23, i32 151, i32 28, i32 156, i32 29, i32 157, i32 30, i32 158, i32 31, i32 159, i32 64, i32 192, i32 65, i32 193, i32 66, i32 194, i32 67, i32 195, i32 72, i32 200, i32 73, i32 201, i32 74, i32 202, i32 75, i32 203, i32 80, i32 208, i32 81, i32 209, i32 82, i32 210, i32 83, i32 211, i32 88, i32 216, i32 89, i32 217, i32 90, i32 218, i32 91, i32 219, i32 68, i32 196, i32 69, i32 197, i32 70, i32 198, i32 71, i32 199, i32 76, i32 204, i32 77, i32 205, i32 78, i32 206, i32 79, i32 207, i32 84, i32 212, i32 85, i32 213, i32 86, i32 214, i32 87, i32 215, i32 92, i32 220, i32 93, i32 221, i32 94, i32 222, i32 95, i32 223, i32 32, i32 160, i32 33, i32 161, i32 34, i32 162, i32 35, i32 163, i32 40, i32 168, i32 41, i32 169, i32 42, i32 170, i32 43, i32 171, i32 48, i32 176, i32 49, i32 177, i32 50, i32 178, i32 51, i32 179, i32 56, i32 184, i32 57, i32 185, i32 58, i32 186, i32 59, i32 187, i32 36, i32 164, i32 37, i32 165, i32 38, i32 166, i32 39, i32 167, i32 44, i32 172, i32 45, i32 173, i32 46, i32 174, i32 47, i32 175, i32 52, i32 180, i32 53, i32 181, i32 54, i32 182, i32 55, i32 183, i32 60, i32 188, i32 61, i32 189, i32 62, i32 190, i32 63, i32 191, i32 96, i32 224, i32 97, i32 225, i32 98, i32 226, i32 99, i32 227, i32 104, i32 232, i32 105, i32 233, i32 106, i32 234, i32 107, i32 235, i32 112, i32 240, i32 113, i32 241, i32 114, i32 242, i32 115, i32 243, i32 120, i32 248, i32 121, i32 249, i32 122, i32 250, i32 123, i32 251, i32 100, i32 228, i32 101, i32 229, i32 102, i32 230, i32 103, i32 231, i32 108, i32 236, i32 109, i32 237, i32 110, i32 238, i32 111, i32 239, i32 116, i32 244, i32 117, i32 245, i32 118, i32 246, i32 119, i32 247, i32 124, i32 252, i32 125, i32 253, i32 126, i32 254, i32 127, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_28: +; CHECK: [[REG28:r[0-9]+]] = #40 +; CHECK: vshuff(v1,v0,[[REG28]]) +define <256 x i8> @vshuff_28(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 128, i32 129, i32 130, i32 131, i32 132, i32 133, i32 134, i32 135, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 144, i32 145, i32 146, i32 147, i32 148, i32 149, i32 150, i32 151, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 136, i32 137, i32 138, i32 139, i32 140, i32 141, i32 142, i32 143, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 152, i32 153, i32 154, i32 155, i32 156, i32 157, i32 158, i32 159, i32 64, i32 65, i32 66, i32 67, i32 68, i32 69, i32 70, i32 71, i32 192, i32 193, i32 194, i32 195, i32 196, i32 197, i32 198, i32 199, i32 80, i32 81, i32 82, i32 83, i32 84, i32 85, i32 86, i32 87, i32 208, i32 209, i32 210, i32 211, i32 212, i32 213, i32 214, i32 215, i32 72, i32 73, i32 74, i32 75, i32 76, i32 77, i32 78, i32 79, i32 200, i32 201, i32 202, i32 203, i32 204, i32 205, i32 206, i32 207, i32 88, i32 89, i32 90, i32 91, i32 92, i32 93, i32 94, i32 95, i32 216, i32 217, i32 218, i32 219, i32 220, i32 221, i32 222, i32 223, i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 160, i32 161, i32 162, i32 163, i32 164, i32 165, i32 166, i32 167, i32 48, i32 49, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 176, i32 177, i32 178, i32 179, i32 180, i32 181, i32 182, i32 183, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 168, i32 169, i32 170, i32 171, i32 172, i32 173, i32 174, i32 175, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63, i32 184, i32 185, i32 186, i32 187, i32 188, i32 189, i32 190, i32 191, i32 96, i32 97, i32 98, i32 99, i32 100, i32 101, i32 102, i32 103, i32 224, i32 225, i32 226, i32 227, i32 228, i32 229, i32 230, i32 231, i32 112, i32 113, i32 114, i32 115, i32 116, i32 117, i32 118, i32 119, i32 240, i32 241, i32 242, i32 243, i32 244, i32 245, i32 246, i32 247, i32 104, i32 105, i32 106, i32 107, i32 108, i32 109, i32 110, i32 111, i32 232, i32 233, i32 234, i32 235, i32 236, i32 237, i32 238, i32 239, i32 120, i32 121, i32 122, i32 123, i32 124, i32 125, i32 126, i32 127, i32 248, i32 249, i32 250, i32 251, i32 252, i32 253, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_29: +; CHECK: [[REG29:r[0-9]+]] = #41 +; CHECK: vshuff(v1,v0,[[REG29]]) +define <256 x i8> @vshuff_29(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 128, i32 2, i32 130, i32 4, i32 132, i32 6, i32 134, i32 1, i32 129, i32 3, i32 131, i32 5, i32 133, i32 7, i32 135, i32 16, i32 144, i32 18, i32 146, i32 20, i32 148, i32 22, i32 150, i32 17, i32 145, i32 19, i32 147, i32 21, i32 149, i32 23, i32 151, i32 8, i32 136, i32 10, i32 138, i32 12, i32 140, i32 14, i32 142, i32 9, i32 137, i32 11, i32 139, i32 13, i32 141, i32 15, i32 143, i32 24, i32 152, i32 26, i32 154, i32 28, i32 156, i32 30, i32 158, i32 25, i32 153, i32 27, i32 155, i32 29, i32 157, i32 31, i32 159, i32 64, i32 192, i32 66, i32 194, i32 68, i32 196, i32 70, i32 198, i32 65, i32 193, i32 67, i32 195, i32 69, i32 197, i32 71, i32 199, i32 80, i32 208, i32 82, i32 210, i32 84, i32 212, i32 86, i32 214, i32 81, i32 209, i32 83, i32 211, i32 85, i32 213, i32 87, i32 215, i32 72, i32 200, i32 74, i32 202, i32 76, i32 204, i32 78, i32 206, i32 73, i32 201, i32 75, i32 203, i32 77, i32 205, i32 79, i32 207, i32 88, i32 216, i32 90, i32 218, i32 92, i32 220, i32 94, i32 222, i32 89, i32 217, i32 91, i32 219, i32 93, i32 221, i32 95, i32 223, i32 32, i32 160, i32 34, i32 162, i32 36, i32 164, i32 38, i32 166, i32 33, i32 161, i32 35, i32 163, i32 37, i32 165, i32 39, i32 167, i32 48, i32 176, i32 50, i32 178, i32 52, i32 180, i32 54, i32 182, i32 49, i32 177, i32 51, i32 179, i32 53, i32 181, i32 55, i32 183, i32 40, i32 168, i32 42, i32 170, i32 44, i32 172, i32 46, i32 174, i32 41, i32 169, i32 43, i32 171, i32 45, i32 173, i32 47, i32 175, i32 56, i32 184, i32 58, i32 186, i32 60, i32 188, i32 62, i32 190, i32 57, i32 185, i32 59, i32 187, i32 61, i32 189, i32 63, i32 191, i32 96, i32 224, i32 98, i32 226, i32 100, i32 228, i32 102, i32 230, i32 97, i32 225, i32 99, i32 227, i32 101, i32 229, i32 103, i32 231, i32 112, i32 240, i32 114, i32 242, i32 116, i32 244, i32 118, i32 246, i32 113, i32 241, i32 115, i32 243, i32 117, i32 245, i32 119, i32 247, i32 104, i32 232, i32 106, i32 234, i32 108, i32 236, i32 110, i32 238, i32 105, i32 233, i32 107, i32 235, i32 109, i32 237, i32 111, i32 239, i32 120, i32 248, i32 122, i32 250, i32 124, i32 252, i32 126, i32 254, i32 121, i32 249, i32 123, i32 251, i32 125, i32 253, i32 127, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_2a: +; CHECK: [[REG2a:r[0-9]+]] = #42 +; CHECK: vshuff(v1,v0,[[REG2a]]) +define <256 x i8> @vshuff_2a(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 128, i32 129, i32 4, i32 5, i32 132, i32 133, i32 2, i32 3, i32 130, i32 131, i32 6, i32 7, i32 134, i32 135, i32 16, i32 17, i32 144, i32 145, i32 20, i32 21, i32 148, i32 149, i32 18, i32 19, i32 146, i32 147, i32 22, i32 23, i32 150, i32 151, i32 8, i32 9, i32 136, i32 137, i32 12, i32 13, i32 140, i32 141, i32 10, i32 11, i32 138, i32 139, i32 14, i32 15, i32 142, i32 143, i32 24, i32 25, i32 152, i32 153, i32 28, i32 29, i32 156, i32 157, i32 26, i32 27, i32 154, i32 155, i32 30, i32 31, i32 158, i32 159, i32 64, i32 65, i32 192, i32 193, i32 68, i32 69, i32 196, i32 197, i32 66, i32 67, i32 194, i32 195, i32 70, i32 71, i32 198, i32 199, i32 80, i32 81, i32 208, i32 209, i32 84, i32 85, i32 212, i32 213, i32 82, i32 83, i32 210, i32 211, i32 86, i32 87, i32 214, i32 215, i32 72, i32 73, i32 200, i32 201, i32 76, i32 77, i32 204, i32 205, i32 74, i32 75, i32 202, i32 203, i32 78, i32 79, i32 206, i32 207, i32 88, i32 89, i32 216, i32 217, i32 92, i32 93, i32 220, i32 221, i32 90, i32 91, i32 218, i32 219, i32 94, i32 95, i32 222, i32 223, i32 32, i32 33, i32 160, i32 161, i32 36, i32 37, i32 164, i32 165, i32 34, i32 35, i32 162, i32 163, i32 38, i32 39, i32 166, i32 167, i32 48, i32 49, i32 176, i32 177, i32 52, i32 53, i32 180, i32 181, i32 50, i32 51, i32 178, i32 179, i32 54, i32 55, i32 182, i32 183, i32 40, i32 41, i32 168, i32 169, i32 44, i32 45, i32 172, i32 173, i32 42, i32 43, i32 170, i32 171, i32 46, i32 47, i32 174, i32 175, i32 56, i32 57, i32 184, i32 185, i32 60, i32 61, i32 188, i32 189, i32 58, i32 59, i32 186, i32 187, i32 62, i32 63, i32 190, i32 191, i32 96, i32 97, i32 224, i32 225, i32 100, i32 101, i32 228, i32 229, i32 98, i32 99, i32 226, i32 227, i32 102, i32 103, i32 230, i32 231, i32 112, i32 113, i32 240, i32 241, i32 116, i32 117, i32 244, i32 245, i32 114, i32 115, i32 242, i32 243, i32 118, i32 119, i32 246, i32 247, i32 104, i32 105, i32 232, i32 233, i32 108, i32 109, i32 236, i32 237, i32 106, i32 107, i32 234, i32 235, i32 110, i32 111, i32 238, i32 239, i32 120, i32 121, i32 248, i32 249, i32 124, i32 125, i32 252, i32 253, i32 122, i32 123, i32 250, i32 251, i32 126, i32 127, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_2b: +; CHECK: [[REG2b:r[0-9]+]] = #43 +; CHECK: vshuff(v1,v0,[[REG2b]]) +define <256 x i8> @vshuff_2b(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 128, i32 1, i32 129, i32 4, i32 132, i32 5, i32 133, i32 2, i32 130, i32 3, i32 131, i32 6, i32 134, i32 7, i32 135, i32 16, i32 144, i32 17, i32 145, i32 20, i32 148, i32 21, i32 149, i32 18, i32 146, i32 19, i32 147, i32 22, i32 150, i32 23, i32 151, i32 8, i32 136, i32 9, i32 137, i32 12, i32 140, i32 13, i32 141, i32 10, i32 138, i32 11, i32 139, i32 14, i32 142, i32 15, i32 143, i32 24, i32 152, i32 25, i32 153, i32 28, i32 156, i32 29, i32 157, i32 26, i32 154, i32 27, i32 155, i32 30, i32 158, i32 31, i32 159, i32 64, i32 192, i32 65, i32 193, i32 68, i32 196, i32 69, i32 197, i32 66, i32 194, i32 67, i32 195, i32 70, i32 198, i32 71, i32 199, i32 80, i32 208, i32 81, i32 209, i32 84, i32 212, i32 85, i32 213, i32 82, i32 210, i32 83, i32 211, i32 86, i32 214, i32 87, i32 215, i32 72, i32 200, i32 73, i32 201, i32 76, i32 204, i32 77, i32 205, i32 74, i32 202, i32 75, i32 203, i32 78, i32 206, i32 79, i32 207, i32 88, i32 216, i32 89, i32 217, i32 92, i32 220, i32 93, i32 221, i32 90, i32 218, i32 91, i32 219, i32 94, i32 222, i32 95, i32 223, i32 32, i32 160, i32 33, i32 161, i32 36, i32 164, i32 37, i32 165, i32 34, i32 162, i32 35, i32 163, i32 38, i32 166, i32 39, i32 167, i32 48, i32 176, i32 49, i32 177, i32 52, i32 180, i32 53, i32 181, i32 50, i32 178, i32 51, i32 179, i32 54, i32 182, i32 55, i32 183, i32 40, i32 168, i32 41, i32 169, i32 44, i32 172, i32 45, i32 173, i32 42, i32 170, i32 43, i32 171, i32 46, i32 174, i32 47, i32 175, i32 56, i32 184, i32 57, i32 185, i32 60, i32 188, i32 61, i32 189, i32 58, i32 186, i32 59, i32 187, i32 62, i32 190, i32 63, i32 191, i32 96, i32 224, i32 97, i32 225, i32 100, i32 228, i32 101, i32 229, i32 98, i32 226, i32 99, i32 227, i32 102, i32 230, i32 103, i32 231, i32 112, i32 240, i32 113, i32 241, i32 116, i32 244, i32 117, i32 245, i32 114, i32 242, i32 115, i32 243, i32 118, i32 246, i32 119, i32 247, i32 104, i32 232, i32 105, i32 233, i32 108, i32 236, i32 109, i32 237, i32 106, i32 234, i32 107, i32 235, i32 110, i32 238, i32 111, i32 239, i32 120, i32 248, i32 121, i32 249, i32 124, i32 252, i32 125, i32 253, i32 122, i32 250, i32 123, i32 251, i32 126, i32 254, i32 127, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_2c: +; CHECK: [[REG2c:r[0-9]+]] = #44 +; CHECK: vshuff(v1,v0,[[REG2c]]) +define <256 x i8> @vshuff_2c(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 2, i32 3, i32 128, i32 129, i32 130, i32 131, i32 4, i32 5, i32 6, i32 7, i32 132, i32 133, i32 134, i32 135, i32 16, i32 17, i32 18, i32 19, i32 144, i32 145, i32 146, i32 147, i32 20, i32 21, i32 22, i32 23, i32 148, i32 149, i32 150, i32 151, i32 8, i32 9, i32 10, i32 11, i32 136, i32 137, i32 138, i32 139, i32 12, i32 13, i32 14, i32 15, i32 140, i32 141, i32 142, i32 143, i32 24, i32 25, i32 26, i32 27, i32 152, i32 153, i32 154, i32 155, i32 28, i32 29, i32 30, i32 31, i32 156, i32 157, i32 158, i32 159, i32 64, i32 65, i32 66, i32 67, i32 192, i32 193, i32 194, i32 195, i32 68, i32 69, i32 70, i32 71, i32 196, i32 197, i32 198, i32 199, i32 80, i32 81, i32 82, i32 83, i32 208, i32 209, i32 210, i32 211, i32 84, i32 85, i32 86, i32 87, i32 212, i32 213, i32 214, i32 215, i32 72, i32 73, i32 74, i32 75, i32 200, i32 201, i32 202, i32 203, i32 76, i32 77, i32 78, i32 79, i32 204, i32 205, i32 206, i32 207, i32 88, i32 89, i32 90, i32 91, i32 216, i32 217, i32 218, i32 219, i32 92, i32 93, i32 94, i32 95, i32 220, i32 221, i32 222, i32 223, i32 32, i32 33, i32 34, i32 35, i32 160, i32 161, i32 162, i32 163, i32 36, i32 37, i32 38, i32 39, i32 164, i32 165, i32 166, i32 167, i32 48, i32 49, i32 50, i32 51, i32 176, i32 177, i32 178, i32 179, i32 52, i32 53, i32 54, i32 55, i32 180, i32 181, i32 182, i32 183, i32 40, i32 41, i32 42, i32 43, i32 168, i32 169, i32 170, i32 171, i32 44, i32 45, i32 46, i32 47, i32 172, i32 173, i32 174, i32 175, i32 56, i32 57, i32 58, i32 59, i32 184, i32 185, i32 186, i32 187, i32 60, i32 61, i32 62, i32 63, i32 188, i32 189, i32 190, i32 191, i32 96, i32 97, i32 98, i32 99, i32 224, i32 225, i32 226, i32 227, i32 100, i32 101, i32 102, i32 103, i32 228, i32 229, i32 230, i32 231, i32 112, i32 113, i32 114, i32 115, i32 240, i32 241, i32 242, i32 243, i32 116, i32 117, i32 118, i32 119, i32 244, i32 245, i32 246, i32 247, i32 104, i32 105, i32 106, i32 107, i32 232, i32 233, i32 234, i32 235, i32 108, i32 109, i32 110, i32 111, i32 236, i32 237, i32 238, i32 239, i32 120, i32 121, i32 122, i32 123, i32 248, i32 249, i32 250, i32 251, i32 124, i32 125, i32 126, i32 127, i32 252, i32 253, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_2d: +; CHECK: [[REG2d:r[0-9]+]] = #45 +; CHECK: vshuff(v1,v0,[[REG2d]]) +define <256 x i8> @vshuff_2d(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 128, i32 2, i32 130, i32 1, i32 129, i32 3, i32 131, i32 4, i32 132, i32 6, i32 134, i32 5, i32 133, i32 7, i32 135, i32 16, i32 144, i32 18, i32 146, i32 17, i32 145, i32 19, i32 147, i32 20, i32 148, i32 22, i32 150, i32 21, i32 149, i32 23, i32 151, i32 8, i32 136, i32 10, i32 138, i32 9, i32 137, i32 11, i32 139, i32 12, i32 140, i32 14, i32 142, i32 13, i32 141, i32 15, i32 143, i32 24, i32 152, i32 26, i32 154, i32 25, i32 153, i32 27, i32 155, i32 28, i32 156, i32 30, i32 158, i32 29, i32 157, i32 31, i32 159, i32 64, i32 192, i32 66, i32 194, i32 65, i32 193, i32 67, i32 195, i32 68, i32 196, i32 70, i32 198, i32 69, i32 197, i32 71, i32 199, i32 80, i32 208, i32 82, i32 210, i32 81, i32 209, i32 83, i32 211, i32 84, i32 212, i32 86, i32 214, i32 85, i32 213, i32 87, i32 215, i32 72, i32 200, i32 74, i32 202, i32 73, i32 201, i32 75, i32 203, i32 76, i32 204, i32 78, i32 206, i32 77, i32 205, i32 79, i32 207, i32 88, i32 216, i32 90, i32 218, i32 89, i32 217, i32 91, i32 219, i32 92, i32 220, i32 94, i32 222, i32 93, i32 221, i32 95, i32 223, i32 32, i32 160, i32 34, i32 162, i32 33, i32 161, i32 35, i32 163, i32 36, i32 164, i32 38, i32 166, i32 37, i32 165, i32 39, i32 167, i32 48, i32 176, i32 50, i32 178, i32 49, i32 177, i32 51, i32 179, i32 52, i32 180, i32 54, i32 182, i32 53, i32 181, i32 55, i32 183, i32 40, i32 168, i32 42, i32 170, i32 41, i32 169, i32 43, i32 171, i32 44, i32 172, i32 46, i32 174, i32 45, i32 173, i32 47, i32 175, i32 56, i32 184, i32 58, i32 186, i32 57, i32 185, i32 59, i32 187, i32 60, i32 188, i32 62, i32 190, i32 61, i32 189, i32 63, i32 191, i32 96, i32 224, i32 98, i32 226, i32 97, i32 225, i32 99, i32 227, i32 100, i32 228, i32 102, i32 230, i32 101, i32 229, i32 103, i32 231, i32 112, i32 240, i32 114, i32 242, i32 113, i32 241, i32 115, i32 243, i32 116, i32 244, i32 118, i32 246, i32 117, i32 245, i32 119, i32 247, i32 104, i32 232, i32 106, i32 234, i32 105, i32 233, i32 107, i32 235, i32 108, i32 236, i32 110, i32 238, i32 109, i32 237, i32 111, i32 239, i32 120, i32 248, i32 122, i32 250, i32 121, i32 249, i32 123, i32 251, i32 124, i32 252, i32 126, i32 254, i32 125, i32 253, i32 127, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_2e: +; CHECK: [[REG2e:r[0-9]+]] = #46 +; CHECK: vshuff(v1,v0,[[REG2e]]) +define <256 x i8> @vshuff_2e(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 128, i32 129, i32 2, i32 3, i32 130, i32 131, i32 4, i32 5, i32 132, i32 133, i32 6, i32 7, i32 134, i32 135, i32 16, i32 17, i32 144, i32 145, i32 18, i32 19, i32 146, i32 147, i32 20, i32 21, i32 148, i32 149, i32 22, i32 23, i32 150, i32 151, i32 8, i32 9, i32 136, i32 137, i32 10, i32 11, i32 138, i32 139, i32 12, i32 13, i32 140, i32 141, i32 14, i32 15, i32 142, i32 143, i32 24, i32 25, i32 152, i32 153, i32 26, i32 27, i32 154, i32 155, i32 28, i32 29, i32 156, i32 157, i32 30, i32 31, i32 158, i32 159, i32 64, i32 65, i32 192, i32 193, i32 66, i32 67, i32 194, i32 195, i32 68, i32 69, i32 196, i32 197, i32 70, i32 71, i32 198, i32 199, i32 80, i32 81, i32 208, i32 209, i32 82, i32 83, i32 210, i32 211, i32 84, i32 85, i32 212, i32 213, i32 86, i32 87, i32 214, i32 215, i32 72, i32 73, i32 200, i32 201, i32 74, i32 75, i32 202, i32 203, i32 76, i32 77, i32 204, i32 205, i32 78, i32 79, i32 206, i32 207, i32 88, i32 89, i32 216, i32 217, i32 90, i32 91, i32 218, i32 219, i32 92, i32 93, i32 220, i32 221, i32 94, i32 95, i32 222, i32 223, i32 32, i32 33, i32 160, i32 161, i32 34, i32 35, i32 162, i32 163, i32 36, i32 37, i32 164, i32 165, i32 38, i32 39, i32 166, i32 167, i32 48, i32 49, i32 176, i32 177, i32 50, i32 51, i32 178, i32 179, i32 52, i32 53, i32 180, i32 181, i32 54, i32 55, i32 182, i32 183, i32 40, i32 41, i32 168, i32 169, i32 42, i32 43, i32 170, i32 171, i32 44, i32 45, i32 172, i32 173, i32 46, i32 47, i32 174, i32 175, i32 56, i32 57, i32 184, i32 185, i32 58, i32 59, i32 186, i32 187, i32 60, i32 61, i32 188, i32 189, i32 62, i32 63, i32 190, i32 191, i32 96, i32 97, i32 224, i32 225, i32 98, i32 99, i32 226, i32 227, i32 100, i32 101, i32 228, i32 229, i32 102, i32 103, i32 230, i32 231, i32 112, i32 113, i32 240, i32 241, i32 114, i32 115, i32 242, i32 243, i32 116, i32 117, i32 244, i32 245, i32 118, i32 119, i32 246, i32 247, i32 104, i32 105, i32 232, i32 233, i32 106, i32 107, i32 234, i32 235, i32 108, i32 109, i32 236, i32 237, i32 110, i32 111, i32 238, i32 239, i32 120, i32 121, i32 248, i32 249, i32 122, i32 123, i32 250, i32 251, i32 124, i32 125, i32 252, i32 253, i32 126, i32 127, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_2f: +; CHECK: [[REG2f:r[0-9]+]] = #47 +; CHECK: vshuff(v1,v0,[[REG2f]]) +define <256 x i8> @vshuff_2f(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 128, i32 1, i32 129, i32 2, i32 130, i32 3, i32 131, i32 4, i32 132, i32 5, i32 133, i32 6, i32 134, i32 7, i32 135, i32 16, i32 144, i32 17, i32 145, i32 18, i32 146, i32 19, i32 147, i32 20, i32 148, i32 21, i32 149, i32 22, i32 150, i32 23, i32 151, i32 8, i32 136, i32 9, i32 137, i32 10, i32 138, i32 11, i32 139, i32 12, i32 140, i32 13, i32 141, i32 14, i32 142, i32 15, i32 143, i32 24, i32 152, i32 25, i32 153, i32 26, i32 154, i32 27, i32 155, i32 28, i32 156, i32 29, i32 157, i32 30, i32 158, i32 31, i32 159, i32 64, i32 192, i32 65, i32 193, i32 66, i32 194, i32 67, i32 195, i32 68, i32 196, i32 69, i32 197, i32 70, i32 198, i32 71, i32 199, i32 80, i32 208, i32 81, i32 209, i32 82, i32 210, i32 83, i32 211, i32 84, i32 212, i32 85, i32 213, i32 86, i32 214, i32 87, i32 215, i32 72, i32 200, i32 73, i32 201, i32 74, i32 202, i32 75, i32 203, i32 76, i32 204, i32 77, i32 205, i32 78, i32 206, i32 79, i32 207, i32 88, i32 216, i32 89, i32 217, i32 90, i32 218, i32 91, i32 219, i32 92, i32 220, i32 93, i32 221, i32 94, i32 222, i32 95, i32 223, i32 32, i32 160, i32 33, i32 161, i32 34, i32 162, i32 35, i32 163, i32 36, i32 164, i32 37, i32 165, i32 38, i32 166, i32 39, i32 167, i32 48, i32 176, i32 49, i32 177, i32 50, i32 178, i32 51, i32 179, i32 52, i32 180, i32 53, i32 181, i32 54, i32 182, i32 55, i32 183, i32 40, i32 168, i32 41, i32 169, i32 42, i32 170, i32 43, i32 171, i32 44, i32 172, i32 45, i32 173, i32 46, i32 174, i32 47, i32 175, i32 56, i32 184, i32 57, i32 185, i32 58, i32 186, i32 59, i32 187, i32 60, i32 188, i32 61, i32 189, i32 62, i32 190, i32 63, i32 191, i32 96, i32 224, i32 97, i32 225, i32 98, i32 226, i32 99, i32 227, i32 100, i32 228, i32 101, i32 229, i32 102, i32 230, i32 103, i32 231, i32 112, i32 240, i32 113, i32 241, i32 114, i32 242, i32 115, i32 243, i32 116, i32 244, i32 117, i32 245, i32 118, i32 246, i32 119, i32 247, i32 104, i32 232, i32 105, i32 233, i32 106, i32 234, i32 107, i32 235, i32 108, i32 236, i32 109, i32 237, i32 110, i32 238, i32 111, i32 239, i32 120, i32 248, i32 121, i32 249, i32 122, i32 250, i32 123, i32 251, i32 124, i32 252, i32 125, i32 253, i32 126, i32 254, i32 127, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_30: +; CHECK: [[REG30:r[0-9]+]] = #48 +; CHECK: vshuff(v1,v0,[[REG30]]) +define <256 x i8> @vshuff_30(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 128, i32 129, i32 130, i32 131, i32 132, i32 133, i32 134, i32 135, i32 136, i32 137, i32 138, i32 139, i32 140, i32 141, i32 142, i32 143, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 144, i32 145, i32 146, i32 147, i32 148, i32 149, i32 150, i32 151, i32 152, i32 153, i32 154, i32 155, i32 156, i32 157, i32 158, i32 159, i32 64, i32 65, i32 66, i32 67, i32 68, i32 69, i32 70, i32 71, i32 72, i32 73, i32 74, i32 75, i32 76, i32 77, i32 78, i32 79, i32 192, i32 193, i32 194, i32 195, i32 196, i32 197, i32 198, i32 199, i32 200, i32 201, i32 202, i32 203, i32 204, i32 205, i32 206, i32 207, i32 80, i32 81, i32 82, i32 83, i32 84, i32 85, i32 86, i32 87, i32 88, i32 89, i32 90, i32 91, i32 92, i32 93, i32 94, i32 95, i32 208, i32 209, i32 210, i32 211, i32 212, i32 213, i32 214, i32 215, i32 216, i32 217, i32 218, i32 219, i32 220, i32 221, i32 222, i32 223, i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 160, i32 161, i32 162, i32 163, i32 164, i32 165, i32 166, i32 167, i32 168, i32 169, i32 170, i32 171, i32 172, i32 173, i32 174, i32 175, i32 48, i32 49, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63, i32 176, i32 177, i32 178, i32 179, i32 180, i32 181, i32 182, i32 183, i32 184, i32 185, i32 186, i32 187, i32 188, i32 189, i32 190, i32 191, i32 96, i32 97, i32 98, i32 99, i32 100, i32 101, i32 102, i32 103, i32 104, i32 105, i32 106, i32 107, i32 108, i32 109, i32 110, i32 111, i32 224, i32 225, i32 226, i32 227, i32 228, i32 229, i32 230, i32 231, i32 232, i32 233, i32 234, i32 235, i32 236, i32 237, i32 238, i32 239, i32 112, i32 113, i32 114, i32 115, i32 116, i32 117, i32 118, i32 119, i32 120, i32 121, i32 122, i32 123, i32 124, i32 125, i32 126, i32 127, i32 240, i32 241, i32 242, i32 243, i32 244, i32 245, i32 246, i32 247, i32 248, i32 249, i32 250, i32 251, i32 252, i32 253, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_31: +; CHECK: [[REG31:r[0-9]+]] = #49 +; CHECK: vshuff(v1,v0,[[REG31]]) +define <256 x i8> @vshuff_31(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 128, i32 2, i32 130, i32 4, i32 132, i32 6, i32 134, i32 8, i32 136, i32 10, i32 138, i32 12, i32 140, i32 14, i32 142, i32 1, i32 129, i32 3, i32 131, i32 5, i32 133, i32 7, i32 135, i32 9, i32 137, i32 11, i32 139, i32 13, i32 141, i32 15, i32 143, i32 16, i32 144, i32 18, i32 146, i32 20, i32 148, i32 22, i32 150, i32 24, i32 152, i32 26, i32 154, i32 28, i32 156, i32 30, i32 158, i32 17, i32 145, i32 19, i32 147, i32 21, i32 149, i32 23, i32 151, i32 25, i32 153, i32 27, i32 155, i32 29, i32 157, i32 31, i32 159, i32 64, i32 192, i32 66, i32 194, i32 68, i32 196, i32 70, i32 198, i32 72, i32 200, i32 74, i32 202, i32 76, i32 204, i32 78, i32 206, i32 65, i32 193, i32 67, i32 195, i32 69, i32 197, i32 71, i32 199, i32 73, i32 201, i32 75, i32 203, i32 77, i32 205, i32 79, i32 207, i32 80, i32 208, i32 82, i32 210, i32 84, i32 212, i32 86, i32 214, i32 88, i32 216, i32 90, i32 218, i32 92, i32 220, i32 94, i32 222, i32 81, i32 209, i32 83, i32 211, i32 85, i32 213, i32 87, i32 215, i32 89, i32 217, i32 91, i32 219, i32 93, i32 221, i32 95, i32 223, i32 32, i32 160, i32 34, i32 162, i32 36, i32 164, i32 38, i32 166, i32 40, i32 168, i32 42, i32 170, i32 44, i32 172, i32 46, i32 174, i32 33, i32 161, i32 35, i32 163, i32 37, i32 165, i32 39, i32 167, i32 41, i32 169, i32 43, i32 171, i32 45, i32 173, i32 47, i32 175, i32 48, i32 176, i32 50, i32 178, i32 52, i32 180, i32 54, i32 182, i32 56, i32 184, i32 58, i32 186, i32 60, i32 188, i32 62, i32 190, i32 49, i32 177, i32 51, i32 179, i32 53, i32 181, i32 55, i32 183, i32 57, i32 185, i32 59, i32 187, i32 61, i32 189, i32 63, i32 191, i32 96, i32 224, i32 98, i32 226, i32 100, i32 228, i32 102, i32 230, i32 104, i32 232, i32 106, i32 234, i32 108, i32 236, i32 110, i32 238, i32 97, i32 225, i32 99, i32 227, i32 101, i32 229, i32 103, i32 231, i32 105, i32 233, i32 107, i32 235, i32 109, i32 237, i32 111, i32 239, i32 112, i32 240, i32 114, i32 242, i32 116, i32 244, i32 118, i32 246, i32 120, i32 248, i32 122, i32 250, i32 124, i32 252, i32 126, i32 254, i32 113, i32 241, i32 115, i32 243, i32 117, i32 245, i32 119, i32 247, i32 121, i32 249, i32 123, i32 251, i32 125, i32 253, i32 127, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_32: +; CHECK: [[REG32:r[0-9]+]] = #50 +; CHECK: vshuff(v1,v0,[[REG32]]) +define <256 x i8> @vshuff_32(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 128, i32 129, i32 4, i32 5, i32 132, i32 133, i32 8, i32 9, i32 136, i32 137, i32 12, i32 13, i32 140, i32 141, i32 2, i32 3, i32 130, i32 131, i32 6, i32 7, i32 134, i32 135, i32 10, i32 11, i32 138, i32 139, i32 14, i32 15, i32 142, i32 143, i32 16, i32 17, i32 144, i32 145, i32 20, i32 21, i32 148, i32 149, i32 24, i32 25, i32 152, i32 153, i32 28, i32 29, i32 156, i32 157, i32 18, i32 19, i32 146, i32 147, i32 22, i32 23, i32 150, i32 151, i32 26, i32 27, i32 154, i32 155, i32 30, i32 31, i32 158, i32 159, i32 64, i32 65, i32 192, i32 193, i32 68, i32 69, i32 196, i32 197, i32 72, i32 73, i32 200, i32 201, i32 76, i32 77, i32 204, i32 205, i32 66, i32 67, i32 194, i32 195, i32 70, i32 71, i32 198, i32 199, i32 74, i32 75, i32 202, i32 203, i32 78, i32 79, i32 206, i32 207, i32 80, i32 81, i32 208, i32 209, i32 84, i32 85, i32 212, i32 213, i32 88, i32 89, i32 216, i32 217, i32 92, i32 93, i32 220, i32 221, i32 82, i32 83, i32 210, i32 211, i32 86, i32 87, i32 214, i32 215, i32 90, i32 91, i32 218, i32 219, i32 94, i32 95, i32 222, i32 223, i32 32, i32 33, i32 160, i32 161, i32 36, i32 37, i32 164, i32 165, i32 40, i32 41, i32 168, i32 169, i32 44, i32 45, i32 172, i32 173, i32 34, i32 35, i32 162, i32 163, i32 38, i32 39, i32 166, i32 167, i32 42, i32 43, i32 170, i32 171, i32 46, i32 47, i32 174, i32 175, i32 48, i32 49, i32 176, i32 177, i32 52, i32 53, i32 180, i32 181, i32 56, i32 57, i32 184, i32 185, i32 60, i32 61, i32 188, i32 189, i32 50, i32 51, i32 178, i32 179, i32 54, i32 55, i32 182, i32 183, i32 58, i32 59, i32 186, i32 187, i32 62, i32 63, i32 190, i32 191, i32 96, i32 97, i32 224, i32 225, i32 100, i32 101, i32 228, i32 229, i32 104, i32 105, i32 232, i32 233, i32 108, i32 109, i32 236, i32 237, i32 98, i32 99, i32 226, i32 227, i32 102, i32 103, i32 230, i32 231, i32 106, i32 107, i32 234, i32 235, i32 110, i32 111, i32 238, i32 239, i32 112, i32 113, i32 240, i32 241, i32 116, i32 117, i32 244, i32 245, i32 120, i32 121, i32 248, i32 249, i32 124, i32 125, i32 252, i32 253, i32 114, i32 115, i32 242, i32 243, i32 118, i32 119, i32 246, i32 247, i32 122, i32 123, i32 250, i32 251, i32 126, i32 127, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_33: +; CHECK: [[REG33:r[0-9]+]] = #51 +; CHECK: vshuff(v1,v0,[[REG33]]) +define <256 x i8> @vshuff_33(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 128, i32 1, i32 129, i32 4, i32 132, i32 5, i32 133, i32 8, i32 136, i32 9, i32 137, i32 12, i32 140, i32 13, i32 141, i32 2, i32 130, i32 3, i32 131, i32 6, i32 134, i32 7, i32 135, i32 10, i32 138, i32 11, i32 139, i32 14, i32 142, i32 15, i32 143, i32 16, i32 144, i32 17, i32 145, i32 20, i32 148, i32 21, i32 149, i32 24, i32 152, i32 25, i32 153, i32 28, i32 156, i32 29, i32 157, i32 18, i32 146, i32 19, i32 147, i32 22, i32 150, i32 23, i32 151, i32 26, i32 154, i32 27, i32 155, i32 30, i32 158, i32 31, i32 159, i32 64, i32 192, i32 65, i32 193, i32 68, i32 196, i32 69, i32 197, i32 72, i32 200, i32 73, i32 201, i32 76, i32 204, i32 77, i32 205, i32 66, i32 194, i32 67, i32 195, i32 70, i32 198, i32 71, i32 199, i32 74, i32 202, i32 75, i32 203, i32 78, i32 206, i32 79, i32 207, i32 80, i32 208, i32 81, i32 209, i32 84, i32 212, i32 85, i32 213, i32 88, i32 216, i32 89, i32 217, i32 92, i32 220, i32 93, i32 221, i32 82, i32 210, i32 83, i32 211, i32 86, i32 214, i32 87, i32 215, i32 90, i32 218, i32 91, i32 219, i32 94, i32 222, i32 95, i32 223, i32 32, i32 160, i32 33, i32 161, i32 36, i32 164, i32 37, i32 165, i32 40, i32 168, i32 41, i32 169, i32 44, i32 172, i32 45, i32 173, i32 34, i32 162, i32 35, i32 163, i32 38, i32 166, i32 39, i32 167, i32 42, i32 170, i32 43, i32 171, i32 46, i32 174, i32 47, i32 175, i32 48, i32 176, i32 49, i32 177, i32 52, i32 180, i32 53, i32 181, i32 56, i32 184, i32 57, i32 185, i32 60, i32 188, i32 61, i32 189, i32 50, i32 178, i32 51, i32 179, i32 54, i32 182, i32 55, i32 183, i32 58, i32 186, i32 59, i32 187, i32 62, i32 190, i32 63, i32 191, i32 96, i32 224, i32 97, i32 225, i32 100, i32 228, i32 101, i32 229, i32 104, i32 232, i32 105, i32 233, i32 108, i32 236, i32 109, i32 237, i32 98, i32 226, i32 99, i32 227, i32 102, i32 230, i32 103, i32 231, i32 106, i32 234, i32 107, i32 235, i32 110, i32 238, i32 111, i32 239, i32 112, i32 240, i32 113, i32 241, i32 116, i32 244, i32 117, i32 245, i32 120, i32 248, i32 121, i32 249, i32 124, i32 252, i32 125, i32 253, i32 114, i32 242, i32 115, i32 243, i32 118, i32 246, i32 119, i32 247, i32 122, i32 250, i32 123, i32 251, i32 126, i32 254, i32 127, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_34: +; CHECK: [[REG34:r[0-9]+]] = #52 +; CHECK: vshuff(v1,v0,[[REG34]]) +define <256 x i8> @vshuff_34(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 2, i32 3, i32 128, i32 129, i32 130, i32 131, i32 8, i32 9, i32 10, i32 11, i32 136, i32 137, i32 138, i32 139, i32 4, i32 5, i32 6, i32 7, i32 132, i32 133, i32 134, i32 135, i32 12, i32 13, i32 14, i32 15, i32 140, i32 141, i32 142, i32 143, i32 16, i32 17, i32 18, i32 19, i32 144, i32 145, i32 146, i32 147, i32 24, i32 25, i32 26, i32 27, i32 152, i32 153, i32 154, i32 155, i32 20, i32 21, i32 22, i32 23, i32 148, i32 149, i32 150, i32 151, i32 28, i32 29, i32 30, i32 31, i32 156, i32 157, i32 158, i32 159, i32 64, i32 65, i32 66, i32 67, i32 192, i32 193, i32 194, i32 195, i32 72, i32 73, i32 74, i32 75, i32 200, i32 201, i32 202, i32 203, i32 68, i32 69, i32 70, i32 71, i32 196, i32 197, i32 198, i32 199, i32 76, i32 77, i32 78, i32 79, i32 204, i32 205, i32 206, i32 207, i32 80, i32 81, i32 82, i32 83, i32 208, i32 209, i32 210, i32 211, i32 88, i32 89, i32 90, i32 91, i32 216, i32 217, i32 218, i32 219, i32 84, i32 85, i32 86, i32 87, i32 212, i32 213, i32 214, i32 215, i32 92, i32 93, i32 94, i32 95, i32 220, i32 221, i32 222, i32 223, i32 32, i32 33, i32 34, i32 35, i32 160, i32 161, i32 162, i32 163, i32 40, i32 41, i32 42, i32 43, i32 168, i32 169, i32 170, i32 171, i32 36, i32 37, i32 38, i32 39, i32 164, i32 165, i32 166, i32 167, i32 44, i32 45, i32 46, i32 47, i32 172, i32 173, i32 174, i32 175, i32 48, i32 49, i32 50, i32 51, i32 176, i32 177, i32 178, i32 179, i32 56, i32 57, i32 58, i32 59, i32 184, i32 185, i32 186, i32 187, i32 52, i32 53, i32 54, i32 55, i32 180, i32 181, i32 182, i32 183, i32 60, i32 61, i32 62, i32 63, i32 188, i32 189, i32 190, i32 191, i32 96, i32 97, i32 98, i32 99, i32 224, i32 225, i32 226, i32 227, i32 104, i32 105, i32 106, i32 107, i32 232, i32 233, i32 234, i32 235, i32 100, i32 101, i32 102, i32 103, i32 228, i32 229, i32 230, i32 231, i32 108, i32 109, i32 110, i32 111, i32 236, i32 237, i32 238, i32 239, i32 112, i32 113, i32 114, i32 115, i32 240, i32 241, i32 242, i32 243, i32 120, i32 121, i32 122, i32 123, i32 248, i32 249, i32 250, i32 251, i32 116, i32 117, i32 118, i32 119, i32 244, i32 245, i32 246, i32 247, i32 124, i32 125, i32 126, i32 127, i32 252, i32 253, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_35: +; CHECK: [[REG35:r[0-9]+]] = #53 +; CHECK: vshuff(v1,v0,[[REG35]]) +define <256 x i8> @vshuff_35(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 128, i32 2, i32 130, i32 1, i32 129, i32 3, i32 131, i32 8, i32 136, i32 10, i32 138, i32 9, i32 137, i32 11, i32 139, i32 4, i32 132, i32 6, i32 134, i32 5, i32 133, i32 7, i32 135, i32 12, i32 140, i32 14, i32 142, i32 13, i32 141, i32 15, i32 143, i32 16, i32 144, i32 18, i32 146, i32 17, i32 145, i32 19, i32 147, i32 24, i32 152, i32 26, i32 154, i32 25, i32 153, i32 27, i32 155, i32 20, i32 148, i32 22, i32 150, i32 21, i32 149, i32 23, i32 151, i32 28, i32 156, i32 30, i32 158, i32 29, i32 157, i32 31, i32 159, i32 64, i32 192, i32 66, i32 194, i32 65, i32 193, i32 67, i32 195, i32 72, i32 200, i32 74, i32 202, i32 73, i32 201, i32 75, i32 203, i32 68, i32 196, i32 70, i32 198, i32 69, i32 197, i32 71, i32 199, i32 76, i32 204, i32 78, i32 206, i32 77, i32 205, i32 79, i32 207, i32 80, i32 208, i32 82, i32 210, i32 81, i32 209, i32 83, i32 211, i32 88, i32 216, i32 90, i32 218, i32 89, i32 217, i32 91, i32 219, i32 84, i32 212, i32 86, i32 214, i32 85, i32 213, i32 87, i32 215, i32 92, i32 220, i32 94, i32 222, i32 93, i32 221, i32 95, i32 223, i32 32, i32 160, i32 34, i32 162, i32 33, i32 161, i32 35, i32 163, i32 40, i32 168, i32 42, i32 170, i32 41, i32 169, i32 43, i32 171, i32 36, i32 164, i32 38, i32 166, i32 37, i32 165, i32 39, i32 167, i32 44, i32 172, i32 46, i32 174, i32 45, i32 173, i32 47, i32 175, i32 48, i32 176, i32 50, i32 178, i32 49, i32 177, i32 51, i32 179, i32 56, i32 184, i32 58, i32 186, i32 57, i32 185, i32 59, i32 187, i32 52, i32 180, i32 54, i32 182, i32 53, i32 181, i32 55, i32 183, i32 60, i32 188, i32 62, i32 190, i32 61, i32 189, i32 63, i32 191, i32 96, i32 224, i32 98, i32 226, i32 97, i32 225, i32 99, i32 227, i32 104, i32 232, i32 106, i32 234, i32 105, i32 233, i32 107, i32 235, i32 100, i32 228, i32 102, i32 230, i32 101, i32 229, i32 103, i32 231, i32 108, i32 236, i32 110, i32 238, i32 109, i32 237, i32 111, i32 239, i32 112, i32 240, i32 114, i32 242, i32 113, i32 241, i32 115, i32 243, i32 120, i32 248, i32 122, i32 250, i32 121, i32 249, i32 123, i32 251, i32 116, i32 244, i32 118, i32 246, i32 117, i32 245, i32 119, i32 247, i32 124, i32 252, i32 126, i32 254, i32 125, i32 253, i32 127, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_36: +; CHECK: [[REG36:r[0-9]+]] = #54 +; CHECK: vshuff(v1,v0,[[REG36]]) +define <256 x i8> @vshuff_36(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 128, i32 129, i32 2, i32 3, i32 130, i32 131, i32 8, i32 9, i32 136, i32 137, i32 10, i32 11, i32 138, i32 139, i32 4, i32 5, i32 132, i32 133, i32 6, i32 7, i32 134, i32 135, i32 12, i32 13, i32 140, i32 141, i32 14, i32 15, i32 142, i32 143, i32 16, i32 17, i32 144, i32 145, i32 18, i32 19, i32 146, i32 147, i32 24, i32 25, i32 152, i32 153, i32 26, i32 27, i32 154, i32 155, i32 20, i32 21, i32 148, i32 149, i32 22, i32 23, i32 150, i32 151, i32 28, i32 29, i32 156, i32 157, i32 30, i32 31, i32 158, i32 159, i32 64, i32 65, i32 192, i32 193, i32 66, i32 67, i32 194, i32 195, i32 72, i32 73, i32 200, i32 201, i32 74, i32 75, i32 202, i32 203, i32 68, i32 69, i32 196, i32 197, i32 70, i32 71, i32 198, i32 199, i32 76, i32 77, i32 204, i32 205, i32 78, i32 79, i32 206, i32 207, i32 80, i32 81, i32 208, i32 209, i32 82, i32 83, i32 210, i32 211, i32 88, i32 89, i32 216, i32 217, i32 90, i32 91, i32 218, i32 219, i32 84, i32 85, i32 212, i32 213, i32 86, i32 87, i32 214, i32 215, i32 92, i32 93, i32 220, i32 221, i32 94, i32 95, i32 222, i32 223, i32 32, i32 33, i32 160, i32 161, i32 34, i32 35, i32 162, i32 163, i32 40, i32 41, i32 168, i32 169, i32 42, i32 43, i32 170, i32 171, i32 36, i32 37, i32 164, i32 165, i32 38, i32 39, i32 166, i32 167, i32 44, i32 45, i32 172, i32 173, i32 46, i32 47, i32 174, i32 175, i32 48, i32 49, i32 176, i32 177, i32 50, i32 51, i32 178, i32 179, i32 56, i32 57, i32 184, i32 185, i32 58, i32 59, i32 186, i32 187, i32 52, i32 53, i32 180, i32 181, i32 54, i32 55, i32 182, i32 183, i32 60, i32 61, i32 188, i32 189, i32 62, i32 63, i32 190, i32 191, i32 96, i32 97, i32 224, i32 225, i32 98, i32 99, i32 226, i32 227, i32 104, i32 105, i32 232, i32 233, i32 106, i32 107, i32 234, i32 235, i32 100, i32 101, i32 228, i32 229, i32 102, i32 103, i32 230, i32 231, i32 108, i32 109, i32 236, i32 237, i32 110, i32 111, i32 238, i32 239, i32 112, i32 113, i32 240, i32 241, i32 114, i32 115, i32 242, i32 243, i32 120, i32 121, i32 248, i32 249, i32 122, i32 123, i32 250, i32 251, i32 116, i32 117, i32 244, i32 245, i32 118, i32 119, i32 246, i32 247, i32 124, i32 125, i32 252, i32 253, i32 126, i32 127, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_37: +; CHECK: [[REG37:r[0-9]+]] = #55 +; CHECK: vshuff(v1,v0,[[REG37]]) +define <256 x i8> @vshuff_37(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 128, i32 1, i32 129, i32 2, i32 130, i32 3, i32 131, i32 8, i32 136, i32 9, i32 137, i32 10, i32 138, i32 11, i32 139, i32 4, i32 132, i32 5, i32 133, i32 6, i32 134, i32 7, i32 135, i32 12, i32 140, i32 13, i32 141, i32 14, i32 142, i32 15, i32 143, i32 16, i32 144, i32 17, i32 145, i32 18, i32 146, i32 19, i32 147, i32 24, i32 152, i32 25, i32 153, i32 26, i32 154, i32 27, i32 155, i32 20, i32 148, i32 21, i32 149, i32 22, i32 150, i32 23, i32 151, i32 28, i32 156, i32 29, i32 157, i32 30, i32 158, i32 31, i32 159, i32 64, i32 192, i32 65, i32 193, i32 66, i32 194, i32 67, i32 195, i32 72, i32 200, i32 73, i32 201, i32 74, i32 202, i32 75, i32 203, i32 68, i32 196, i32 69, i32 197, i32 70, i32 198, i32 71, i32 199, i32 76, i32 204, i32 77, i32 205, i32 78, i32 206, i32 79, i32 207, i32 80, i32 208, i32 81, i32 209, i32 82, i32 210, i32 83, i32 211, i32 88, i32 216, i32 89, i32 217, i32 90, i32 218, i32 91, i32 219, i32 84, i32 212, i32 85, i32 213, i32 86, i32 214, i32 87, i32 215, i32 92, i32 220, i32 93, i32 221, i32 94, i32 222, i32 95, i32 223, i32 32, i32 160, i32 33, i32 161, i32 34, i32 162, i32 35, i32 163, i32 40, i32 168, i32 41, i32 169, i32 42, i32 170, i32 43, i32 171, i32 36, i32 164, i32 37, i32 165, i32 38, i32 166, i32 39, i32 167, i32 44, i32 172, i32 45, i32 173, i32 46, i32 174, i32 47, i32 175, i32 48, i32 176, i32 49, i32 177, i32 50, i32 178, i32 51, i32 179, i32 56, i32 184, i32 57, i32 185, i32 58, i32 186, i32 59, i32 187, i32 52, i32 180, i32 53, i32 181, i32 54, i32 182, i32 55, i32 183, i32 60, i32 188, i32 61, i32 189, i32 62, i32 190, i32 63, i32 191, i32 96, i32 224, i32 97, i32 225, i32 98, i32 226, i32 99, i32 227, i32 104, i32 232, i32 105, i32 233, i32 106, i32 234, i32 107, i32 235, i32 100, i32 228, i32 101, i32 229, i32 102, i32 230, i32 103, i32 231, i32 108, i32 236, i32 109, i32 237, i32 110, i32 238, i32 111, i32 239, i32 112, i32 240, i32 113, i32 241, i32 114, i32 242, i32 115, i32 243, i32 120, i32 248, i32 121, i32 249, i32 122, i32 250, i32 123, i32 251, i32 116, i32 244, i32 117, i32 245, i32 118, i32 246, i32 119, i32 247, i32 124, i32 252, i32 125, i32 253, i32 126, i32 254, i32 127, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_38: +; CHECK: [[REG38:r[0-9]+]] = #56 +; CHECK: vshuff(v1,v0,[[REG38]]) +define <256 x i8> @vshuff_38(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 128, i32 129, i32 130, i32 131, i32 132, i32 133, i32 134, i32 135, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 136, i32 137, i32 138, i32 139, i32 140, i32 141, i32 142, i32 143, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 144, i32 145, i32 146, i32 147, i32 148, i32 149, i32 150, i32 151, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 152, i32 153, i32 154, i32 155, i32 156, i32 157, i32 158, i32 159, i32 64, i32 65, i32 66, i32 67, i32 68, i32 69, i32 70, i32 71, i32 192, i32 193, i32 194, i32 195, i32 196, i32 197, i32 198, i32 199, i32 72, i32 73, i32 74, i32 75, i32 76, i32 77, i32 78, i32 79, i32 200, i32 201, i32 202, i32 203, i32 204, i32 205, i32 206, i32 207, i32 80, i32 81, i32 82, i32 83, i32 84, i32 85, i32 86, i32 87, i32 208, i32 209, i32 210, i32 211, i32 212, i32 213, i32 214, i32 215, i32 88, i32 89, i32 90, i32 91, i32 92, i32 93, i32 94, i32 95, i32 216, i32 217, i32 218, i32 219, i32 220, i32 221, i32 222, i32 223, i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 160, i32 161, i32 162, i32 163, i32 164, i32 165, i32 166, i32 167, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 168, i32 169, i32 170, i32 171, i32 172, i32 173, i32 174, i32 175, i32 48, i32 49, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 176, i32 177, i32 178, i32 179, i32 180, i32 181, i32 182, i32 183, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63, i32 184, i32 185, i32 186, i32 187, i32 188, i32 189, i32 190, i32 191, i32 96, i32 97, i32 98, i32 99, i32 100, i32 101, i32 102, i32 103, i32 224, i32 225, i32 226, i32 227, i32 228, i32 229, i32 230, i32 231, i32 104, i32 105, i32 106, i32 107, i32 108, i32 109, i32 110, i32 111, i32 232, i32 233, i32 234, i32 235, i32 236, i32 237, i32 238, i32 239, i32 112, i32 113, i32 114, i32 115, i32 116, i32 117, i32 118, i32 119, i32 240, i32 241, i32 242, i32 243, i32 244, i32 245, i32 246, i32 247, i32 120, i32 121, i32 122, i32 123, i32 124, i32 125, i32 126, i32 127, i32 248, i32 249, i32 250, i32 251, i32 252, i32 253, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_39: +; CHECK: [[REG39:r[0-9]+]] = #57 +; CHECK: vshuff(v1,v0,[[REG39]]) +define <256 x i8> @vshuff_39(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 128, i32 2, i32 130, i32 4, i32 132, i32 6, i32 134, i32 1, i32 129, i32 3, i32 131, i32 5, i32 133, i32 7, i32 135, i32 8, i32 136, i32 10, i32 138, i32 12, i32 140, i32 14, i32 142, i32 9, i32 137, i32 11, i32 139, i32 13, i32 141, i32 15, i32 143, i32 16, i32 144, i32 18, i32 146, i32 20, i32 148, i32 22, i32 150, i32 17, i32 145, i32 19, i32 147, i32 21, i32 149, i32 23, i32 151, i32 24, i32 152, i32 26, i32 154, i32 28, i32 156, i32 30, i32 158, i32 25, i32 153, i32 27, i32 155, i32 29, i32 157, i32 31, i32 159, i32 64, i32 192, i32 66, i32 194, i32 68, i32 196, i32 70, i32 198, i32 65, i32 193, i32 67, i32 195, i32 69, i32 197, i32 71, i32 199, i32 72, i32 200, i32 74, i32 202, i32 76, i32 204, i32 78, i32 206, i32 73, i32 201, i32 75, i32 203, i32 77, i32 205, i32 79, i32 207, i32 80, i32 208, i32 82, i32 210, i32 84, i32 212, i32 86, i32 214, i32 81, i32 209, i32 83, i32 211, i32 85, i32 213, i32 87, i32 215, i32 88, i32 216, i32 90, i32 218, i32 92, i32 220, i32 94, i32 222, i32 89, i32 217, i32 91, i32 219, i32 93, i32 221, i32 95, i32 223, i32 32, i32 160, i32 34, i32 162, i32 36, i32 164, i32 38, i32 166, i32 33, i32 161, i32 35, i32 163, i32 37, i32 165, i32 39, i32 167, i32 40, i32 168, i32 42, i32 170, i32 44, i32 172, i32 46, i32 174, i32 41, i32 169, i32 43, i32 171, i32 45, i32 173, i32 47, i32 175, i32 48, i32 176, i32 50, i32 178, i32 52, i32 180, i32 54, i32 182, i32 49, i32 177, i32 51, i32 179, i32 53, i32 181, i32 55, i32 183, i32 56, i32 184, i32 58, i32 186, i32 60, i32 188, i32 62, i32 190, i32 57, i32 185, i32 59, i32 187, i32 61, i32 189, i32 63, i32 191, i32 96, i32 224, i32 98, i32 226, i32 100, i32 228, i32 102, i32 230, i32 97, i32 225, i32 99, i32 227, i32 101, i32 229, i32 103, i32 231, i32 104, i32 232, i32 106, i32 234, i32 108, i32 236, i32 110, i32 238, i32 105, i32 233, i32 107, i32 235, i32 109, i32 237, i32 111, i32 239, i32 112, i32 240, i32 114, i32 242, i32 116, i32 244, i32 118, i32 246, i32 113, i32 241, i32 115, i32 243, i32 117, i32 245, i32 119, i32 247, i32 120, i32 248, i32 122, i32 250, i32 124, i32 252, i32 126, i32 254, i32 121, i32 249, i32 123, i32 251, i32 125, i32 253, i32 127, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_3a: +; CHECK: [[REG3a:r[0-9]+]] = #58 +; CHECK: vshuff(v1,v0,[[REG3a]]) +define <256 x i8> @vshuff_3a(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 128, i32 129, i32 4, i32 5, i32 132, i32 133, i32 2, i32 3, i32 130, i32 131, i32 6, i32 7, i32 134, i32 135, i32 8, i32 9, i32 136, i32 137, i32 12, i32 13, i32 140, i32 141, i32 10, i32 11, i32 138, i32 139, i32 14, i32 15, i32 142, i32 143, i32 16, i32 17, i32 144, i32 145, i32 20, i32 21, i32 148, i32 149, i32 18, i32 19, i32 146, i32 147, i32 22, i32 23, i32 150, i32 151, i32 24, i32 25, i32 152, i32 153, i32 28, i32 29, i32 156, i32 157, i32 26, i32 27, i32 154, i32 155, i32 30, i32 31, i32 158, i32 159, i32 64, i32 65, i32 192, i32 193, i32 68, i32 69, i32 196, i32 197, i32 66, i32 67, i32 194, i32 195, i32 70, i32 71, i32 198, i32 199, i32 72, i32 73, i32 200, i32 201, i32 76, i32 77, i32 204, i32 205, i32 74, i32 75, i32 202, i32 203, i32 78, i32 79, i32 206, i32 207, i32 80, i32 81, i32 208, i32 209, i32 84, i32 85, i32 212, i32 213, i32 82, i32 83, i32 210, i32 211, i32 86, i32 87, i32 214, i32 215, i32 88, i32 89, i32 216, i32 217, i32 92, i32 93, i32 220, i32 221, i32 90, i32 91, i32 218, i32 219, i32 94, i32 95, i32 222, i32 223, i32 32, i32 33, i32 160, i32 161, i32 36, i32 37, i32 164, i32 165, i32 34, i32 35, i32 162, i32 163, i32 38, i32 39, i32 166, i32 167, i32 40, i32 41, i32 168, i32 169, i32 44, i32 45, i32 172, i32 173, i32 42, i32 43, i32 170, i32 171, i32 46, i32 47, i32 174, i32 175, i32 48, i32 49, i32 176, i32 177, i32 52, i32 53, i32 180, i32 181, i32 50, i32 51, i32 178, i32 179, i32 54, i32 55, i32 182, i32 183, i32 56, i32 57, i32 184, i32 185, i32 60, i32 61, i32 188, i32 189, i32 58, i32 59, i32 186, i32 187, i32 62, i32 63, i32 190, i32 191, i32 96, i32 97, i32 224, i32 225, i32 100, i32 101, i32 228, i32 229, i32 98, i32 99, i32 226, i32 227, i32 102, i32 103, i32 230, i32 231, i32 104, i32 105, i32 232, i32 233, i32 108, i32 109, i32 236, i32 237, i32 106, i32 107, i32 234, i32 235, i32 110, i32 111, i32 238, i32 239, i32 112, i32 113, i32 240, i32 241, i32 116, i32 117, i32 244, i32 245, i32 114, i32 115, i32 242, i32 243, i32 118, i32 119, i32 246, i32 247, i32 120, i32 121, i32 248, i32 249, i32 124, i32 125, i32 252, i32 253, i32 122, i32 123, i32 250, i32 251, i32 126, i32 127, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_3b: +; CHECK: [[REG3b:r[0-9]+]] = #59 +; CHECK: vshuff(v1,v0,[[REG3b]]) +define <256 x i8> @vshuff_3b(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 128, i32 1, i32 129, i32 4, i32 132, i32 5, i32 133, i32 2, i32 130, i32 3, i32 131, i32 6, i32 134, i32 7, i32 135, i32 8, i32 136, i32 9, i32 137, i32 12, i32 140, i32 13, i32 141, i32 10, i32 138, i32 11, i32 139, i32 14, i32 142, i32 15, i32 143, i32 16, i32 144, i32 17, i32 145, i32 20, i32 148, i32 21, i32 149, i32 18, i32 146, i32 19, i32 147, i32 22, i32 150, i32 23, i32 151, i32 24, i32 152, i32 25, i32 153, i32 28, i32 156, i32 29, i32 157, i32 26, i32 154, i32 27, i32 155, i32 30, i32 158, i32 31, i32 159, i32 64, i32 192, i32 65, i32 193, i32 68, i32 196, i32 69, i32 197, i32 66, i32 194, i32 67, i32 195, i32 70, i32 198, i32 71, i32 199, i32 72, i32 200, i32 73, i32 201, i32 76, i32 204, i32 77, i32 205, i32 74, i32 202, i32 75, i32 203, i32 78, i32 206, i32 79, i32 207, i32 80, i32 208, i32 81, i32 209, i32 84, i32 212, i32 85, i32 213, i32 82, i32 210, i32 83, i32 211, i32 86, i32 214, i32 87, i32 215, i32 88, i32 216, i32 89, i32 217, i32 92, i32 220, i32 93, i32 221, i32 90, i32 218, i32 91, i32 219, i32 94, i32 222, i32 95, i32 223, i32 32, i32 160, i32 33, i32 161, i32 36, i32 164, i32 37, i32 165, i32 34, i32 162, i32 35, i32 163, i32 38, i32 166, i32 39, i32 167, i32 40, i32 168, i32 41, i32 169, i32 44, i32 172, i32 45, i32 173, i32 42, i32 170, i32 43, i32 171, i32 46, i32 174, i32 47, i32 175, i32 48, i32 176, i32 49, i32 177, i32 52, i32 180, i32 53, i32 181, i32 50, i32 178, i32 51, i32 179, i32 54, i32 182, i32 55, i32 183, i32 56, i32 184, i32 57, i32 185, i32 60, i32 188, i32 61, i32 189, i32 58, i32 186, i32 59, i32 187, i32 62, i32 190, i32 63, i32 191, i32 96, i32 224, i32 97, i32 225, i32 100, i32 228, i32 101, i32 229, i32 98, i32 226, i32 99, i32 227, i32 102, i32 230, i32 103, i32 231, i32 104, i32 232, i32 105, i32 233, i32 108, i32 236, i32 109, i32 237, i32 106, i32 234, i32 107, i32 235, i32 110, i32 238, i32 111, i32 239, i32 112, i32 240, i32 113, i32 241, i32 116, i32 244, i32 117, i32 245, i32 114, i32 242, i32 115, i32 243, i32 118, i32 246, i32 119, i32 247, i32 120, i32 248, i32 121, i32 249, i32 124, i32 252, i32 125, i32 253, i32 122, i32 250, i32 123, i32 251, i32 126, i32 254, i32 127, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_3c: +; CHECK: [[REG3c:r[0-9]+]] = #60 +; CHECK: vshuff(v1,v0,[[REG3c]]) +define <256 x i8> @vshuff_3c(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 2, i32 3, i32 128, i32 129, i32 130, i32 131, i32 4, i32 5, i32 6, i32 7, i32 132, i32 133, i32 134, i32 135, i32 8, i32 9, i32 10, i32 11, i32 136, i32 137, i32 138, i32 139, i32 12, i32 13, i32 14, i32 15, i32 140, i32 141, i32 142, i32 143, i32 16, i32 17, i32 18, i32 19, i32 144, i32 145, i32 146, i32 147, i32 20, i32 21, i32 22, i32 23, i32 148, i32 149, i32 150, i32 151, i32 24, i32 25, i32 26, i32 27, i32 152, i32 153, i32 154, i32 155, i32 28, i32 29, i32 30, i32 31, i32 156, i32 157, i32 158, i32 159, i32 64, i32 65, i32 66, i32 67, i32 192, i32 193, i32 194, i32 195, i32 68, i32 69, i32 70, i32 71, i32 196, i32 197, i32 198, i32 199, i32 72, i32 73, i32 74, i32 75, i32 200, i32 201, i32 202, i32 203, i32 76, i32 77, i32 78, i32 79, i32 204, i32 205, i32 206, i32 207, i32 80, i32 81, i32 82, i32 83, i32 208, i32 209, i32 210, i32 211, i32 84, i32 85, i32 86, i32 87, i32 212, i32 213, i32 214, i32 215, i32 88, i32 89, i32 90, i32 91, i32 216, i32 217, i32 218, i32 219, i32 92, i32 93, i32 94, i32 95, i32 220, i32 221, i32 222, i32 223, i32 32, i32 33, i32 34, i32 35, i32 160, i32 161, i32 162, i32 163, i32 36, i32 37, i32 38, i32 39, i32 164, i32 165, i32 166, i32 167, i32 40, i32 41, i32 42, i32 43, i32 168, i32 169, i32 170, i32 171, i32 44, i32 45, i32 46, i32 47, i32 172, i32 173, i32 174, i32 175, i32 48, i32 49, i32 50, i32 51, i32 176, i32 177, i32 178, i32 179, i32 52, i32 53, i32 54, i32 55, i32 180, i32 181, i32 182, i32 183, i32 56, i32 57, i32 58, i32 59, i32 184, i32 185, i32 186, i32 187, i32 60, i32 61, i32 62, i32 63, i32 188, i32 189, i32 190, i32 191, i32 96, i32 97, i32 98, i32 99, i32 224, i32 225, i32 226, i32 227, i32 100, i32 101, i32 102, i32 103, i32 228, i32 229, i32 230, i32 231, i32 104, i32 105, i32 106, i32 107, i32 232, i32 233, i32 234, i32 235, i32 108, i32 109, i32 110, i32 111, i32 236, i32 237, i32 238, i32 239, i32 112, i32 113, i32 114, i32 115, i32 240, i32 241, i32 242, i32 243, i32 116, i32 117, i32 118, i32 119, i32 244, i32 245, i32 246, i32 247, i32 120, i32 121, i32 122, i32 123, i32 248, i32 249, i32 250, i32 251, i32 124, i32 125, i32 126, i32 127, i32 252, i32 253, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_3d: +; CHECK: [[REG3d:r[0-9]+]] = #61 +; CHECK: vshuff(v1,v0,[[REG3d]]) +define <256 x i8> @vshuff_3d(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 128, i32 2, i32 130, i32 1, i32 129, i32 3, i32 131, i32 4, i32 132, i32 6, i32 134, i32 5, i32 133, i32 7, i32 135, i32 8, i32 136, i32 10, i32 138, i32 9, i32 137, i32 11, i32 139, i32 12, i32 140, i32 14, i32 142, i32 13, i32 141, i32 15, i32 143, i32 16, i32 144, i32 18, i32 146, i32 17, i32 145, i32 19, i32 147, i32 20, i32 148, i32 22, i32 150, i32 21, i32 149, i32 23, i32 151, i32 24, i32 152, i32 26, i32 154, i32 25, i32 153, i32 27, i32 155, i32 28, i32 156, i32 30, i32 158, i32 29, i32 157, i32 31, i32 159, i32 64, i32 192, i32 66, i32 194, i32 65, i32 193, i32 67, i32 195, i32 68, i32 196, i32 70, i32 198, i32 69, i32 197, i32 71, i32 199, i32 72, i32 200, i32 74, i32 202, i32 73, i32 201, i32 75, i32 203, i32 76, i32 204, i32 78, i32 206, i32 77, i32 205, i32 79, i32 207, i32 80, i32 208, i32 82, i32 210, i32 81, i32 209, i32 83, i32 211, i32 84, i32 212, i32 86, i32 214, i32 85, i32 213, i32 87, i32 215, i32 88, i32 216, i32 90, i32 218, i32 89, i32 217, i32 91, i32 219, i32 92, i32 220, i32 94, i32 222, i32 93, i32 221, i32 95, i32 223, i32 32, i32 160, i32 34, i32 162, i32 33, i32 161, i32 35, i32 163, i32 36, i32 164, i32 38, i32 166, i32 37, i32 165, i32 39, i32 167, i32 40, i32 168, i32 42, i32 170, i32 41, i32 169, i32 43, i32 171, i32 44, i32 172, i32 46, i32 174, i32 45, i32 173, i32 47, i32 175, i32 48, i32 176, i32 50, i32 178, i32 49, i32 177, i32 51, i32 179, i32 52, i32 180, i32 54, i32 182, i32 53, i32 181, i32 55, i32 183, i32 56, i32 184, i32 58, i32 186, i32 57, i32 185, i32 59, i32 187, i32 60, i32 188, i32 62, i32 190, i32 61, i32 189, i32 63, i32 191, i32 96, i32 224, i32 98, i32 226, i32 97, i32 225, i32 99, i32 227, i32 100, i32 228, i32 102, i32 230, i32 101, i32 229, i32 103, i32 231, i32 104, i32 232, i32 106, i32 234, i32 105, i32 233, i32 107, i32 235, i32 108, i32 236, i32 110, i32 238, i32 109, i32 237, i32 111, i32 239, i32 112, i32 240, i32 114, i32 242, i32 113, i32 241, i32 115, i32 243, i32 116, i32 244, i32 118, i32 246, i32 117, i32 245, i32 119, i32 247, i32 120, i32 248, i32 122, i32 250, i32 121, i32 249, i32 123, i32 251, i32 124, i32 252, i32 126, i32 254, i32 125, i32 253, i32 127, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_3e: +; CHECK: [[REG3e:r[0-9]+]] = #62 +; CHECK: vshuff(v1,v0,[[REG3e]]) +define <256 x i8> @vshuff_3e(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 128, i32 129, i32 2, i32 3, i32 130, i32 131, i32 4, i32 5, i32 132, i32 133, i32 6, i32 7, i32 134, i32 135, i32 8, i32 9, i32 136, i32 137, i32 10, i32 11, i32 138, i32 139, i32 12, i32 13, i32 140, i32 141, i32 14, i32 15, i32 142, i32 143, i32 16, i32 17, i32 144, i32 145, i32 18, i32 19, i32 146, i32 147, i32 20, i32 21, i32 148, i32 149, i32 22, i32 23, i32 150, i32 151, i32 24, i32 25, i32 152, i32 153, i32 26, i32 27, i32 154, i32 155, i32 28, i32 29, i32 156, i32 157, i32 30, i32 31, i32 158, i32 159, i32 64, i32 65, i32 192, i32 193, i32 66, i32 67, i32 194, i32 195, i32 68, i32 69, i32 196, i32 197, i32 70, i32 71, i32 198, i32 199, i32 72, i32 73, i32 200, i32 201, i32 74, i32 75, i32 202, i32 203, i32 76, i32 77, i32 204, i32 205, i32 78, i32 79, i32 206, i32 207, i32 80, i32 81, i32 208, i32 209, i32 82, i32 83, i32 210, i32 211, i32 84, i32 85, i32 212, i32 213, i32 86, i32 87, i32 214, i32 215, i32 88, i32 89, i32 216, i32 217, i32 90, i32 91, i32 218, i32 219, i32 92, i32 93, i32 220, i32 221, i32 94, i32 95, i32 222, i32 223, i32 32, i32 33, i32 160, i32 161, i32 34, i32 35, i32 162, i32 163, i32 36, i32 37, i32 164, i32 165, i32 38, i32 39, i32 166, i32 167, i32 40, i32 41, i32 168, i32 169, i32 42, i32 43, i32 170, i32 171, i32 44, i32 45, i32 172, i32 173, i32 46, i32 47, i32 174, i32 175, i32 48, i32 49, i32 176, i32 177, i32 50, i32 51, i32 178, i32 179, i32 52, i32 53, i32 180, i32 181, i32 54, i32 55, i32 182, i32 183, i32 56, i32 57, i32 184, i32 185, i32 58, i32 59, i32 186, i32 187, i32 60, i32 61, i32 188, i32 189, i32 62, i32 63, i32 190, i32 191, i32 96, i32 97, i32 224, i32 225, i32 98, i32 99, i32 226, i32 227, i32 100, i32 101, i32 228, i32 229, i32 102, i32 103, i32 230, i32 231, i32 104, i32 105, i32 232, i32 233, i32 106, i32 107, i32 234, i32 235, i32 108, i32 109, i32 236, i32 237, i32 110, i32 111, i32 238, i32 239, i32 112, i32 113, i32 240, i32 241, i32 114, i32 115, i32 242, i32 243, i32 116, i32 117, i32 244, i32 245, i32 118, i32 119, i32 246, i32 247, i32 120, i32 121, i32 248, i32 249, i32 122, i32 123, i32 250, i32 251, i32 124, i32 125, i32 252, i32 253, i32 126, i32 127, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_3f: +; CHECK: [[REG3f:r[0-9]+]] = #63 +; CHECK: vshuff(v1,v0,[[REG3f]]) +define <256 x i8> @vshuff_3f(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 128, i32 1, i32 129, i32 2, i32 130, i32 3, i32 131, i32 4, i32 132, i32 5, i32 133, i32 6, i32 134, i32 7, i32 135, i32 8, i32 136, i32 9, i32 137, i32 10, i32 138, i32 11, i32 139, i32 12, i32 140, i32 13, i32 141, i32 14, i32 142, i32 15, i32 143, i32 16, i32 144, i32 17, i32 145, i32 18, i32 146, i32 19, i32 147, i32 20, i32 148, i32 21, i32 149, i32 22, i32 150, i32 23, i32 151, i32 24, i32 152, i32 25, i32 153, i32 26, i32 154, i32 27, i32 155, i32 28, i32 156, i32 29, i32 157, i32 30, i32 158, i32 31, i32 159, i32 64, i32 192, i32 65, i32 193, i32 66, i32 194, i32 67, i32 195, i32 68, i32 196, i32 69, i32 197, i32 70, i32 198, i32 71, i32 199, i32 72, i32 200, i32 73, i32 201, i32 74, i32 202, i32 75, i32 203, i32 76, i32 204, i32 77, i32 205, i32 78, i32 206, i32 79, i32 207, i32 80, i32 208, i32 81, i32 209, i32 82, i32 210, i32 83, i32 211, i32 84, i32 212, i32 85, i32 213, i32 86, i32 214, i32 87, i32 215, i32 88, i32 216, i32 89, i32 217, i32 90, i32 218, i32 91, i32 219, i32 92, i32 220, i32 93, i32 221, i32 94, i32 222, i32 95, i32 223, i32 32, i32 160, i32 33, i32 161, i32 34, i32 162, i32 35, i32 163, i32 36, i32 164, i32 37, i32 165, i32 38, i32 166, i32 39, i32 167, i32 40, i32 168, i32 41, i32 169, i32 42, i32 170, i32 43, i32 171, i32 44, i32 172, i32 45, i32 173, i32 46, i32 174, i32 47, i32 175, i32 48, i32 176, i32 49, i32 177, i32 50, i32 178, i32 51, i32 179, i32 52, i32 180, i32 53, i32 181, i32 54, i32 182, i32 55, i32 183, i32 56, i32 184, i32 57, i32 185, i32 58, i32 186, i32 59, i32 187, i32 60, i32 188, i32 61, i32 189, i32 62, i32 190, i32 63, i32 191, i32 96, i32 224, i32 97, i32 225, i32 98, i32 226, i32 99, i32 227, i32 100, i32 228, i32 101, i32 229, i32 102, i32 230, i32 103, i32 231, i32 104, i32 232, i32 105, i32 233, i32 106, i32 234, i32 107, i32 235, i32 108, i32 236, i32 109, i32 237, i32 110, i32 238, i32 111, i32 239, i32 112, i32 240, i32 113, i32 241, i32 114, i32 242, i32 115, i32 243, i32 116, i32 244, i32 117, i32 245, i32 118, i32 246, i32 119, i32 247, i32 120, i32 248, i32 121, i32 249, i32 122, i32 250, i32 123, i32 251, i32 124, i32 252, i32 125, i32 253, i32 126, i32 254, i32 127, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_40: +; CHECK: [[REG40:r[0-9]+]] = #64 +; CHECK: vshuff(v1,v0,[[REG40]]) +define <256 x i8> @vshuff_40(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 48, i32 49, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63, i32 128, i32 129, i32 130, i32 131, i32 132, i32 133, i32 134, i32 135, i32 136, i32 137, i32 138, i32 139, i32 140, i32 141, i32 142, i32 143, i32 144, i32 145, i32 146, i32 147, i32 148, i32 149, i32 150, i32 151, i32 152, i32 153, i32 154, i32 155, i32 156, i32 157, i32 158, i32 159, i32 160, i32 161, i32 162, i32 163, i32 164, i32 165, i32 166, i32 167, i32 168, i32 169, i32 170, i32 171, i32 172, i32 173, i32 174, i32 175, i32 176, i32 177, i32 178, i32 179, i32 180, i32 181, i32 182, i32 183, i32 184, i32 185, i32 186, i32 187, i32 188, i32 189, i32 190, i32 191, i32 64, i32 65, i32 66, i32 67, i32 68, i32 69, i32 70, i32 71, i32 72, i32 73, i32 74, i32 75, i32 76, i32 77, i32 78, i32 79, i32 80, i32 81, i32 82, i32 83, i32 84, i32 85, i32 86, i32 87, i32 88, i32 89, i32 90, i32 91, i32 92, i32 93, i32 94, i32 95, i32 96, i32 97, i32 98, i32 99, i32 100, i32 101, i32 102, i32 103, i32 104, i32 105, i32 106, i32 107, i32 108, i32 109, i32 110, i32 111, i32 112, i32 113, i32 114, i32 115, i32 116, i32 117, i32 118, i32 119, i32 120, i32 121, i32 122, i32 123, i32 124, i32 125, i32 126, i32 127, i32 192, i32 193, i32 194, i32 195, i32 196, i32 197, i32 198, i32 199, i32 200, i32 201, i32 202, i32 203, i32 204, i32 205, i32 206, i32 207, i32 208, i32 209, i32 210, i32 211, i32 212, i32 213, i32 214, i32 215, i32 216, i32 217, i32 218, i32 219, i32 220, i32 221, i32 222, i32 223, i32 224, i32 225, i32 226, i32 227, i32 228, i32 229, i32 230, i32 231, i32 232, i32 233, i32 234, i32 235, i32 236, i32 237, i32 238, i32 239, i32 240, i32 241, i32 242, i32 243, i32 244, i32 245, i32 246, i32 247, i32 248, i32 249, i32 250, i32 251, i32 252, i32 253, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_41: +; CHECK: [[REG41:r[0-9]+]] = #65 +; CHECK: vshuff(v1,v0,[[REG41]]) +define <256 x i8> @vshuff_41(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 128, i32 2, i32 130, i32 4, i32 132, i32 6, i32 134, i32 8, i32 136, i32 10, i32 138, i32 12, i32 140, i32 14, i32 142, i32 16, i32 144, i32 18, i32 146, i32 20, i32 148, i32 22, i32 150, i32 24, i32 152, i32 26, i32 154, i32 28, i32 156, i32 30, i32 158, i32 32, i32 160, i32 34, i32 162, i32 36, i32 164, i32 38, i32 166, i32 40, i32 168, i32 42, i32 170, i32 44, i32 172, i32 46, i32 174, i32 48, i32 176, i32 50, i32 178, i32 52, i32 180, i32 54, i32 182, i32 56, i32 184, i32 58, i32 186, i32 60, i32 188, i32 62, i32 190, i32 1, i32 129, i32 3, i32 131, i32 5, i32 133, i32 7, i32 135, i32 9, i32 137, i32 11, i32 139, i32 13, i32 141, i32 15, i32 143, i32 17, i32 145, i32 19, i32 147, i32 21, i32 149, i32 23, i32 151, i32 25, i32 153, i32 27, i32 155, i32 29, i32 157, i32 31, i32 159, i32 33, i32 161, i32 35, i32 163, i32 37, i32 165, i32 39, i32 167, i32 41, i32 169, i32 43, i32 171, i32 45, i32 173, i32 47, i32 175, i32 49, i32 177, i32 51, i32 179, i32 53, i32 181, i32 55, i32 183, i32 57, i32 185, i32 59, i32 187, i32 61, i32 189, i32 63, i32 191, i32 64, i32 192, i32 66, i32 194, i32 68, i32 196, i32 70, i32 198, i32 72, i32 200, i32 74, i32 202, i32 76, i32 204, i32 78, i32 206, i32 80, i32 208, i32 82, i32 210, i32 84, i32 212, i32 86, i32 214, i32 88, i32 216, i32 90, i32 218, i32 92, i32 220, i32 94, i32 222, i32 96, i32 224, i32 98, i32 226, i32 100, i32 228, i32 102, i32 230, i32 104, i32 232, i32 106, i32 234, i32 108, i32 236, i32 110, i32 238, i32 112, i32 240, i32 114, i32 242, i32 116, i32 244, i32 118, i32 246, i32 120, i32 248, i32 122, i32 250, i32 124, i32 252, i32 126, i32 254, i32 65, i32 193, i32 67, i32 195, i32 69, i32 197, i32 71, i32 199, i32 73, i32 201, i32 75, i32 203, i32 77, i32 205, i32 79, i32 207, i32 81, i32 209, i32 83, i32 211, i32 85, i32 213, i32 87, i32 215, i32 89, i32 217, i32 91, i32 219, i32 93, i32 221, i32 95, i32 223, i32 97, i32 225, i32 99, i32 227, i32 101, i32 229, i32 103, i32 231, i32 105, i32 233, i32 107, i32 235, i32 109, i32 237, i32 111, i32 239, i32 113, i32 241, i32 115, i32 243, i32 117, i32 245, i32 119, i32 247, i32 121, i32 249, i32 123, i32 251, i32 125, i32 253, i32 127, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_42: +; CHECK: [[REG42:r[0-9]+]] = #66 +; CHECK: vshuff(v1,v0,[[REG42]]) +define <256 x i8> @vshuff_42(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 128, i32 129, i32 4, i32 5, i32 132, i32 133, i32 8, i32 9, i32 136, i32 137, i32 12, i32 13, i32 140, i32 141, i32 16, i32 17, i32 144, i32 145, i32 20, i32 21, i32 148, i32 149, i32 24, i32 25, i32 152, i32 153, i32 28, i32 29, i32 156, i32 157, i32 32, i32 33, i32 160, i32 161, i32 36, i32 37, i32 164, i32 165, i32 40, i32 41, i32 168, i32 169, i32 44, i32 45, i32 172, i32 173, i32 48, i32 49, i32 176, i32 177, i32 52, i32 53, i32 180, i32 181, i32 56, i32 57, i32 184, i32 185, i32 60, i32 61, i32 188, i32 189, i32 2, i32 3, i32 130, i32 131, i32 6, i32 7, i32 134, i32 135, i32 10, i32 11, i32 138, i32 139, i32 14, i32 15, i32 142, i32 143, i32 18, i32 19, i32 146, i32 147, i32 22, i32 23, i32 150, i32 151, i32 26, i32 27, i32 154, i32 155, i32 30, i32 31, i32 158, i32 159, i32 34, i32 35, i32 162, i32 163, i32 38, i32 39, i32 166, i32 167, i32 42, i32 43, i32 170, i32 171, i32 46, i32 47, i32 174, i32 175, i32 50, i32 51, i32 178, i32 179, i32 54, i32 55, i32 182, i32 183, i32 58, i32 59, i32 186, i32 187, i32 62, i32 63, i32 190, i32 191, i32 64, i32 65, i32 192, i32 193, i32 68, i32 69, i32 196, i32 197, i32 72, i32 73, i32 200, i32 201, i32 76, i32 77, i32 204, i32 205, i32 80, i32 81, i32 208, i32 209, i32 84, i32 85, i32 212, i32 213, i32 88, i32 89, i32 216, i32 217, i32 92, i32 93, i32 220, i32 221, i32 96, i32 97, i32 224, i32 225, i32 100, i32 101, i32 228, i32 229, i32 104, i32 105, i32 232, i32 233, i32 108, i32 109, i32 236, i32 237, i32 112, i32 113, i32 240, i32 241, i32 116, i32 117, i32 244, i32 245, i32 120, i32 121, i32 248, i32 249, i32 124, i32 125, i32 252, i32 253, i32 66, i32 67, i32 194, i32 195, i32 70, i32 71, i32 198, i32 199, i32 74, i32 75, i32 202, i32 203, i32 78, i32 79, i32 206, i32 207, i32 82, i32 83, i32 210, i32 211, i32 86, i32 87, i32 214, i32 215, i32 90, i32 91, i32 218, i32 219, i32 94, i32 95, i32 222, i32 223, i32 98, i32 99, i32 226, i32 227, i32 102, i32 103, i32 230, i32 231, i32 106, i32 107, i32 234, i32 235, i32 110, i32 111, i32 238, i32 239, i32 114, i32 115, i32 242, i32 243, i32 118, i32 119, i32 246, i32 247, i32 122, i32 123, i32 250, i32 251, i32 126, i32 127, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_43: +; CHECK: [[REG43:r[0-9]+]] = #67 +; CHECK: vshuff(v1,v0,[[REG43]]) +define <256 x i8> @vshuff_43(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 128, i32 1, i32 129, i32 4, i32 132, i32 5, i32 133, i32 8, i32 136, i32 9, i32 137, i32 12, i32 140, i32 13, i32 141, i32 16, i32 144, i32 17, i32 145, i32 20, i32 148, i32 21, i32 149, i32 24, i32 152, i32 25, i32 153, i32 28, i32 156, i32 29, i32 157, i32 32, i32 160, i32 33, i32 161, i32 36, i32 164, i32 37, i32 165, i32 40, i32 168, i32 41, i32 169, i32 44, i32 172, i32 45, i32 173, i32 48, i32 176, i32 49, i32 177, i32 52, i32 180, i32 53, i32 181, i32 56, i32 184, i32 57, i32 185, i32 60, i32 188, i32 61, i32 189, i32 2, i32 130, i32 3, i32 131, i32 6, i32 134, i32 7, i32 135, i32 10, i32 138, i32 11, i32 139, i32 14, i32 142, i32 15, i32 143, i32 18, i32 146, i32 19, i32 147, i32 22, i32 150, i32 23, i32 151, i32 26, i32 154, i32 27, i32 155, i32 30, i32 158, i32 31, i32 159, i32 34, i32 162, i32 35, i32 163, i32 38, i32 166, i32 39, i32 167, i32 42, i32 170, i32 43, i32 171, i32 46, i32 174, i32 47, i32 175, i32 50, i32 178, i32 51, i32 179, i32 54, i32 182, i32 55, i32 183, i32 58, i32 186, i32 59, i32 187, i32 62, i32 190, i32 63, i32 191, i32 64, i32 192, i32 65, i32 193, i32 68, i32 196, i32 69, i32 197, i32 72, i32 200, i32 73, i32 201, i32 76, i32 204, i32 77, i32 205, i32 80, i32 208, i32 81, i32 209, i32 84, i32 212, i32 85, i32 213, i32 88, i32 216, i32 89, i32 217, i32 92, i32 220, i32 93, i32 221, i32 96, i32 224, i32 97, i32 225, i32 100, i32 228, i32 101, i32 229, i32 104, i32 232, i32 105, i32 233, i32 108, i32 236, i32 109, i32 237, i32 112, i32 240, i32 113, i32 241, i32 116, i32 244, i32 117, i32 245, i32 120, i32 248, i32 121, i32 249, i32 124, i32 252, i32 125, i32 253, i32 66, i32 194, i32 67, i32 195, i32 70, i32 198, i32 71, i32 199, i32 74, i32 202, i32 75, i32 203, i32 78, i32 206, i32 79, i32 207, i32 82, i32 210, i32 83, i32 211, i32 86, i32 214, i32 87, i32 215, i32 90, i32 218, i32 91, i32 219, i32 94, i32 222, i32 95, i32 223, i32 98, i32 226, i32 99, i32 227, i32 102, i32 230, i32 103, i32 231, i32 106, i32 234, i32 107, i32 235, i32 110, i32 238, i32 111, i32 239, i32 114, i32 242, i32 115, i32 243, i32 118, i32 246, i32 119, i32 247, i32 122, i32 250, i32 123, i32 251, i32 126, i32 254, i32 127, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_44: +; CHECK: [[REG44:r[0-9]+]] = #68 +; CHECK: vshuff(v1,v0,[[REG44]]) +define <256 x i8> @vshuff_44(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 2, i32 3, i32 128, i32 129, i32 130, i32 131, i32 8, i32 9, i32 10, i32 11, i32 136, i32 137, i32 138, i32 139, i32 16, i32 17, i32 18, i32 19, i32 144, i32 145, i32 146, i32 147, i32 24, i32 25, i32 26, i32 27, i32 152, i32 153, i32 154, i32 155, i32 32, i32 33, i32 34, i32 35, i32 160, i32 161, i32 162, i32 163, i32 40, i32 41, i32 42, i32 43, i32 168, i32 169, i32 170, i32 171, i32 48, i32 49, i32 50, i32 51, i32 176, i32 177, i32 178, i32 179, i32 56, i32 57, i32 58, i32 59, i32 184, i32 185, i32 186, i32 187, i32 4, i32 5, i32 6, i32 7, i32 132, i32 133, i32 134, i32 135, i32 12, i32 13, i32 14, i32 15, i32 140, i32 141, i32 142, i32 143, i32 20, i32 21, i32 22, i32 23, i32 148, i32 149, i32 150, i32 151, i32 28, i32 29, i32 30, i32 31, i32 156, i32 157, i32 158, i32 159, i32 36, i32 37, i32 38, i32 39, i32 164, i32 165, i32 166, i32 167, i32 44, i32 45, i32 46, i32 47, i32 172, i32 173, i32 174, i32 175, i32 52, i32 53, i32 54, i32 55, i32 180, i32 181, i32 182, i32 183, i32 60, i32 61, i32 62, i32 63, i32 188, i32 189, i32 190, i32 191, i32 64, i32 65, i32 66, i32 67, i32 192, i32 193, i32 194, i32 195, i32 72, i32 73, i32 74, i32 75, i32 200, i32 201, i32 202, i32 203, i32 80, i32 81, i32 82, i32 83, i32 208, i32 209, i32 210, i32 211, i32 88, i32 89, i32 90, i32 91, i32 216, i32 217, i32 218, i32 219, i32 96, i32 97, i32 98, i32 99, i32 224, i32 225, i32 226, i32 227, i32 104, i32 105, i32 106, i32 107, i32 232, i32 233, i32 234, i32 235, i32 112, i32 113, i32 114, i32 115, i32 240, i32 241, i32 242, i32 243, i32 120, i32 121, i32 122, i32 123, i32 248, i32 249, i32 250, i32 251, i32 68, i32 69, i32 70, i32 71, i32 196, i32 197, i32 198, i32 199, i32 76, i32 77, i32 78, i32 79, i32 204, i32 205, i32 206, i32 207, i32 84, i32 85, i32 86, i32 87, i32 212, i32 213, i32 214, i32 215, i32 92, i32 93, i32 94, i32 95, i32 220, i32 221, i32 222, i32 223, i32 100, i32 101, i32 102, i32 103, i32 228, i32 229, i32 230, i32 231, i32 108, i32 109, i32 110, i32 111, i32 236, i32 237, i32 238, i32 239, i32 116, i32 117, i32 118, i32 119, i32 244, i32 245, i32 246, i32 247, i32 124, i32 125, i32 126, i32 127, i32 252, i32 253, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_45: +; CHECK: [[REG45:r[0-9]+]] = #69 +; CHECK: vshuff(v1,v0,[[REG45]]) +define <256 x i8> @vshuff_45(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 128, i32 2, i32 130, i32 1, i32 129, i32 3, i32 131, i32 8, i32 136, i32 10, i32 138, i32 9, i32 137, i32 11, i32 139, i32 16, i32 144, i32 18, i32 146, i32 17, i32 145, i32 19, i32 147, i32 24, i32 152, i32 26, i32 154, i32 25, i32 153, i32 27, i32 155, i32 32, i32 160, i32 34, i32 162, i32 33, i32 161, i32 35, i32 163, i32 40, i32 168, i32 42, i32 170, i32 41, i32 169, i32 43, i32 171, i32 48, i32 176, i32 50, i32 178, i32 49, i32 177, i32 51, i32 179, i32 56, i32 184, i32 58, i32 186, i32 57, i32 185, i32 59, i32 187, i32 4, i32 132, i32 6, i32 134, i32 5, i32 133, i32 7, i32 135, i32 12, i32 140, i32 14, i32 142, i32 13, i32 141, i32 15, i32 143, i32 20, i32 148, i32 22, i32 150, i32 21, i32 149, i32 23, i32 151, i32 28, i32 156, i32 30, i32 158, i32 29, i32 157, i32 31, i32 159, i32 36, i32 164, i32 38, i32 166, i32 37, i32 165, i32 39, i32 167, i32 44, i32 172, i32 46, i32 174, i32 45, i32 173, i32 47, i32 175, i32 52, i32 180, i32 54, i32 182, i32 53, i32 181, i32 55, i32 183, i32 60, i32 188, i32 62, i32 190, i32 61, i32 189, i32 63, i32 191, i32 64, i32 192, i32 66, i32 194, i32 65, i32 193, i32 67, i32 195, i32 72, i32 200, i32 74, i32 202, i32 73, i32 201, i32 75, i32 203, i32 80, i32 208, i32 82, i32 210, i32 81, i32 209, i32 83, i32 211, i32 88, i32 216, i32 90, i32 218, i32 89, i32 217, i32 91, i32 219, i32 96, i32 224, i32 98, i32 226, i32 97, i32 225, i32 99, i32 227, i32 104, i32 232, i32 106, i32 234, i32 105, i32 233, i32 107, i32 235, i32 112, i32 240, i32 114, i32 242, i32 113, i32 241, i32 115, i32 243, i32 120, i32 248, i32 122, i32 250, i32 121, i32 249, i32 123, i32 251, i32 68, i32 196, i32 70, i32 198, i32 69, i32 197, i32 71, i32 199, i32 76, i32 204, i32 78, i32 206, i32 77, i32 205, i32 79, i32 207, i32 84, i32 212, i32 86, i32 214, i32 85, i32 213, i32 87, i32 215, i32 92, i32 220, i32 94, i32 222, i32 93, i32 221, i32 95, i32 223, i32 100, i32 228, i32 102, i32 230, i32 101, i32 229, i32 103, i32 231, i32 108, i32 236, i32 110, i32 238, i32 109, i32 237, i32 111, i32 239, i32 116, i32 244, i32 118, i32 246, i32 117, i32 245, i32 119, i32 247, i32 124, i32 252, i32 126, i32 254, i32 125, i32 253, i32 127, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_46: +; CHECK: [[REG46:r[0-9]+]] = #70 +; CHECK: vshuff(v1,v0,[[REG46]]) +define <256 x i8> @vshuff_46(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 128, i32 129, i32 2, i32 3, i32 130, i32 131, i32 8, i32 9, i32 136, i32 137, i32 10, i32 11, i32 138, i32 139, i32 16, i32 17, i32 144, i32 145, i32 18, i32 19, i32 146, i32 147, i32 24, i32 25, i32 152, i32 153, i32 26, i32 27, i32 154, i32 155, i32 32, i32 33, i32 160, i32 161, i32 34, i32 35, i32 162, i32 163, i32 40, i32 41, i32 168, i32 169, i32 42, i32 43, i32 170, i32 171, i32 48, i32 49, i32 176, i32 177, i32 50, i32 51, i32 178, i32 179, i32 56, i32 57, i32 184, i32 185, i32 58, i32 59, i32 186, i32 187, i32 4, i32 5, i32 132, i32 133, i32 6, i32 7, i32 134, i32 135, i32 12, i32 13, i32 140, i32 141, i32 14, i32 15, i32 142, i32 143, i32 20, i32 21, i32 148, i32 149, i32 22, i32 23, i32 150, i32 151, i32 28, i32 29, i32 156, i32 157, i32 30, i32 31, i32 158, i32 159, i32 36, i32 37, i32 164, i32 165, i32 38, i32 39, i32 166, i32 167, i32 44, i32 45, i32 172, i32 173, i32 46, i32 47, i32 174, i32 175, i32 52, i32 53, i32 180, i32 181, i32 54, i32 55, i32 182, i32 183, i32 60, i32 61, i32 188, i32 189, i32 62, i32 63, i32 190, i32 191, i32 64, i32 65, i32 192, i32 193, i32 66, i32 67, i32 194, i32 195, i32 72, i32 73, i32 200, i32 201, i32 74, i32 75, i32 202, i32 203, i32 80, i32 81, i32 208, i32 209, i32 82, i32 83, i32 210, i32 211, i32 88, i32 89, i32 216, i32 217, i32 90, i32 91, i32 218, i32 219, i32 96, i32 97, i32 224, i32 225, i32 98, i32 99, i32 226, i32 227, i32 104, i32 105, i32 232, i32 233, i32 106, i32 107, i32 234, i32 235, i32 112, i32 113, i32 240, i32 241, i32 114, i32 115, i32 242, i32 243, i32 120, i32 121, i32 248, i32 249, i32 122, i32 123, i32 250, i32 251, i32 68, i32 69, i32 196, i32 197, i32 70, i32 71, i32 198, i32 199, i32 76, i32 77, i32 204, i32 205, i32 78, i32 79, i32 206, i32 207, i32 84, i32 85, i32 212, i32 213, i32 86, i32 87, i32 214, i32 215, i32 92, i32 93, i32 220, i32 221, i32 94, i32 95, i32 222, i32 223, i32 100, i32 101, i32 228, i32 229, i32 102, i32 103, i32 230, i32 231, i32 108, i32 109, i32 236, i32 237, i32 110, i32 111, i32 238, i32 239, i32 116, i32 117, i32 244, i32 245, i32 118, i32 119, i32 246, i32 247, i32 124, i32 125, i32 252, i32 253, i32 126, i32 127, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_47: +; CHECK: [[REG47:r[0-9]+]] = #71 +; CHECK: vshuff(v1,v0,[[REG47]]) +define <256 x i8> @vshuff_47(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 128, i32 1, i32 129, i32 2, i32 130, i32 3, i32 131, i32 8, i32 136, i32 9, i32 137, i32 10, i32 138, i32 11, i32 139, i32 16, i32 144, i32 17, i32 145, i32 18, i32 146, i32 19, i32 147, i32 24, i32 152, i32 25, i32 153, i32 26, i32 154, i32 27, i32 155, i32 32, i32 160, i32 33, i32 161, i32 34, i32 162, i32 35, i32 163, i32 40, i32 168, i32 41, i32 169, i32 42, i32 170, i32 43, i32 171, i32 48, i32 176, i32 49, i32 177, i32 50, i32 178, i32 51, i32 179, i32 56, i32 184, i32 57, i32 185, i32 58, i32 186, i32 59, i32 187, i32 4, i32 132, i32 5, i32 133, i32 6, i32 134, i32 7, i32 135, i32 12, i32 140, i32 13, i32 141, i32 14, i32 142, i32 15, i32 143, i32 20, i32 148, i32 21, i32 149, i32 22, i32 150, i32 23, i32 151, i32 28, i32 156, i32 29, i32 157, i32 30, i32 158, i32 31, i32 159, i32 36, i32 164, i32 37, i32 165, i32 38, i32 166, i32 39, i32 167, i32 44, i32 172, i32 45, i32 173, i32 46, i32 174, i32 47, i32 175, i32 52, i32 180, i32 53, i32 181, i32 54, i32 182, i32 55, i32 183, i32 60, i32 188, i32 61, i32 189, i32 62, i32 190, i32 63, i32 191, i32 64, i32 192, i32 65, i32 193, i32 66, i32 194, i32 67, i32 195, i32 72, i32 200, i32 73, i32 201, i32 74, i32 202, i32 75, i32 203, i32 80, i32 208, i32 81, i32 209, i32 82, i32 210, i32 83, i32 211, i32 88, i32 216, i32 89, i32 217, i32 90, i32 218, i32 91, i32 219, i32 96, i32 224, i32 97, i32 225, i32 98, i32 226, i32 99, i32 227, i32 104, i32 232, i32 105, i32 233, i32 106, i32 234, i32 107, i32 235, i32 112, i32 240, i32 113, i32 241, i32 114, i32 242, i32 115, i32 243, i32 120, i32 248, i32 121, i32 249, i32 122, i32 250, i32 123, i32 251, i32 68, i32 196, i32 69, i32 197, i32 70, i32 198, i32 71, i32 199, i32 76, i32 204, i32 77, i32 205, i32 78, i32 206, i32 79, i32 207, i32 84, i32 212, i32 85, i32 213, i32 86, i32 214, i32 87, i32 215, i32 92, i32 220, i32 93, i32 221, i32 94, i32 222, i32 95, i32 223, i32 100, i32 228, i32 101, i32 229, i32 102, i32 230, i32 103, i32 231, i32 108, i32 236, i32 109, i32 237, i32 110, i32 238, i32 111, i32 239, i32 116, i32 244, i32 117, i32 245, i32 118, i32 246, i32 119, i32 247, i32 124, i32 252, i32 125, i32 253, i32 126, i32 254, i32 127, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_48: +; CHECK: [[REG48:r[0-9]+]] = #72 +; CHECK: vshuff(v1,v0,[[REG48]]) +define <256 x i8> @vshuff_48(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 128, i32 129, i32 130, i32 131, i32 132, i32 133, i32 134, i32 135, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 144, i32 145, i32 146, i32 147, i32 148, i32 149, i32 150, i32 151, i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 160, i32 161, i32 162, i32 163, i32 164, i32 165, i32 166, i32 167, i32 48, i32 49, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 176, i32 177, i32 178, i32 179, i32 180, i32 181, i32 182, i32 183, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 136, i32 137, i32 138, i32 139, i32 140, i32 141, i32 142, i32 143, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 152, i32 153, i32 154, i32 155, i32 156, i32 157, i32 158, i32 159, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 168, i32 169, i32 170, i32 171, i32 172, i32 173, i32 174, i32 175, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63, i32 184, i32 185, i32 186, i32 187, i32 188, i32 189, i32 190, i32 191, i32 64, i32 65, i32 66, i32 67, i32 68, i32 69, i32 70, i32 71, i32 192, i32 193, i32 194, i32 195, i32 196, i32 197, i32 198, i32 199, i32 80, i32 81, i32 82, i32 83, i32 84, i32 85, i32 86, i32 87, i32 208, i32 209, i32 210, i32 211, i32 212, i32 213, i32 214, i32 215, i32 96, i32 97, i32 98, i32 99, i32 100, i32 101, i32 102, i32 103, i32 224, i32 225, i32 226, i32 227, i32 228, i32 229, i32 230, i32 231, i32 112, i32 113, i32 114, i32 115, i32 116, i32 117, i32 118, i32 119, i32 240, i32 241, i32 242, i32 243, i32 244, i32 245, i32 246, i32 247, i32 72, i32 73, i32 74, i32 75, i32 76, i32 77, i32 78, i32 79, i32 200, i32 201, i32 202, i32 203, i32 204, i32 205, i32 206, i32 207, i32 88, i32 89, i32 90, i32 91, i32 92, i32 93, i32 94, i32 95, i32 216, i32 217, i32 218, i32 219, i32 220, i32 221, i32 222, i32 223, i32 104, i32 105, i32 106, i32 107, i32 108, i32 109, i32 110, i32 111, i32 232, i32 233, i32 234, i32 235, i32 236, i32 237, i32 238, i32 239, i32 120, i32 121, i32 122, i32 123, i32 124, i32 125, i32 126, i32 127, i32 248, i32 249, i32 250, i32 251, i32 252, i32 253, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_49: +; CHECK: [[REG49:r[0-9]+]] = #73 +; CHECK: vshuff(v1,v0,[[REG49]]) +define <256 x i8> @vshuff_49(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 128, i32 2, i32 130, i32 4, i32 132, i32 6, i32 134, i32 1, i32 129, i32 3, i32 131, i32 5, i32 133, i32 7, i32 135, i32 16, i32 144, i32 18, i32 146, i32 20, i32 148, i32 22, i32 150, i32 17, i32 145, i32 19, i32 147, i32 21, i32 149, i32 23, i32 151, i32 32, i32 160, i32 34, i32 162, i32 36, i32 164, i32 38, i32 166, i32 33, i32 161, i32 35, i32 163, i32 37, i32 165, i32 39, i32 167, i32 48, i32 176, i32 50, i32 178, i32 52, i32 180, i32 54, i32 182, i32 49, i32 177, i32 51, i32 179, i32 53, i32 181, i32 55, i32 183, i32 8, i32 136, i32 10, i32 138, i32 12, i32 140, i32 14, i32 142, i32 9, i32 137, i32 11, i32 139, i32 13, i32 141, i32 15, i32 143, i32 24, i32 152, i32 26, i32 154, i32 28, i32 156, i32 30, i32 158, i32 25, i32 153, i32 27, i32 155, i32 29, i32 157, i32 31, i32 159, i32 40, i32 168, i32 42, i32 170, i32 44, i32 172, i32 46, i32 174, i32 41, i32 169, i32 43, i32 171, i32 45, i32 173, i32 47, i32 175, i32 56, i32 184, i32 58, i32 186, i32 60, i32 188, i32 62, i32 190, i32 57, i32 185, i32 59, i32 187, i32 61, i32 189, i32 63, i32 191, i32 64, i32 192, i32 66, i32 194, i32 68, i32 196, i32 70, i32 198, i32 65, i32 193, i32 67, i32 195, i32 69, i32 197, i32 71, i32 199, i32 80, i32 208, i32 82, i32 210, i32 84, i32 212, i32 86, i32 214, i32 81, i32 209, i32 83, i32 211, i32 85, i32 213, i32 87, i32 215, i32 96, i32 224, i32 98, i32 226, i32 100, i32 228, i32 102, i32 230, i32 97, i32 225, i32 99, i32 227, i32 101, i32 229, i32 103, i32 231, i32 112, i32 240, i32 114, i32 242, i32 116, i32 244, i32 118, i32 246, i32 113, i32 241, i32 115, i32 243, i32 117, i32 245, i32 119, i32 247, i32 72, i32 200, i32 74, i32 202, i32 76, i32 204, i32 78, i32 206, i32 73, i32 201, i32 75, i32 203, i32 77, i32 205, i32 79, i32 207, i32 88, i32 216, i32 90, i32 218, i32 92, i32 220, i32 94, i32 222, i32 89, i32 217, i32 91, i32 219, i32 93, i32 221, i32 95, i32 223, i32 104, i32 232, i32 106, i32 234, i32 108, i32 236, i32 110, i32 238, i32 105, i32 233, i32 107, i32 235, i32 109, i32 237, i32 111, i32 239, i32 120, i32 248, i32 122, i32 250, i32 124, i32 252, i32 126, i32 254, i32 121, i32 249, i32 123, i32 251, i32 125, i32 253, i32 127, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_4a: +; CHECK: [[REG4a:r[0-9]+]] = #74 +; CHECK: vshuff(v1,v0,[[REG4a]]) +define <256 x i8> @vshuff_4a(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 128, i32 129, i32 4, i32 5, i32 132, i32 133, i32 2, i32 3, i32 130, i32 131, i32 6, i32 7, i32 134, i32 135, i32 16, i32 17, i32 144, i32 145, i32 20, i32 21, i32 148, i32 149, i32 18, i32 19, i32 146, i32 147, i32 22, i32 23, i32 150, i32 151, i32 32, i32 33, i32 160, i32 161, i32 36, i32 37, i32 164, i32 165, i32 34, i32 35, i32 162, i32 163, i32 38, i32 39, i32 166, i32 167, i32 48, i32 49, i32 176, i32 177, i32 52, i32 53, i32 180, i32 181, i32 50, i32 51, i32 178, i32 179, i32 54, i32 55, i32 182, i32 183, i32 8, i32 9, i32 136, i32 137, i32 12, i32 13, i32 140, i32 141, i32 10, i32 11, i32 138, i32 139, i32 14, i32 15, i32 142, i32 143, i32 24, i32 25, i32 152, i32 153, i32 28, i32 29, i32 156, i32 157, i32 26, i32 27, i32 154, i32 155, i32 30, i32 31, i32 158, i32 159, i32 40, i32 41, i32 168, i32 169, i32 44, i32 45, i32 172, i32 173, i32 42, i32 43, i32 170, i32 171, i32 46, i32 47, i32 174, i32 175, i32 56, i32 57, i32 184, i32 185, i32 60, i32 61, i32 188, i32 189, i32 58, i32 59, i32 186, i32 187, i32 62, i32 63, i32 190, i32 191, i32 64, i32 65, i32 192, i32 193, i32 68, i32 69, i32 196, i32 197, i32 66, i32 67, i32 194, i32 195, i32 70, i32 71, i32 198, i32 199, i32 80, i32 81, i32 208, i32 209, i32 84, i32 85, i32 212, i32 213, i32 82, i32 83, i32 210, i32 211, i32 86, i32 87, i32 214, i32 215, i32 96, i32 97, i32 224, i32 225, i32 100, i32 101, i32 228, i32 229, i32 98, i32 99, i32 226, i32 227, i32 102, i32 103, i32 230, i32 231, i32 112, i32 113, i32 240, i32 241, i32 116, i32 117, i32 244, i32 245, i32 114, i32 115, i32 242, i32 243, i32 118, i32 119, i32 246, i32 247, i32 72, i32 73, i32 200, i32 201, i32 76, i32 77, i32 204, i32 205, i32 74, i32 75, i32 202, i32 203, i32 78, i32 79, i32 206, i32 207, i32 88, i32 89, i32 216, i32 217, i32 92, i32 93, i32 220, i32 221, i32 90, i32 91, i32 218, i32 219, i32 94, i32 95, i32 222, i32 223, i32 104, i32 105, i32 232, i32 233, i32 108, i32 109, i32 236, i32 237, i32 106, i32 107, i32 234, i32 235, i32 110, i32 111, i32 238, i32 239, i32 120, i32 121, i32 248, i32 249, i32 124, i32 125, i32 252, i32 253, i32 122, i32 123, i32 250, i32 251, i32 126, i32 127, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_4b: +; CHECK: [[REG4b:r[0-9]+]] = #75 +; CHECK: vshuff(v1,v0,[[REG4b]]) +define <256 x i8> @vshuff_4b(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 128, i32 1, i32 129, i32 4, i32 132, i32 5, i32 133, i32 2, i32 130, i32 3, i32 131, i32 6, i32 134, i32 7, i32 135, i32 16, i32 144, i32 17, i32 145, i32 20, i32 148, i32 21, i32 149, i32 18, i32 146, i32 19, i32 147, i32 22, i32 150, i32 23, i32 151, i32 32, i32 160, i32 33, i32 161, i32 36, i32 164, i32 37, i32 165, i32 34, i32 162, i32 35, i32 163, i32 38, i32 166, i32 39, i32 167, i32 48, i32 176, i32 49, i32 177, i32 52, i32 180, i32 53, i32 181, i32 50, i32 178, i32 51, i32 179, i32 54, i32 182, i32 55, i32 183, i32 8, i32 136, i32 9, i32 137, i32 12, i32 140, i32 13, i32 141, i32 10, i32 138, i32 11, i32 139, i32 14, i32 142, i32 15, i32 143, i32 24, i32 152, i32 25, i32 153, i32 28, i32 156, i32 29, i32 157, i32 26, i32 154, i32 27, i32 155, i32 30, i32 158, i32 31, i32 159, i32 40, i32 168, i32 41, i32 169, i32 44, i32 172, i32 45, i32 173, i32 42, i32 170, i32 43, i32 171, i32 46, i32 174, i32 47, i32 175, i32 56, i32 184, i32 57, i32 185, i32 60, i32 188, i32 61, i32 189, i32 58, i32 186, i32 59, i32 187, i32 62, i32 190, i32 63, i32 191, i32 64, i32 192, i32 65, i32 193, i32 68, i32 196, i32 69, i32 197, i32 66, i32 194, i32 67, i32 195, i32 70, i32 198, i32 71, i32 199, i32 80, i32 208, i32 81, i32 209, i32 84, i32 212, i32 85, i32 213, i32 82, i32 210, i32 83, i32 211, i32 86, i32 214, i32 87, i32 215, i32 96, i32 224, i32 97, i32 225, i32 100, i32 228, i32 101, i32 229, i32 98, i32 226, i32 99, i32 227, i32 102, i32 230, i32 103, i32 231, i32 112, i32 240, i32 113, i32 241, i32 116, i32 244, i32 117, i32 245, i32 114, i32 242, i32 115, i32 243, i32 118, i32 246, i32 119, i32 247, i32 72, i32 200, i32 73, i32 201, i32 76, i32 204, i32 77, i32 205, i32 74, i32 202, i32 75, i32 203, i32 78, i32 206, i32 79, i32 207, i32 88, i32 216, i32 89, i32 217, i32 92, i32 220, i32 93, i32 221, i32 90, i32 218, i32 91, i32 219, i32 94, i32 222, i32 95, i32 223, i32 104, i32 232, i32 105, i32 233, i32 108, i32 236, i32 109, i32 237, i32 106, i32 234, i32 107, i32 235, i32 110, i32 238, i32 111, i32 239, i32 120, i32 248, i32 121, i32 249, i32 124, i32 252, i32 125, i32 253, i32 122, i32 250, i32 123, i32 251, i32 126, i32 254, i32 127, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_4c: +; CHECK: [[REG4c:r[0-9]+]] = #76 +; CHECK: vshuff(v1,v0,[[REG4c]]) +define <256 x i8> @vshuff_4c(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 2, i32 3, i32 128, i32 129, i32 130, i32 131, i32 4, i32 5, i32 6, i32 7, i32 132, i32 133, i32 134, i32 135, i32 16, i32 17, i32 18, i32 19, i32 144, i32 145, i32 146, i32 147, i32 20, i32 21, i32 22, i32 23, i32 148, i32 149, i32 150, i32 151, i32 32, i32 33, i32 34, i32 35, i32 160, i32 161, i32 162, i32 163, i32 36, i32 37, i32 38, i32 39, i32 164, i32 165, i32 166, i32 167, i32 48, i32 49, i32 50, i32 51, i32 176, i32 177, i32 178, i32 179, i32 52, i32 53, i32 54, i32 55, i32 180, i32 181, i32 182, i32 183, i32 8, i32 9, i32 10, i32 11, i32 136, i32 137, i32 138, i32 139, i32 12, i32 13, i32 14, i32 15, i32 140, i32 141, i32 142, i32 143, i32 24, i32 25, i32 26, i32 27, i32 152, i32 153, i32 154, i32 155, i32 28, i32 29, i32 30, i32 31, i32 156, i32 157, i32 158, i32 159, i32 40, i32 41, i32 42, i32 43, i32 168, i32 169, i32 170, i32 171, i32 44, i32 45, i32 46, i32 47, i32 172, i32 173, i32 174, i32 175, i32 56, i32 57, i32 58, i32 59, i32 184, i32 185, i32 186, i32 187, i32 60, i32 61, i32 62, i32 63, i32 188, i32 189, i32 190, i32 191, i32 64, i32 65, i32 66, i32 67, i32 192, i32 193, i32 194, i32 195, i32 68, i32 69, i32 70, i32 71, i32 196, i32 197, i32 198, i32 199, i32 80, i32 81, i32 82, i32 83, i32 208, i32 209, i32 210, i32 211, i32 84, i32 85, i32 86, i32 87, i32 212, i32 213, i32 214, i32 215, i32 96, i32 97, i32 98, i32 99, i32 224, i32 225, i32 226, i32 227, i32 100, i32 101, i32 102, i32 103, i32 228, i32 229, i32 230, i32 231, i32 112, i32 113, i32 114, i32 115, i32 240, i32 241, i32 242, i32 243, i32 116, i32 117, i32 118, i32 119, i32 244, i32 245, i32 246, i32 247, i32 72, i32 73, i32 74, i32 75, i32 200, i32 201, i32 202, i32 203, i32 76, i32 77, i32 78, i32 79, i32 204, i32 205, i32 206, i32 207, i32 88, i32 89, i32 90, i32 91, i32 216, i32 217, i32 218, i32 219, i32 92, i32 93, i32 94, i32 95, i32 220, i32 221, i32 222, i32 223, i32 104, i32 105, i32 106, i32 107, i32 232, i32 233, i32 234, i32 235, i32 108, i32 109, i32 110, i32 111, i32 236, i32 237, i32 238, i32 239, i32 120, i32 121, i32 122, i32 123, i32 248, i32 249, i32 250, i32 251, i32 124, i32 125, i32 126, i32 127, i32 252, i32 253, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_4d: +; CHECK: [[REG4d:r[0-9]+]] = #77 +; CHECK: vshuff(v1,v0,[[REG4d]]) +define <256 x i8> @vshuff_4d(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 128, i32 2, i32 130, i32 1, i32 129, i32 3, i32 131, i32 4, i32 132, i32 6, i32 134, i32 5, i32 133, i32 7, i32 135, i32 16, i32 144, i32 18, i32 146, i32 17, i32 145, i32 19, i32 147, i32 20, i32 148, i32 22, i32 150, i32 21, i32 149, i32 23, i32 151, i32 32, i32 160, i32 34, i32 162, i32 33, i32 161, i32 35, i32 163, i32 36, i32 164, i32 38, i32 166, i32 37, i32 165, i32 39, i32 167, i32 48, i32 176, i32 50, i32 178, i32 49, i32 177, i32 51, i32 179, i32 52, i32 180, i32 54, i32 182, i32 53, i32 181, i32 55, i32 183, i32 8, i32 136, i32 10, i32 138, i32 9, i32 137, i32 11, i32 139, i32 12, i32 140, i32 14, i32 142, i32 13, i32 141, i32 15, i32 143, i32 24, i32 152, i32 26, i32 154, i32 25, i32 153, i32 27, i32 155, i32 28, i32 156, i32 30, i32 158, i32 29, i32 157, i32 31, i32 159, i32 40, i32 168, i32 42, i32 170, i32 41, i32 169, i32 43, i32 171, i32 44, i32 172, i32 46, i32 174, i32 45, i32 173, i32 47, i32 175, i32 56, i32 184, i32 58, i32 186, i32 57, i32 185, i32 59, i32 187, i32 60, i32 188, i32 62, i32 190, i32 61, i32 189, i32 63, i32 191, i32 64, i32 192, i32 66, i32 194, i32 65, i32 193, i32 67, i32 195, i32 68, i32 196, i32 70, i32 198, i32 69, i32 197, i32 71, i32 199, i32 80, i32 208, i32 82, i32 210, i32 81, i32 209, i32 83, i32 211, i32 84, i32 212, i32 86, i32 214, i32 85, i32 213, i32 87, i32 215, i32 96, i32 224, i32 98, i32 226, i32 97, i32 225, i32 99, i32 227, i32 100, i32 228, i32 102, i32 230, i32 101, i32 229, i32 103, i32 231, i32 112, i32 240, i32 114, i32 242, i32 113, i32 241, i32 115, i32 243, i32 116, i32 244, i32 118, i32 246, i32 117, i32 245, i32 119, i32 247, i32 72, i32 200, i32 74, i32 202, i32 73, i32 201, i32 75, i32 203, i32 76, i32 204, i32 78, i32 206, i32 77, i32 205, i32 79, i32 207, i32 88, i32 216, i32 90, i32 218, i32 89, i32 217, i32 91, i32 219, i32 92, i32 220, i32 94, i32 222, i32 93, i32 221, i32 95, i32 223, i32 104, i32 232, i32 106, i32 234, i32 105, i32 233, i32 107, i32 235, i32 108, i32 236, i32 110, i32 238, i32 109, i32 237, i32 111, i32 239, i32 120, i32 248, i32 122, i32 250, i32 121, i32 249, i32 123, i32 251, i32 124, i32 252, i32 126, i32 254, i32 125, i32 253, i32 127, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_4e: +; CHECK: [[REG4e:r[0-9]+]] = #78 +; CHECK: vshuff(v1,v0,[[REG4e]]) +define <256 x i8> @vshuff_4e(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 128, i32 129, i32 2, i32 3, i32 130, i32 131, i32 4, i32 5, i32 132, i32 133, i32 6, i32 7, i32 134, i32 135, i32 16, i32 17, i32 144, i32 145, i32 18, i32 19, i32 146, i32 147, i32 20, i32 21, i32 148, i32 149, i32 22, i32 23, i32 150, i32 151, i32 32, i32 33, i32 160, i32 161, i32 34, i32 35, i32 162, i32 163, i32 36, i32 37, i32 164, i32 165, i32 38, i32 39, i32 166, i32 167, i32 48, i32 49, i32 176, i32 177, i32 50, i32 51, i32 178, i32 179, i32 52, i32 53, i32 180, i32 181, i32 54, i32 55, i32 182, i32 183, i32 8, i32 9, i32 136, i32 137, i32 10, i32 11, i32 138, i32 139, i32 12, i32 13, i32 140, i32 141, i32 14, i32 15, i32 142, i32 143, i32 24, i32 25, i32 152, i32 153, i32 26, i32 27, i32 154, i32 155, i32 28, i32 29, i32 156, i32 157, i32 30, i32 31, i32 158, i32 159, i32 40, i32 41, i32 168, i32 169, i32 42, i32 43, i32 170, i32 171, i32 44, i32 45, i32 172, i32 173, i32 46, i32 47, i32 174, i32 175, i32 56, i32 57, i32 184, i32 185, i32 58, i32 59, i32 186, i32 187, i32 60, i32 61, i32 188, i32 189, i32 62, i32 63, i32 190, i32 191, i32 64, i32 65, i32 192, i32 193, i32 66, i32 67, i32 194, i32 195, i32 68, i32 69, i32 196, i32 197, i32 70, i32 71, i32 198, i32 199, i32 80, i32 81, i32 208, i32 209, i32 82, i32 83, i32 210, i32 211, i32 84, i32 85, i32 212, i32 213, i32 86, i32 87, i32 214, i32 215, i32 96, i32 97, i32 224, i32 225, i32 98, i32 99, i32 226, i32 227, i32 100, i32 101, i32 228, i32 229, i32 102, i32 103, i32 230, i32 231, i32 112, i32 113, i32 240, i32 241, i32 114, i32 115, i32 242, i32 243, i32 116, i32 117, i32 244, i32 245, i32 118, i32 119, i32 246, i32 247, i32 72, i32 73, i32 200, i32 201, i32 74, i32 75, i32 202, i32 203, i32 76, i32 77, i32 204, i32 205, i32 78, i32 79, i32 206, i32 207, i32 88, i32 89, i32 216, i32 217, i32 90, i32 91, i32 218, i32 219, i32 92, i32 93, i32 220, i32 221, i32 94, i32 95, i32 222, i32 223, i32 104, i32 105, i32 232, i32 233, i32 106, i32 107, i32 234, i32 235, i32 108, i32 109, i32 236, i32 237, i32 110, i32 111, i32 238, i32 239, i32 120, i32 121, i32 248, i32 249, i32 122, i32 123, i32 250, i32 251, i32 124, i32 125, i32 252, i32 253, i32 126, i32 127, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_4f: +; CHECK: [[REG4f:r[0-9]+]] = #79 +; CHECK: vshuff(v1,v0,[[REG4f]]) +define <256 x i8> @vshuff_4f(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 128, i32 1, i32 129, i32 2, i32 130, i32 3, i32 131, i32 4, i32 132, i32 5, i32 133, i32 6, i32 134, i32 7, i32 135, i32 16, i32 144, i32 17, i32 145, i32 18, i32 146, i32 19, i32 147, i32 20, i32 148, i32 21, i32 149, i32 22, i32 150, i32 23, i32 151, i32 32, i32 160, i32 33, i32 161, i32 34, i32 162, i32 35, i32 163, i32 36, i32 164, i32 37, i32 165, i32 38, i32 166, i32 39, i32 167, i32 48, i32 176, i32 49, i32 177, i32 50, i32 178, i32 51, i32 179, i32 52, i32 180, i32 53, i32 181, i32 54, i32 182, i32 55, i32 183, i32 8, i32 136, i32 9, i32 137, i32 10, i32 138, i32 11, i32 139, i32 12, i32 140, i32 13, i32 141, i32 14, i32 142, i32 15, i32 143, i32 24, i32 152, i32 25, i32 153, i32 26, i32 154, i32 27, i32 155, i32 28, i32 156, i32 29, i32 157, i32 30, i32 158, i32 31, i32 159, i32 40, i32 168, i32 41, i32 169, i32 42, i32 170, i32 43, i32 171, i32 44, i32 172, i32 45, i32 173, i32 46, i32 174, i32 47, i32 175, i32 56, i32 184, i32 57, i32 185, i32 58, i32 186, i32 59, i32 187, i32 60, i32 188, i32 61, i32 189, i32 62, i32 190, i32 63, i32 191, i32 64, i32 192, i32 65, i32 193, i32 66, i32 194, i32 67, i32 195, i32 68, i32 196, i32 69, i32 197, i32 70, i32 198, i32 71, i32 199, i32 80, i32 208, i32 81, i32 209, i32 82, i32 210, i32 83, i32 211, i32 84, i32 212, i32 85, i32 213, i32 86, i32 214, i32 87, i32 215, i32 96, i32 224, i32 97, i32 225, i32 98, i32 226, i32 99, i32 227, i32 100, i32 228, i32 101, i32 229, i32 102, i32 230, i32 103, i32 231, i32 112, i32 240, i32 113, i32 241, i32 114, i32 242, i32 115, i32 243, i32 116, i32 244, i32 117, i32 245, i32 118, i32 246, i32 119, i32 247, i32 72, i32 200, i32 73, i32 201, i32 74, i32 202, i32 75, i32 203, i32 76, i32 204, i32 77, i32 205, i32 78, i32 206, i32 79, i32 207, i32 88, i32 216, i32 89, i32 217, i32 90, i32 218, i32 91, i32 219, i32 92, i32 220, i32 93, i32 221, i32 94, i32 222, i32 95, i32 223, i32 104, i32 232, i32 105, i32 233, i32 106, i32 234, i32 107, i32 235, i32 108, i32 236, i32 109, i32 237, i32 110, i32 238, i32 111, i32 239, i32 120, i32 248, i32 121, i32 249, i32 122, i32 250, i32 123, i32 251, i32 124, i32 252, i32 125, i32 253, i32 126, i32 254, i32 127, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_50: +; CHECK: [[REG50:r[0-9]+]] = #80 +; CHECK: vshuff(v1,v0,[[REG50]]) +define <256 x i8> @vshuff_50(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 128, i32 129, i32 130, i32 131, i32 132, i32 133, i32 134, i32 135, i32 136, i32 137, i32 138, i32 139, i32 140, i32 141, i32 142, i32 143, i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 160, i32 161, i32 162, i32 163, i32 164, i32 165, i32 166, i32 167, i32 168, i32 169, i32 170, i32 171, i32 172, i32 173, i32 174, i32 175, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 144, i32 145, i32 146, i32 147, i32 148, i32 149, i32 150, i32 151, i32 152, i32 153, i32 154, i32 155, i32 156, i32 157, i32 158, i32 159, i32 48, i32 49, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63, i32 176, i32 177, i32 178, i32 179, i32 180, i32 181, i32 182, i32 183, i32 184, i32 185, i32 186, i32 187, i32 188, i32 189, i32 190, i32 191, i32 64, i32 65, i32 66, i32 67, i32 68, i32 69, i32 70, i32 71, i32 72, i32 73, i32 74, i32 75, i32 76, i32 77, i32 78, i32 79, i32 192, i32 193, i32 194, i32 195, i32 196, i32 197, i32 198, i32 199, i32 200, i32 201, i32 202, i32 203, i32 204, i32 205, i32 206, i32 207, i32 96, i32 97, i32 98, i32 99, i32 100, i32 101, i32 102, i32 103, i32 104, i32 105, i32 106, i32 107, i32 108, i32 109, i32 110, i32 111, i32 224, i32 225, i32 226, i32 227, i32 228, i32 229, i32 230, i32 231, i32 232, i32 233, i32 234, i32 235, i32 236, i32 237, i32 238, i32 239, i32 80, i32 81, i32 82, i32 83, i32 84, i32 85, i32 86, i32 87, i32 88, i32 89, i32 90, i32 91, i32 92, i32 93, i32 94, i32 95, i32 208, i32 209, i32 210, i32 211, i32 212, i32 213, i32 214, i32 215, i32 216, i32 217, i32 218, i32 219, i32 220, i32 221, i32 222, i32 223, i32 112, i32 113, i32 114, i32 115, i32 116, i32 117, i32 118, i32 119, i32 120, i32 121, i32 122, i32 123, i32 124, i32 125, i32 126, i32 127, i32 240, i32 241, i32 242, i32 243, i32 244, i32 245, i32 246, i32 247, i32 248, i32 249, i32 250, i32 251, i32 252, i32 253, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_51: +; CHECK: [[REG51:r[0-9]+]] = #81 +; CHECK: vshuff(v1,v0,[[REG51]]) +define <256 x i8> @vshuff_51(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 128, i32 2, i32 130, i32 4, i32 132, i32 6, i32 134, i32 8, i32 136, i32 10, i32 138, i32 12, i32 140, i32 14, i32 142, i32 1, i32 129, i32 3, i32 131, i32 5, i32 133, i32 7, i32 135, i32 9, i32 137, i32 11, i32 139, i32 13, i32 141, i32 15, i32 143, i32 32, i32 160, i32 34, i32 162, i32 36, i32 164, i32 38, i32 166, i32 40, i32 168, i32 42, i32 170, i32 44, i32 172, i32 46, i32 174, i32 33, i32 161, i32 35, i32 163, i32 37, i32 165, i32 39, i32 167, i32 41, i32 169, i32 43, i32 171, i32 45, i32 173, i32 47, i32 175, i32 16, i32 144, i32 18, i32 146, i32 20, i32 148, i32 22, i32 150, i32 24, i32 152, i32 26, i32 154, i32 28, i32 156, i32 30, i32 158, i32 17, i32 145, i32 19, i32 147, i32 21, i32 149, i32 23, i32 151, i32 25, i32 153, i32 27, i32 155, i32 29, i32 157, i32 31, i32 159, i32 48, i32 176, i32 50, i32 178, i32 52, i32 180, i32 54, i32 182, i32 56, i32 184, i32 58, i32 186, i32 60, i32 188, i32 62, i32 190, i32 49, i32 177, i32 51, i32 179, i32 53, i32 181, i32 55, i32 183, i32 57, i32 185, i32 59, i32 187, i32 61, i32 189, i32 63, i32 191, i32 64, i32 192, i32 66, i32 194, i32 68, i32 196, i32 70, i32 198, i32 72, i32 200, i32 74, i32 202, i32 76, i32 204, i32 78, i32 206, i32 65, i32 193, i32 67, i32 195, i32 69, i32 197, i32 71, i32 199, i32 73, i32 201, i32 75, i32 203, i32 77, i32 205, i32 79, i32 207, i32 96, i32 224, i32 98, i32 226, i32 100, i32 228, i32 102, i32 230, i32 104, i32 232, i32 106, i32 234, i32 108, i32 236, i32 110, i32 238, i32 97, i32 225, i32 99, i32 227, i32 101, i32 229, i32 103, i32 231, i32 105, i32 233, i32 107, i32 235, i32 109, i32 237, i32 111, i32 239, i32 80, i32 208, i32 82, i32 210, i32 84, i32 212, i32 86, i32 214, i32 88, i32 216, i32 90, i32 218, i32 92, i32 220, i32 94, i32 222, i32 81, i32 209, i32 83, i32 211, i32 85, i32 213, i32 87, i32 215, i32 89, i32 217, i32 91, i32 219, i32 93, i32 221, i32 95, i32 223, i32 112, i32 240, i32 114, i32 242, i32 116, i32 244, i32 118, i32 246, i32 120, i32 248, i32 122, i32 250, i32 124, i32 252, i32 126, i32 254, i32 113, i32 241, i32 115, i32 243, i32 117, i32 245, i32 119, i32 247, i32 121, i32 249, i32 123, i32 251, i32 125, i32 253, i32 127, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_52: +; CHECK: [[REG52:r[0-9]+]] = #82 +; CHECK: vshuff(v1,v0,[[REG52]]) +define <256 x i8> @vshuff_52(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 128, i32 129, i32 4, i32 5, i32 132, i32 133, i32 8, i32 9, i32 136, i32 137, i32 12, i32 13, i32 140, i32 141, i32 2, i32 3, i32 130, i32 131, i32 6, i32 7, i32 134, i32 135, i32 10, i32 11, i32 138, i32 139, i32 14, i32 15, i32 142, i32 143, i32 32, i32 33, i32 160, i32 161, i32 36, i32 37, i32 164, i32 165, i32 40, i32 41, i32 168, i32 169, i32 44, i32 45, i32 172, i32 173, i32 34, i32 35, i32 162, i32 163, i32 38, i32 39, i32 166, i32 167, i32 42, i32 43, i32 170, i32 171, i32 46, i32 47, i32 174, i32 175, i32 16, i32 17, i32 144, i32 145, i32 20, i32 21, i32 148, i32 149, i32 24, i32 25, i32 152, i32 153, i32 28, i32 29, i32 156, i32 157, i32 18, i32 19, i32 146, i32 147, i32 22, i32 23, i32 150, i32 151, i32 26, i32 27, i32 154, i32 155, i32 30, i32 31, i32 158, i32 159, i32 48, i32 49, i32 176, i32 177, i32 52, i32 53, i32 180, i32 181, i32 56, i32 57, i32 184, i32 185, i32 60, i32 61, i32 188, i32 189, i32 50, i32 51, i32 178, i32 179, i32 54, i32 55, i32 182, i32 183, i32 58, i32 59, i32 186, i32 187, i32 62, i32 63, i32 190, i32 191, i32 64, i32 65, i32 192, i32 193, i32 68, i32 69, i32 196, i32 197, i32 72, i32 73, i32 200, i32 201, i32 76, i32 77, i32 204, i32 205, i32 66, i32 67, i32 194, i32 195, i32 70, i32 71, i32 198, i32 199, i32 74, i32 75, i32 202, i32 203, i32 78, i32 79, i32 206, i32 207, i32 96, i32 97, i32 224, i32 225, i32 100, i32 101, i32 228, i32 229, i32 104, i32 105, i32 232, i32 233, i32 108, i32 109, i32 236, i32 237, i32 98, i32 99, i32 226, i32 227, i32 102, i32 103, i32 230, i32 231, i32 106, i32 107, i32 234, i32 235, i32 110, i32 111, i32 238, i32 239, i32 80, i32 81, i32 208, i32 209, i32 84, i32 85, i32 212, i32 213, i32 88, i32 89, i32 216, i32 217, i32 92, i32 93, i32 220, i32 221, i32 82, i32 83, i32 210, i32 211, i32 86, i32 87, i32 214, i32 215, i32 90, i32 91, i32 218, i32 219, i32 94, i32 95, i32 222, i32 223, i32 112, i32 113, i32 240, i32 241, i32 116, i32 117, i32 244, i32 245, i32 120, i32 121, i32 248, i32 249, i32 124, i32 125, i32 252, i32 253, i32 114, i32 115, i32 242, i32 243, i32 118, i32 119, i32 246, i32 247, i32 122, i32 123, i32 250, i32 251, i32 126, i32 127, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_53: +; CHECK: [[REG53:r[0-9]+]] = #83 +; CHECK: vshuff(v1,v0,[[REG53]]) +define <256 x i8> @vshuff_53(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 128, i32 1, i32 129, i32 4, i32 132, i32 5, i32 133, i32 8, i32 136, i32 9, i32 137, i32 12, i32 140, i32 13, i32 141, i32 2, i32 130, i32 3, i32 131, i32 6, i32 134, i32 7, i32 135, i32 10, i32 138, i32 11, i32 139, i32 14, i32 142, i32 15, i32 143, i32 32, i32 160, i32 33, i32 161, i32 36, i32 164, i32 37, i32 165, i32 40, i32 168, i32 41, i32 169, i32 44, i32 172, i32 45, i32 173, i32 34, i32 162, i32 35, i32 163, i32 38, i32 166, i32 39, i32 167, i32 42, i32 170, i32 43, i32 171, i32 46, i32 174, i32 47, i32 175, i32 16, i32 144, i32 17, i32 145, i32 20, i32 148, i32 21, i32 149, i32 24, i32 152, i32 25, i32 153, i32 28, i32 156, i32 29, i32 157, i32 18, i32 146, i32 19, i32 147, i32 22, i32 150, i32 23, i32 151, i32 26, i32 154, i32 27, i32 155, i32 30, i32 158, i32 31, i32 159, i32 48, i32 176, i32 49, i32 177, i32 52, i32 180, i32 53, i32 181, i32 56, i32 184, i32 57, i32 185, i32 60, i32 188, i32 61, i32 189, i32 50, i32 178, i32 51, i32 179, i32 54, i32 182, i32 55, i32 183, i32 58, i32 186, i32 59, i32 187, i32 62, i32 190, i32 63, i32 191, i32 64, i32 192, i32 65, i32 193, i32 68, i32 196, i32 69, i32 197, i32 72, i32 200, i32 73, i32 201, i32 76, i32 204, i32 77, i32 205, i32 66, i32 194, i32 67, i32 195, i32 70, i32 198, i32 71, i32 199, i32 74, i32 202, i32 75, i32 203, i32 78, i32 206, i32 79, i32 207, i32 96, i32 224, i32 97, i32 225, i32 100, i32 228, i32 101, i32 229, i32 104, i32 232, i32 105, i32 233, i32 108, i32 236, i32 109, i32 237, i32 98, i32 226, i32 99, i32 227, i32 102, i32 230, i32 103, i32 231, i32 106, i32 234, i32 107, i32 235, i32 110, i32 238, i32 111, i32 239, i32 80, i32 208, i32 81, i32 209, i32 84, i32 212, i32 85, i32 213, i32 88, i32 216, i32 89, i32 217, i32 92, i32 220, i32 93, i32 221, i32 82, i32 210, i32 83, i32 211, i32 86, i32 214, i32 87, i32 215, i32 90, i32 218, i32 91, i32 219, i32 94, i32 222, i32 95, i32 223, i32 112, i32 240, i32 113, i32 241, i32 116, i32 244, i32 117, i32 245, i32 120, i32 248, i32 121, i32 249, i32 124, i32 252, i32 125, i32 253, i32 114, i32 242, i32 115, i32 243, i32 118, i32 246, i32 119, i32 247, i32 122, i32 250, i32 123, i32 251, i32 126, i32 254, i32 127, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_54: +; CHECK: [[REG54:r[0-9]+]] = #84 +; CHECK: vshuff(v1,v0,[[REG54]]) +define <256 x i8> @vshuff_54(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 2, i32 3, i32 128, i32 129, i32 130, i32 131, i32 8, i32 9, i32 10, i32 11, i32 136, i32 137, i32 138, i32 139, i32 4, i32 5, i32 6, i32 7, i32 132, i32 133, i32 134, i32 135, i32 12, i32 13, i32 14, i32 15, i32 140, i32 141, i32 142, i32 143, i32 32, i32 33, i32 34, i32 35, i32 160, i32 161, i32 162, i32 163, i32 40, i32 41, i32 42, i32 43, i32 168, i32 169, i32 170, i32 171, i32 36, i32 37, i32 38, i32 39, i32 164, i32 165, i32 166, i32 167, i32 44, i32 45, i32 46, i32 47, i32 172, i32 173, i32 174, i32 175, i32 16, i32 17, i32 18, i32 19, i32 144, i32 145, i32 146, i32 147, i32 24, i32 25, i32 26, i32 27, i32 152, i32 153, i32 154, i32 155, i32 20, i32 21, i32 22, i32 23, i32 148, i32 149, i32 150, i32 151, i32 28, i32 29, i32 30, i32 31, i32 156, i32 157, i32 158, i32 159, i32 48, i32 49, i32 50, i32 51, i32 176, i32 177, i32 178, i32 179, i32 56, i32 57, i32 58, i32 59, i32 184, i32 185, i32 186, i32 187, i32 52, i32 53, i32 54, i32 55, i32 180, i32 181, i32 182, i32 183, i32 60, i32 61, i32 62, i32 63, i32 188, i32 189, i32 190, i32 191, i32 64, i32 65, i32 66, i32 67, i32 192, i32 193, i32 194, i32 195, i32 72, i32 73, i32 74, i32 75, i32 200, i32 201, i32 202, i32 203, i32 68, i32 69, i32 70, i32 71, i32 196, i32 197, i32 198, i32 199, i32 76, i32 77, i32 78, i32 79, i32 204, i32 205, i32 206, i32 207, i32 96, i32 97, i32 98, i32 99, i32 224, i32 225, i32 226, i32 227, i32 104, i32 105, i32 106, i32 107, i32 232, i32 233, i32 234, i32 235, i32 100, i32 101, i32 102, i32 103, i32 228, i32 229, i32 230, i32 231, i32 108, i32 109, i32 110, i32 111, i32 236, i32 237, i32 238, i32 239, i32 80, i32 81, i32 82, i32 83, i32 208, i32 209, i32 210, i32 211, i32 88, i32 89, i32 90, i32 91, i32 216, i32 217, i32 218, i32 219, i32 84, i32 85, i32 86, i32 87, i32 212, i32 213, i32 214, i32 215, i32 92, i32 93, i32 94, i32 95, i32 220, i32 221, i32 222, i32 223, i32 112, i32 113, i32 114, i32 115, i32 240, i32 241, i32 242, i32 243, i32 120, i32 121, i32 122, i32 123, i32 248, i32 249, i32 250, i32 251, i32 116, i32 117, i32 118, i32 119, i32 244, i32 245, i32 246, i32 247, i32 124, i32 125, i32 126, i32 127, i32 252, i32 253, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_55: +; CHECK: [[REG55:r[0-9]+]] = #85 +; CHECK: vshuff(v1,v0,[[REG55]]) +define <256 x i8> @vshuff_55(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 128, i32 2, i32 130, i32 1, i32 129, i32 3, i32 131, i32 8, i32 136, i32 10, i32 138, i32 9, i32 137, i32 11, i32 139, i32 4, i32 132, i32 6, i32 134, i32 5, i32 133, i32 7, i32 135, i32 12, i32 140, i32 14, i32 142, i32 13, i32 141, i32 15, i32 143, i32 32, i32 160, i32 34, i32 162, i32 33, i32 161, i32 35, i32 163, i32 40, i32 168, i32 42, i32 170, i32 41, i32 169, i32 43, i32 171, i32 36, i32 164, i32 38, i32 166, i32 37, i32 165, i32 39, i32 167, i32 44, i32 172, i32 46, i32 174, i32 45, i32 173, i32 47, i32 175, i32 16, i32 144, i32 18, i32 146, i32 17, i32 145, i32 19, i32 147, i32 24, i32 152, i32 26, i32 154, i32 25, i32 153, i32 27, i32 155, i32 20, i32 148, i32 22, i32 150, i32 21, i32 149, i32 23, i32 151, i32 28, i32 156, i32 30, i32 158, i32 29, i32 157, i32 31, i32 159, i32 48, i32 176, i32 50, i32 178, i32 49, i32 177, i32 51, i32 179, i32 56, i32 184, i32 58, i32 186, i32 57, i32 185, i32 59, i32 187, i32 52, i32 180, i32 54, i32 182, i32 53, i32 181, i32 55, i32 183, i32 60, i32 188, i32 62, i32 190, i32 61, i32 189, i32 63, i32 191, i32 64, i32 192, i32 66, i32 194, i32 65, i32 193, i32 67, i32 195, i32 72, i32 200, i32 74, i32 202, i32 73, i32 201, i32 75, i32 203, i32 68, i32 196, i32 70, i32 198, i32 69, i32 197, i32 71, i32 199, i32 76, i32 204, i32 78, i32 206, i32 77, i32 205, i32 79, i32 207, i32 96, i32 224, i32 98, i32 226, i32 97, i32 225, i32 99, i32 227, i32 104, i32 232, i32 106, i32 234, i32 105, i32 233, i32 107, i32 235, i32 100, i32 228, i32 102, i32 230, i32 101, i32 229, i32 103, i32 231, i32 108, i32 236, i32 110, i32 238, i32 109, i32 237, i32 111, i32 239, i32 80, i32 208, i32 82, i32 210, i32 81, i32 209, i32 83, i32 211, i32 88, i32 216, i32 90, i32 218, i32 89, i32 217, i32 91, i32 219, i32 84, i32 212, i32 86, i32 214, i32 85, i32 213, i32 87, i32 215, i32 92, i32 220, i32 94, i32 222, i32 93, i32 221, i32 95, i32 223, i32 112, i32 240, i32 114, i32 242, i32 113, i32 241, i32 115, i32 243, i32 120, i32 248, i32 122, i32 250, i32 121, i32 249, i32 123, i32 251, i32 116, i32 244, i32 118, i32 246, i32 117, i32 245, i32 119, i32 247, i32 124, i32 252, i32 126, i32 254, i32 125, i32 253, i32 127, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_56: +; CHECK: [[REG56:r[0-9]+]] = #86 +; CHECK: vshuff(v1,v0,[[REG56]]) +define <256 x i8> @vshuff_56(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 128, i32 129, i32 2, i32 3, i32 130, i32 131, i32 8, i32 9, i32 136, i32 137, i32 10, i32 11, i32 138, i32 139, i32 4, i32 5, i32 132, i32 133, i32 6, i32 7, i32 134, i32 135, i32 12, i32 13, i32 140, i32 141, i32 14, i32 15, i32 142, i32 143, i32 32, i32 33, i32 160, i32 161, i32 34, i32 35, i32 162, i32 163, i32 40, i32 41, i32 168, i32 169, i32 42, i32 43, i32 170, i32 171, i32 36, i32 37, i32 164, i32 165, i32 38, i32 39, i32 166, i32 167, i32 44, i32 45, i32 172, i32 173, i32 46, i32 47, i32 174, i32 175, i32 16, i32 17, i32 144, i32 145, i32 18, i32 19, i32 146, i32 147, i32 24, i32 25, i32 152, i32 153, i32 26, i32 27, i32 154, i32 155, i32 20, i32 21, i32 148, i32 149, i32 22, i32 23, i32 150, i32 151, i32 28, i32 29, i32 156, i32 157, i32 30, i32 31, i32 158, i32 159, i32 48, i32 49, i32 176, i32 177, i32 50, i32 51, i32 178, i32 179, i32 56, i32 57, i32 184, i32 185, i32 58, i32 59, i32 186, i32 187, i32 52, i32 53, i32 180, i32 181, i32 54, i32 55, i32 182, i32 183, i32 60, i32 61, i32 188, i32 189, i32 62, i32 63, i32 190, i32 191, i32 64, i32 65, i32 192, i32 193, i32 66, i32 67, i32 194, i32 195, i32 72, i32 73, i32 200, i32 201, i32 74, i32 75, i32 202, i32 203, i32 68, i32 69, i32 196, i32 197, i32 70, i32 71, i32 198, i32 199, i32 76, i32 77, i32 204, i32 205, i32 78, i32 79, i32 206, i32 207, i32 96, i32 97, i32 224, i32 225, i32 98, i32 99, i32 226, i32 227, i32 104, i32 105, i32 232, i32 233, i32 106, i32 107, i32 234, i32 235, i32 100, i32 101, i32 228, i32 229, i32 102, i32 103, i32 230, i32 231, i32 108, i32 109, i32 236, i32 237, i32 110, i32 111, i32 238, i32 239, i32 80, i32 81, i32 208, i32 209, i32 82, i32 83, i32 210, i32 211, i32 88, i32 89, i32 216, i32 217, i32 90, i32 91, i32 218, i32 219, i32 84, i32 85, i32 212, i32 213, i32 86, i32 87, i32 214, i32 215, i32 92, i32 93, i32 220, i32 221, i32 94, i32 95, i32 222, i32 223, i32 112, i32 113, i32 240, i32 241, i32 114, i32 115, i32 242, i32 243, i32 120, i32 121, i32 248, i32 249, i32 122, i32 123, i32 250, i32 251, i32 116, i32 117, i32 244, i32 245, i32 118, i32 119, i32 246, i32 247, i32 124, i32 125, i32 252, i32 253, i32 126, i32 127, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_57: +; CHECK: [[REG57:r[0-9]+]] = #87 +; CHECK: vshuff(v1,v0,[[REG57]]) +define <256 x i8> @vshuff_57(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 128, i32 1, i32 129, i32 2, i32 130, i32 3, i32 131, i32 8, i32 136, i32 9, i32 137, i32 10, i32 138, i32 11, i32 139, i32 4, i32 132, i32 5, i32 133, i32 6, i32 134, i32 7, i32 135, i32 12, i32 140, i32 13, i32 141, i32 14, i32 142, i32 15, i32 143, i32 32, i32 160, i32 33, i32 161, i32 34, i32 162, i32 35, i32 163, i32 40, i32 168, i32 41, i32 169, i32 42, i32 170, i32 43, i32 171, i32 36, i32 164, i32 37, i32 165, i32 38, i32 166, i32 39, i32 167, i32 44, i32 172, i32 45, i32 173, i32 46, i32 174, i32 47, i32 175, i32 16, i32 144, i32 17, i32 145, i32 18, i32 146, i32 19, i32 147, i32 24, i32 152, i32 25, i32 153, i32 26, i32 154, i32 27, i32 155, i32 20, i32 148, i32 21, i32 149, i32 22, i32 150, i32 23, i32 151, i32 28, i32 156, i32 29, i32 157, i32 30, i32 158, i32 31, i32 159, i32 48, i32 176, i32 49, i32 177, i32 50, i32 178, i32 51, i32 179, i32 56, i32 184, i32 57, i32 185, i32 58, i32 186, i32 59, i32 187, i32 52, i32 180, i32 53, i32 181, i32 54, i32 182, i32 55, i32 183, i32 60, i32 188, i32 61, i32 189, i32 62, i32 190, i32 63, i32 191, i32 64, i32 192, i32 65, i32 193, i32 66, i32 194, i32 67, i32 195, i32 72, i32 200, i32 73, i32 201, i32 74, i32 202, i32 75, i32 203, i32 68, i32 196, i32 69, i32 197, i32 70, i32 198, i32 71, i32 199, i32 76, i32 204, i32 77, i32 205, i32 78, i32 206, i32 79, i32 207, i32 96, i32 224, i32 97, i32 225, i32 98, i32 226, i32 99, i32 227, i32 104, i32 232, i32 105, i32 233, i32 106, i32 234, i32 107, i32 235, i32 100, i32 228, i32 101, i32 229, i32 102, i32 230, i32 103, i32 231, i32 108, i32 236, i32 109, i32 237, i32 110, i32 238, i32 111, i32 239, i32 80, i32 208, i32 81, i32 209, i32 82, i32 210, i32 83, i32 211, i32 88, i32 216, i32 89, i32 217, i32 90, i32 218, i32 91, i32 219, i32 84, i32 212, i32 85, i32 213, i32 86, i32 214, i32 87, i32 215, i32 92, i32 220, i32 93, i32 221, i32 94, i32 222, i32 95, i32 223, i32 112, i32 240, i32 113, i32 241, i32 114, i32 242, i32 115, i32 243, i32 120, i32 248, i32 121, i32 249, i32 122, i32 250, i32 123, i32 251, i32 116, i32 244, i32 117, i32 245, i32 118, i32 246, i32 119, i32 247, i32 124, i32 252, i32 125, i32 253, i32 126, i32 254, i32 127, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_58: +; CHECK: [[REG58:r[0-9]+]] = #88 +; CHECK: vshuff(v1,v0,[[REG58]]) +define <256 x i8> @vshuff_58(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 128, i32 129, i32 130, i32 131, i32 132, i32 133, i32 134, i32 135, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 136, i32 137, i32 138, i32 139, i32 140, i32 141, i32 142, i32 143, i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 160, i32 161, i32 162, i32 163, i32 164, i32 165, i32 166, i32 167, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 168, i32 169, i32 170, i32 171, i32 172, i32 173, i32 174, i32 175, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 144, i32 145, i32 146, i32 147, i32 148, i32 149, i32 150, i32 151, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 152, i32 153, i32 154, i32 155, i32 156, i32 157, i32 158, i32 159, i32 48, i32 49, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 176, i32 177, i32 178, i32 179, i32 180, i32 181, i32 182, i32 183, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63, i32 184, i32 185, i32 186, i32 187, i32 188, i32 189, i32 190, i32 191, i32 64, i32 65, i32 66, i32 67, i32 68, i32 69, i32 70, i32 71, i32 192, i32 193, i32 194, i32 195, i32 196, i32 197, i32 198, i32 199, i32 72, i32 73, i32 74, i32 75, i32 76, i32 77, i32 78, i32 79, i32 200, i32 201, i32 202, i32 203, i32 204, i32 205, i32 206, i32 207, i32 96, i32 97, i32 98, i32 99, i32 100, i32 101, i32 102, i32 103, i32 224, i32 225, i32 226, i32 227, i32 228, i32 229, i32 230, i32 231, i32 104, i32 105, i32 106, i32 107, i32 108, i32 109, i32 110, i32 111, i32 232, i32 233, i32 234, i32 235, i32 236, i32 237, i32 238, i32 239, i32 80, i32 81, i32 82, i32 83, i32 84, i32 85, i32 86, i32 87, i32 208, i32 209, i32 210, i32 211, i32 212, i32 213, i32 214, i32 215, i32 88, i32 89, i32 90, i32 91, i32 92, i32 93, i32 94, i32 95, i32 216, i32 217, i32 218, i32 219, i32 220, i32 221, i32 222, i32 223, i32 112, i32 113, i32 114, i32 115, i32 116, i32 117, i32 118, i32 119, i32 240, i32 241, i32 242, i32 243, i32 244, i32 245, i32 246, i32 247, i32 120, i32 121, i32 122, i32 123, i32 124, i32 125, i32 126, i32 127, i32 248, i32 249, i32 250, i32 251, i32 252, i32 253, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_59: +; CHECK: [[REG59:r[0-9]+]] = #89 +; CHECK: vshuff(v1,v0,[[REG59]]) +define <256 x i8> @vshuff_59(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 128, i32 2, i32 130, i32 4, i32 132, i32 6, i32 134, i32 1, i32 129, i32 3, i32 131, i32 5, i32 133, i32 7, i32 135, i32 8, i32 136, i32 10, i32 138, i32 12, i32 140, i32 14, i32 142, i32 9, i32 137, i32 11, i32 139, i32 13, i32 141, i32 15, i32 143, i32 32, i32 160, i32 34, i32 162, i32 36, i32 164, i32 38, i32 166, i32 33, i32 161, i32 35, i32 163, i32 37, i32 165, i32 39, i32 167, i32 40, i32 168, i32 42, i32 170, i32 44, i32 172, i32 46, i32 174, i32 41, i32 169, i32 43, i32 171, i32 45, i32 173, i32 47, i32 175, i32 16, i32 144, i32 18, i32 146, i32 20, i32 148, i32 22, i32 150, i32 17, i32 145, i32 19, i32 147, i32 21, i32 149, i32 23, i32 151, i32 24, i32 152, i32 26, i32 154, i32 28, i32 156, i32 30, i32 158, i32 25, i32 153, i32 27, i32 155, i32 29, i32 157, i32 31, i32 159, i32 48, i32 176, i32 50, i32 178, i32 52, i32 180, i32 54, i32 182, i32 49, i32 177, i32 51, i32 179, i32 53, i32 181, i32 55, i32 183, i32 56, i32 184, i32 58, i32 186, i32 60, i32 188, i32 62, i32 190, i32 57, i32 185, i32 59, i32 187, i32 61, i32 189, i32 63, i32 191, i32 64, i32 192, i32 66, i32 194, i32 68, i32 196, i32 70, i32 198, i32 65, i32 193, i32 67, i32 195, i32 69, i32 197, i32 71, i32 199, i32 72, i32 200, i32 74, i32 202, i32 76, i32 204, i32 78, i32 206, i32 73, i32 201, i32 75, i32 203, i32 77, i32 205, i32 79, i32 207, i32 96, i32 224, i32 98, i32 226, i32 100, i32 228, i32 102, i32 230, i32 97, i32 225, i32 99, i32 227, i32 101, i32 229, i32 103, i32 231, i32 104, i32 232, i32 106, i32 234, i32 108, i32 236, i32 110, i32 238, i32 105, i32 233, i32 107, i32 235, i32 109, i32 237, i32 111, i32 239, i32 80, i32 208, i32 82, i32 210, i32 84, i32 212, i32 86, i32 214, i32 81, i32 209, i32 83, i32 211, i32 85, i32 213, i32 87, i32 215, i32 88, i32 216, i32 90, i32 218, i32 92, i32 220, i32 94, i32 222, i32 89, i32 217, i32 91, i32 219, i32 93, i32 221, i32 95, i32 223, i32 112, i32 240, i32 114, i32 242, i32 116, i32 244, i32 118, i32 246, i32 113, i32 241, i32 115, i32 243, i32 117, i32 245, i32 119, i32 247, i32 120, i32 248, i32 122, i32 250, i32 124, i32 252, i32 126, i32 254, i32 121, i32 249, i32 123, i32 251, i32 125, i32 253, i32 127, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_5a: +; CHECK: [[REG5a:r[0-9]+]] = #90 +; CHECK: vshuff(v1,v0,[[REG5a]]) +define <256 x i8> @vshuff_5a(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 128, i32 129, i32 4, i32 5, i32 132, i32 133, i32 2, i32 3, i32 130, i32 131, i32 6, i32 7, i32 134, i32 135, i32 8, i32 9, i32 136, i32 137, i32 12, i32 13, i32 140, i32 141, i32 10, i32 11, i32 138, i32 139, i32 14, i32 15, i32 142, i32 143, i32 32, i32 33, i32 160, i32 161, i32 36, i32 37, i32 164, i32 165, i32 34, i32 35, i32 162, i32 163, i32 38, i32 39, i32 166, i32 167, i32 40, i32 41, i32 168, i32 169, i32 44, i32 45, i32 172, i32 173, i32 42, i32 43, i32 170, i32 171, i32 46, i32 47, i32 174, i32 175, i32 16, i32 17, i32 144, i32 145, i32 20, i32 21, i32 148, i32 149, i32 18, i32 19, i32 146, i32 147, i32 22, i32 23, i32 150, i32 151, i32 24, i32 25, i32 152, i32 153, i32 28, i32 29, i32 156, i32 157, i32 26, i32 27, i32 154, i32 155, i32 30, i32 31, i32 158, i32 159, i32 48, i32 49, i32 176, i32 177, i32 52, i32 53, i32 180, i32 181, i32 50, i32 51, i32 178, i32 179, i32 54, i32 55, i32 182, i32 183, i32 56, i32 57, i32 184, i32 185, i32 60, i32 61, i32 188, i32 189, i32 58, i32 59, i32 186, i32 187, i32 62, i32 63, i32 190, i32 191, i32 64, i32 65, i32 192, i32 193, i32 68, i32 69, i32 196, i32 197, i32 66, i32 67, i32 194, i32 195, i32 70, i32 71, i32 198, i32 199, i32 72, i32 73, i32 200, i32 201, i32 76, i32 77, i32 204, i32 205, i32 74, i32 75, i32 202, i32 203, i32 78, i32 79, i32 206, i32 207, i32 96, i32 97, i32 224, i32 225, i32 100, i32 101, i32 228, i32 229, i32 98, i32 99, i32 226, i32 227, i32 102, i32 103, i32 230, i32 231, i32 104, i32 105, i32 232, i32 233, i32 108, i32 109, i32 236, i32 237, i32 106, i32 107, i32 234, i32 235, i32 110, i32 111, i32 238, i32 239, i32 80, i32 81, i32 208, i32 209, i32 84, i32 85, i32 212, i32 213, i32 82, i32 83, i32 210, i32 211, i32 86, i32 87, i32 214, i32 215, i32 88, i32 89, i32 216, i32 217, i32 92, i32 93, i32 220, i32 221, i32 90, i32 91, i32 218, i32 219, i32 94, i32 95, i32 222, i32 223, i32 112, i32 113, i32 240, i32 241, i32 116, i32 117, i32 244, i32 245, i32 114, i32 115, i32 242, i32 243, i32 118, i32 119, i32 246, i32 247, i32 120, i32 121, i32 248, i32 249, i32 124, i32 125, i32 252, i32 253, i32 122, i32 123, i32 250, i32 251, i32 126, i32 127, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_5b: +; CHECK: [[REG5b:r[0-9]+]] = #91 +; CHECK: vshuff(v1,v0,[[REG5b]]) +define <256 x i8> @vshuff_5b(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 128, i32 1, i32 129, i32 4, i32 132, i32 5, i32 133, i32 2, i32 130, i32 3, i32 131, i32 6, i32 134, i32 7, i32 135, i32 8, i32 136, i32 9, i32 137, i32 12, i32 140, i32 13, i32 141, i32 10, i32 138, i32 11, i32 139, i32 14, i32 142, i32 15, i32 143, i32 32, i32 160, i32 33, i32 161, i32 36, i32 164, i32 37, i32 165, i32 34, i32 162, i32 35, i32 163, i32 38, i32 166, i32 39, i32 167, i32 40, i32 168, i32 41, i32 169, i32 44, i32 172, i32 45, i32 173, i32 42, i32 170, i32 43, i32 171, i32 46, i32 174, i32 47, i32 175, i32 16, i32 144, i32 17, i32 145, i32 20, i32 148, i32 21, i32 149, i32 18, i32 146, i32 19, i32 147, i32 22, i32 150, i32 23, i32 151, i32 24, i32 152, i32 25, i32 153, i32 28, i32 156, i32 29, i32 157, i32 26, i32 154, i32 27, i32 155, i32 30, i32 158, i32 31, i32 159, i32 48, i32 176, i32 49, i32 177, i32 52, i32 180, i32 53, i32 181, i32 50, i32 178, i32 51, i32 179, i32 54, i32 182, i32 55, i32 183, i32 56, i32 184, i32 57, i32 185, i32 60, i32 188, i32 61, i32 189, i32 58, i32 186, i32 59, i32 187, i32 62, i32 190, i32 63, i32 191, i32 64, i32 192, i32 65, i32 193, i32 68, i32 196, i32 69, i32 197, i32 66, i32 194, i32 67, i32 195, i32 70, i32 198, i32 71, i32 199, i32 72, i32 200, i32 73, i32 201, i32 76, i32 204, i32 77, i32 205, i32 74, i32 202, i32 75, i32 203, i32 78, i32 206, i32 79, i32 207, i32 96, i32 224, i32 97, i32 225, i32 100, i32 228, i32 101, i32 229, i32 98, i32 226, i32 99, i32 227, i32 102, i32 230, i32 103, i32 231, i32 104, i32 232, i32 105, i32 233, i32 108, i32 236, i32 109, i32 237, i32 106, i32 234, i32 107, i32 235, i32 110, i32 238, i32 111, i32 239, i32 80, i32 208, i32 81, i32 209, i32 84, i32 212, i32 85, i32 213, i32 82, i32 210, i32 83, i32 211, i32 86, i32 214, i32 87, i32 215, i32 88, i32 216, i32 89, i32 217, i32 92, i32 220, i32 93, i32 221, i32 90, i32 218, i32 91, i32 219, i32 94, i32 222, i32 95, i32 223, i32 112, i32 240, i32 113, i32 241, i32 116, i32 244, i32 117, i32 245, i32 114, i32 242, i32 115, i32 243, i32 118, i32 246, i32 119, i32 247, i32 120, i32 248, i32 121, i32 249, i32 124, i32 252, i32 125, i32 253, i32 122, i32 250, i32 123, i32 251, i32 126, i32 254, i32 127, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_5c: +; CHECK: [[REG5c:r[0-9]+]] = #92 +; CHECK: vshuff(v1,v0,[[REG5c]]) +define <256 x i8> @vshuff_5c(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 2, i32 3, i32 128, i32 129, i32 130, i32 131, i32 4, i32 5, i32 6, i32 7, i32 132, i32 133, i32 134, i32 135, i32 8, i32 9, i32 10, i32 11, i32 136, i32 137, i32 138, i32 139, i32 12, i32 13, i32 14, i32 15, i32 140, i32 141, i32 142, i32 143, i32 32, i32 33, i32 34, i32 35, i32 160, i32 161, i32 162, i32 163, i32 36, i32 37, i32 38, i32 39, i32 164, i32 165, i32 166, i32 167, i32 40, i32 41, i32 42, i32 43, i32 168, i32 169, i32 170, i32 171, i32 44, i32 45, i32 46, i32 47, i32 172, i32 173, i32 174, i32 175, i32 16, i32 17, i32 18, i32 19, i32 144, i32 145, i32 146, i32 147, i32 20, i32 21, i32 22, i32 23, i32 148, i32 149, i32 150, i32 151, i32 24, i32 25, i32 26, i32 27, i32 152, i32 153, i32 154, i32 155, i32 28, i32 29, i32 30, i32 31, i32 156, i32 157, i32 158, i32 159, i32 48, i32 49, i32 50, i32 51, i32 176, i32 177, i32 178, i32 179, i32 52, i32 53, i32 54, i32 55, i32 180, i32 181, i32 182, i32 183, i32 56, i32 57, i32 58, i32 59, i32 184, i32 185, i32 186, i32 187, i32 60, i32 61, i32 62, i32 63, i32 188, i32 189, i32 190, i32 191, i32 64, i32 65, i32 66, i32 67, i32 192, i32 193, i32 194, i32 195, i32 68, i32 69, i32 70, i32 71, i32 196, i32 197, i32 198, i32 199, i32 72, i32 73, i32 74, i32 75, i32 200, i32 201, i32 202, i32 203, i32 76, i32 77, i32 78, i32 79, i32 204, i32 205, i32 206, i32 207, i32 96, i32 97, i32 98, i32 99, i32 224, i32 225, i32 226, i32 227, i32 100, i32 101, i32 102, i32 103, i32 228, i32 229, i32 230, i32 231, i32 104, i32 105, i32 106, i32 107, i32 232, i32 233, i32 234, i32 235, i32 108, i32 109, i32 110, i32 111, i32 236, i32 237, i32 238, i32 239, i32 80, i32 81, i32 82, i32 83, i32 208, i32 209, i32 210, i32 211, i32 84, i32 85, i32 86, i32 87, i32 212, i32 213, i32 214, i32 215, i32 88, i32 89, i32 90, i32 91, i32 216, i32 217, i32 218, i32 219, i32 92, i32 93, i32 94, i32 95, i32 220, i32 221, i32 222, i32 223, i32 112, i32 113, i32 114, i32 115, i32 240, i32 241, i32 242, i32 243, i32 116, i32 117, i32 118, i32 119, i32 244, i32 245, i32 246, i32 247, i32 120, i32 121, i32 122, i32 123, i32 248, i32 249, i32 250, i32 251, i32 124, i32 125, i32 126, i32 127, i32 252, i32 253, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_5d: +; CHECK: [[REG5d:r[0-9]+]] = #93 +; CHECK: vshuff(v1,v0,[[REG5d]]) +define <256 x i8> @vshuff_5d(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 128, i32 2, i32 130, i32 1, i32 129, i32 3, i32 131, i32 4, i32 132, i32 6, i32 134, i32 5, i32 133, i32 7, i32 135, i32 8, i32 136, i32 10, i32 138, i32 9, i32 137, i32 11, i32 139, i32 12, i32 140, i32 14, i32 142, i32 13, i32 141, i32 15, i32 143, i32 32, i32 160, i32 34, i32 162, i32 33, i32 161, i32 35, i32 163, i32 36, i32 164, i32 38, i32 166, i32 37, i32 165, i32 39, i32 167, i32 40, i32 168, i32 42, i32 170, i32 41, i32 169, i32 43, i32 171, i32 44, i32 172, i32 46, i32 174, i32 45, i32 173, i32 47, i32 175, i32 16, i32 144, i32 18, i32 146, i32 17, i32 145, i32 19, i32 147, i32 20, i32 148, i32 22, i32 150, i32 21, i32 149, i32 23, i32 151, i32 24, i32 152, i32 26, i32 154, i32 25, i32 153, i32 27, i32 155, i32 28, i32 156, i32 30, i32 158, i32 29, i32 157, i32 31, i32 159, i32 48, i32 176, i32 50, i32 178, i32 49, i32 177, i32 51, i32 179, i32 52, i32 180, i32 54, i32 182, i32 53, i32 181, i32 55, i32 183, i32 56, i32 184, i32 58, i32 186, i32 57, i32 185, i32 59, i32 187, i32 60, i32 188, i32 62, i32 190, i32 61, i32 189, i32 63, i32 191, i32 64, i32 192, i32 66, i32 194, i32 65, i32 193, i32 67, i32 195, i32 68, i32 196, i32 70, i32 198, i32 69, i32 197, i32 71, i32 199, i32 72, i32 200, i32 74, i32 202, i32 73, i32 201, i32 75, i32 203, i32 76, i32 204, i32 78, i32 206, i32 77, i32 205, i32 79, i32 207, i32 96, i32 224, i32 98, i32 226, i32 97, i32 225, i32 99, i32 227, i32 100, i32 228, i32 102, i32 230, i32 101, i32 229, i32 103, i32 231, i32 104, i32 232, i32 106, i32 234, i32 105, i32 233, i32 107, i32 235, i32 108, i32 236, i32 110, i32 238, i32 109, i32 237, i32 111, i32 239, i32 80, i32 208, i32 82, i32 210, i32 81, i32 209, i32 83, i32 211, i32 84, i32 212, i32 86, i32 214, i32 85, i32 213, i32 87, i32 215, i32 88, i32 216, i32 90, i32 218, i32 89, i32 217, i32 91, i32 219, i32 92, i32 220, i32 94, i32 222, i32 93, i32 221, i32 95, i32 223, i32 112, i32 240, i32 114, i32 242, i32 113, i32 241, i32 115, i32 243, i32 116, i32 244, i32 118, i32 246, i32 117, i32 245, i32 119, i32 247, i32 120, i32 248, i32 122, i32 250, i32 121, i32 249, i32 123, i32 251, i32 124, i32 252, i32 126, i32 254, i32 125, i32 253, i32 127, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_5e: +; CHECK: [[REG5e:r[0-9]+]] = #94 +; CHECK: vshuff(v1,v0,[[REG5e]]) +define <256 x i8> @vshuff_5e(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 128, i32 129, i32 2, i32 3, i32 130, i32 131, i32 4, i32 5, i32 132, i32 133, i32 6, i32 7, i32 134, i32 135, i32 8, i32 9, i32 136, i32 137, i32 10, i32 11, i32 138, i32 139, i32 12, i32 13, i32 140, i32 141, i32 14, i32 15, i32 142, i32 143, i32 32, i32 33, i32 160, i32 161, i32 34, i32 35, i32 162, i32 163, i32 36, i32 37, i32 164, i32 165, i32 38, i32 39, i32 166, i32 167, i32 40, i32 41, i32 168, i32 169, i32 42, i32 43, i32 170, i32 171, i32 44, i32 45, i32 172, i32 173, i32 46, i32 47, i32 174, i32 175, i32 16, i32 17, i32 144, i32 145, i32 18, i32 19, i32 146, i32 147, i32 20, i32 21, i32 148, i32 149, i32 22, i32 23, i32 150, i32 151, i32 24, i32 25, i32 152, i32 153, i32 26, i32 27, i32 154, i32 155, i32 28, i32 29, i32 156, i32 157, i32 30, i32 31, i32 158, i32 159, i32 48, i32 49, i32 176, i32 177, i32 50, i32 51, i32 178, i32 179, i32 52, i32 53, i32 180, i32 181, i32 54, i32 55, i32 182, i32 183, i32 56, i32 57, i32 184, i32 185, i32 58, i32 59, i32 186, i32 187, i32 60, i32 61, i32 188, i32 189, i32 62, i32 63, i32 190, i32 191, i32 64, i32 65, i32 192, i32 193, i32 66, i32 67, i32 194, i32 195, i32 68, i32 69, i32 196, i32 197, i32 70, i32 71, i32 198, i32 199, i32 72, i32 73, i32 200, i32 201, i32 74, i32 75, i32 202, i32 203, i32 76, i32 77, i32 204, i32 205, i32 78, i32 79, i32 206, i32 207, i32 96, i32 97, i32 224, i32 225, i32 98, i32 99, i32 226, i32 227, i32 100, i32 101, i32 228, i32 229, i32 102, i32 103, i32 230, i32 231, i32 104, i32 105, i32 232, i32 233, i32 106, i32 107, i32 234, i32 235, i32 108, i32 109, i32 236, i32 237, i32 110, i32 111, i32 238, i32 239, i32 80, i32 81, i32 208, i32 209, i32 82, i32 83, i32 210, i32 211, i32 84, i32 85, i32 212, i32 213, i32 86, i32 87, i32 214, i32 215, i32 88, i32 89, i32 216, i32 217, i32 90, i32 91, i32 218, i32 219, i32 92, i32 93, i32 220, i32 221, i32 94, i32 95, i32 222, i32 223, i32 112, i32 113, i32 240, i32 241, i32 114, i32 115, i32 242, i32 243, i32 116, i32 117, i32 244, i32 245, i32 118, i32 119, i32 246, i32 247, i32 120, i32 121, i32 248, i32 249, i32 122, i32 123, i32 250, i32 251, i32 124, i32 125, i32 252, i32 253, i32 126, i32 127, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_5f: +; CHECK: [[REG5f:r[0-9]+]] = #95 +; CHECK: vshuff(v1,v0,[[REG5f]]) +define <256 x i8> @vshuff_5f(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 128, i32 1, i32 129, i32 2, i32 130, i32 3, i32 131, i32 4, i32 132, i32 5, i32 133, i32 6, i32 134, i32 7, i32 135, i32 8, i32 136, i32 9, i32 137, i32 10, i32 138, i32 11, i32 139, i32 12, i32 140, i32 13, i32 141, i32 14, i32 142, i32 15, i32 143, i32 32, i32 160, i32 33, i32 161, i32 34, i32 162, i32 35, i32 163, i32 36, i32 164, i32 37, i32 165, i32 38, i32 166, i32 39, i32 167, i32 40, i32 168, i32 41, i32 169, i32 42, i32 170, i32 43, i32 171, i32 44, i32 172, i32 45, i32 173, i32 46, i32 174, i32 47, i32 175, i32 16, i32 144, i32 17, i32 145, i32 18, i32 146, i32 19, i32 147, i32 20, i32 148, i32 21, i32 149, i32 22, i32 150, i32 23, i32 151, i32 24, i32 152, i32 25, i32 153, i32 26, i32 154, i32 27, i32 155, i32 28, i32 156, i32 29, i32 157, i32 30, i32 158, i32 31, i32 159, i32 48, i32 176, i32 49, i32 177, i32 50, i32 178, i32 51, i32 179, i32 52, i32 180, i32 53, i32 181, i32 54, i32 182, i32 55, i32 183, i32 56, i32 184, i32 57, i32 185, i32 58, i32 186, i32 59, i32 187, i32 60, i32 188, i32 61, i32 189, i32 62, i32 190, i32 63, i32 191, i32 64, i32 192, i32 65, i32 193, i32 66, i32 194, i32 67, i32 195, i32 68, i32 196, i32 69, i32 197, i32 70, i32 198, i32 71, i32 199, i32 72, i32 200, i32 73, i32 201, i32 74, i32 202, i32 75, i32 203, i32 76, i32 204, i32 77, i32 205, i32 78, i32 206, i32 79, i32 207, i32 96, i32 224, i32 97, i32 225, i32 98, i32 226, i32 99, i32 227, i32 100, i32 228, i32 101, i32 229, i32 102, i32 230, i32 103, i32 231, i32 104, i32 232, i32 105, i32 233, i32 106, i32 234, i32 107, i32 235, i32 108, i32 236, i32 109, i32 237, i32 110, i32 238, i32 111, i32 239, i32 80, i32 208, i32 81, i32 209, i32 82, i32 210, i32 83, i32 211, i32 84, i32 212, i32 85, i32 213, i32 86, i32 214, i32 87, i32 215, i32 88, i32 216, i32 89, i32 217, i32 90, i32 218, i32 91, i32 219, i32 92, i32 220, i32 93, i32 221, i32 94, i32 222, i32 95, i32 223, i32 112, i32 240, i32 113, i32 241, i32 114, i32 242, i32 115, i32 243, i32 116, i32 244, i32 117, i32 245, i32 118, i32 246, i32 119, i32 247, i32 120, i32 248, i32 121, i32 249, i32 122, i32 250, i32 123, i32 251, i32 124, i32 252, i32 125, i32 253, i32 126, i32 254, i32 127, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_60: +; CHECK: [[REG60:r[0-9]+]] = #96 +; CHECK: vshuff(v1,v0,[[REG60]]) +define <256 x i8> @vshuff_60(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 128, i32 129, i32 130, i32 131, i32 132, i32 133, i32 134, i32 135, i32 136, i32 137, i32 138, i32 139, i32 140, i32 141, i32 142, i32 143, i32 144, i32 145, i32 146, i32 147, i32 148, i32 149, i32 150, i32 151, i32 152, i32 153, i32 154, i32 155, i32 156, i32 157, i32 158, i32 159, i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 48, i32 49, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63, i32 160, i32 161, i32 162, i32 163, i32 164, i32 165, i32 166, i32 167, i32 168, i32 169, i32 170, i32 171, i32 172, i32 173, i32 174, i32 175, i32 176, i32 177, i32 178, i32 179, i32 180, i32 181, i32 182, i32 183, i32 184, i32 185, i32 186, i32 187, i32 188, i32 189, i32 190, i32 191, i32 64, i32 65, i32 66, i32 67, i32 68, i32 69, i32 70, i32 71, i32 72, i32 73, i32 74, i32 75, i32 76, i32 77, i32 78, i32 79, i32 80, i32 81, i32 82, i32 83, i32 84, i32 85, i32 86, i32 87, i32 88, i32 89, i32 90, i32 91, i32 92, i32 93, i32 94, i32 95, i32 192, i32 193, i32 194, i32 195, i32 196, i32 197, i32 198, i32 199, i32 200, i32 201, i32 202, i32 203, i32 204, i32 205, i32 206, i32 207, i32 208, i32 209, i32 210, i32 211, i32 212, i32 213, i32 214, i32 215, i32 216, i32 217, i32 218, i32 219, i32 220, i32 221, i32 222, i32 223, i32 96, i32 97, i32 98, i32 99, i32 100, i32 101, i32 102, i32 103, i32 104, i32 105, i32 106, i32 107, i32 108, i32 109, i32 110, i32 111, i32 112, i32 113, i32 114, i32 115, i32 116, i32 117, i32 118, i32 119, i32 120, i32 121, i32 122, i32 123, i32 124, i32 125, i32 126, i32 127, i32 224, i32 225, i32 226, i32 227, i32 228, i32 229, i32 230, i32 231, i32 232, i32 233, i32 234, i32 235, i32 236, i32 237, i32 238, i32 239, i32 240, i32 241, i32 242, i32 243, i32 244, i32 245, i32 246, i32 247, i32 248, i32 249, i32 250, i32 251, i32 252, i32 253, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_61: +; CHECK: [[REG61:r[0-9]+]] = #97 +; CHECK: vshuff(v1,v0,[[REG61]]) +define <256 x i8> @vshuff_61(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 128, i32 2, i32 130, i32 4, i32 132, i32 6, i32 134, i32 8, i32 136, i32 10, i32 138, i32 12, i32 140, i32 14, i32 142, i32 16, i32 144, i32 18, i32 146, i32 20, i32 148, i32 22, i32 150, i32 24, i32 152, i32 26, i32 154, i32 28, i32 156, i32 30, i32 158, i32 1, i32 129, i32 3, i32 131, i32 5, i32 133, i32 7, i32 135, i32 9, i32 137, i32 11, i32 139, i32 13, i32 141, i32 15, i32 143, i32 17, i32 145, i32 19, i32 147, i32 21, i32 149, i32 23, i32 151, i32 25, i32 153, i32 27, i32 155, i32 29, i32 157, i32 31, i32 159, i32 32, i32 160, i32 34, i32 162, i32 36, i32 164, i32 38, i32 166, i32 40, i32 168, i32 42, i32 170, i32 44, i32 172, i32 46, i32 174, i32 48, i32 176, i32 50, i32 178, i32 52, i32 180, i32 54, i32 182, i32 56, i32 184, i32 58, i32 186, i32 60, i32 188, i32 62, i32 190, i32 33, i32 161, i32 35, i32 163, i32 37, i32 165, i32 39, i32 167, i32 41, i32 169, i32 43, i32 171, i32 45, i32 173, i32 47, i32 175, i32 49, i32 177, i32 51, i32 179, i32 53, i32 181, i32 55, i32 183, i32 57, i32 185, i32 59, i32 187, i32 61, i32 189, i32 63, i32 191, i32 64, i32 192, i32 66, i32 194, i32 68, i32 196, i32 70, i32 198, i32 72, i32 200, i32 74, i32 202, i32 76, i32 204, i32 78, i32 206, i32 80, i32 208, i32 82, i32 210, i32 84, i32 212, i32 86, i32 214, i32 88, i32 216, i32 90, i32 218, i32 92, i32 220, i32 94, i32 222, i32 65, i32 193, i32 67, i32 195, i32 69, i32 197, i32 71, i32 199, i32 73, i32 201, i32 75, i32 203, i32 77, i32 205, i32 79, i32 207, i32 81, i32 209, i32 83, i32 211, i32 85, i32 213, i32 87, i32 215, i32 89, i32 217, i32 91, i32 219, i32 93, i32 221, i32 95, i32 223, i32 96, i32 224, i32 98, i32 226, i32 100, i32 228, i32 102, i32 230, i32 104, i32 232, i32 106, i32 234, i32 108, i32 236, i32 110, i32 238, i32 112, i32 240, i32 114, i32 242, i32 116, i32 244, i32 118, i32 246, i32 120, i32 248, i32 122, i32 250, i32 124, i32 252, i32 126, i32 254, i32 97, i32 225, i32 99, i32 227, i32 101, i32 229, i32 103, i32 231, i32 105, i32 233, i32 107, i32 235, i32 109, i32 237, i32 111, i32 239, i32 113, i32 241, i32 115, i32 243, i32 117, i32 245, i32 119, i32 247, i32 121, i32 249, i32 123, i32 251, i32 125, i32 253, i32 127, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_62: +; CHECK: [[REG62:r[0-9]+]] = #98 +; CHECK: vshuff(v1,v0,[[REG62]]) +define <256 x i8> @vshuff_62(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 128, i32 129, i32 4, i32 5, i32 132, i32 133, i32 8, i32 9, i32 136, i32 137, i32 12, i32 13, i32 140, i32 141, i32 16, i32 17, i32 144, i32 145, i32 20, i32 21, i32 148, i32 149, i32 24, i32 25, i32 152, i32 153, i32 28, i32 29, i32 156, i32 157, i32 2, i32 3, i32 130, i32 131, i32 6, i32 7, i32 134, i32 135, i32 10, i32 11, i32 138, i32 139, i32 14, i32 15, i32 142, i32 143, i32 18, i32 19, i32 146, i32 147, i32 22, i32 23, i32 150, i32 151, i32 26, i32 27, i32 154, i32 155, i32 30, i32 31, i32 158, i32 159, i32 32, i32 33, i32 160, i32 161, i32 36, i32 37, i32 164, i32 165, i32 40, i32 41, i32 168, i32 169, i32 44, i32 45, i32 172, i32 173, i32 48, i32 49, i32 176, i32 177, i32 52, i32 53, i32 180, i32 181, i32 56, i32 57, i32 184, i32 185, i32 60, i32 61, i32 188, i32 189, i32 34, i32 35, i32 162, i32 163, i32 38, i32 39, i32 166, i32 167, i32 42, i32 43, i32 170, i32 171, i32 46, i32 47, i32 174, i32 175, i32 50, i32 51, i32 178, i32 179, i32 54, i32 55, i32 182, i32 183, i32 58, i32 59, i32 186, i32 187, i32 62, i32 63, i32 190, i32 191, i32 64, i32 65, i32 192, i32 193, i32 68, i32 69, i32 196, i32 197, i32 72, i32 73, i32 200, i32 201, i32 76, i32 77, i32 204, i32 205, i32 80, i32 81, i32 208, i32 209, i32 84, i32 85, i32 212, i32 213, i32 88, i32 89, i32 216, i32 217, i32 92, i32 93, i32 220, i32 221, i32 66, i32 67, i32 194, i32 195, i32 70, i32 71, i32 198, i32 199, i32 74, i32 75, i32 202, i32 203, i32 78, i32 79, i32 206, i32 207, i32 82, i32 83, i32 210, i32 211, i32 86, i32 87, i32 214, i32 215, i32 90, i32 91, i32 218, i32 219, i32 94, i32 95, i32 222, i32 223, i32 96, i32 97, i32 224, i32 225, i32 100, i32 101, i32 228, i32 229, i32 104, i32 105, i32 232, i32 233, i32 108, i32 109, i32 236, i32 237, i32 112, i32 113, i32 240, i32 241, i32 116, i32 117, i32 244, i32 245, i32 120, i32 121, i32 248, i32 249, i32 124, i32 125, i32 252, i32 253, i32 98, i32 99, i32 226, i32 227, i32 102, i32 103, i32 230, i32 231, i32 106, i32 107, i32 234, i32 235, i32 110, i32 111, i32 238, i32 239, i32 114, i32 115, i32 242, i32 243, i32 118, i32 119, i32 246, i32 247, i32 122, i32 123, i32 250, i32 251, i32 126, i32 127, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_63: +; CHECK: [[REG63:r[0-9]+]] = #99 +; CHECK: vshuff(v1,v0,[[REG63]]) +define <256 x i8> @vshuff_63(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 128, i32 1, i32 129, i32 4, i32 132, i32 5, i32 133, i32 8, i32 136, i32 9, i32 137, i32 12, i32 140, i32 13, i32 141, i32 16, i32 144, i32 17, i32 145, i32 20, i32 148, i32 21, i32 149, i32 24, i32 152, i32 25, i32 153, i32 28, i32 156, i32 29, i32 157, i32 2, i32 130, i32 3, i32 131, i32 6, i32 134, i32 7, i32 135, i32 10, i32 138, i32 11, i32 139, i32 14, i32 142, i32 15, i32 143, i32 18, i32 146, i32 19, i32 147, i32 22, i32 150, i32 23, i32 151, i32 26, i32 154, i32 27, i32 155, i32 30, i32 158, i32 31, i32 159, i32 32, i32 160, i32 33, i32 161, i32 36, i32 164, i32 37, i32 165, i32 40, i32 168, i32 41, i32 169, i32 44, i32 172, i32 45, i32 173, i32 48, i32 176, i32 49, i32 177, i32 52, i32 180, i32 53, i32 181, i32 56, i32 184, i32 57, i32 185, i32 60, i32 188, i32 61, i32 189, i32 34, i32 162, i32 35, i32 163, i32 38, i32 166, i32 39, i32 167, i32 42, i32 170, i32 43, i32 171, i32 46, i32 174, i32 47, i32 175, i32 50, i32 178, i32 51, i32 179, i32 54, i32 182, i32 55, i32 183, i32 58, i32 186, i32 59, i32 187, i32 62, i32 190, i32 63, i32 191, i32 64, i32 192, i32 65, i32 193, i32 68, i32 196, i32 69, i32 197, i32 72, i32 200, i32 73, i32 201, i32 76, i32 204, i32 77, i32 205, i32 80, i32 208, i32 81, i32 209, i32 84, i32 212, i32 85, i32 213, i32 88, i32 216, i32 89, i32 217, i32 92, i32 220, i32 93, i32 221, i32 66, i32 194, i32 67, i32 195, i32 70, i32 198, i32 71, i32 199, i32 74, i32 202, i32 75, i32 203, i32 78, i32 206, i32 79, i32 207, i32 82, i32 210, i32 83, i32 211, i32 86, i32 214, i32 87, i32 215, i32 90, i32 218, i32 91, i32 219, i32 94, i32 222, i32 95, i32 223, i32 96, i32 224, i32 97, i32 225, i32 100, i32 228, i32 101, i32 229, i32 104, i32 232, i32 105, i32 233, i32 108, i32 236, i32 109, i32 237, i32 112, i32 240, i32 113, i32 241, i32 116, i32 244, i32 117, i32 245, i32 120, i32 248, i32 121, i32 249, i32 124, i32 252, i32 125, i32 253, i32 98, i32 226, i32 99, i32 227, i32 102, i32 230, i32 103, i32 231, i32 106, i32 234, i32 107, i32 235, i32 110, i32 238, i32 111, i32 239, i32 114, i32 242, i32 115, i32 243, i32 118, i32 246, i32 119, i32 247, i32 122, i32 250, i32 123, i32 251, i32 126, i32 254, i32 127, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_64: +; CHECK: [[REG64:r[0-9]+]] = #100 +; CHECK: vshuff(v1,v0,[[REG64]]) +define <256 x i8> @vshuff_64(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 2, i32 3, i32 128, i32 129, i32 130, i32 131, i32 8, i32 9, i32 10, i32 11, i32 136, i32 137, i32 138, i32 139, i32 16, i32 17, i32 18, i32 19, i32 144, i32 145, i32 146, i32 147, i32 24, i32 25, i32 26, i32 27, i32 152, i32 153, i32 154, i32 155, i32 4, i32 5, i32 6, i32 7, i32 132, i32 133, i32 134, i32 135, i32 12, i32 13, i32 14, i32 15, i32 140, i32 141, i32 142, i32 143, i32 20, i32 21, i32 22, i32 23, i32 148, i32 149, i32 150, i32 151, i32 28, i32 29, i32 30, i32 31, i32 156, i32 157, i32 158, i32 159, i32 32, i32 33, i32 34, i32 35, i32 160, i32 161, i32 162, i32 163, i32 40, i32 41, i32 42, i32 43, i32 168, i32 169, i32 170, i32 171, i32 48, i32 49, i32 50, i32 51, i32 176, i32 177, i32 178, i32 179, i32 56, i32 57, i32 58, i32 59, i32 184, i32 185, i32 186, i32 187, i32 36, i32 37, i32 38, i32 39, i32 164, i32 165, i32 166, i32 167, i32 44, i32 45, i32 46, i32 47, i32 172, i32 173, i32 174, i32 175, i32 52, i32 53, i32 54, i32 55, i32 180, i32 181, i32 182, i32 183, i32 60, i32 61, i32 62, i32 63, i32 188, i32 189, i32 190, i32 191, i32 64, i32 65, i32 66, i32 67, i32 192, i32 193, i32 194, i32 195, i32 72, i32 73, i32 74, i32 75, i32 200, i32 201, i32 202, i32 203, i32 80, i32 81, i32 82, i32 83, i32 208, i32 209, i32 210, i32 211, i32 88, i32 89, i32 90, i32 91, i32 216, i32 217, i32 218, i32 219, i32 68, i32 69, i32 70, i32 71, i32 196, i32 197, i32 198, i32 199, i32 76, i32 77, i32 78, i32 79, i32 204, i32 205, i32 206, i32 207, i32 84, i32 85, i32 86, i32 87, i32 212, i32 213, i32 214, i32 215, i32 92, i32 93, i32 94, i32 95, i32 220, i32 221, i32 222, i32 223, i32 96, i32 97, i32 98, i32 99, i32 224, i32 225, i32 226, i32 227, i32 104, i32 105, i32 106, i32 107, i32 232, i32 233, i32 234, i32 235, i32 112, i32 113, i32 114, i32 115, i32 240, i32 241, i32 242, i32 243, i32 120, i32 121, i32 122, i32 123, i32 248, i32 249, i32 250, i32 251, i32 100, i32 101, i32 102, i32 103, i32 228, i32 229, i32 230, i32 231, i32 108, i32 109, i32 110, i32 111, i32 236, i32 237, i32 238, i32 239, i32 116, i32 117, i32 118, i32 119, i32 244, i32 245, i32 246, i32 247, i32 124, i32 125, i32 126, i32 127, i32 252, i32 253, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_65: +; CHECK: [[REG65:r[0-9]+]] = #101 +; CHECK: vshuff(v1,v0,[[REG65]]) +define <256 x i8> @vshuff_65(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 128, i32 2, i32 130, i32 1, i32 129, i32 3, i32 131, i32 8, i32 136, i32 10, i32 138, i32 9, i32 137, i32 11, i32 139, i32 16, i32 144, i32 18, i32 146, i32 17, i32 145, i32 19, i32 147, i32 24, i32 152, i32 26, i32 154, i32 25, i32 153, i32 27, i32 155, i32 4, i32 132, i32 6, i32 134, i32 5, i32 133, i32 7, i32 135, i32 12, i32 140, i32 14, i32 142, i32 13, i32 141, i32 15, i32 143, i32 20, i32 148, i32 22, i32 150, i32 21, i32 149, i32 23, i32 151, i32 28, i32 156, i32 30, i32 158, i32 29, i32 157, i32 31, i32 159, i32 32, i32 160, i32 34, i32 162, i32 33, i32 161, i32 35, i32 163, i32 40, i32 168, i32 42, i32 170, i32 41, i32 169, i32 43, i32 171, i32 48, i32 176, i32 50, i32 178, i32 49, i32 177, i32 51, i32 179, i32 56, i32 184, i32 58, i32 186, i32 57, i32 185, i32 59, i32 187, i32 36, i32 164, i32 38, i32 166, i32 37, i32 165, i32 39, i32 167, i32 44, i32 172, i32 46, i32 174, i32 45, i32 173, i32 47, i32 175, i32 52, i32 180, i32 54, i32 182, i32 53, i32 181, i32 55, i32 183, i32 60, i32 188, i32 62, i32 190, i32 61, i32 189, i32 63, i32 191, i32 64, i32 192, i32 66, i32 194, i32 65, i32 193, i32 67, i32 195, i32 72, i32 200, i32 74, i32 202, i32 73, i32 201, i32 75, i32 203, i32 80, i32 208, i32 82, i32 210, i32 81, i32 209, i32 83, i32 211, i32 88, i32 216, i32 90, i32 218, i32 89, i32 217, i32 91, i32 219, i32 68, i32 196, i32 70, i32 198, i32 69, i32 197, i32 71, i32 199, i32 76, i32 204, i32 78, i32 206, i32 77, i32 205, i32 79, i32 207, i32 84, i32 212, i32 86, i32 214, i32 85, i32 213, i32 87, i32 215, i32 92, i32 220, i32 94, i32 222, i32 93, i32 221, i32 95, i32 223, i32 96, i32 224, i32 98, i32 226, i32 97, i32 225, i32 99, i32 227, i32 104, i32 232, i32 106, i32 234, i32 105, i32 233, i32 107, i32 235, i32 112, i32 240, i32 114, i32 242, i32 113, i32 241, i32 115, i32 243, i32 120, i32 248, i32 122, i32 250, i32 121, i32 249, i32 123, i32 251, i32 100, i32 228, i32 102, i32 230, i32 101, i32 229, i32 103, i32 231, i32 108, i32 236, i32 110, i32 238, i32 109, i32 237, i32 111, i32 239, i32 116, i32 244, i32 118, i32 246, i32 117, i32 245, i32 119, i32 247, i32 124, i32 252, i32 126, i32 254, i32 125, i32 253, i32 127, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_66: +; CHECK: [[REG66:r[0-9]+]] = #102 +; CHECK: vshuff(v1,v0,[[REG66]]) +define <256 x i8> @vshuff_66(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 128, i32 129, i32 2, i32 3, i32 130, i32 131, i32 8, i32 9, i32 136, i32 137, i32 10, i32 11, i32 138, i32 139, i32 16, i32 17, i32 144, i32 145, i32 18, i32 19, i32 146, i32 147, i32 24, i32 25, i32 152, i32 153, i32 26, i32 27, i32 154, i32 155, i32 4, i32 5, i32 132, i32 133, i32 6, i32 7, i32 134, i32 135, i32 12, i32 13, i32 140, i32 141, i32 14, i32 15, i32 142, i32 143, i32 20, i32 21, i32 148, i32 149, i32 22, i32 23, i32 150, i32 151, i32 28, i32 29, i32 156, i32 157, i32 30, i32 31, i32 158, i32 159, i32 32, i32 33, i32 160, i32 161, i32 34, i32 35, i32 162, i32 163, i32 40, i32 41, i32 168, i32 169, i32 42, i32 43, i32 170, i32 171, i32 48, i32 49, i32 176, i32 177, i32 50, i32 51, i32 178, i32 179, i32 56, i32 57, i32 184, i32 185, i32 58, i32 59, i32 186, i32 187, i32 36, i32 37, i32 164, i32 165, i32 38, i32 39, i32 166, i32 167, i32 44, i32 45, i32 172, i32 173, i32 46, i32 47, i32 174, i32 175, i32 52, i32 53, i32 180, i32 181, i32 54, i32 55, i32 182, i32 183, i32 60, i32 61, i32 188, i32 189, i32 62, i32 63, i32 190, i32 191, i32 64, i32 65, i32 192, i32 193, i32 66, i32 67, i32 194, i32 195, i32 72, i32 73, i32 200, i32 201, i32 74, i32 75, i32 202, i32 203, i32 80, i32 81, i32 208, i32 209, i32 82, i32 83, i32 210, i32 211, i32 88, i32 89, i32 216, i32 217, i32 90, i32 91, i32 218, i32 219, i32 68, i32 69, i32 196, i32 197, i32 70, i32 71, i32 198, i32 199, i32 76, i32 77, i32 204, i32 205, i32 78, i32 79, i32 206, i32 207, i32 84, i32 85, i32 212, i32 213, i32 86, i32 87, i32 214, i32 215, i32 92, i32 93, i32 220, i32 221, i32 94, i32 95, i32 222, i32 223, i32 96, i32 97, i32 224, i32 225, i32 98, i32 99, i32 226, i32 227, i32 104, i32 105, i32 232, i32 233, i32 106, i32 107, i32 234, i32 235, i32 112, i32 113, i32 240, i32 241, i32 114, i32 115, i32 242, i32 243, i32 120, i32 121, i32 248, i32 249, i32 122, i32 123, i32 250, i32 251, i32 100, i32 101, i32 228, i32 229, i32 102, i32 103, i32 230, i32 231, i32 108, i32 109, i32 236, i32 237, i32 110, i32 111, i32 238, i32 239, i32 116, i32 117, i32 244, i32 245, i32 118, i32 119, i32 246, i32 247, i32 124, i32 125, i32 252, i32 253, i32 126, i32 127, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_67: +; CHECK: [[REG67:r[0-9]+]] = #103 +; CHECK: vshuff(v1,v0,[[REG67]]) +define <256 x i8> @vshuff_67(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 128, i32 1, i32 129, i32 2, i32 130, i32 3, i32 131, i32 8, i32 136, i32 9, i32 137, i32 10, i32 138, i32 11, i32 139, i32 16, i32 144, i32 17, i32 145, i32 18, i32 146, i32 19, i32 147, i32 24, i32 152, i32 25, i32 153, i32 26, i32 154, i32 27, i32 155, i32 4, i32 132, i32 5, i32 133, i32 6, i32 134, i32 7, i32 135, i32 12, i32 140, i32 13, i32 141, i32 14, i32 142, i32 15, i32 143, i32 20, i32 148, i32 21, i32 149, i32 22, i32 150, i32 23, i32 151, i32 28, i32 156, i32 29, i32 157, i32 30, i32 158, i32 31, i32 159, i32 32, i32 160, i32 33, i32 161, i32 34, i32 162, i32 35, i32 163, i32 40, i32 168, i32 41, i32 169, i32 42, i32 170, i32 43, i32 171, i32 48, i32 176, i32 49, i32 177, i32 50, i32 178, i32 51, i32 179, i32 56, i32 184, i32 57, i32 185, i32 58, i32 186, i32 59, i32 187, i32 36, i32 164, i32 37, i32 165, i32 38, i32 166, i32 39, i32 167, i32 44, i32 172, i32 45, i32 173, i32 46, i32 174, i32 47, i32 175, i32 52, i32 180, i32 53, i32 181, i32 54, i32 182, i32 55, i32 183, i32 60, i32 188, i32 61, i32 189, i32 62, i32 190, i32 63, i32 191, i32 64, i32 192, i32 65, i32 193, i32 66, i32 194, i32 67, i32 195, i32 72, i32 200, i32 73, i32 201, i32 74, i32 202, i32 75, i32 203, i32 80, i32 208, i32 81, i32 209, i32 82, i32 210, i32 83, i32 211, i32 88, i32 216, i32 89, i32 217, i32 90, i32 218, i32 91, i32 219, i32 68, i32 196, i32 69, i32 197, i32 70, i32 198, i32 71, i32 199, i32 76, i32 204, i32 77, i32 205, i32 78, i32 206, i32 79, i32 207, i32 84, i32 212, i32 85, i32 213, i32 86, i32 214, i32 87, i32 215, i32 92, i32 220, i32 93, i32 221, i32 94, i32 222, i32 95, i32 223, i32 96, i32 224, i32 97, i32 225, i32 98, i32 226, i32 99, i32 227, i32 104, i32 232, i32 105, i32 233, i32 106, i32 234, i32 107, i32 235, i32 112, i32 240, i32 113, i32 241, i32 114, i32 242, i32 115, i32 243, i32 120, i32 248, i32 121, i32 249, i32 122, i32 250, i32 123, i32 251, i32 100, i32 228, i32 101, i32 229, i32 102, i32 230, i32 103, i32 231, i32 108, i32 236, i32 109, i32 237, i32 110, i32 238, i32 111, i32 239, i32 116, i32 244, i32 117, i32 245, i32 118, i32 246, i32 119, i32 247, i32 124, i32 252, i32 125, i32 253, i32 126, i32 254, i32 127, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_68: +; CHECK: [[REG68:r[0-9]+]] = #104 +; CHECK: vshuff(v1,v0,[[REG68]]) +define <256 x i8> @vshuff_68(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 128, i32 129, i32 130, i32 131, i32 132, i32 133, i32 134, i32 135, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 144, i32 145, i32 146, i32 147, i32 148, i32 149, i32 150, i32 151, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 136, i32 137, i32 138, i32 139, i32 140, i32 141, i32 142, i32 143, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 152, i32 153, i32 154, i32 155, i32 156, i32 157, i32 158, i32 159, i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 160, i32 161, i32 162, i32 163, i32 164, i32 165, i32 166, i32 167, i32 48, i32 49, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 176, i32 177, i32 178, i32 179, i32 180, i32 181, i32 182, i32 183, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 168, i32 169, i32 170, i32 171, i32 172, i32 173, i32 174, i32 175, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63, i32 184, i32 185, i32 186, i32 187, i32 188, i32 189, i32 190, i32 191, i32 64, i32 65, i32 66, i32 67, i32 68, i32 69, i32 70, i32 71, i32 192, i32 193, i32 194, i32 195, i32 196, i32 197, i32 198, i32 199, i32 80, i32 81, i32 82, i32 83, i32 84, i32 85, i32 86, i32 87, i32 208, i32 209, i32 210, i32 211, i32 212, i32 213, i32 214, i32 215, i32 72, i32 73, i32 74, i32 75, i32 76, i32 77, i32 78, i32 79, i32 200, i32 201, i32 202, i32 203, i32 204, i32 205, i32 206, i32 207, i32 88, i32 89, i32 90, i32 91, i32 92, i32 93, i32 94, i32 95, i32 216, i32 217, i32 218, i32 219, i32 220, i32 221, i32 222, i32 223, i32 96, i32 97, i32 98, i32 99, i32 100, i32 101, i32 102, i32 103, i32 224, i32 225, i32 226, i32 227, i32 228, i32 229, i32 230, i32 231, i32 112, i32 113, i32 114, i32 115, i32 116, i32 117, i32 118, i32 119, i32 240, i32 241, i32 242, i32 243, i32 244, i32 245, i32 246, i32 247, i32 104, i32 105, i32 106, i32 107, i32 108, i32 109, i32 110, i32 111, i32 232, i32 233, i32 234, i32 235, i32 236, i32 237, i32 238, i32 239, i32 120, i32 121, i32 122, i32 123, i32 124, i32 125, i32 126, i32 127, i32 248, i32 249, i32 250, i32 251, i32 252, i32 253, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_69: +; CHECK: [[REG69:r[0-9]+]] = #105 +; CHECK: vshuff(v1,v0,[[REG69]]) +define <256 x i8> @vshuff_69(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 128, i32 2, i32 130, i32 4, i32 132, i32 6, i32 134, i32 1, i32 129, i32 3, i32 131, i32 5, i32 133, i32 7, i32 135, i32 16, i32 144, i32 18, i32 146, i32 20, i32 148, i32 22, i32 150, i32 17, i32 145, i32 19, i32 147, i32 21, i32 149, i32 23, i32 151, i32 8, i32 136, i32 10, i32 138, i32 12, i32 140, i32 14, i32 142, i32 9, i32 137, i32 11, i32 139, i32 13, i32 141, i32 15, i32 143, i32 24, i32 152, i32 26, i32 154, i32 28, i32 156, i32 30, i32 158, i32 25, i32 153, i32 27, i32 155, i32 29, i32 157, i32 31, i32 159, i32 32, i32 160, i32 34, i32 162, i32 36, i32 164, i32 38, i32 166, i32 33, i32 161, i32 35, i32 163, i32 37, i32 165, i32 39, i32 167, i32 48, i32 176, i32 50, i32 178, i32 52, i32 180, i32 54, i32 182, i32 49, i32 177, i32 51, i32 179, i32 53, i32 181, i32 55, i32 183, i32 40, i32 168, i32 42, i32 170, i32 44, i32 172, i32 46, i32 174, i32 41, i32 169, i32 43, i32 171, i32 45, i32 173, i32 47, i32 175, i32 56, i32 184, i32 58, i32 186, i32 60, i32 188, i32 62, i32 190, i32 57, i32 185, i32 59, i32 187, i32 61, i32 189, i32 63, i32 191, i32 64, i32 192, i32 66, i32 194, i32 68, i32 196, i32 70, i32 198, i32 65, i32 193, i32 67, i32 195, i32 69, i32 197, i32 71, i32 199, i32 80, i32 208, i32 82, i32 210, i32 84, i32 212, i32 86, i32 214, i32 81, i32 209, i32 83, i32 211, i32 85, i32 213, i32 87, i32 215, i32 72, i32 200, i32 74, i32 202, i32 76, i32 204, i32 78, i32 206, i32 73, i32 201, i32 75, i32 203, i32 77, i32 205, i32 79, i32 207, i32 88, i32 216, i32 90, i32 218, i32 92, i32 220, i32 94, i32 222, i32 89, i32 217, i32 91, i32 219, i32 93, i32 221, i32 95, i32 223, i32 96, i32 224, i32 98, i32 226, i32 100, i32 228, i32 102, i32 230, i32 97, i32 225, i32 99, i32 227, i32 101, i32 229, i32 103, i32 231, i32 112, i32 240, i32 114, i32 242, i32 116, i32 244, i32 118, i32 246, i32 113, i32 241, i32 115, i32 243, i32 117, i32 245, i32 119, i32 247, i32 104, i32 232, i32 106, i32 234, i32 108, i32 236, i32 110, i32 238, i32 105, i32 233, i32 107, i32 235, i32 109, i32 237, i32 111, i32 239, i32 120, i32 248, i32 122, i32 250, i32 124, i32 252, i32 126, i32 254, i32 121, i32 249, i32 123, i32 251, i32 125, i32 253, i32 127, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_6a: +; CHECK: [[REG6a:r[0-9]+]] = #106 +; CHECK: vshuff(v1,v0,[[REG6a]]) +define <256 x i8> @vshuff_6a(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 128, i32 129, i32 4, i32 5, i32 132, i32 133, i32 2, i32 3, i32 130, i32 131, i32 6, i32 7, i32 134, i32 135, i32 16, i32 17, i32 144, i32 145, i32 20, i32 21, i32 148, i32 149, i32 18, i32 19, i32 146, i32 147, i32 22, i32 23, i32 150, i32 151, i32 8, i32 9, i32 136, i32 137, i32 12, i32 13, i32 140, i32 141, i32 10, i32 11, i32 138, i32 139, i32 14, i32 15, i32 142, i32 143, i32 24, i32 25, i32 152, i32 153, i32 28, i32 29, i32 156, i32 157, i32 26, i32 27, i32 154, i32 155, i32 30, i32 31, i32 158, i32 159, i32 32, i32 33, i32 160, i32 161, i32 36, i32 37, i32 164, i32 165, i32 34, i32 35, i32 162, i32 163, i32 38, i32 39, i32 166, i32 167, i32 48, i32 49, i32 176, i32 177, i32 52, i32 53, i32 180, i32 181, i32 50, i32 51, i32 178, i32 179, i32 54, i32 55, i32 182, i32 183, i32 40, i32 41, i32 168, i32 169, i32 44, i32 45, i32 172, i32 173, i32 42, i32 43, i32 170, i32 171, i32 46, i32 47, i32 174, i32 175, i32 56, i32 57, i32 184, i32 185, i32 60, i32 61, i32 188, i32 189, i32 58, i32 59, i32 186, i32 187, i32 62, i32 63, i32 190, i32 191, i32 64, i32 65, i32 192, i32 193, i32 68, i32 69, i32 196, i32 197, i32 66, i32 67, i32 194, i32 195, i32 70, i32 71, i32 198, i32 199, i32 80, i32 81, i32 208, i32 209, i32 84, i32 85, i32 212, i32 213, i32 82, i32 83, i32 210, i32 211, i32 86, i32 87, i32 214, i32 215, i32 72, i32 73, i32 200, i32 201, i32 76, i32 77, i32 204, i32 205, i32 74, i32 75, i32 202, i32 203, i32 78, i32 79, i32 206, i32 207, i32 88, i32 89, i32 216, i32 217, i32 92, i32 93, i32 220, i32 221, i32 90, i32 91, i32 218, i32 219, i32 94, i32 95, i32 222, i32 223, i32 96, i32 97, i32 224, i32 225, i32 100, i32 101, i32 228, i32 229, i32 98, i32 99, i32 226, i32 227, i32 102, i32 103, i32 230, i32 231, i32 112, i32 113, i32 240, i32 241, i32 116, i32 117, i32 244, i32 245, i32 114, i32 115, i32 242, i32 243, i32 118, i32 119, i32 246, i32 247, i32 104, i32 105, i32 232, i32 233, i32 108, i32 109, i32 236, i32 237, i32 106, i32 107, i32 234, i32 235, i32 110, i32 111, i32 238, i32 239, i32 120, i32 121, i32 248, i32 249, i32 124, i32 125, i32 252, i32 253, i32 122, i32 123, i32 250, i32 251, i32 126, i32 127, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_6b: +; CHECK: [[REG6b:r[0-9]+]] = #107 +; CHECK: vshuff(v1,v0,[[REG6b]]) +define <256 x i8> @vshuff_6b(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 128, i32 1, i32 129, i32 4, i32 132, i32 5, i32 133, i32 2, i32 130, i32 3, i32 131, i32 6, i32 134, i32 7, i32 135, i32 16, i32 144, i32 17, i32 145, i32 20, i32 148, i32 21, i32 149, i32 18, i32 146, i32 19, i32 147, i32 22, i32 150, i32 23, i32 151, i32 8, i32 136, i32 9, i32 137, i32 12, i32 140, i32 13, i32 141, i32 10, i32 138, i32 11, i32 139, i32 14, i32 142, i32 15, i32 143, i32 24, i32 152, i32 25, i32 153, i32 28, i32 156, i32 29, i32 157, i32 26, i32 154, i32 27, i32 155, i32 30, i32 158, i32 31, i32 159, i32 32, i32 160, i32 33, i32 161, i32 36, i32 164, i32 37, i32 165, i32 34, i32 162, i32 35, i32 163, i32 38, i32 166, i32 39, i32 167, i32 48, i32 176, i32 49, i32 177, i32 52, i32 180, i32 53, i32 181, i32 50, i32 178, i32 51, i32 179, i32 54, i32 182, i32 55, i32 183, i32 40, i32 168, i32 41, i32 169, i32 44, i32 172, i32 45, i32 173, i32 42, i32 170, i32 43, i32 171, i32 46, i32 174, i32 47, i32 175, i32 56, i32 184, i32 57, i32 185, i32 60, i32 188, i32 61, i32 189, i32 58, i32 186, i32 59, i32 187, i32 62, i32 190, i32 63, i32 191, i32 64, i32 192, i32 65, i32 193, i32 68, i32 196, i32 69, i32 197, i32 66, i32 194, i32 67, i32 195, i32 70, i32 198, i32 71, i32 199, i32 80, i32 208, i32 81, i32 209, i32 84, i32 212, i32 85, i32 213, i32 82, i32 210, i32 83, i32 211, i32 86, i32 214, i32 87, i32 215, i32 72, i32 200, i32 73, i32 201, i32 76, i32 204, i32 77, i32 205, i32 74, i32 202, i32 75, i32 203, i32 78, i32 206, i32 79, i32 207, i32 88, i32 216, i32 89, i32 217, i32 92, i32 220, i32 93, i32 221, i32 90, i32 218, i32 91, i32 219, i32 94, i32 222, i32 95, i32 223, i32 96, i32 224, i32 97, i32 225, i32 100, i32 228, i32 101, i32 229, i32 98, i32 226, i32 99, i32 227, i32 102, i32 230, i32 103, i32 231, i32 112, i32 240, i32 113, i32 241, i32 116, i32 244, i32 117, i32 245, i32 114, i32 242, i32 115, i32 243, i32 118, i32 246, i32 119, i32 247, i32 104, i32 232, i32 105, i32 233, i32 108, i32 236, i32 109, i32 237, i32 106, i32 234, i32 107, i32 235, i32 110, i32 238, i32 111, i32 239, i32 120, i32 248, i32 121, i32 249, i32 124, i32 252, i32 125, i32 253, i32 122, i32 250, i32 123, i32 251, i32 126, i32 254, i32 127, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_6c: +; CHECK: [[REG6c:r[0-9]+]] = #108 +; CHECK: vshuff(v1,v0,[[REG6c]]) +define <256 x i8> @vshuff_6c(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 2, i32 3, i32 128, i32 129, i32 130, i32 131, i32 4, i32 5, i32 6, i32 7, i32 132, i32 133, i32 134, i32 135, i32 16, i32 17, i32 18, i32 19, i32 144, i32 145, i32 146, i32 147, i32 20, i32 21, i32 22, i32 23, i32 148, i32 149, i32 150, i32 151, i32 8, i32 9, i32 10, i32 11, i32 136, i32 137, i32 138, i32 139, i32 12, i32 13, i32 14, i32 15, i32 140, i32 141, i32 142, i32 143, i32 24, i32 25, i32 26, i32 27, i32 152, i32 153, i32 154, i32 155, i32 28, i32 29, i32 30, i32 31, i32 156, i32 157, i32 158, i32 159, i32 32, i32 33, i32 34, i32 35, i32 160, i32 161, i32 162, i32 163, i32 36, i32 37, i32 38, i32 39, i32 164, i32 165, i32 166, i32 167, i32 48, i32 49, i32 50, i32 51, i32 176, i32 177, i32 178, i32 179, i32 52, i32 53, i32 54, i32 55, i32 180, i32 181, i32 182, i32 183, i32 40, i32 41, i32 42, i32 43, i32 168, i32 169, i32 170, i32 171, i32 44, i32 45, i32 46, i32 47, i32 172, i32 173, i32 174, i32 175, i32 56, i32 57, i32 58, i32 59, i32 184, i32 185, i32 186, i32 187, i32 60, i32 61, i32 62, i32 63, i32 188, i32 189, i32 190, i32 191, i32 64, i32 65, i32 66, i32 67, i32 192, i32 193, i32 194, i32 195, i32 68, i32 69, i32 70, i32 71, i32 196, i32 197, i32 198, i32 199, i32 80, i32 81, i32 82, i32 83, i32 208, i32 209, i32 210, i32 211, i32 84, i32 85, i32 86, i32 87, i32 212, i32 213, i32 214, i32 215, i32 72, i32 73, i32 74, i32 75, i32 200, i32 201, i32 202, i32 203, i32 76, i32 77, i32 78, i32 79, i32 204, i32 205, i32 206, i32 207, i32 88, i32 89, i32 90, i32 91, i32 216, i32 217, i32 218, i32 219, i32 92, i32 93, i32 94, i32 95, i32 220, i32 221, i32 222, i32 223, i32 96, i32 97, i32 98, i32 99, i32 224, i32 225, i32 226, i32 227, i32 100, i32 101, i32 102, i32 103, i32 228, i32 229, i32 230, i32 231, i32 112, i32 113, i32 114, i32 115, i32 240, i32 241, i32 242, i32 243, i32 116, i32 117, i32 118, i32 119, i32 244, i32 245, i32 246, i32 247, i32 104, i32 105, i32 106, i32 107, i32 232, i32 233, i32 234, i32 235, i32 108, i32 109, i32 110, i32 111, i32 236, i32 237, i32 238, i32 239, i32 120, i32 121, i32 122, i32 123, i32 248, i32 249, i32 250, i32 251, i32 124, i32 125, i32 126, i32 127, i32 252, i32 253, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_6d: +; CHECK: [[REG6d:r[0-9]+]] = #109 +; CHECK: vshuff(v1,v0,[[REG6d]]) +define <256 x i8> @vshuff_6d(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 128, i32 2, i32 130, i32 1, i32 129, i32 3, i32 131, i32 4, i32 132, i32 6, i32 134, i32 5, i32 133, i32 7, i32 135, i32 16, i32 144, i32 18, i32 146, i32 17, i32 145, i32 19, i32 147, i32 20, i32 148, i32 22, i32 150, i32 21, i32 149, i32 23, i32 151, i32 8, i32 136, i32 10, i32 138, i32 9, i32 137, i32 11, i32 139, i32 12, i32 140, i32 14, i32 142, i32 13, i32 141, i32 15, i32 143, i32 24, i32 152, i32 26, i32 154, i32 25, i32 153, i32 27, i32 155, i32 28, i32 156, i32 30, i32 158, i32 29, i32 157, i32 31, i32 159, i32 32, i32 160, i32 34, i32 162, i32 33, i32 161, i32 35, i32 163, i32 36, i32 164, i32 38, i32 166, i32 37, i32 165, i32 39, i32 167, i32 48, i32 176, i32 50, i32 178, i32 49, i32 177, i32 51, i32 179, i32 52, i32 180, i32 54, i32 182, i32 53, i32 181, i32 55, i32 183, i32 40, i32 168, i32 42, i32 170, i32 41, i32 169, i32 43, i32 171, i32 44, i32 172, i32 46, i32 174, i32 45, i32 173, i32 47, i32 175, i32 56, i32 184, i32 58, i32 186, i32 57, i32 185, i32 59, i32 187, i32 60, i32 188, i32 62, i32 190, i32 61, i32 189, i32 63, i32 191, i32 64, i32 192, i32 66, i32 194, i32 65, i32 193, i32 67, i32 195, i32 68, i32 196, i32 70, i32 198, i32 69, i32 197, i32 71, i32 199, i32 80, i32 208, i32 82, i32 210, i32 81, i32 209, i32 83, i32 211, i32 84, i32 212, i32 86, i32 214, i32 85, i32 213, i32 87, i32 215, i32 72, i32 200, i32 74, i32 202, i32 73, i32 201, i32 75, i32 203, i32 76, i32 204, i32 78, i32 206, i32 77, i32 205, i32 79, i32 207, i32 88, i32 216, i32 90, i32 218, i32 89, i32 217, i32 91, i32 219, i32 92, i32 220, i32 94, i32 222, i32 93, i32 221, i32 95, i32 223, i32 96, i32 224, i32 98, i32 226, i32 97, i32 225, i32 99, i32 227, i32 100, i32 228, i32 102, i32 230, i32 101, i32 229, i32 103, i32 231, i32 112, i32 240, i32 114, i32 242, i32 113, i32 241, i32 115, i32 243, i32 116, i32 244, i32 118, i32 246, i32 117, i32 245, i32 119, i32 247, i32 104, i32 232, i32 106, i32 234, i32 105, i32 233, i32 107, i32 235, i32 108, i32 236, i32 110, i32 238, i32 109, i32 237, i32 111, i32 239, i32 120, i32 248, i32 122, i32 250, i32 121, i32 249, i32 123, i32 251, i32 124, i32 252, i32 126, i32 254, i32 125, i32 253, i32 127, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_6e: +; CHECK: [[REG6e:r[0-9]+]] = #110 +; CHECK: vshuff(v1,v0,[[REG6e]]) +define <256 x i8> @vshuff_6e(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 128, i32 129, i32 2, i32 3, i32 130, i32 131, i32 4, i32 5, i32 132, i32 133, i32 6, i32 7, i32 134, i32 135, i32 16, i32 17, i32 144, i32 145, i32 18, i32 19, i32 146, i32 147, i32 20, i32 21, i32 148, i32 149, i32 22, i32 23, i32 150, i32 151, i32 8, i32 9, i32 136, i32 137, i32 10, i32 11, i32 138, i32 139, i32 12, i32 13, i32 140, i32 141, i32 14, i32 15, i32 142, i32 143, i32 24, i32 25, i32 152, i32 153, i32 26, i32 27, i32 154, i32 155, i32 28, i32 29, i32 156, i32 157, i32 30, i32 31, i32 158, i32 159, i32 32, i32 33, i32 160, i32 161, i32 34, i32 35, i32 162, i32 163, i32 36, i32 37, i32 164, i32 165, i32 38, i32 39, i32 166, i32 167, i32 48, i32 49, i32 176, i32 177, i32 50, i32 51, i32 178, i32 179, i32 52, i32 53, i32 180, i32 181, i32 54, i32 55, i32 182, i32 183, i32 40, i32 41, i32 168, i32 169, i32 42, i32 43, i32 170, i32 171, i32 44, i32 45, i32 172, i32 173, i32 46, i32 47, i32 174, i32 175, i32 56, i32 57, i32 184, i32 185, i32 58, i32 59, i32 186, i32 187, i32 60, i32 61, i32 188, i32 189, i32 62, i32 63, i32 190, i32 191, i32 64, i32 65, i32 192, i32 193, i32 66, i32 67, i32 194, i32 195, i32 68, i32 69, i32 196, i32 197, i32 70, i32 71, i32 198, i32 199, i32 80, i32 81, i32 208, i32 209, i32 82, i32 83, i32 210, i32 211, i32 84, i32 85, i32 212, i32 213, i32 86, i32 87, i32 214, i32 215, i32 72, i32 73, i32 200, i32 201, i32 74, i32 75, i32 202, i32 203, i32 76, i32 77, i32 204, i32 205, i32 78, i32 79, i32 206, i32 207, i32 88, i32 89, i32 216, i32 217, i32 90, i32 91, i32 218, i32 219, i32 92, i32 93, i32 220, i32 221, i32 94, i32 95, i32 222, i32 223, i32 96, i32 97, i32 224, i32 225, i32 98, i32 99, i32 226, i32 227, i32 100, i32 101, i32 228, i32 229, i32 102, i32 103, i32 230, i32 231, i32 112, i32 113, i32 240, i32 241, i32 114, i32 115, i32 242, i32 243, i32 116, i32 117, i32 244, i32 245, i32 118, i32 119, i32 246, i32 247, i32 104, i32 105, i32 232, i32 233, i32 106, i32 107, i32 234, i32 235, i32 108, i32 109, i32 236, i32 237, i32 110, i32 111, i32 238, i32 239, i32 120, i32 121, i32 248, i32 249, i32 122, i32 123, i32 250, i32 251, i32 124, i32 125, i32 252, i32 253, i32 126, i32 127, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_6f: +; CHECK: [[REG6f:r[0-9]+]] = #111 +; CHECK: vshuff(v1,v0,[[REG6f]]) +define <256 x i8> @vshuff_6f(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 128, i32 1, i32 129, i32 2, i32 130, i32 3, i32 131, i32 4, i32 132, i32 5, i32 133, i32 6, i32 134, i32 7, i32 135, i32 16, i32 144, i32 17, i32 145, i32 18, i32 146, i32 19, i32 147, i32 20, i32 148, i32 21, i32 149, i32 22, i32 150, i32 23, i32 151, i32 8, i32 136, i32 9, i32 137, i32 10, i32 138, i32 11, i32 139, i32 12, i32 140, i32 13, i32 141, i32 14, i32 142, i32 15, i32 143, i32 24, i32 152, i32 25, i32 153, i32 26, i32 154, i32 27, i32 155, i32 28, i32 156, i32 29, i32 157, i32 30, i32 158, i32 31, i32 159, i32 32, i32 160, i32 33, i32 161, i32 34, i32 162, i32 35, i32 163, i32 36, i32 164, i32 37, i32 165, i32 38, i32 166, i32 39, i32 167, i32 48, i32 176, i32 49, i32 177, i32 50, i32 178, i32 51, i32 179, i32 52, i32 180, i32 53, i32 181, i32 54, i32 182, i32 55, i32 183, i32 40, i32 168, i32 41, i32 169, i32 42, i32 170, i32 43, i32 171, i32 44, i32 172, i32 45, i32 173, i32 46, i32 174, i32 47, i32 175, i32 56, i32 184, i32 57, i32 185, i32 58, i32 186, i32 59, i32 187, i32 60, i32 188, i32 61, i32 189, i32 62, i32 190, i32 63, i32 191, i32 64, i32 192, i32 65, i32 193, i32 66, i32 194, i32 67, i32 195, i32 68, i32 196, i32 69, i32 197, i32 70, i32 198, i32 71, i32 199, i32 80, i32 208, i32 81, i32 209, i32 82, i32 210, i32 83, i32 211, i32 84, i32 212, i32 85, i32 213, i32 86, i32 214, i32 87, i32 215, i32 72, i32 200, i32 73, i32 201, i32 74, i32 202, i32 75, i32 203, i32 76, i32 204, i32 77, i32 205, i32 78, i32 206, i32 79, i32 207, i32 88, i32 216, i32 89, i32 217, i32 90, i32 218, i32 91, i32 219, i32 92, i32 220, i32 93, i32 221, i32 94, i32 222, i32 95, i32 223, i32 96, i32 224, i32 97, i32 225, i32 98, i32 226, i32 99, i32 227, i32 100, i32 228, i32 101, i32 229, i32 102, i32 230, i32 103, i32 231, i32 112, i32 240, i32 113, i32 241, i32 114, i32 242, i32 115, i32 243, i32 116, i32 244, i32 117, i32 245, i32 118, i32 246, i32 119, i32 247, i32 104, i32 232, i32 105, i32 233, i32 106, i32 234, i32 107, i32 235, i32 108, i32 236, i32 109, i32 237, i32 110, i32 238, i32 111, i32 239, i32 120, i32 248, i32 121, i32 249, i32 122, i32 250, i32 123, i32 251, i32 124, i32 252, i32 125, i32 253, i32 126, i32 254, i32 127, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_70: +; CHECK: [[REG70:r[0-9]+]] = #112 +; CHECK: vshuff(v1,v0,[[REG70]]) +define <256 x i8> @vshuff_70(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 128, i32 129, i32 130, i32 131, i32 132, i32 133, i32 134, i32 135, i32 136, i32 137, i32 138, i32 139, i32 140, i32 141, i32 142, i32 143, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 144, i32 145, i32 146, i32 147, i32 148, i32 149, i32 150, i32 151, i32 152, i32 153, i32 154, i32 155, i32 156, i32 157, i32 158, i32 159, i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 160, i32 161, i32 162, i32 163, i32 164, i32 165, i32 166, i32 167, i32 168, i32 169, i32 170, i32 171, i32 172, i32 173, i32 174, i32 175, i32 48, i32 49, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63, i32 176, i32 177, i32 178, i32 179, i32 180, i32 181, i32 182, i32 183, i32 184, i32 185, i32 186, i32 187, i32 188, i32 189, i32 190, i32 191, i32 64, i32 65, i32 66, i32 67, i32 68, i32 69, i32 70, i32 71, i32 72, i32 73, i32 74, i32 75, i32 76, i32 77, i32 78, i32 79, i32 192, i32 193, i32 194, i32 195, i32 196, i32 197, i32 198, i32 199, i32 200, i32 201, i32 202, i32 203, i32 204, i32 205, i32 206, i32 207, i32 80, i32 81, i32 82, i32 83, i32 84, i32 85, i32 86, i32 87, i32 88, i32 89, i32 90, i32 91, i32 92, i32 93, i32 94, i32 95, i32 208, i32 209, i32 210, i32 211, i32 212, i32 213, i32 214, i32 215, i32 216, i32 217, i32 218, i32 219, i32 220, i32 221, i32 222, i32 223, i32 96, i32 97, i32 98, i32 99, i32 100, i32 101, i32 102, i32 103, i32 104, i32 105, i32 106, i32 107, i32 108, i32 109, i32 110, i32 111, i32 224, i32 225, i32 226, i32 227, i32 228, i32 229, i32 230, i32 231, i32 232, i32 233, i32 234, i32 235, i32 236, i32 237, i32 238, i32 239, i32 112, i32 113, i32 114, i32 115, i32 116, i32 117, i32 118, i32 119, i32 120, i32 121, i32 122, i32 123, i32 124, i32 125, i32 126, i32 127, i32 240, i32 241, i32 242, i32 243, i32 244, i32 245, i32 246, i32 247, i32 248, i32 249, i32 250, i32 251, i32 252, i32 253, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_71: +; CHECK: [[REG71:r[0-9]+]] = #113 +; CHECK: vshuff(v1,v0,[[REG71]]) +define <256 x i8> @vshuff_71(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 128, i32 2, i32 130, i32 4, i32 132, i32 6, i32 134, i32 8, i32 136, i32 10, i32 138, i32 12, i32 140, i32 14, i32 142, i32 1, i32 129, i32 3, i32 131, i32 5, i32 133, i32 7, i32 135, i32 9, i32 137, i32 11, i32 139, i32 13, i32 141, i32 15, i32 143, i32 16, i32 144, i32 18, i32 146, i32 20, i32 148, i32 22, i32 150, i32 24, i32 152, i32 26, i32 154, i32 28, i32 156, i32 30, i32 158, i32 17, i32 145, i32 19, i32 147, i32 21, i32 149, i32 23, i32 151, i32 25, i32 153, i32 27, i32 155, i32 29, i32 157, i32 31, i32 159, i32 32, i32 160, i32 34, i32 162, i32 36, i32 164, i32 38, i32 166, i32 40, i32 168, i32 42, i32 170, i32 44, i32 172, i32 46, i32 174, i32 33, i32 161, i32 35, i32 163, i32 37, i32 165, i32 39, i32 167, i32 41, i32 169, i32 43, i32 171, i32 45, i32 173, i32 47, i32 175, i32 48, i32 176, i32 50, i32 178, i32 52, i32 180, i32 54, i32 182, i32 56, i32 184, i32 58, i32 186, i32 60, i32 188, i32 62, i32 190, i32 49, i32 177, i32 51, i32 179, i32 53, i32 181, i32 55, i32 183, i32 57, i32 185, i32 59, i32 187, i32 61, i32 189, i32 63, i32 191, i32 64, i32 192, i32 66, i32 194, i32 68, i32 196, i32 70, i32 198, i32 72, i32 200, i32 74, i32 202, i32 76, i32 204, i32 78, i32 206, i32 65, i32 193, i32 67, i32 195, i32 69, i32 197, i32 71, i32 199, i32 73, i32 201, i32 75, i32 203, i32 77, i32 205, i32 79, i32 207, i32 80, i32 208, i32 82, i32 210, i32 84, i32 212, i32 86, i32 214, i32 88, i32 216, i32 90, i32 218, i32 92, i32 220, i32 94, i32 222, i32 81, i32 209, i32 83, i32 211, i32 85, i32 213, i32 87, i32 215, i32 89, i32 217, i32 91, i32 219, i32 93, i32 221, i32 95, i32 223, i32 96, i32 224, i32 98, i32 226, i32 100, i32 228, i32 102, i32 230, i32 104, i32 232, i32 106, i32 234, i32 108, i32 236, i32 110, i32 238, i32 97, i32 225, i32 99, i32 227, i32 101, i32 229, i32 103, i32 231, i32 105, i32 233, i32 107, i32 235, i32 109, i32 237, i32 111, i32 239, i32 112, i32 240, i32 114, i32 242, i32 116, i32 244, i32 118, i32 246, i32 120, i32 248, i32 122, i32 250, i32 124, i32 252, i32 126, i32 254, i32 113, i32 241, i32 115, i32 243, i32 117, i32 245, i32 119, i32 247, i32 121, i32 249, i32 123, i32 251, i32 125, i32 253, i32 127, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_72: +; CHECK: [[REG72:r[0-9]+]] = #114 +; CHECK: vshuff(v1,v0,[[REG72]]) +define <256 x i8> @vshuff_72(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 128, i32 129, i32 4, i32 5, i32 132, i32 133, i32 8, i32 9, i32 136, i32 137, i32 12, i32 13, i32 140, i32 141, i32 2, i32 3, i32 130, i32 131, i32 6, i32 7, i32 134, i32 135, i32 10, i32 11, i32 138, i32 139, i32 14, i32 15, i32 142, i32 143, i32 16, i32 17, i32 144, i32 145, i32 20, i32 21, i32 148, i32 149, i32 24, i32 25, i32 152, i32 153, i32 28, i32 29, i32 156, i32 157, i32 18, i32 19, i32 146, i32 147, i32 22, i32 23, i32 150, i32 151, i32 26, i32 27, i32 154, i32 155, i32 30, i32 31, i32 158, i32 159, i32 32, i32 33, i32 160, i32 161, i32 36, i32 37, i32 164, i32 165, i32 40, i32 41, i32 168, i32 169, i32 44, i32 45, i32 172, i32 173, i32 34, i32 35, i32 162, i32 163, i32 38, i32 39, i32 166, i32 167, i32 42, i32 43, i32 170, i32 171, i32 46, i32 47, i32 174, i32 175, i32 48, i32 49, i32 176, i32 177, i32 52, i32 53, i32 180, i32 181, i32 56, i32 57, i32 184, i32 185, i32 60, i32 61, i32 188, i32 189, i32 50, i32 51, i32 178, i32 179, i32 54, i32 55, i32 182, i32 183, i32 58, i32 59, i32 186, i32 187, i32 62, i32 63, i32 190, i32 191, i32 64, i32 65, i32 192, i32 193, i32 68, i32 69, i32 196, i32 197, i32 72, i32 73, i32 200, i32 201, i32 76, i32 77, i32 204, i32 205, i32 66, i32 67, i32 194, i32 195, i32 70, i32 71, i32 198, i32 199, i32 74, i32 75, i32 202, i32 203, i32 78, i32 79, i32 206, i32 207, i32 80, i32 81, i32 208, i32 209, i32 84, i32 85, i32 212, i32 213, i32 88, i32 89, i32 216, i32 217, i32 92, i32 93, i32 220, i32 221, i32 82, i32 83, i32 210, i32 211, i32 86, i32 87, i32 214, i32 215, i32 90, i32 91, i32 218, i32 219, i32 94, i32 95, i32 222, i32 223, i32 96, i32 97, i32 224, i32 225, i32 100, i32 101, i32 228, i32 229, i32 104, i32 105, i32 232, i32 233, i32 108, i32 109, i32 236, i32 237, i32 98, i32 99, i32 226, i32 227, i32 102, i32 103, i32 230, i32 231, i32 106, i32 107, i32 234, i32 235, i32 110, i32 111, i32 238, i32 239, i32 112, i32 113, i32 240, i32 241, i32 116, i32 117, i32 244, i32 245, i32 120, i32 121, i32 248, i32 249, i32 124, i32 125, i32 252, i32 253, i32 114, i32 115, i32 242, i32 243, i32 118, i32 119, i32 246, i32 247, i32 122, i32 123, i32 250, i32 251, i32 126, i32 127, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_73: +; CHECK: [[REG73:r[0-9]+]] = #115 +; CHECK: vshuff(v1,v0,[[REG73]]) +define <256 x i8> @vshuff_73(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 128, i32 1, i32 129, i32 4, i32 132, i32 5, i32 133, i32 8, i32 136, i32 9, i32 137, i32 12, i32 140, i32 13, i32 141, i32 2, i32 130, i32 3, i32 131, i32 6, i32 134, i32 7, i32 135, i32 10, i32 138, i32 11, i32 139, i32 14, i32 142, i32 15, i32 143, i32 16, i32 144, i32 17, i32 145, i32 20, i32 148, i32 21, i32 149, i32 24, i32 152, i32 25, i32 153, i32 28, i32 156, i32 29, i32 157, i32 18, i32 146, i32 19, i32 147, i32 22, i32 150, i32 23, i32 151, i32 26, i32 154, i32 27, i32 155, i32 30, i32 158, i32 31, i32 159, i32 32, i32 160, i32 33, i32 161, i32 36, i32 164, i32 37, i32 165, i32 40, i32 168, i32 41, i32 169, i32 44, i32 172, i32 45, i32 173, i32 34, i32 162, i32 35, i32 163, i32 38, i32 166, i32 39, i32 167, i32 42, i32 170, i32 43, i32 171, i32 46, i32 174, i32 47, i32 175, i32 48, i32 176, i32 49, i32 177, i32 52, i32 180, i32 53, i32 181, i32 56, i32 184, i32 57, i32 185, i32 60, i32 188, i32 61, i32 189, i32 50, i32 178, i32 51, i32 179, i32 54, i32 182, i32 55, i32 183, i32 58, i32 186, i32 59, i32 187, i32 62, i32 190, i32 63, i32 191, i32 64, i32 192, i32 65, i32 193, i32 68, i32 196, i32 69, i32 197, i32 72, i32 200, i32 73, i32 201, i32 76, i32 204, i32 77, i32 205, i32 66, i32 194, i32 67, i32 195, i32 70, i32 198, i32 71, i32 199, i32 74, i32 202, i32 75, i32 203, i32 78, i32 206, i32 79, i32 207, i32 80, i32 208, i32 81, i32 209, i32 84, i32 212, i32 85, i32 213, i32 88, i32 216, i32 89, i32 217, i32 92, i32 220, i32 93, i32 221, i32 82, i32 210, i32 83, i32 211, i32 86, i32 214, i32 87, i32 215, i32 90, i32 218, i32 91, i32 219, i32 94, i32 222, i32 95, i32 223, i32 96, i32 224, i32 97, i32 225, i32 100, i32 228, i32 101, i32 229, i32 104, i32 232, i32 105, i32 233, i32 108, i32 236, i32 109, i32 237, i32 98, i32 226, i32 99, i32 227, i32 102, i32 230, i32 103, i32 231, i32 106, i32 234, i32 107, i32 235, i32 110, i32 238, i32 111, i32 239, i32 112, i32 240, i32 113, i32 241, i32 116, i32 244, i32 117, i32 245, i32 120, i32 248, i32 121, i32 249, i32 124, i32 252, i32 125, i32 253, i32 114, i32 242, i32 115, i32 243, i32 118, i32 246, i32 119, i32 247, i32 122, i32 250, i32 123, i32 251, i32 126, i32 254, i32 127, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_74: +; CHECK: [[REG74:r[0-9]+]] = #116 +; CHECK: vshuff(v1,v0,[[REG74]]) +define <256 x i8> @vshuff_74(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 2, i32 3, i32 128, i32 129, i32 130, i32 131, i32 8, i32 9, i32 10, i32 11, i32 136, i32 137, i32 138, i32 139, i32 4, i32 5, i32 6, i32 7, i32 132, i32 133, i32 134, i32 135, i32 12, i32 13, i32 14, i32 15, i32 140, i32 141, i32 142, i32 143, i32 16, i32 17, i32 18, i32 19, i32 144, i32 145, i32 146, i32 147, i32 24, i32 25, i32 26, i32 27, i32 152, i32 153, i32 154, i32 155, i32 20, i32 21, i32 22, i32 23, i32 148, i32 149, i32 150, i32 151, i32 28, i32 29, i32 30, i32 31, i32 156, i32 157, i32 158, i32 159, i32 32, i32 33, i32 34, i32 35, i32 160, i32 161, i32 162, i32 163, i32 40, i32 41, i32 42, i32 43, i32 168, i32 169, i32 170, i32 171, i32 36, i32 37, i32 38, i32 39, i32 164, i32 165, i32 166, i32 167, i32 44, i32 45, i32 46, i32 47, i32 172, i32 173, i32 174, i32 175, i32 48, i32 49, i32 50, i32 51, i32 176, i32 177, i32 178, i32 179, i32 56, i32 57, i32 58, i32 59, i32 184, i32 185, i32 186, i32 187, i32 52, i32 53, i32 54, i32 55, i32 180, i32 181, i32 182, i32 183, i32 60, i32 61, i32 62, i32 63, i32 188, i32 189, i32 190, i32 191, i32 64, i32 65, i32 66, i32 67, i32 192, i32 193, i32 194, i32 195, i32 72, i32 73, i32 74, i32 75, i32 200, i32 201, i32 202, i32 203, i32 68, i32 69, i32 70, i32 71, i32 196, i32 197, i32 198, i32 199, i32 76, i32 77, i32 78, i32 79, i32 204, i32 205, i32 206, i32 207, i32 80, i32 81, i32 82, i32 83, i32 208, i32 209, i32 210, i32 211, i32 88, i32 89, i32 90, i32 91, i32 216, i32 217, i32 218, i32 219, i32 84, i32 85, i32 86, i32 87, i32 212, i32 213, i32 214, i32 215, i32 92, i32 93, i32 94, i32 95, i32 220, i32 221, i32 222, i32 223, i32 96, i32 97, i32 98, i32 99, i32 224, i32 225, i32 226, i32 227, i32 104, i32 105, i32 106, i32 107, i32 232, i32 233, i32 234, i32 235, i32 100, i32 101, i32 102, i32 103, i32 228, i32 229, i32 230, i32 231, i32 108, i32 109, i32 110, i32 111, i32 236, i32 237, i32 238, i32 239, i32 112, i32 113, i32 114, i32 115, i32 240, i32 241, i32 242, i32 243, i32 120, i32 121, i32 122, i32 123, i32 248, i32 249, i32 250, i32 251, i32 116, i32 117, i32 118, i32 119, i32 244, i32 245, i32 246, i32 247, i32 124, i32 125, i32 126, i32 127, i32 252, i32 253, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_75: +; CHECK: [[REG75:r[0-9]+]] = #117 +; CHECK: vshuff(v1,v0,[[REG75]]) +define <256 x i8> @vshuff_75(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 128, i32 2, i32 130, i32 1, i32 129, i32 3, i32 131, i32 8, i32 136, i32 10, i32 138, i32 9, i32 137, i32 11, i32 139, i32 4, i32 132, i32 6, i32 134, i32 5, i32 133, i32 7, i32 135, i32 12, i32 140, i32 14, i32 142, i32 13, i32 141, i32 15, i32 143, i32 16, i32 144, i32 18, i32 146, i32 17, i32 145, i32 19, i32 147, i32 24, i32 152, i32 26, i32 154, i32 25, i32 153, i32 27, i32 155, i32 20, i32 148, i32 22, i32 150, i32 21, i32 149, i32 23, i32 151, i32 28, i32 156, i32 30, i32 158, i32 29, i32 157, i32 31, i32 159, i32 32, i32 160, i32 34, i32 162, i32 33, i32 161, i32 35, i32 163, i32 40, i32 168, i32 42, i32 170, i32 41, i32 169, i32 43, i32 171, i32 36, i32 164, i32 38, i32 166, i32 37, i32 165, i32 39, i32 167, i32 44, i32 172, i32 46, i32 174, i32 45, i32 173, i32 47, i32 175, i32 48, i32 176, i32 50, i32 178, i32 49, i32 177, i32 51, i32 179, i32 56, i32 184, i32 58, i32 186, i32 57, i32 185, i32 59, i32 187, i32 52, i32 180, i32 54, i32 182, i32 53, i32 181, i32 55, i32 183, i32 60, i32 188, i32 62, i32 190, i32 61, i32 189, i32 63, i32 191, i32 64, i32 192, i32 66, i32 194, i32 65, i32 193, i32 67, i32 195, i32 72, i32 200, i32 74, i32 202, i32 73, i32 201, i32 75, i32 203, i32 68, i32 196, i32 70, i32 198, i32 69, i32 197, i32 71, i32 199, i32 76, i32 204, i32 78, i32 206, i32 77, i32 205, i32 79, i32 207, i32 80, i32 208, i32 82, i32 210, i32 81, i32 209, i32 83, i32 211, i32 88, i32 216, i32 90, i32 218, i32 89, i32 217, i32 91, i32 219, i32 84, i32 212, i32 86, i32 214, i32 85, i32 213, i32 87, i32 215, i32 92, i32 220, i32 94, i32 222, i32 93, i32 221, i32 95, i32 223, i32 96, i32 224, i32 98, i32 226, i32 97, i32 225, i32 99, i32 227, i32 104, i32 232, i32 106, i32 234, i32 105, i32 233, i32 107, i32 235, i32 100, i32 228, i32 102, i32 230, i32 101, i32 229, i32 103, i32 231, i32 108, i32 236, i32 110, i32 238, i32 109, i32 237, i32 111, i32 239, i32 112, i32 240, i32 114, i32 242, i32 113, i32 241, i32 115, i32 243, i32 120, i32 248, i32 122, i32 250, i32 121, i32 249, i32 123, i32 251, i32 116, i32 244, i32 118, i32 246, i32 117, i32 245, i32 119, i32 247, i32 124, i32 252, i32 126, i32 254, i32 125, i32 253, i32 127, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_76: +; CHECK: [[REG76:r[0-9]+]] = #118 +; CHECK: vshuff(v1,v0,[[REG76]]) +define <256 x i8> @vshuff_76(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 128, i32 129, i32 2, i32 3, i32 130, i32 131, i32 8, i32 9, i32 136, i32 137, i32 10, i32 11, i32 138, i32 139, i32 4, i32 5, i32 132, i32 133, i32 6, i32 7, i32 134, i32 135, i32 12, i32 13, i32 140, i32 141, i32 14, i32 15, i32 142, i32 143, i32 16, i32 17, i32 144, i32 145, i32 18, i32 19, i32 146, i32 147, i32 24, i32 25, i32 152, i32 153, i32 26, i32 27, i32 154, i32 155, i32 20, i32 21, i32 148, i32 149, i32 22, i32 23, i32 150, i32 151, i32 28, i32 29, i32 156, i32 157, i32 30, i32 31, i32 158, i32 159, i32 32, i32 33, i32 160, i32 161, i32 34, i32 35, i32 162, i32 163, i32 40, i32 41, i32 168, i32 169, i32 42, i32 43, i32 170, i32 171, i32 36, i32 37, i32 164, i32 165, i32 38, i32 39, i32 166, i32 167, i32 44, i32 45, i32 172, i32 173, i32 46, i32 47, i32 174, i32 175, i32 48, i32 49, i32 176, i32 177, i32 50, i32 51, i32 178, i32 179, i32 56, i32 57, i32 184, i32 185, i32 58, i32 59, i32 186, i32 187, i32 52, i32 53, i32 180, i32 181, i32 54, i32 55, i32 182, i32 183, i32 60, i32 61, i32 188, i32 189, i32 62, i32 63, i32 190, i32 191, i32 64, i32 65, i32 192, i32 193, i32 66, i32 67, i32 194, i32 195, i32 72, i32 73, i32 200, i32 201, i32 74, i32 75, i32 202, i32 203, i32 68, i32 69, i32 196, i32 197, i32 70, i32 71, i32 198, i32 199, i32 76, i32 77, i32 204, i32 205, i32 78, i32 79, i32 206, i32 207, i32 80, i32 81, i32 208, i32 209, i32 82, i32 83, i32 210, i32 211, i32 88, i32 89, i32 216, i32 217, i32 90, i32 91, i32 218, i32 219, i32 84, i32 85, i32 212, i32 213, i32 86, i32 87, i32 214, i32 215, i32 92, i32 93, i32 220, i32 221, i32 94, i32 95, i32 222, i32 223, i32 96, i32 97, i32 224, i32 225, i32 98, i32 99, i32 226, i32 227, i32 104, i32 105, i32 232, i32 233, i32 106, i32 107, i32 234, i32 235, i32 100, i32 101, i32 228, i32 229, i32 102, i32 103, i32 230, i32 231, i32 108, i32 109, i32 236, i32 237, i32 110, i32 111, i32 238, i32 239, i32 112, i32 113, i32 240, i32 241, i32 114, i32 115, i32 242, i32 243, i32 120, i32 121, i32 248, i32 249, i32 122, i32 123, i32 250, i32 251, i32 116, i32 117, i32 244, i32 245, i32 118, i32 119, i32 246, i32 247, i32 124, i32 125, i32 252, i32 253, i32 126, i32 127, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_77: +; CHECK: [[REG77:r[0-9]+]] = #119 +; CHECK: vshuff(v1,v0,[[REG77]]) +define <256 x i8> @vshuff_77(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 128, i32 1, i32 129, i32 2, i32 130, i32 3, i32 131, i32 8, i32 136, i32 9, i32 137, i32 10, i32 138, i32 11, i32 139, i32 4, i32 132, i32 5, i32 133, i32 6, i32 134, i32 7, i32 135, i32 12, i32 140, i32 13, i32 141, i32 14, i32 142, i32 15, i32 143, i32 16, i32 144, i32 17, i32 145, i32 18, i32 146, i32 19, i32 147, i32 24, i32 152, i32 25, i32 153, i32 26, i32 154, i32 27, i32 155, i32 20, i32 148, i32 21, i32 149, i32 22, i32 150, i32 23, i32 151, i32 28, i32 156, i32 29, i32 157, i32 30, i32 158, i32 31, i32 159, i32 32, i32 160, i32 33, i32 161, i32 34, i32 162, i32 35, i32 163, i32 40, i32 168, i32 41, i32 169, i32 42, i32 170, i32 43, i32 171, i32 36, i32 164, i32 37, i32 165, i32 38, i32 166, i32 39, i32 167, i32 44, i32 172, i32 45, i32 173, i32 46, i32 174, i32 47, i32 175, i32 48, i32 176, i32 49, i32 177, i32 50, i32 178, i32 51, i32 179, i32 56, i32 184, i32 57, i32 185, i32 58, i32 186, i32 59, i32 187, i32 52, i32 180, i32 53, i32 181, i32 54, i32 182, i32 55, i32 183, i32 60, i32 188, i32 61, i32 189, i32 62, i32 190, i32 63, i32 191, i32 64, i32 192, i32 65, i32 193, i32 66, i32 194, i32 67, i32 195, i32 72, i32 200, i32 73, i32 201, i32 74, i32 202, i32 75, i32 203, i32 68, i32 196, i32 69, i32 197, i32 70, i32 198, i32 71, i32 199, i32 76, i32 204, i32 77, i32 205, i32 78, i32 206, i32 79, i32 207, i32 80, i32 208, i32 81, i32 209, i32 82, i32 210, i32 83, i32 211, i32 88, i32 216, i32 89, i32 217, i32 90, i32 218, i32 91, i32 219, i32 84, i32 212, i32 85, i32 213, i32 86, i32 214, i32 87, i32 215, i32 92, i32 220, i32 93, i32 221, i32 94, i32 222, i32 95, i32 223, i32 96, i32 224, i32 97, i32 225, i32 98, i32 226, i32 99, i32 227, i32 104, i32 232, i32 105, i32 233, i32 106, i32 234, i32 107, i32 235, i32 100, i32 228, i32 101, i32 229, i32 102, i32 230, i32 103, i32 231, i32 108, i32 236, i32 109, i32 237, i32 110, i32 238, i32 111, i32 239, i32 112, i32 240, i32 113, i32 241, i32 114, i32 242, i32 115, i32 243, i32 120, i32 248, i32 121, i32 249, i32 122, i32 250, i32 123, i32 251, i32 116, i32 244, i32 117, i32 245, i32 118, i32 246, i32 119, i32 247, i32 124, i32 252, i32 125, i32 253, i32 126, i32 254, i32 127, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_78: +; CHECK: [[REG78:r[0-9]+]] = #120 +; CHECK: vshuff(v1,v0,[[REG78]]) +define <256 x i8> @vshuff_78(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 128, i32 129, i32 130, i32 131, i32 132, i32 133, i32 134, i32 135, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 136, i32 137, i32 138, i32 139, i32 140, i32 141, i32 142, i32 143, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 144, i32 145, i32 146, i32 147, i32 148, i32 149, i32 150, i32 151, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 152, i32 153, i32 154, i32 155, i32 156, i32 157, i32 158, i32 159, i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 160, i32 161, i32 162, i32 163, i32 164, i32 165, i32 166, i32 167, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 168, i32 169, i32 170, i32 171, i32 172, i32 173, i32 174, i32 175, i32 48, i32 49, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 176, i32 177, i32 178, i32 179, i32 180, i32 181, i32 182, i32 183, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63, i32 184, i32 185, i32 186, i32 187, i32 188, i32 189, i32 190, i32 191, i32 64, i32 65, i32 66, i32 67, i32 68, i32 69, i32 70, i32 71, i32 192, i32 193, i32 194, i32 195, i32 196, i32 197, i32 198, i32 199, i32 72, i32 73, i32 74, i32 75, i32 76, i32 77, i32 78, i32 79, i32 200, i32 201, i32 202, i32 203, i32 204, i32 205, i32 206, i32 207, i32 80, i32 81, i32 82, i32 83, i32 84, i32 85, i32 86, i32 87, i32 208, i32 209, i32 210, i32 211, i32 212, i32 213, i32 214, i32 215, i32 88, i32 89, i32 90, i32 91, i32 92, i32 93, i32 94, i32 95, i32 216, i32 217, i32 218, i32 219, i32 220, i32 221, i32 222, i32 223, i32 96, i32 97, i32 98, i32 99, i32 100, i32 101, i32 102, i32 103, i32 224, i32 225, i32 226, i32 227, i32 228, i32 229, i32 230, i32 231, i32 104, i32 105, i32 106, i32 107, i32 108, i32 109, i32 110, i32 111, i32 232, i32 233, i32 234, i32 235, i32 236, i32 237, i32 238, i32 239, i32 112, i32 113, i32 114, i32 115, i32 116, i32 117, i32 118, i32 119, i32 240, i32 241, i32 242, i32 243, i32 244, i32 245, i32 246, i32 247, i32 120, i32 121, i32 122, i32 123, i32 124, i32 125, i32 126, i32 127, i32 248, i32 249, i32 250, i32 251, i32 252, i32 253, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_79: +; CHECK: [[REG79:r[0-9]+]] = #121 +; CHECK: vshuff(v1,v0,[[REG79]]) +define <256 x i8> @vshuff_79(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 128, i32 2, i32 130, i32 4, i32 132, i32 6, i32 134, i32 1, i32 129, i32 3, i32 131, i32 5, i32 133, i32 7, i32 135, i32 8, i32 136, i32 10, i32 138, i32 12, i32 140, i32 14, i32 142, i32 9, i32 137, i32 11, i32 139, i32 13, i32 141, i32 15, i32 143, i32 16, i32 144, i32 18, i32 146, i32 20, i32 148, i32 22, i32 150, i32 17, i32 145, i32 19, i32 147, i32 21, i32 149, i32 23, i32 151, i32 24, i32 152, i32 26, i32 154, i32 28, i32 156, i32 30, i32 158, i32 25, i32 153, i32 27, i32 155, i32 29, i32 157, i32 31, i32 159, i32 32, i32 160, i32 34, i32 162, i32 36, i32 164, i32 38, i32 166, i32 33, i32 161, i32 35, i32 163, i32 37, i32 165, i32 39, i32 167, i32 40, i32 168, i32 42, i32 170, i32 44, i32 172, i32 46, i32 174, i32 41, i32 169, i32 43, i32 171, i32 45, i32 173, i32 47, i32 175, i32 48, i32 176, i32 50, i32 178, i32 52, i32 180, i32 54, i32 182, i32 49, i32 177, i32 51, i32 179, i32 53, i32 181, i32 55, i32 183, i32 56, i32 184, i32 58, i32 186, i32 60, i32 188, i32 62, i32 190, i32 57, i32 185, i32 59, i32 187, i32 61, i32 189, i32 63, i32 191, i32 64, i32 192, i32 66, i32 194, i32 68, i32 196, i32 70, i32 198, i32 65, i32 193, i32 67, i32 195, i32 69, i32 197, i32 71, i32 199, i32 72, i32 200, i32 74, i32 202, i32 76, i32 204, i32 78, i32 206, i32 73, i32 201, i32 75, i32 203, i32 77, i32 205, i32 79, i32 207, i32 80, i32 208, i32 82, i32 210, i32 84, i32 212, i32 86, i32 214, i32 81, i32 209, i32 83, i32 211, i32 85, i32 213, i32 87, i32 215, i32 88, i32 216, i32 90, i32 218, i32 92, i32 220, i32 94, i32 222, i32 89, i32 217, i32 91, i32 219, i32 93, i32 221, i32 95, i32 223, i32 96, i32 224, i32 98, i32 226, i32 100, i32 228, i32 102, i32 230, i32 97, i32 225, i32 99, i32 227, i32 101, i32 229, i32 103, i32 231, i32 104, i32 232, i32 106, i32 234, i32 108, i32 236, i32 110, i32 238, i32 105, i32 233, i32 107, i32 235, i32 109, i32 237, i32 111, i32 239, i32 112, i32 240, i32 114, i32 242, i32 116, i32 244, i32 118, i32 246, i32 113, i32 241, i32 115, i32 243, i32 117, i32 245, i32 119, i32 247, i32 120, i32 248, i32 122, i32 250, i32 124, i32 252, i32 126, i32 254, i32 121, i32 249, i32 123, i32 251, i32 125, i32 253, i32 127, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_7a: +; CHECK: [[REG7a:r[0-9]+]] = #122 +; CHECK: vshuff(v1,v0,[[REG7a]]) +define <256 x i8> @vshuff_7a(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 128, i32 129, i32 4, i32 5, i32 132, i32 133, i32 2, i32 3, i32 130, i32 131, i32 6, i32 7, i32 134, i32 135, i32 8, i32 9, i32 136, i32 137, i32 12, i32 13, i32 140, i32 141, i32 10, i32 11, i32 138, i32 139, i32 14, i32 15, i32 142, i32 143, i32 16, i32 17, i32 144, i32 145, i32 20, i32 21, i32 148, i32 149, i32 18, i32 19, i32 146, i32 147, i32 22, i32 23, i32 150, i32 151, i32 24, i32 25, i32 152, i32 153, i32 28, i32 29, i32 156, i32 157, i32 26, i32 27, i32 154, i32 155, i32 30, i32 31, i32 158, i32 159, i32 32, i32 33, i32 160, i32 161, i32 36, i32 37, i32 164, i32 165, i32 34, i32 35, i32 162, i32 163, i32 38, i32 39, i32 166, i32 167, i32 40, i32 41, i32 168, i32 169, i32 44, i32 45, i32 172, i32 173, i32 42, i32 43, i32 170, i32 171, i32 46, i32 47, i32 174, i32 175, i32 48, i32 49, i32 176, i32 177, i32 52, i32 53, i32 180, i32 181, i32 50, i32 51, i32 178, i32 179, i32 54, i32 55, i32 182, i32 183, i32 56, i32 57, i32 184, i32 185, i32 60, i32 61, i32 188, i32 189, i32 58, i32 59, i32 186, i32 187, i32 62, i32 63, i32 190, i32 191, i32 64, i32 65, i32 192, i32 193, i32 68, i32 69, i32 196, i32 197, i32 66, i32 67, i32 194, i32 195, i32 70, i32 71, i32 198, i32 199, i32 72, i32 73, i32 200, i32 201, i32 76, i32 77, i32 204, i32 205, i32 74, i32 75, i32 202, i32 203, i32 78, i32 79, i32 206, i32 207, i32 80, i32 81, i32 208, i32 209, i32 84, i32 85, i32 212, i32 213, i32 82, i32 83, i32 210, i32 211, i32 86, i32 87, i32 214, i32 215, i32 88, i32 89, i32 216, i32 217, i32 92, i32 93, i32 220, i32 221, i32 90, i32 91, i32 218, i32 219, i32 94, i32 95, i32 222, i32 223, i32 96, i32 97, i32 224, i32 225, i32 100, i32 101, i32 228, i32 229, i32 98, i32 99, i32 226, i32 227, i32 102, i32 103, i32 230, i32 231, i32 104, i32 105, i32 232, i32 233, i32 108, i32 109, i32 236, i32 237, i32 106, i32 107, i32 234, i32 235, i32 110, i32 111, i32 238, i32 239, i32 112, i32 113, i32 240, i32 241, i32 116, i32 117, i32 244, i32 245, i32 114, i32 115, i32 242, i32 243, i32 118, i32 119, i32 246, i32 247, i32 120, i32 121, i32 248, i32 249, i32 124, i32 125, i32 252, i32 253, i32 122, i32 123, i32 250, i32 251, i32 126, i32 127, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_7b: +; CHECK: [[REG7b:r[0-9]+]] = #123 +; CHECK: vshuff(v1,v0,[[REG7b]]) +define <256 x i8> @vshuff_7b(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 128, i32 1, i32 129, i32 4, i32 132, i32 5, i32 133, i32 2, i32 130, i32 3, i32 131, i32 6, i32 134, i32 7, i32 135, i32 8, i32 136, i32 9, i32 137, i32 12, i32 140, i32 13, i32 141, i32 10, i32 138, i32 11, i32 139, i32 14, i32 142, i32 15, i32 143, i32 16, i32 144, i32 17, i32 145, i32 20, i32 148, i32 21, i32 149, i32 18, i32 146, i32 19, i32 147, i32 22, i32 150, i32 23, i32 151, i32 24, i32 152, i32 25, i32 153, i32 28, i32 156, i32 29, i32 157, i32 26, i32 154, i32 27, i32 155, i32 30, i32 158, i32 31, i32 159, i32 32, i32 160, i32 33, i32 161, i32 36, i32 164, i32 37, i32 165, i32 34, i32 162, i32 35, i32 163, i32 38, i32 166, i32 39, i32 167, i32 40, i32 168, i32 41, i32 169, i32 44, i32 172, i32 45, i32 173, i32 42, i32 170, i32 43, i32 171, i32 46, i32 174, i32 47, i32 175, i32 48, i32 176, i32 49, i32 177, i32 52, i32 180, i32 53, i32 181, i32 50, i32 178, i32 51, i32 179, i32 54, i32 182, i32 55, i32 183, i32 56, i32 184, i32 57, i32 185, i32 60, i32 188, i32 61, i32 189, i32 58, i32 186, i32 59, i32 187, i32 62, i32 190, i32 63, i32 191, i32 64, i32 192, i32 65, i32 193, i32 68, i32 196, i32 69, i32 197, i32 66, i32 194, i32 67, i32 195, i32 70, i32 198, i32 71, i32 199, i32 72, i32 200, i32 73, i32 201, i32 76, i32 204, i32 77, i32 205, i32 74, i32 202, i32 75, i32 203, i32 78, i32 206, i32 79, i32 207, i32 80, i32 208, i32 81, i32 209, i32 84, i32 212, i32 85, i32 213, i32 82, i32 210, i32 83, i32 211, i32 86, i32 214, i32 87, i32 215, i32 88, i32 216, i32 89, i32 217, i32 92, i32 220, i32 93, i32 221, i32 90, i32 218, i32 91, i32 219, i32 94, i32 222, i32 95, i32 223, i32 96, i32 224, i32 97, i32 225, i32 100, i32 228, i32 101, i32 229, i32 98, i32 226, i32 99, i32 227, i32 102, i32 230, i32 103, i32 231, i32 104, i32 232, i32 105, i32 233, i32 108, i32 236, i32 109, i32 237, i32 106, i32 234, i32 107, i32 235, i32 110, i32 238, i32 111, i32 239, i32 112, i32 240, i32 113, i32 241, i32 116, i32 244, i32 117, i32 245, i32 114, i32 242, i32 115, i32 243, i32 118, i32 246, i32 119, i32 247, i32 120, i32 248, i32 121, i32 249, i32 124, i32 252, i32 125, i32 253, i32 122, i32 250, i32 123, i32 251, i32 126, i32 254, i32 127, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_7c: +; CHECK: [[REG7c:r[0-9]+]] = #124 +; CHECK: vshuff(v1,v0,[[REG7c]]) +define <256 x i8> @vshuff_7c(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 2, i32 3, i32 128, i32 129, i32 130, i32 131, i32 4, i32 5, i32 6, i32 7, i32 132, i32 133, i32 134, i32 135, i32 8, i32 9, i32 10, i32 11, i32 136, i32 137, i32 138, i32 139, i32 12, i32 13, i32 14, i32 15, i32 140, i32 141, i32 142, i32 143, i32 16, i32 17, i32 18, i32 19, i32 144, i32 145, i32 146, i32 147, i32 20, i32 21, i32 22, i32 23, i32 148, i32 149, i32 150, i32 151, i32 24, i32 25, i32 26, i32 27, i32 152, i32 153, i32 154, i32 155, i32 28, i32 29, i32 30, i32 31, i32 156, i32 157, i32 158, i32 159, i32 32, i32 33, i32 34, i32 35, i32 160, i32 161, i32 162, i32 163, i32 36, i32 37, i32 38, i32 39, i32 164, i32 165, i32 166, i32 167, i32 40, i32 41, i32 42, i32 43, i32 168, i32 169, i32 170, i32 171, i32 44, i32 45, i32 46, i32 47, i32 172, i32 173, i32 174, i32 175, i32 48, i32 49, i32 50, i32 51, i32 176, i32 177, i32 178, i32 179, i32 52, i32 53, i32 54, i32 55, i32 180, i32 181, i32 182, i32 183, i32 56, i32 57, i32 58, i32 59, i32 184, i32 185, i32 186, i32 187, i32 60, i32 61, i32 62, i32 63, i32 188, i32 189, i32 190, i32 191, i32 64, i32 65, i32 66, i32 67, i32 192, i32 193, i32 194, i32 195, i32 68, i32 69, i32 70, i32 71, i32 196, i32 197, i32 198, i32 199, i32 72, i32 73, i32 74, i32 75, i32 200, i32 201, i32 202, i32 203, i32 76, i32 77, i32 78, i32 79, i32 204, i32 205, i32 206, i32 207, i32 80, i32 81, i32 82, i32 83, i32 208, i32 209, i32 210, i32 211, i32 84, i32 85, i32 86, i32 87, i32 212, i32 213, i32 214, i32 215, i32 88, i32 89, i32 90, i32 91, i32 216, i32 217, i32 218, i32 219, i32 92, i32 93, i32 94, i32 95, i32 220, i32 221, i32 222, i32 223, i32 96, i32 97, i32 98, i32 99, i32 224, i32 225, i32 226, i32 227, i32 100, i32 101, i32 102, i32 103, i32 228, i32 229, i32 230, i32 231, i32 104, i32 105, i32 106, i32 107, i32 232, i32 233, i32 234, i32 235, i32 108, i32 109, i32 110, i32 111, i32 236, i32 237, i32 238, i32 239, i32 112, i32 113, i32 114, i32 115, i32 240, i32 241, i32 242, i32 243, i32 116, i32 117, i32 118, i32 119, i32 244, i32 245, i32 246, i32 247, i32 120, i32 121, i32 122, i32 123, i32 248, i32 249, i32 250, i32 251, i32 124, i32 125, i32 126, i32 127, i32 252, i32 253, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_7d: +; CHECK: [[REG7d:r[0-9]+]] = #125 +; CHECK: vshuff(v1,v0,[[REG7d]]) +define <256 x i8> @vshuff_7d(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 128, i32 2, i32 130, i32 1, i32 129, i32 3, i32 131, i32 4, i32 132, i32 6, i32 134, i32 5, i32 133, i32 7, i32 135, i32 8, i32 136, i32 10, i32 138, i32 9, i32 137, i32 11, i32 139, i32 12, i32 140, i32 14, i32 142, i32 13, i32 141, i32 15, i32 143, i32 16, i32 144, i32 18, i32 146, i32 17, i32 145, i32 19, i32 147, i32 20, i32 148, i32 22, i32 150, i32 21, i32 149, i32 23, i32 151, i32 24, i32 152, i32 26, i32 154, i32 25, i32 153, i32 27, i32 155, i32 28, i32 156, i32 30, i32 158, i32 29, i32 157, i32 31, i32 159, i32 32, i32 160, i32 34, i32 162, i32 33, i32 161, i32 35, i32 163, i32 36, i32 164, i32 38, i32 166, i32 37, i32 165, i32 39, i32 167, i32 40, i32 168, i32 42, i32 170, i32 41, i32 169, i32 43, i32 171, i32 44, i32 172, i32 46, i32 174, i32 45, i32 173, i32 47, i32 175, i32 48, i32 176, i32 50, i32 178, i32 49, i32 177, i32 51, i32 179, i32 52, i32 180, i32 54, i32 182, i32 53, i32 181, i32 55, i32 183, i32 56, i32 184, i32 58, i32 186, i32 57, i32 185, i32 59, i32 187, i32 60, i32 188, i32 62, i32 190, i32 61, i32 189, i32 63, i32 191, i32 64, i32 192, i32 66, i32 194, i32 65, i32 193, i32 67, i32 195, i32 68, i32 196, i32 70, i32 198, i32 69, i32 197, i32 71, i32 199, i32 72, i32 200, i32 74, i32 202, i32 73, i32 201, i32 75, i32 203, i32 76, i32 204, i32 78, i32 206, i32 77, i32 205, i32 79, i32 207, i32 80, i32 208, i32 82, i32 210, i32 81, i32 209, i32 83, i32 211, i32 84, i32 212, i32 86, i32 214, i32 85, i32 213, i32 87, i32 215, i32 88, i32 216, i32 90, i32 218, i32 89, i32 217, i32 91, i32 219, i32 92, i32 220, i32 94, i32 222, i32 93, i32 221, i32 95, i32 223, i32 96, i32 224, i32 98, i32 226, i32 97, i32 225, i32 99, i32 227, i32 100, i32 228, i32 102, i32 230, i32 101, i32 229, i32 103, i32 231, i32 104, i32 232, i32 106, i32 234, i32 105, i32 233, i32 107, i32 235, i32 108, i32 236, i32 110, i32 238, i32 109, i32 237, i32 111, i32 239, i32 112, i32 240, i32 114, i32 242, i32 113, i32 241, i32 115, i32 243, i32 116, i32 244, i32 118, i32 246, i32 117, i32 245, i32 119, i32 247, i32 120, i32 248, i32 122, i32 250, i32 121, i32 249, i32 123, i32 251, i32 124, i32 252, i32 126, i32 254, i32 125, i32 253, i32 127, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_7e: +; CHECK: [[REG7e:r[0-9]+]] = #126 +; CHECK: vshuff(v1,v0,[[REG7e]]) +define <256 x i8> @vshuff_7e(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 1, i32 128, i32 129, i32 2, i32 3, i32 130, i32 131, i32 4, i32 5, i32 132, i32 133, i32 6, i32 7, i32 134, i32 135, i32 8, i32 9, i32 136, i32 137, i32 10, i32 11, i32 138, i32 139, i32 12, i32 13, i32 140, i32 141, i32 14, i32 15, i32 142, i32 143, i32 16, i32 17, i32 144, i32 145, i32 18, i32 19, i32 146, i32 147, i32 20, i32 21, i32 148, i32 149, i32 22, i32 23, i32 150, i32 151, i32 24, i32 25, i32 152, i32 153, i32 26, i32 27, i32 154, i32 155, i32 28, i32 29, i32 156, i32 157, i32 30, i32 31, i32 158, i32 159, i32 32, i32 33, i32 160, i32 161, i32 34, i32 35, i32 162, i32 163, i32 36, i32 37, i32 164, i32 165, i32 38, i32 39, i32 166, i32 167, i32 40, i32 41, i32 168, i32 169, i32 42, i32 43, i32 170, i32 171, i32 44, i32 45, i32 172, i32 173, i32 46, i32 47, i32 174, i32 175, i32 48, i32 49, i32 176, i32 177, i32 50, i32 51, i32 178, i32 179, i32 52, i32 53, i32 180, i32 181, i32 54, i32 55, i32 182, i32 183, i32 56, i32 57, i32 184, i32 185, i32 58, i32 59, i32 186, i32 187, i32 60, i32 61, i32 188, i32 189, i32 62, i32 63, i32 190, i32 191, i32 64, i32 65, i32 192, i32 193, i32 66, i32 67, i32 194, i32 195, i32 68, i32 69, i32 196, i32 197, i32 70, i32 71, i32 198, i32 199, i32 72, i32 73, i32 200, i32 201, i32 74, i32 75, i32 202, i32 203, i32 76, i32 77, i32 204, i32 205, i32 78, i32 79, i32 206, i32 207, i32 80, i32 81, i32 208, i32 209, i32 82, i32 83, i32 210, i32 211, i32 84, i32 85, i32 212, i32 213, i32 86, i32 87, i32 214, i32 215, i32 88, i32 89, i32 216, i32 217, i32 90, i32 91, i32 218, i32 219, i32 92, i32 93, i32 220, i32 221, i32 94, i32 95, i32 222, i32 223, i32 96, i32 97, i32 224, i32 225, i32 98, i32 99, i32 226, i32 227, i32 100, i32 101, i32 228, i32 229, i32 102, i32 103, i32 230, i32 231, i32 104, i32 105, i32 232, i32 233, i32 106, i32 107, i32 234, i32 235, i32 108, i32 109, i32 236, i32 237, i32 110, i32 111, i32 238, i32 239, i32 112, i32 113, i32 240, i32 241, i32 114, i32 115, i32 242, i32 243, i32 116, i32 117, i32 244, i32 245, i32 118, i32 119, i32 246, i32 247, i32 120, i32 121, i32 248, i32 249, i32 122, i32 123, i32 250, i32 251, i32 124, i32 125, i32 252, i32 253, i32 126, i32 127, i32 254, i32 255> + ret <256 x i8> %p +} + +; CHECK-LABEL: vshuff_7f: +; CHECK: [[REG7f:r[0-9]+]] = #127 +; CHECK: vshuff(v1,v0,[[REG7f]]) +define <256 x i8> @vshuff_7f(<256 x i8> %v0, <256 x i8> %v1) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> < i32 0, i32 128, i32 1, i32 129, i32 2, i32 130, i32 3, i32 131, i32 4, i32 132, i32 5, i32 133, i32 6, i32 134, i32 7, i32 135, i32 8, i32 136, i32 9, i32 137, i32 10, i32 138, i32 11, i32 139, i32 12, i32 140, i32 13, i32 141, i32 14, i32 142, i32 15, i32 143, i32 16, i32 144, i32 17, i32 145, i32 18, i32 146, i32 19, i32 147, i32 20, i32 148, i32 21, i32 149, i32 22, i32 150, i32 23, i32 151, i32 24, i32 152, i32 25, i32 153, i32 26, i32 154, i32 27, i32 155, i32 28, i32 156, i32 29, i32 157, i32 30, i32 158, i32 31, i32 159, i32 32, i32 160, i32 33, i32 161, i32 34, i32 162, i32 35, i32 163, i32 36, i32 164, i32 37, i32 165, i32 38, i32 166, i32 39, i32 167, i32 40, i32 168, i32 41, i32 169, i32 42, i32 170, i32 43, i32 171, i32 44, i32 172, i32 45, i32 173, i32 46, i32 174, i32 47, i32 175, i32 48, i32 176, i32 49, i32 177, i32 50, i32 178, i32 51, i32 179, i32 52, i32 180, i32 53, i32 181, i32 54, i32 182, i32 55, i32 183, i32 56, i32 184, i32 57, i32 185, i32 58, i32 186, i32 59, i32 187, i32 60, i32 188, i32 61, i32 189, i32 62, i32 190, i32 63, i32 191, i32 64, i32 192, i32 65, i32 193, i32 66, i32 194, i32 67, i32 195, i32 68, i32 196, i32 69, i32 197, i32 70, i32 198, i32 71, i32 199, i32 72, i32 200, i32 73, i32 201, i32 74, i32 202, i32 75, i32 203, i32 76, i32 204, i32 77, i32 205, i32 78, i32 206, i32 79, i32 207, i32 80, i32 208, i32 81, i32 209, i32 82, i32 210, i32 83, i32 211, i32 84, i32 212, i32 85, i32 213, i32 86, i32 214, i32 87, i32 215, i32 88, i32 216, i32 89, i32 217, i32 90, i32 218, i32 91, i32 219, i32 92, i32 220, i32 93, i32 221, i32 94, i32 222, i32 95, i32 223, i32 96, i32 224, i32 97, i32 225, i32 98, i32 226, i32 99, i32 227, i32 100, i32 228, i32 101, i32 229, i32 102, i32 230, i32 103, i32 231, i32 104, i32 232, i32 105, i32 233, i32 106, i32 234, i32 107, i32 235, i32 108, i32 236, i32 109, i32 237, i32 110, i32 238, i32 111, i32 239, i32 112, i32 240, i32 113, i32 241, i32 114, i32 242, i32 115, i32 243, i32 116, i32 244, i32 117, i32 245, i32 118, i32 246, i32 119, i32 247, i32 120, i32 248, i32 121, i32 249, i32 122, i32 250, i32 123, i32 251, i32 124, i32 252, i32 125, i32 253, i32 126, i32 254, i32 127, i32 255> + ret <256 x i8> %p +} + +attributes #0 = { nounwind readnone "target-cpu"="hexagonv60" "target-features"="+hvx,+hvx-length128b" } diff --git a/test/CodeGen/Hexagon/autohvx/shuff-64b.ll b/test/CodeGen/Hexagon/autohvx/shuff-64b.ll new file mode 100644 index 00000000000..cd0416e6563 --- /dev/null +++ b/test/CodeGen/Hexagon/autohvx/shuff-64b.ll @@ -0,0 +1,517 @@ +; RUN: llc -march=hexagon < %s | FileCheck %s + +; Check the individual vshuff shuffles for all 64 controls. + +; This is an identity shuffle: there should not be any shuffling code emitted. +; CHECK-LABEL: vshuff_00: +; CHECK-NOT: vshuff( +define <128 x i8> @vshuff_00(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 48, i32 49, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63, i32 64, i32 65, i32 66, i32 67, i32 68, i32 69, i32 70, i32 71, i32 72, i32 73, i32 74, i32 75, i32 76, i32 77, i32 78, i32 79, i32 80, i32 81, i32 82, i32 83, i32 84, i32 85, i32 86, i32 87, i32 88, i32 89, i32 90, i32 91, i32 92, i32 93, i32 94, i32 95, i32 96, i32 97, i32 98, i32 99, i32 100, i32 101, i32 102, i32 103, i32 104, i32 105, i32 106, i32 107, i32 108, i32 109, i32 110, i32 111, i32 112, i32 113, i32 114, i32 115, i32 116, i32 117, i32 118, i32 119, i32 120, i32 121, i32 122, i32 123, i32 124, i32 125, i32 126, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vshuff_01: +; CHECK: [[REG01:r[0-9]+]] = #1 +; CHECK: vshuff(v1,v0,[[REG01]]) +define <128 x i8> @vshuff_01(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 64, i32 2, i32 66, i32 4, i32 68, i32 6, i32 70, i32 8, i32 72, i32 10, i32 74, i32 12, i32 76, i32 14, i32 78, i32 16, i32 80, i32 18, i32 82, i32 20, i32 84, i32 22, i32 86, i32 24, i32 88, i32 26, i32 90, i32 28, i32 92, i32 30, i32 94, i32 32, i32 96, i32 34, i32 98, i32 36, i32 100, i32 38, i32 102, i32 40, i32 104, i32 42, i32 106, i32 44, i32 108, i32 46, i32 110, i32 48, i32 112, i32 50, i32 114, i32 52, i32 116, i32 54, i32 118, i32 56, i32 120, i32 58, i32 122, i32 60, i32 124, i32 62, i32 126, i32 1, i32 65, i32 3, i32 67, i32 5, i32 69, i32 7, i32 71, i32 9, i32 73, i32 11, i32 75, i32 13, i32 77, i32 15, i32 79, i32 17, i32 81, i32 19, i32 83, i32 21, i32 85, i32 23, i32 87, i32 25, i32 89, i32 27, i32 91, i32 29, i32 93, i32 31, i32 95, i32 33, i32 97, i32 35, i32 99, i32 37, i32 101, i32 39, i32 103, i32 41, i32 105, i32 43, i32 107, i32 45, i32 109, i32 47, i32 111, i32 49, i32 113, i32 51, i32 115, i32 53, i32 117, i32 55, i32 119, i32 57, i32 121, i32 59, i32 123, i32 61, i32 125, i32 63, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vshuff_02: +; CHECK: [[REG02:r[0-9]+]] = #2 +; CHECK: vshuff(v1,v0,[[REG02]]) +define <128 x i8> @vshuff_02(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 1, i32 64, i32 65, i32 4, i32 5, i32 68, i32 69, i32 8, i32 9, i32 72, i32 73, i32 12, i32 13, i32 76, i32 77, i32 16, i32 17, i32 80, i32 81, i32 20, i32 21, i32 84, i32 85, i32 24, i32 25, i32 88, i32 89, i32 28, i32 29, i32 92, i32 93, i32 32, i32 33, i32 96, i32 97, i32 36, i32 37, i32 100, i32 101, i32 40, i32 41, i32 104, i32 105, i32 44, i32 45, i32 108, i32 109, i32 48, i32 49, i32 112, i32 113, i32 52, i32 53, i32 116, i32 117, i32 56, i32 57, i32 120, i32 121, i32 60, i32 61, i32 124, i32 125, i32 2, i32 3, i32 66, i32 67, i32 6, i32 7, i32 70, i32 71, i32 10, i32 11, i32 74, i32 75, i32 14, i32 15, i32 78, i32 79, i32 18, i32 19, i32 82, i32 83, i32 22, i32 23, i32 86, i32 87, i32 26, i32 27, i32 90, i32 91, i32 30, i32 31, i32 94, i32 95, i32 34, i32 35, i32 98, i32 99, i32 38, i32 39, i32 102, i32 103, i32 42, i32 43, i32 106, i32 107, i32 46, i32 47, i32 110, i32 111, i32 50, i32 51, i32 114, i32 115, i32 54, i32 55, i32 118, i32 119, i32 58, i32 59, i32 122, i32 123, i32 62, i32 63, i32 126, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vshuff_03: +; CHECK: [[REG03:r[0-9]+]] = #3 +; CHECK: vshuff(v1,v0,[[REG03]]) +define <128 x i8> @vshuff_03(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 64, i32 1, i32 65, i32 4, i32 68, i32 5, i32 69, i32 8, i32 72, i32 9, i32 73, i32 12, i32 76, i32 13, i32 77, i32 16, i32 80, i32 17, i32 81, i32 20, i32 84, i32 21, i32 85, i32 24, i32 88, i32 25, i32 89, i32 28, i32 92, i32 29, i32 93, i32 32, i32 96, i32 33, i32 97, i32 36, i32 100, i32 37, i32 101, i32 40, i32 104, i32 41, i32 105, i32 44, i32 108, i32 45, i32 109, i32 48, i32 112, i32 49, i32 113, i32 52, i32 116, i32 53, i32 117, i32 56, i32 120, i32 57, i32 121, i32 60, i32 124, i32 61, i32 125, i32 2, i32 66, i32 3, i32 67, i32 6, i32 70, i32 7, i32 71, i32 10, i32 74, i32 11, i32 75, i32 14, i32 78, i32 15, i32 79, i32 18, i32 82, i32 19, i32 83, i32 22, i32 86, i32 23, i32 87, i32 26, i32 90, i32 27, i32 91, i32 30, i32 94, i32 31, i32 95, i32 34, i32 98, i32 35, i32 99, i32 38, i32 102, i32 39, i32 103, i32 42, i32 106, i32 43, i32 107, i32 46, i32 110, i32 47, i32 111, i32 50, i32 114, i32 51, i32 115, i32 54, i32 118, i32 55, i32 119, i32 58, i32 122, i32 59, i32 123, i32 62, i32 126, i32 63, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vshuff_04: +; CHECK: [[REG04:r[0-9]+]] = #4 +; CHECK: vshuff(v1,v0,[[REG04]]) +define <128 x i8> @vshuff_04(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 1, i32 2, i32 3, i32 64, i32 65, i32 66, i32 67, i32 8, i32 9, i32 10, i32 11, i32 72, i32 73, i32 74, i32 75, i32 16, i32 17, i32 18, i32 19, i32 80, i32 81, i32 82, i32 83, i32 24, i32 25, i32 26, i32 27, i32 88, i32 89, i32 90, i32 91, i32 32, i32 33, i32 34, i32 35, i32 96, i32 97, i32 98, i32 99, i32 40, i32 41, i32 42, i32 43, i32 104, i32 105, i32 106, i32 107, i32 48, i32 49, i32 50, i32 51, i32 112, i32 113, i32 114, i32 115, i32 56, i32 57, i32 58, i32 59, i32 120, i32 121, i32 122, i32 123, i32 4, i32 5, i32 6, i32 7, i32 68, i32 69, i32 70, i32 71, i32 12, i32 13, i32 14, i32 15, i32 76, i32 77, i32 78, i32 79, i32 20, i32 21, i32 22, i32 23, i32 84, i32 85, i32 86, i32 87, i32 28, i32 29, i32 30, i32 31, i32 92, i32 93, i32 94, i32 95, i32 36, i32 37, i32 38, i32 39, i32 100, i32 101, i32 102, i32 103, i32 44, i32 45, i32 46, i32 47, i32 108, i32 109, i32 110, i32 111, i32 52, i32 53, i32 54, i32 55, i32 116, i32 117, i32 118, i32 119, i32 60, i32 61, i32 62, i32 63, i32 124, i32 125, i32 126, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vshuff_05: +; CHECK: [[REG05:r[0-9]+]] = #5 +; CHECK: vshuff(v1,v0,[[REG05]]) +define <128 x i8> @vshuff_05(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 64, i32 2, i32 66, i32 1, i32 65, i32 3, i32 67, i32 8, i32 72, i32 10, i32 74, i32 9, i32 73, i32 11, i32 75, i32 16, i32 80, i32 18, i32 82, i32 17, i32 81, i32 19, i32 83, i32 24, i32 88, i32 26, i32 90, i32 25, i32 89, i32 27, i32 91, i32 32, i32 96, i32 34, i32 98, i32 33, i32 97, i32 35, i32 99, i32 40, i32 104, i32 42, i32 106, i32 41, i32 105, i32 43, i32 107, i32 48, i32 112, i32 50, i32 114, i32 49, i32 113, i32 51, i32 115, i32 56, i32 120, i32 58, i32 122, i32 57, i32 121, i32 59, i32 123, i32 4, i32 68, i32 6, i32 70, i32 5, i32 69, i32 7, i32 71, i32 12, i32 76, i32 14, i32 78, i32 13, i32 77, i32 15, i32 79, i32 20, i32 84, i32 22, i32 86, i32 21, i32 85, i32 23, i32 87, i32 28, i32 92, i32 30, i32 94, i32 29, i32 93, i32 31, i32 95, i32 36, i32 100, i32 38, i32 102, i32 37, i32 101, i32 39, i32 103, i32 44, i32 108, i32 46, i32 110, i32 45, i32 109, i32 47, i32 111, i32 52, i32 116, i32 54, i32 118, i32 53, i32 117, i32 55, i32 119, i32 60, i32 124, i32 62, i32 126, i32 61, i32 125, i32 63, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vshuff_06: +; CHECK: [[REG06:r[0-9]+]] = #6 +; CHECK: vshuff(v1,v0,[[REG06]]) +define <128 x i8> @vshuff_06(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 1, i32 64, i32 65, i32 2, i32 3, i32 66, i32 67, i32 8, i32 9, i32 72, i32 73, i32 10, i32 11, i32 74, i32 75, i32 16, i32 17, i32 80, i32 81, i32 18, i32 19, i32 82, i32 83, i32 24, i32 25, i32 88, i32 89, i32 26, i32 27, i32 90, i32 91, i32 32, i32 33, i32 96, i32 97, i32 34, i32 35, i32 98, i32 99, i32 40, i32 41, i32 104, i32 105, i32 42, i32 43, i32 106, i32 107, i32 48, i32 49, i32 112, i32 113, i32 50, i32 51, i32 114, i32 115, i32 56, i32 57, i32 120, i32 121, i32 58, i32 59, i32 122, i32 123, i32 4, i32 5, i32 68, i32 69, i32 6, i32 7, i32 70, i32 71, i32 12, i32 13, i32 76, i32 77, i32 14, i32 15, i32 78, i32 79, i32 20, i32 21, i32 84, i32 85, i32 22, i32 23, i32 86, i32 87, i32 28, i32 29, i32 92, i32 93, i32 30, i32 31, i32 94, i32 95, i32 36, i32 37, i32 100, i32 101, i32 38, i32 39, i32 102, i32 103, i32 44, i32 45, i32 108, i32 109, i32 46, i32 47, i32 110, i32 111, i32 52, i32 53, i32 116, i32 117, i32 54, i32 55, i32 118, i32 119, i32 60, i32 61, i32 124, i32 125, i32 62, i32 63, i32 126, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vshuff_07: +; CHECK: [[REG07:r[0-9]+]] = #7 +; CHECK: vshuff(v1,v0,[[REG07]]) +define <128 x i8> @vshuff_07(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 64, i32 1, i32 65, i32 2, i32 66, i32 3, i32 67, i32 8, i32 72, i32 9, i32 73, i32 10, i32 74, i32 11, i32 75, i32 16, i32 80, i32 17, i32 81, i32 18, i32 82, i32 19, i32 83, i32 24, i32 88, i32 25, i32 89, i32 26, i32 90, i32 27, i32 91, i32 32, i32 96, i32 33, i32 97, i32 34, i32 98, i32 35, i32 99, i32 40, i32 104, i32 41, i32 105, i32 42, i32 106, i32 43, i32 107, i32 48, i32 112, i32 49, i32 113, i32 50, i32 114, i32 51, i32 115, i32 56, i32 120, i32 57, i32 121, i32 58, i32 122, i32 59, i32 123, i32 4, i32 68, i32 5, i32 69, i32 6, i32 70, i32 7, i32 71, i32 12, i32 76, i32 13, i32 77, i32 14, i32 78, i32 15, i32 79, i32 20, i32 84, i32 21, i32 85, i32 22, i32 86, i32 23, i32 87, i32 28, i32 92, i32 29, i32 93, i32 30, i32 94, i32 31, i32 95, i32 36, i32 100, i32 37, i32 101, i32 38, i32 102, i32 39, i32 103, i32 44, i32 108, i32 45, i32 109, i32 46, i32 110, i32 47, i32 111, i32 52, i32 116, i32 53, i32 117, i32 54, i32 118, i32 55, i32 119, i32 60, i32 124, i32 61, i32 125, i32 62, i32 126, i32 63, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vshuff_08: +; CHECK: [[REG08:r[0-9]+]] = #8 +; CHECK: vshuff(v1,v0,[[REG08]]) +define <128 x i8> @vshuff_08(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 64, i32 65, i32 66, i32 67, i32 68, i32 69, i32 70, i32 71, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 80, i32 81, i32 82, i32 83, i32 84, i32 85, i32 86, i32 87, i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 96, i32 97, i32 98, i32 99, i32 100, i32 101, i32 102, i32 103, i32 48, i32 49, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 112, i32 113, i32 114, i32 115, i32 116, i32 117, i32 118, i32 119, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 72, i32 73, i32 74, i32 75, i32 76, i32 77, i32 78, i32 79, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 88, i32 89, i32 90, i32 91, i32 92, i32 93, i32 94, i32 95, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 104, i32 105, i32 106, i32 107, i32 108, i32 109, i32 110, i32 111, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63, i32 120, i32 121, i32 122, i32 123, i32 124, i32 125, i32 126, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vshuff_09: +; CHECK: [[REG09:r[0-9]+]] = #9 +; CHECK: vshuff(v1,v0,[[REG09]]) +define <128 x i8> @vshuff_09(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 64, i32 2, i32 66, i32 4, i32 68, i32 6, i32 70, i32 1, i32 65, i32 3, i32 67, i32 5, i32 69, i32 7, i32 71, i32 16, i32 80, i32 18, i32 82, i32 20, i32 84, i32 22, i32 86, i32 17, i32 81, i32 19, i32 83, i32 21, i32 85, i32 23, i32 87, i32 32, i32 96, i32 34, i32 98, i32 36, i32 100, i32 38, i32 102, i32 33, i32 97, i32 35, i32 99, i32 37, i32 101, i32 39, i32 103, i32 48, i32 112, i32 50, i32 114, i32 52, i32 116, i32 54, i32 118, i32 49, i32 113, i32 51, i32 115, i32 53, i32 117, i32 55, i32 119, i32 8, i32 72, i32 10, i32 74, i32 12, i32 76, i32 14, i32 78, i32 9, i32 73, i32 11, i32 75, i32 13, i32 77, i32 15, i32 79, i32 24, i32 88, i32 26, i32 90, i32 28, i32 92, i32 30, i32 94, i32 25, i32 89, i32 27, i32 91, i32 29, i32 93, i32 31, i32 95, i32 40, i32 104, i32 42, i32 106, i32 44, i32 108, i32 46, i32 110, i32 41, i32 105, i32 43, i32 107, i32 45, i32 109, i32 47, i32 111, i32 56, i32 120, i32 58, i32 122, i32 60, i32 124, i32 62, i32 126, i32 57, i32 121, i32 59, i32 123, i32 61, i32 125, i32 63, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vshuff_0a: +; CHECK: [[REG0a:r[0-9]+]] = #10 +; CHECK: vshuff(v1,v0,[[REG0a]]) +define <128 x i8> @vshuff_0a(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 1, i32 64, i32 65, i32 4, i32 5, i32 68, i32 69, i32 2, i32 3, i32 66, i32 67, i32 6, i32 7, i32 70, i32 71, i32 16, i32 17, i32 80, i32 81, i32 20, i32 21, i32 84, i32 85, i32 18, i32 19, i32 82, i32 83, i32 22, i32 23, i32 86, i32 87, i32 32, i32 33, i32 96, i32 97, i32 36, i32 37, i32 100, i32 101, i32 34, i32 35, i32 98, i32 99, i32 38, i32 39, i32 102, i32 103, i32 48, i32 49, i32 112, i32 113, i32 52, i32 53, i32 116, i32 117, i32 50, i32 51, i32 114, i32 115, i32 54, i32 55, i32 118, i32 119, i32 8, i32 9, i32 72, i32 73, i32 12, i32 13, i32 76, i32 77, i32 10, i32 11, i32 74, i32 75, i32 14, i32 15, i32 78, i32 79, i32 24, i32 25, i32 88, i32 89, i32 28, i32 29, i32 92, i32 93, i32 26, i32 27, i32 90, i32 91, i32 30, i32 31, i32 94, i32 95, i32 40, i32 41, i32 104, i32 105, i32 44, i32 45, i32 108, i32 109, i32 42, i32 43, i32 106, i32 107, i32 46, i32 47, i32 110, i32 111, i32 56, i32 57, i32 120, i32 121, i32 60, i32 61, i32 124, i32 125, i32 58, i32 59, i32 122, i32 123, i32 62, i32 63, i32 126, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vshuff_0b: +; CHECK: [[REG0b:r[0-9]+]] = #11 +; CHECK: vshuff(v1,v0,[[REG0b]]) +define <128 x i8> @vshuff_0b(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 64, i32 1, i32 65, i32 4, i32 68, i32 5, i32 69, i32 2, i32 66, i32 3, i32 67, i32 6, i32 70, i32 7, i32 71, i32 16, i32 80, i32 17, i32 81, i32 20, i32 84, i32 21, i32 85, i32 18, i32 82, i32 19, i32 83, i32 22, i32 86, i32 23, i32 87, i32 32, i32 96, i32 33, i32 97, i32 36, i32 100, i32 37, i32 101, i32 34, i32 98, i32 35, i32 99, i32 38, i32 102, i32 39, i32 103, i32 48, i32 112, i32 49, i32 113, i32 52, i32 116, i32 53, i32 117, i32 50, i32 114, i32 51, i32 115, i32 54, i32 118, i32 55, i32 119, i32 8, i32 72, i32 9, i32 73, i32 12, i32 76, i32 13, i32 77, i32 10, i32 74, i32 11, i32 75, i32 14, i32 78, i32 15, i32 79, i32 24, i32 88, i32 25, i32 89, i32 28, i32 92, i32 29, i32 93, i32 26, i32 90, i32 27, i32 91, i32 30, i32 94, i32 31, i32 95, i32 40, i32 104, i32 41, i32 105, i32 44, i32 108, i32 45, i32 109, i32 42, i32 106, i32 43, i32 107, i32 46, i32 110, i32 47, i32 111, i32 56, i32 120, i32 57, i32 121, i32 60, i32 124, i32 61, i32 125, i32 58, i32 122, i32 59, i32 123, i32 62, i32 126, i32 63, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vshuff_0c: +; CHECK: [[REG0c:r[0-9]+]] = #12 +; CHECK: vshuff(v1,v0,[[REG0c]]) +define <128 x i8> @vshuff_0c(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 1, i32 2, i32 3, i32 64, i32 65, i32 66, i32 67, i32 4, i32 5, i32 6, i32 7, i32 68, i32 69, i32 70, i32 71, i32 16, i32 17, i32 18, i32 19, i32 80, i32 81, i32 82, i32 83, i32 20, i32 21, i32 22, i32 23, i32 84, i32 85, i32 86, i32 87, i32 32, i32 33, i32 34, i32 35, i32 96, i32 97, i32 98, i32 99, i32 36, i32 37, i32 38, i32 39, i32 100, i32 101, i32 102, i32 103, i32 48, i32 49, i32 50, i32 51, i32 112, i32 113, i32 114, i32 115, i32 52, i32 53, i32 54, i32 55, i32 116, i32 117, i32 118, i32 119, i32 8, i32 9, i32 10, i32 11, i32 72, i32 73, i32 74, i32 75, i32 12, i32 13, i32 14, i32 15, i32 76, i32 77, i32 78, i32 79, i32 24, i32 25, i32 26, i32 27, i32 88, i32 89, i32 90, i32 91, i32 28, i32 29, i32 30, i32 31, i32 92, i32 93, i32 94, i32 95, i32 40, i32 41, i32 42, i32 43, i32 104, i32 105, i32 106, i32 107, i32 44, i32 45, i32 46, i32 47, i32 108, i32 109, i32 110, i32 111, i32 56, i32 57, i32 58, i32 59, i32 120, i32 121, i32 122, i32 123, i32 60, i32 61, i32 62, i32 63, i32 124, i32 125, i32 126, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vshuff_0d: +; CHECK: [[REG0d:r[0-9]+]] = #13 +; CHECK: vshuff(v1,v0,[[REG0d]]) +define <128 x i8> @vshuff_0d(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 64, i32 2, i32 66, i32 1, i32 65, i32 3, i32 67, i32 4, i32 68, i32 6, i32 70, i32 5, i32 69, i32 7, i32 71, i32 16, i32 80, i32 18, i32 82, i32 17, i32 81, i32 19, i32 83, i32 20, i32 84, i32 22, i32 86, i32 21, i32 85, i32 23, i32 87, i32 32, i32 96, i32 34, i32 98, i32 33, i32 97, i32 35, i32 99, i32 36, i32 100, i32 38, i32 102, i32 37, i32 101, i32 39, i32 103, i32 48, i32 112, i32 50, i32 114, i32 49, i32 113, i32 51, i32 115, i32 52, i32 116, i32 54, i32 118, i32 53, i32 117, i32 55, i32 119, i32 8, i32 72, i32 10, i32 74, i32 9, i32 73, i32 11, i32 75, i32 12, i32 76, i32 14, i32 78, i32 13, i32 77, i32 15, i32 79, i32 24, i32 88, i32 26, i32 90, i32 25, i32 89, i32 27, i32 91, i32 28, i32 92, i32 30, i32 94, i32 29, i32 93, i32 31, i32 95, i32 40, i32 104, i32 42, i32 106, i32 41, i32 105, i32 43, i32 107, i32 44, i32 108, i32 46, i32 110, i32 45, i32 109, i32 47, i32 111, i32 56, i32 120, i32 58, i32 122, i32 57, i32 121, i32 59, i32 123, i32 60, i32 124, i32 62, i32 126, i32 61, i32 125, i32 63, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vshuff_0e: +; CHECK: [[REG0e:r[0-9]+]] = #14 +; CHECK: vshuff(v1,v0,[[REG0e]]) +define <128 x i8> @vshuff_0e(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 1, i32 64, i32 65, i32 2, i32 3, i32 66, i32 67, i32 4, i32 5, i32 68, i32 69, i32 6, i32 7, i32 70, i32 71, i32 16, i32 17, i32 80, i32 81, i32 18, i32 19, i32 82, i32 83, i32 20, i32 21, i32 84, i32 85, i32 22, i32 23, i32 86, i32 87, i32 32, i32 33, i32 96, i32 97, i32 34, i32 35, i32 98, i32 99, i32 36, i32 37, i32 100, i32 101, i32 38, i32 39, i32 102, i32 103, i32 48, i32 49, i32 112, i32 113, i32 50, i32 51, i32 114, i32 115, i32 52, i32 53, i32 116, i32 117, i32 54, i32 55, i32 118, i32 119, i32 8, i32 9, i32 72, i32 73, i32 10, i32 11, i32 74, i32 75, i32 12, i32 13, i32 76, i32 77, i32 14, i32 15, i32 78, i32 79, i32 24, i32 25, i32 88, i32 89, i32 26, i32 27, i32 90, i32 91, i32 28, i32 29, i32 92, i32 93, i32 30, i32 31, i32 94, i32 95, i32 40, i32 41, i32 104, i32 105, i32 42, i32 43, i32 106, i32 107, i32 44, i32 45, i32 108, i32 109, i32 46, i32 47, i32 110, i32 111, i32 56, i32 57, i32 120, i32 121, i32 58, i32 59, i32 122, i32 123, i32 60, i32 61, i32 124, i32 125, i32 62, i32 63, i32 126, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vshuff_0f: +; CHECK: [[REG0f:r[0-9]+]] = #15 +; CHECK: vshuff(v1,v0,[[REG0f]]) +define <128 x i8> @vshuff_0f(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 64, i32 1, i32 65, i32 2, i32 66, i32 3, i32 67, i32 4, i32 68, i32 5, i32 69, i32 6, i32 70, i32 7, i32 71, i32 16, i32 80, i32 17, i32 81, i32 18, i32 82, i32 19, i32 83, i32 20, i32 84, i32 21, i32 85, i32 22, i32 86, i32 23, i32 87, i32 32, i32 96, i32 33, i32 97, i32 34, i32 98, i32 35, i32 99, i32 36, i32 100, i32 37, i32 101, i32 38, i32 102, i32 39, i32 103, i32 48, i32 112, i32 49, i32 113, i32 50, i32 114, i32 51, i32 115, i32 52, i32 116, i32 53, i32 117, i32 54, i32 118, i32 55, i32 119, i32 8, i32 72, i32 9, i32 73, i32 10, i32 74, i32 11, i32 75, i32 12, i32 76, i32 13, i32 77, i32 14, i32 78, i32 15, i32 79, i32 24, i32 88, i32 25, i32 89, i32 26, i32 90, i32 27, i32 91, i32 28, i32 92, i32 29, i32 93, i32 30, i32 94, i32 31, i32 95, i32 40, i32 104, i32 41, i32 105, i32 42, i32 106, i32 43, i32 107, i32 44, i32 108, i32 45, i32 109, i32 46, i32 110, i32 47, i32 111, i32 56, i32 120, i32 57, i32 121, i32 58, i32 122, i32 59, i32 123, i32 60, i32 124, i32 61, i32 125, i32 62, i32 126, i32 63, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vshuff_10: +; CHECK: [[REG10:r[0-9]+]] = #16 +; CHECK: vshuff(v1,v0,[[REG10]]) +define <128 x i8> @vshuff_10(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 64, i32 65, i32 66, i32 67, i32 68, i32 69, i32 70, i32 71, i32 72, i32 73, i32 74, i32 75, i32 76, i32 77, i32 78, i32 79, i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 96, i32 97, i32 98, i32 99, i32 100, i32 101, i32 102, i32 103, i32 104, i32 105, i32 106, i32 107, i32 108, i32 109, i32 110, i32 111, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 80, i32 81, i32 82, i32 83, i32 84, i32 85, i32 86, i32 87, i32 88, i32 89, i32 90, i32 91, i32 92, i32 93, i32 94, i32 95, i32 48, i32 49, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63, i32 112, i32 113, i32 114, i32 115, i32 116, i32 117, i32 118, i32 119, i32 120, i32 121, i32 122, i32 123, i32 124, i32 125, i32 126, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vshuff_11: +; CHECK: [[REG11:r[0-9]+]] = #17 +; CHECK: vshuff(v1,v0,[[REG11]]) +define <128 x i8> @vshuff_11(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 64, i32 2, i32 66, i32 4, i32 68, i32 6, i32 70, i32 8, i32 72, i32 10, i32 74, i32 12, i32 76, i32 14, i32 78, i32 1, i32 65, i32 3, i32 67, i32 5, i32 69, i32 7, i32 71, i32 9, i32 73, i32 11, i32 75, i32 13, i32 77, i32 15, i32 79, i32 32, i32 96, i32 34, i32 98, i32 36, i32 100, i32 38, i32 102, i32 40, i32 104, i32 42, i32 106, i32 44, i32 108, i32 46, i32 110, i32 33, i32 97, i32 35, i32 99, i32 37, i32 101, i32 39, i32 103, i32 41, i32 105, i32 43, i32 107, i32 45, i32 109, i32 47, i32 111, i32 16, i32 80, i32 18, i32 82, i32 20, i32 84, i32 22, i32 86, i32 24, i32 88, i32 26, i32 90, i32 28, i32 92, i32 30, i32 94, i32 17, i32 81, i32 19, i32 83, i32 21, i32 85, i32 23, i32 87, i32 25, i32 89, i32 27, i32 91, i32 29, i32 93, i32 31, i32 95, i32 48, i32 112, i32 50, i32 114, i32 52, i32 116, i32 54, i32 118, i32 56, i32 120, i32 58, i32 122, i32 60, i32 124, i32 62, i32 126, i32 49, i32 113, i32 51, i32 115, i32 53, i32 117, i32 55, i32 119, i32 57, i32 121, i32 59, i32 123, i32 61, i32 125, i32 63, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vshuff_12: +; CHECK: [[REG12:r[0-9]+]] = #18 +; CHECK: vshuff(v1,v0,[[REG12]]) +define <128 x i8> @vshuff_12(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 1, i32 64, i32 65, i32 4, i32 5, i32 68, i32 69, i32 8, i32 9, i32 72, i32 73, i32 12, i32 13, i32 76, i32 77, i32 2, i32 3, i32 66, i32 67, i32 6, i32 7, i32 70, i32 71, i32 10, i32 11, i32 74, i32 75, i32 14, i32 15, i32 78, i32 79, i32 32, i32 33, i32 96, i32 97, i32 36, i32 37, i32 100, i32 101, i32 40, i32 41, i32 104, i32 105, i32 44, i32 45, i32 108, i32 109, i32 34, i32 35, i32 98, i32 99, i32 38, i32 39, i32 102, i32 103, i32 42, i32 43, i32 106, i32 107, i32 46, i32 47, i32 110, i32 111, i32 16, i32 17, i32 80, i32 81, i32 20, i32 21, i32 84, i32 85, i32 24, i32 25, i32 88, i32 89, i32 28, i32 29, i32 92, i32 93, i32 18, i32 19, i32 82, i32 83, i32 22, i32 23, i32 86, i32 87, i32 26, i32 27, i32 90, i32 91, i32 30, i32 31, i32 94, i32 95, i32 48, i32 49, i32 112, i32 113, i32 52, i32 53, i32 116, i32 117, i32 56, i32 57, i32 120, i32 121, i32 60, i32 61, i32 124, i32 125, i32 50, i32 51, i32 114, i32 115, i32 54, i32 55, i32 118, i32 119, i32 58, i32 59, i32 122, i32 123, i32 62, i32 63, i32 126, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vshuff_13: +; CHECK: [[REG13:r[0-9]+]] = #19 +; CHECK: vshuff(v1,v0,[[REG13]]) +define <128 x i8> @vshuff_13(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 64, i32 1, i32 65, i32 4, i32 68, i32 5, i32 69, i32 8, i32 72, i32 9, i32 73, i32 12, i32 76, i32 13, i32 77, i32 2, i32 66, i32 3, i32 67, i32 6, i32 70, i32 7, i32 71, i32 10, i32 74, i32 11, i32 75, i32 14, i32 78, i32 15, i32 79, i32 32, i32 96, i32 33, i32 97, i32 36, i32 100, i32 37, i32 101, i32 40, i32 104, i32 41, i32 105, i32 44, i32 108, i32 45, i32 109, i32 34, i32 98, i32 35, i32 99, i32 38, i32 102, i32 39, i32 103, i32 42, i32 106, i32 43, i32 107, i32 46, i32 110, i32 47, i32 111, i32 16, i32 80, i32 17, i32 81, i32 20, i32 84, i32 21, i32 85, i32 24, i32 88, i32 25, i32 89, i32 28, i32 92, i32 29, i32 93, i32 18, i32 82, i32 19, i32 83, i32 22, i32 86, i32 23, i32 87, i32 26, i32 90, i32 27, i32 91, i32 30, i32 94, i32 31, i32 95, i32 48, i32 112, i32 49, i32 113, i32 52, i32 116, i32 53, i32 117, i32 56, i32 120, i32 57, i32 121, i32 60, i32 124, i32 61, i32 125, i32 50, i32 114, i32 51, i32 115, i32 54, i32 118, i32 55, i32 119, i32 58, i32 122, i32 59, i32 123, i32 62, i32 126, i32 63, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vshuff_14: +; CHECK: [[REG14:r[0-9]+]] = #20 +; CHECK: vshuff(v1,v0,[[REG14]]) +define <128 x i8> @vshuff_14(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 1, i32 2, i32 3, i32 64, i32 65, i32 66, i32 67, i32 8, i32 9, i32 10, i32 11, i32 72, i32 73, i32 74, i32 75, i32 4, i32 5, i32 6, i32 7, i32 68, i32 69, i32 70, i32 71, i32 12, i32 13, i32 14, i32 15, i32 76, i32 77, i32 78, i32 79, i32 32, i32 33, i32 34, i32 35, i32 96, i32 97, i32 98, i32 99, i32 40, i32 41, i32 42, i32 43, i32 104, i32 105, i32 106, i32 107, i32 36, i32 37, i32 38, i32 39, i32 100, i32 101, i32 102, i32 103, i32 44, i32 45, i32 46, i32 47, i32 108, i32 109, i32 110, i32 111, i32 16, i32 17, i32 18, i32 19, i32 80, i32 81, i32 82, i32 83, i32 24, i32 25, i32 26, i32 27, i32 88, i32 89, i32 90, i32 91, i32 20, i32 21, i32 22, i32 23, i32 84, i32 85, i32 86, i32 87, i32 28, i32 29, i32 30, i32 31, i32 92, i32 93, i32 94, i32 95, i32 48, i32 49, i32 50, i32 51, i32 112, i32 113, i32 114, i32 115, i32 56, i32 57, i32 58, i32 59, i32 120, i32 121, i32 122, i32 123, i32 52, i32 53, i32 54, i32 55, i32 116, i32 117, i32 118, i32 119, i32 60, i32 61, i32 62, i32 63, i32 124, i32 125, i32 126, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vshuff_15: +; CHECK: [[REG15:r[0-9]+]] = #21 +; CHECK: vshuff(v1,v0,[[REG15]]) +define <128 x i8> @vshuff_15(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 64, i32 2, i32 66, i32 1, i32 65, i32 3, i32 67, i32 8, i32 72, i32 10, i32 74, i32 9, i32 73, i32 11, i32 75, i32 4, i32 68, i32 6, i32 70, i32 5, i32 69, i32 7, i32 71, i32 12, i32 76, i32 14, i32 78, i32 13, i32 77, i32 15, i32 79, i32 32, i32 96, i32 34, i32 98, i32 33, i32 97, i32 35, i32 99, i32 40, i32 104, i32 42, i32 106, i32 41, i32 105, i32 43, i32 107, i32 36, i32 100, i32 38, i32 102, i32 37, i32 101, i32 39, i32 103, i32 44, i32 108, i32 46, i32 110, i32 45, i32 109, i32 47, i32 111, i32 16, i32 80, i32 18, i32 82, i32 17, i32 81, i32 19, i32 83, i32 24, i32 88, i32 26, i32 90, i32 25, i32 89, i32 27, i32 91, i32 20, i32 84, i32 22, i32 86, i32 21, i32 85, i32 23, i32 87, i32 28, i32 92, i32 30, i32 94, i32 29, i32 93, i32 31, i32 95, i32 48, i32 112, i32 50, i32 114, i32 49, i32 113, i32 51, i32 115, i32 56, i32 120, i32 58, i32 122, i32 57, i32 121, i32 59, i32 123, i32 52, i32 116, i32 54, i32 118, i32 53, i32 117, i32 55, i32 119, i32 60, i32 124, i32 62, i32 126, i32 61, i32 125, i32 63, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vshuff_16: +; CHECK: [[REG16:r[0-9]+]] = #22 +; CHECK: vshuff(v1,v0,[[REG16]]) +define <128 x i8> @vshuff_16(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 1, i32 64, i32 65, i32 2, i32 3, i32 66, i32 67, i32 8, i32 9, i32 72, i32 73, i32 10, i32 11, i32 74, i32 75, i32 4, i32 5, i32 68, i32 69, i32 6, i32 7, i32 70, i32 71, i32 12, i32 13, i32 76, i32 77, i32 14, i32 15, i32 78, i32 79, i32 32, i32 33, i32 96, i32 97, i32 34, i32 35, i32 98, i32 99, i32 40, i32 41, i32 104, i32 105, i32 42, i32 43, i32 106, i32 107, i32 36, i32 37, i32 100, i32 101, i32 38, i32 39, i32 102, i32 103, i32 44, i32 45, i32 108, i32 109, i32 46, i32 47, i32 110, i32 111, i32 16, i32 17, i32 80, i32 81, i32 18, i32 19, i32 82, i32 83, i32 24, i32 25, i32 88, i32 89, i32 26, i32 27, i32 90, i32 91, i32 20, i32 21, i32 84, i32 85, i32 22, i32 23, i32 86, i32 87, i32 28, i32 29, i32 92, i32 93, i32 30, i32 31, i32 94, i32 95, i32 48, i32 49, i32 112, i32 113, i32 50, i32 51, i32 114, i32 115, i32 56, i32 57, i32 120, i32 121, i32 58, i32 59, i32 122, i32 123, i32 52, i32 53, i32 116, i32 117, i32 54, i32 55, i32 118, i32 119, i32 60, i32 61, i32 124, i32 125, i32 62, i32 63, i32 126, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vshuff_17: +; CHECK: [[REG17:r[0-9]+]] = #23 +; CHECK: vshuff(v1,v0,[[REG17]]) +define <128 x i8> @vshuff_17(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 64, i32 1, i32 65, i32 2, i32 66, i32 3, i32 67, i32 8, i32 72, i32 9, i32 73, i32 10, i32 74, i32 11, i32 75, i32 4, i32 68, i32 5, i32 69, i32 6, i32 70, i32 7, i32 71, i32 12, i32 76, i32 13, i32 77, i32 14, i32 78, i32 15, i32 79, i32 32, i32 96, i32 33, i32 97, i32 34, i32 98, i32 35, i32 99, i32 40, i32 104, i32 41, i32 105, i32 42, i32 106, i32 43, i32 107, i32 36, i32 100, i32 37, i32 101, i32 38, i32 102, i32 39, i32 103, i32 44, i32 108, i32 45, i32 109, i32 46, i32 110, i32 47, i32 111, i32 16, i32 80, i32 17, i32 81, i32 18, i32 82, i32 19, i32 83, i32 24, i32 88, i32 25, i32 89, i32 26, i32 90, i32 27, i32 91, i32 20, i32 84, i32 21, i32 85, i32 22, i32 86, i32 23, i32 87, i32 28, i32 92, i32 29, i32 93, i32 30, i32 94, i32 31, i32 95, i32 48, i32 112, i32 49, i32 113, i32 50, i32 114, i32 51, i32 115, i32 56, i32 120, i32 57, i32 121, i32 58, i32 122, i32 59, i32 123, i32 52, i32 116, i32 53, i32 117, i32 54, i32 118, i32 55, i32 119, i32 60, i32 124, i32 61, i32 125, i32 62, i32 126, i32 63, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vshuff_18: +; CHECK: [[REG18:r[0-9]+]] = #24 +; CHECK: vshuff(v1,v0,[[REG18]]) +define <128 x i8> @vshuff_18(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 64, i32 65, i32 66, i32 67, i32 68, i32 69, i32 70, i32 71, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 72, i32 73, i32 74, i32 75, i32 76, i32 77, i32 78, i32 79, i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 96, i32 97, i32 98, i32 99, i32 100, i32 101, i32 102, i32 103, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 104, i32 105, i32 106, i32 107, i32 108, i32 109, i32 110, i32 111, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 80, i32 81, i32 82, i32 83, i32 84, i32 85, i32 86, i32 87, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 88, i32 89, i32 90, i32 91, i32 92, i32 93, i32 94, i32 95, i32 48, i32 49, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 112, i32 113, i32 114, i32 115, i32 116, i32 117, i32 118, i32 119, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63, i32 120, i32 121, i32 122, i32 123, i32 124, i32 125, i32 126, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vshuff_19: +; CHECK: [[REG19:r[0-9]+]] = #25 +; CHECK: vshuff(v1,v0,[[REG19]]) +define <128 x i8> @vshuff_19(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 64, i32 2, i32 66, i32 4, i32 68, i32 6, i32 70, i32 1, i32 65, i32 3, i32 67, i32 5, i32 69, i32 7, i32 71, i32 8, i32 72, i32 10, i32 74, i32 12, i32 76, i32 14, i32 78, i32 9, i32 73, i32 11, i32 75, i32 13, i32 77, i32 15, i32 79, i32 32, i32 96, i32 34, i32 98, i32 36, i32 100, i32 38, i32 102, i32 33, i32 97, i32 35, i32 99, i32 37, i32 101, i32 39, i32 103, i32 40, i32 104, i32 42, i32 106, i32 44, i32 108, i32 46, i32 110, i32 41, i32 105, i32 43, i32 107, i32 45, i32 109, i32 47, i32 111, i32 16, i32 80, i32 18, i32 82, i32 20, i32 84, i32 22, i32 86, i32 17, i32 81, i32 19, i32 83, i32 21, i32 85, i32 23, i32 87, i32 24, i32 88, i32 26, i32 90, i32 28, i32 92, i32 30, i32 94, i32 25, i32 89, i32 27, i32 91, i32 29, i32 93, i32 31, i32 95, i32 48, i32 112, i32 50, i32 114, i32 52, i32 116, i32 54, i32 118, i32 49, i32 113, i32 51, i32 115, i32 53, i32 117, i32 55, i32 119, i32 56, i32 120, i32 58, i32 122, i32 60, i32 124, i32 62, i32 126, i32 57, i32 121, i32 59, i32 123, i32 61, i32 125, i32 63, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vshuff_1a: +; CHECK: [[REG1a:r[0-9]+]] = #26 +; CHECK: vshuff(v1,v0,[[REG1a]]) +define <128 x i8> @vshuff_1a(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 1, i32 64, i32 65, i32 4, i32 5, i32 68, i32 69, i32 2, i32 3, i32 66, i32 67, i32 6, i32 7, i32 70, i32 71, i32 8, i32 9, i32 72, i32 73, i32 12, i32 13, i32 76, i32 77, i32 10, i32 11, i32 74, i32 75, i32 14, i32 15, i32 78, i32 79, i32 32, i32 33, i32 96, i32 97, i32 36, i32 37, i32 100, i32 101, i32 34, i32 35, i32 98, i32 99, i32 38, i32 39, i32 102, i32 103, i32 40, i32 41, i32 104, i32 105, i32 44, i32 45, i32 108, i32 109, i32 42, i32 43, i32 106, i32 107, i32 46, i32 47, i32 110, i32 111, i32 16, i32 17, i32 80, i32 81, i32 20, i32 21, i32 84, i32 85, i32 18, i32 19, i32 82, i32 83, i32 22, i32 23, i32 86, i32 87, i32 24, i32 25, i32 88, i32 89, i32 28, i32 29, i32 92, i32 93, i32 26, i32 27, i32 90, i32 91, i32 30, i32 31, i32 94, i32 95, i32 48, i32 49, i32 112, i32 113, i32 52, i32 53, i32 116, i32 117, i32 50, i32 51, i32 114, i32 115, i32 54, i32 55, i32 118, i32 119, i32 56, i32 57, i32 120, i32 121, i32 60, i32 61, i32 124, i32 125, i32 58, i32 59, i32 122, i32 123, i32 62, i32 63, i32 126, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vshuff_1b: +; CHECK: [[REG1b:r[0-9]+]] = #27 +; CHECK: vshuff(v1,v0,[[REG1b]]) +define <128 x i8> @vshuff_1b(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 64, i32 1, i32 65, i32 4, i32 68, i32 5, i32 69, i32 2, i32 66, i32 3, i32 67, i32 6, i32 70, i32 7, i32 71, i32 8, i32 72, i32 9, i32 73, i32 12, i32 76, i32 13, i32 77, i32 10, i32 74, i32 11, i32 75, i32 14, i32 78, i32 15, i32 79, i32 32, i32 96, i32 33, i32 97, i32 36, i32 100, i32 37, i32 101, i32 34, i32 98, i32 35, i32 99, i32 38, i32 102, i32 39, i32 103, i32 40, i32 104, i32 41, i32 105, i32 44, i32 108, i32 45, i32 109, i32 42, i32 106, i32 43, i32 107, i32 46, i32 110, i32 47, i32 111, i32 16, i32 80, i32 17, i32 81, i32 20, i32 84, i32 21, i32 85, i32 18, i32 82, i32 19, i32 83, i32 22, i32 86, i32 23, i32 87, i32 24, i32 88, i32 25, i32 89, i32 28, i32 92, i32 29, i32 93, i32 26, i32 90, i32 27, i32 91, i32 30, i32 94, i32 31, i32 95, i32 48, i32 112, i32 49, i32 113, i32 52, i32 116, i32 53, i32 117, i32 50, i32 114, i32 51, i32 115, i32 54, i32 118, i32 55, i32 119, i32 56, i32 120, i32 57, i32 121, i32 60, i32 124, i32 61, i32 125, i32 58, i32 122, i32 59, i32 123, i32 62, i32 126, i32 63, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vshuff_1c: +; CHECK: [[REG1c:r[0-9]+]] = #28 +; CHECK: vshuff(v1,v0,[[REG1c]]) +define <128 x i8> @vshuff_1c(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 1, i32 2, i32 3, i32 64, i32 65, i32 66, i32 67, i32 4, i32 5, i32 6, i32 7, i32 68, i32 69, i32 70, i32 71, i32 8, i32 9, i32 10, i32 11, i32 72, i32 73, i32 74, i32 75, i32 12, i32 13, i32 14, i32 15, i32 76, i32 77, i32 78, i32 79, i32 32, i32 33, i32 34, i32 35, i32 96, i32 97, i32 98, i32 99, i32 36, i32 37, i32 38, i32 39, i32 100, i32 101, i32 102, i32 103, i32 40, i32 41, i32 42, i32 43, i32 104, i32 105, i32 106, i32 107, i32 44, i32 45, i32 46, i32 47, i32 108, i32 109, i32 110, i32 111, i32 16, i32 17, i32 18, i32 19, i32 80, i32 81, i32 82, i32 83, i32 20, i32 21, i32 22, i32 23, i32 84, i32 85, i32 86, i32 87, i32 24, i32 25, i32 26, i32 27, i32 88, i32 89, i32 90, i32 91, i32 28, i32 29, i32 30, i32 31, i32 92, i32 93, i32 94, i32 95, i32 48, i32 49, i32 50, i32 51, i32 112, i32 113, i32 114, i32 115, i32 52, i32 53, i32 54, i32 55, i32 116, i32 117, i32 118, i32 119, i32 56, i32 57, i32 58, i32 59, i32 120, i32 121, i32 122, i32 123, i32 60, i32 61, i32 62, i32 63, i32 124, i32 125, i32 126, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vshuff_1d: +; CHECK: [[REG1d:r[0-9]+]] = #29 +; CHECK: vshuff(v1,v0,[[REG1d]]) +define <128 x i8> @vshuff_1d(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 64, i32 2, i32 66, i32 1, i32 65, i32 3, i32 67, i32 4, i32 68, i32 6, i32 70, i32 5, i32 69, i32 7, i32 71, i32 8, i32 72, i32 10, i32 74, i32 9, i32 73, i32 11, i32 75, i32 12, i32 76, i32 14, i32 78, i32 13, i32 77, i32 15, i32 79, i32 32, i32 96, i32 34, i32 98, i32 33, i32 97, i32 35, i32 99, i32 36, i32 100, i32 38, i32 102, i32 37, i32 101, i32 39, i32 103, i32 40, i32 104, i32 42, i32 106, i32 41, i32 105, i32 43, i32 107, i32 44, i32 108, i32 46, i32 110, i32 45, i32 109, i32 47, i32 111, i32 16, i32 80, i32 18, i32 82, i32 17, i32 81, i32 19, i32 83, i32 20, i32 84, i32 22, i32 86, i32 21, i32 85, i32 23, i32 87, i32 24, i32 88, i32 26, i32 90, i32 25, i32 89, i32 27, i32 91, i32 28, i32 92, i32 30, i32 94, i32 29, i32 93, i32 31, i32 95, i32 48, i32 112, i32 50, i32 114, i32 49, i32 113, i32 51, i32 115, i32 52, i32 116, i32 54, i32 118, i32 53, i32 117, i32 55, i32 119, i32 56, i32 120, i32 58, i32 122, i32 57, i32 121, i32 59, i32 123, i32 60, i32 124, i32 62, i32 126, i32 61, i32 125, i32 63, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vshuff_1e: +; CHECK: [[REG1e:r[0-9]+]] = #30 +; CHECK: vshuff(v1,v0,[[REG1e]]) +define <128 x i8> @vshuff_1e(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 1, i32 64, i32 65, i32 2, i32 3, i32 66, i32 67, i32 4, i32 5, i32 68, i32 69, i32 6, i32 7, i32 70, i32 71, i32 8, i32 9, i32 72, i32 73, i32 10, i32 11, i32 74, i32 75, i32 12, i32 13, i32 76, i32 77, i32 14, i32 15, i32 78, i32 79, i32 32, i32 33, i32 96, i32 97, i32 34, i32 35, i32 98, i32 99, i32 36, i32 37, i32 100, i32 101, i32 38, i32 39, i32 102, i32 103, i32 40, i32 41, i32 104, i32 105, i32 42, i32 43, i32 106, i32 107, i32 44, i32 45, i32 108, i32 109, i32 46, i32 47, i32 110, i32 111, i32 16, i32 17, i32 80, i32 81, i32 18, i32 19, i32 82, i32 83, i32 20, i32 21, i32 84, i32 85, i32 22, i32 23, i32 86, i32 87, i32 24, i32 25, i32 88, i32 89, i32 26, i32 27, i32 90, i32 91, i32 28, i32 29, i32 92, i32 93, i32 30, i32 31, i32 94, i32 95, i32 48, i32 49, i32 112, i32 113, i32 50, i32 51, i32 114, i32 115, i32 52, i32 53, i32 116, i32 117, i32 54, i32 55, i32 118, i32 119, i32 56, i32 57, i32 120, i32 121, i32 58, i32 59, i32 122, i32 123, i32 60, i32 61, i32 124, i32 125, i32 62, i32 63, i32 126, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vshuff_1f: +; CHECK: [[REG1f:r[0-9]+]] = #31 +; CHECK: vshuff(v1,v0,[[REG1f]]) +define <128 x i8> @vshuff_1f(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 64, i32 1, i32 65, i32 2, i32 66, i32 3, i32 67, i32 4, i32 68, i32 5, i32 69, i32 6, i32 70, i32 7, i32 71, i32 8, i32 72, i32 9, i32 73, i32 10, i32 74, i32 11, i32 75, i32 12, i32 76, i32 13, i32 77, i32 14, i32 78, i32 15, i32 79, i32 32, i32 96, i32 33, i32 97, i32 34, i32 98, i32 35, i32 99, i32 36, i32 100, i32 37, i32 101, i32 38, i32 102, i32 39, i32 103, i32 40, i32 104, i32 41, i32 105, i32 42, i32 106, i32 43, i32 107, i32 44, i32 108, i32 45, i32 109, i32 46, i32 110, i32 47, i32 111, i32 16, i32 80, i32 17, i32 81, i32 18, i32 82, i32 19, i32 83, i32 20, i32 84, i32 21, i32 85, i32 22, i32 86, i32 23, i32 87, i32 24, i32 88, i32 25, i32 89, i32 26, i32 90, i32 27, i32 91, i32 28, i32 92, i32 29, i32 93, i32 30, i32 94, i32 31, i32 95, i32 48, i32 112, i32 49, i32 113, i32 50, i32 114, i32 51, i32 115, i32 52, i32 116, i32 53, i32 117, i32 54, i32 118, i32 55, i32 119, i32 56, i32 120, i32 57, i32 121, i32 58, i32 122, i32 59, i32 123, i32 60, i32 124, i32 61, i32 125, i32 62, i32 126, i32 63, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vshuff_20: +; CHECK: [[REG20:r[0-9]+]] = #32 +; CHECK: vshuff(v1,v0,[[REG20]]) +define <128 x i8> @vshuff_20(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 64, i32 65, i32 66, i32 67, i32 68, i32 69, i32 70, i32 71, i32 72, i32 73, i32 74, i32 75, i32 76, i32 77, i32 78, i32 79, i32 80, i32 81, i32 82, i32 83, i32 84, i32 85, i32 86, i32 87, i32 88, i32 89, i32 90, i32 91, i32 92, i32 93, i32 94, i32 95, i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 48, i32 49, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63, i32 96, i32 97, i32 98, i32 99, i32 100, i32 101, i32 102, i32 103, i32 104, i32 105, i32 106, i32 107, i32 108, i32 109, i32 110, i32 111, i32 112, i32 113, i32 114, i32 115, i32 116, i32 117, i32 118, i32 119, i32 120, i32 121, i32 122, i32 123, i32 124, i32 125, i32 126, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vshuff_21: +; CHECK: [[REG21:r[0-9]+]] = #33 +; CHECK: vshuff(v1,v0,[[REG21]]) +define <128 x i8> @vshuff_21(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 64, i32 2, i32 66, i32 4, i32 68, i32 6, i32 70, i32 8, i32 72, i32 10, i32 74, i32 12, i32 76, i32 14, i32 78, i32 16, i32 80, i32 18, i32 82, i32 20, i32 84, i32 22, i32 86, i32 24, i32 88, i32 26, i32 90, i32 28, i32 92, i32 30, i32 94, i32 1, i32 65, i32 3, i32 67, i32 5, i32 69, i32 7, i32 71, i32 9, i32 73, i32 11, i32 75, i32 13, i32 77, i32 15, i32 79, i32 17, i32 81, i32 19, i32 83, i32 21, i32 85, i32 23, i32 87, i32 25, i32 89, i32 27, i32 91, i32 29, i32 93, i32 31, i32 95, i32 32, i32 96, i32 34, i32 98, i32 36, i32 100, i32 38, i32 102, i32 40, i32 104, i32 42, i32 106, i32 44, i32 108, i32 46, i32 110, i32 48, i32 112, i32 50, i32 114, i32 52, i32 116, i32 54, i32 118, i32 56, i32 120, i32 58, i32 122, i32 60, i32 124, i32 62, i32 126, i32 33, i32 97, i32 35, i32 99, i32 37, i32 101, i32 39, i32 103, i32 41, i32 105, i32 43, i32 107, i32 45, i32 109, i32 47, i32 111, i32 49, i32 113, i32 51, i32 115, i32 53, i32 117, i32 55, i32 119, i32 57, i32 121, i32 59, i32 123, i32 61, i32 125, i32 63, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vshuff_22: +; CHECK: [[REG22:r[0-9]+]] = #34 +; CHECK: vshuff(v1,v0,[[REG22]]) +define <128 x i8> @vshuff_22(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 1, i32 64, i32 65, i32 4, i32 5, i32 68, i32 69, i32 8, i32 9, i32 72, i32 73, i32 12, i32 13, i32 76, i32 77, i32 16, i32 17, i32 80, i32 81, i32 20, i32 21, i32 84, i32 85, i32 24, i32 25, i32 88, i32 89, i32 28, i32 29, i32 92, i32 93, i32 2, i32 3, i32 66, i32 67, i32 6, i32 7, i32 70, i32 71, i32 10, i32 11, i32 74, i32 75, i32 14, i32 15, i32 78, i32 79, i32 18, i32 19, i32 82, i32 83, i32 22, i32 23, i32 86, i32 87, i32 26, i32 27, i32 90, i32 91, i32 30, i32 31, i32 94, i32 95, i32 32, i32 33, i32 96, i32 97, i32 36, i32 37, i32 100, i32 101, i32 40, i32 41, i32 104, i32 105, i32 44, i32 45, i32 108, i32 109, i32 48, i32 49, i32 112, i32 113, i32 52, i32 53, i32 116, i32 117, i32 56, i32 57, i32 120, i32 121, i32 60, i32 61, i32 124, i32 125, i32 34, i32 35, i32 98, i32 99, i32 38, i32 39, i32 102, i32 103, i32 42, i32 43, i32 106, i32 107, i32 46, i32 47, i32 110, i32 111, i32 50, i32 51, i32 114, i32 115, i32 54, i32 55, i32 118, i32 119, i32 58, i32 59, i32 122, i32 123, i32 62, i32 63, i32 126, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vshuff_23: +; CHECK: [[REG23:r[0-9]+]] = #35 +; CHECK: vshuff(v1,v0,[[REG23]]) +define <128 x i8> @vshuff_23(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 64, i32 1, i32 65, i32 4, i32 68, i32 5, i32 69, i32 8, i32 72, i32 9, i32 73, i32 12, i32 76, i32 13, i32 77, i32 16, i32 80, i32 17, i32 81, i32 20, i32 84, i32 21, i32 85, i32 24, i32 88, i32 25, i32 89, i32 28, i32 92, i32 29, i32 93, i32 2, i32 66, i32 3, i32 67, i32 6, i32 70, i32 7, i32 71, i32 10, i32 74, i32 11, i32 75, i32 14, i32 78, i32 15, i32 79, i32 18, i32 82, i32 19, i32 83, i32 22, i32 86, i32 23, i32 87, i32 26, i32 90, i32 27, i32 91, i32 30, i32 94, i32 31, i32 95, i32 32, i32 96, i32 33, i32 97, i32 36, i32 100, i32 37, i32 101, i32 40, i32 104, i32 41, i32 105, i32 44, i32 108, i32 45, i32 109, i32 48, i32 112, i32 49, i32 113, i32 52, i32 116, i32 53, i32 117, i32 56, i32 120, i32 57, i32 121, i32 60, i32 124, i32 61, i32 125, i32 34, i32 98, i32 35, i32 99, i32 38, i32 102, i32 39, i32 103, i32 42, i32 106, i32 43, i32 107, i32 46, i32 110, i32 47, i32 111, i32 50, i32 114, i32 51, i32 115, i32 54, i32 118, i32 55, i32 119, i32 58, i32 122, i32 59, i32 123, i32 62, i32 126, i32 63, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vshuff_24: +; CHECK: [[REG24:r[0-9]+]] = #36 +; CHECK: vshuff(v1,v0,[[REG24]]) +define <128 x i8> @vshuff_24(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 1, i32 2, i32 3, i32 64, i32 65, i32 66, i32 67, i32 8, i32 9, i32 10, i32 11, i32 72, i32 73, i32 74, i32 75, i32 16, i32 17, i32 18, i32 19, i32 80, i32 81, i32 82, i32 83, i32 24, i32 25, i32 26, i32 27, i32 88, i32 89, i32 90, i32 91, i32 4, i32 5, i32 6, i32 7, i32 68, i32 69, i32 70, i32 71, i32 12, i32 13, i32 14, i32 15, i32 76, i32 77, i32 78, i32 79, i32 20, i32 21, i32 22, i32 23, i32 84, i32 85, i32 86, i32 87, i32 28, i32 29, i32 30, i32 31, i32 92, i32 93, i32 94, i32 95, i32 32, i32 33, i32 34, i32 35, i32 96, i32 97, i32 98, i32 99, i32 40, i32 41, i32 42, i32 43, i32 104, i32 105, i32 106, i32 107, i32 48, i32 49, i32 50, i32 51, i32 112, i32 113, i32 114, i32 115, i32 56, i32 57, i32 58, i32 59, i32 120, i32 121, i32 122, i32 123, i32 36, i32 37, i32 38, i32 39, i32 100, i32 101, i32 102, i32 103, i32 44, i32 45, i32 46, i32 47, i32 108, i32 109, i32 110, i32 111, i32 52, i32 53, i32 54, i32 55, i32 116, i32 117, i32 118, i32 119, i32 60, i32 61, i32 62, i32 63, i32 124, i32 125, i32 126, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vshuff_25: +; CHECK: [[REG25:r[0-9]+]] = #37 +; CHECK: vshuff(v1,v0,[[REG25]]) +define <128 x i8> @vshuff_25(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 64, i32 2, i32 66, i32 1, i32 65, i32 3, i32 67, i32 8, i32 72, i32 10, i32 74, i32 9, i32 73, i32 11, i32 75, i32 16, i32 80, i32 18, i32 82, i32 17, i32 81, i32 19, i32 83, i32 24, i32 88, i32 26, i32 90, i32 25, i32 89, i32 27, i32 91, i32 4, i32 68, i32 6, i32 70, i32 5, i32 69, i32 7, i32 71, i32 12, i32 76, i32 14, i32 78, i32 13, i32 77, i32 15, i32 79, i32 20, i32 84, i32 22, i32 86, i32 21, i32 85, i32 23, i32 87, i32 28, i32 92, i32 30, i32 94, i32 29, i32 93, i32 31, i32 95, i32 32, i32 96, i32 34, i32 98, i32 33, i32 97, i32 35, i32 99, i32 40, i32 104, i32 42, i32 106, i32 41, i32 105, i32 43, i32 107, i32 48, i32 112, i32 50, i32 114, i32 49, i32 113, i32 51, i32 115, i32 56, i32 120, i32 58, i32 122, i32 57, i32 121, i32 59, i32 123, i32 36, i32 100, i32 38, i32 102, i32 37, i32 101, i32 39, i32 103, i32 44, i32 108, i32 46, i32 110, i32 45, i32 109, i32 47, i32 111, i32 52, i32 116, i32 54, i32 118, i32 53, i32 117, i32 55, i32 119, i32 60, i32 124, i32 62, i32 126, i32 61, i32 125, i32 63, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vshuff_26: +; CHECK: [[REG26:r[0-9]+]] = #38 +; CHECK: vshuff(v1,v0,[[REG26]]) +define <128 x i8> @vshuff_26(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 1, i32 64, i32 65, i32 2, i32 3, i32 66, i32 67, i32 8, i32 9, i32 72, i32 73, i32 10, i32 11, i32 74, i32 75, i32 16, i32 17, i32 80, i32 81, i32 18, i32 19, i32 82, i32 83, i32 24, i32 25, i32 88, i32 89, i32 26, i32 27, i32 90, i32 91, i32 4, i32 5, i32 68, i32 69, i32 6, i32 7, i32 70, i32 71, i32 12, i32 13, i32 76, i32 77, i32 14, i32 15, i32 78, i32 79, i32 20, i32 21, i32 84, i32 85, i32 22, i32 23, i32 86, i32 87, i32 28, i32 29, i32 92, i32 93, i32 30, i32 31, i32 94, i32 95, i32 32, i32 33, i32 96, i32 97, i32 34, i32 35, i32 98, i32 99, i32 40, i32 41, i32 104, i32 105, i32 42, i32 43, i32 106, i32 107, i32 48, i32 49, i32 112, i32 113, i32 50, i32 51, i32 114, i32 115, i32 56, i32 57, i32 120, i32 121, i32 58, i32 59, i32 122, i32 123, i32 36, i32 37, i32 100, i32 101, i32 38, i32 39, i32 102, i32 103, i32 44, i32 45, i32 108, i32 109, i32 46, i32 47, i32 110, i32 111, i32 52, i32 53, i32 116, i32 117, i32 54, i32 55, i32 118, i32 119, i32 60, i32 61, i32 124, i32 125, i32 62, i32 63, i32 126, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vshuff_27: +; CHECK: [[REG27:r[0-9]+]] = #39 +; CHECK: vshuff(v1,v0,[[REG27]]) +define <128 x i8> @vshuff_27(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 64, i32 1, i32 65, i32 2, i32 66, i32 3, i32 67, i32 8, i32 72, i32 9, i32 73, i32 10, i32 74, i32 11, i32 75, i32 16, i32 80, i32 17, i32 81, i32 18, i32 82, i32 19, i32 83, i32 24, i32 88, i32 25, i32 89, i32 26, i32 90, i32 27, i32 91, i32 4, i32 68, i32 5, i32 69, i32 6, i32 70, i32 7, i32 71, i32 12, i32 76, i32 13, i32 77, i32 14, i32 78, i32 15, i32 79, i32 20, i32 84, i32 21, i32 85, i32 22, i32 86, i32 23, i32 87, i32 28, i32 92, i32 29, i32 93, i32 30, i32 94, i32 31, i32 95, i32 32, i32 96, i32 33, i32 97, i32 34, i32 98, i32 35, i32 99, i32 40, i32 104, i32 41, i32 105, i32 42, i32 106, i32 43, i32 107, i32 48, i32 112, i32 49, i32 113, i32 50, i32 114, i32 51, i32 115, i32 56, i32 120, i32 57, i32 121, i32 58, i32 122, i32 59, i32 123, i32 36, i32 100, i32 37, i32 101, i32 38, i32 102, i32 39, i32 103, i32 44, i32 108, i32 45, i32 109, i32 46, i32 110, i32 47, i32 111, i32 52, i32 116, i32 53, i32 117, i32 54, i32 118, i32 55, i32 119, i32 60, i32 124, i32 61, i32 125, i32 62, i32 126, i32 63, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vshuff_28: +; CHECK: [[REG28:r[0-9]+]] = #40 +; CHECK: vshuff(v1,v0,[[REG28]]) +define <128 x i8> @vshuff_28(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 64, i32 65, i32 66, i32 67, i32 68, i32 69, i32 70, i32 71, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 80, i32 81, i32 82, i32 83, i32 84, i32 85, i32 86, i32 87, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 72, i32 73, i32 74, i32 75, i32 76, i32 77, i32 78, i32 79, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 88, i32 89, i32 90, i32 91, i32 92, i32 93, i32 94, i32 95, i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 96, i32 97, i32 98, i32 99, i32 100, i32 101, i32 102, i32 103, i32 48, i32 49, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 112, i32 113, i32 114, i32 115, i32 116, i32 117, i32 118, i32 119, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 104, i32 105, i32 106, i32 107, i32 108, i32 109, i32 110, i32 111, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63, i32 120, i32 121, i32 122, i32 123, i32 124, i32 125, i32 126, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vshuff_29: +; CHECK: [[REG29:r[0-9]+]] = #41 +; CHECK: vshuff(v1,v0,[[REG29]]) +define <128 x i8> @vshuff_29(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 64, i32 2, i32 66, i32 4, i32 68, i32 6, i32 70, i32 1, i32 65, i32 3, i32 67, i32 5, i32 69, i32 7, i32 71, i32 16, i32 80, i32 18, i32 82, i32 20, i32 84, i32 22, i32 86, i32 17, i32 81, i32 19, i32 83, i32 21, i32 85, i32 23, i32 87, i32 8, i32 72, i32 10, i32 74, i32 12, i32 76, i32 14, i32 78, i32 9, i32 73, i32 11, i32 75, i32 13, i32 77, i32 15, i32 79, i32 24, i32 88, i32 26, i32 90, i32 28, i32 92, i32 30, i32 94, i32 25, i32 89, i32 27, i32 91, i32 29, i32 93, i32 31, i32 95, i32 32, i32 96, i32 34, i32 98, i32 36, i32 100, i32 38, i32 102, i32 33, i32 97, i32 35, i32 99, i32 37, i32 101, i32 39, i32 103, i32 48, i32 112, i32 50, i32 114, i32 52, i32 116, i32 54, i32 118, i32 49, i32 113, i32 51, i32 115, i32 53, i32 117, i32 55, i32 119, i32 40, i32 104, i32 42, i32 106, i32 44, i32 108, i32 46, i32 110, i32 41, i32 105, i32 43, i32 107, i32 45, i32 109, i32 47, i32 111, i32 56, i32 120, i32 58, i32 122, i32 60, i32 124, i32 62, i32 126, i32 57, i32 121, i32 59, i32 123, i32 61, i32 125, i32 63, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vshuff_2a: +; CHECK: [[REG2a:r[0-9]+]] = #42 +; CHECK: vshuff(v1,v0,[[REG2a]]) +define <128 x i8> @vshuff_2a(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 1, i32 64, i32 65, i32 4, i32 5, i32 68, i32 69, i32 2, i32 3, i32 66, i32 67, i32 6, i32 7, i32 70, i32 71, i32 16, i32 17, i32 80, i32 81, i32 20, i32 21, i32 84, i32 85, i32 18, i32 19, i32 82, i32 83, i32 22, i32 23, i32 86, i32 87, i32 8, i32 9, i32 72, i32 73, i32 12, i32 13, i32 76, i32 77, i32 10, i32 11, i32 74, i32 75, i32 14, i32 15, i32 78, i32 79, i32 24, i32 25, i32 88, i32 89, i32 28, i32 29, i32 92, i32 93, i32 26, i32 27, i32 90, i32 91, i32 30, i32 31, i32 94, i32 95, i32 32, i32 33, i32 96, i32 97, i32 36, i32 37, i32 100, i32 101, i32 34, i32 35, i32 98, i32 99, i32 38, i32 39, i32 102, i32 103, i32 48, i32 49, i32 112, i32 113, i32 52, i32 53, i32 116, i32 117, i32 50, i32 51, i32 114, i32 115, i32 54, i32 55, i32 118, i32 119, i32 40, i32 41, i32 104, i32 105, i32 44, i32 45, i32 108, i32 109, i32 42, i32 43, i32 106, i32 107, i32 46, i32 47, i32 110, i32 111, i32 56, i32 57, i32 120, i32 121, i32 60, i32 61, i32 124, i32 125, i32 58, i32 59, i32 122, i32 123, i32 62, i32 63, i32 126, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vshuff_2b: +; CHECK: [[REG2b:r[0-9]+]] = #43 +; CHECK: vshuff(v1,v0,[[REG2b]]) +define <128 x i8> @vshuff_2b(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 64, i32 1, i32 65, i32 4, i32 68, i32 5, i32 69, i32 2, i32 66, i32 3, i32 67, i32 6, i32 70, i32 7, i32 71, i32 16, i32 80, i32 17, i32 81, i32 20, i32 84, i32 21, i32 85, i32 18, i32 82, i32 19, i32 83, i32 22, i32 86, i32 23, i32 87, i32 8, i32 72, i32 9, i32 73, i32 12, i32 76, i32 13, i32 77, i32 10, i32 74, i32 11, i32 75, i32 14, i32 78, i32 15, i32 79, i32 24, i32 88, i32 25, i32 89, i32 28, i32 92, i32 29, i32 93, i32 26, i32 90, i32 27, i32 91, i32 30, i32 94, i32 31, i32 95, i32 32, i32 96, i32 33, i32 97, i32 36, i32 100, i32 37, i32 101, i32 34, i32 98, i32 35, i32 99, i32 38, i32 102, i32 39, i32 103, i32 48, i32 112, i32 49, i32 113, i32 52, i32 116, i32 53, i32 117, i32 50, i32 114, i32 51, i32 115, i32 54, i32 118, i32 55, i32 119, i32 40, i32 104, i32 41, i32 105, i32 44, i32 108, i32 45, i32 109, i32 42, i32 106, i32 43, i32 107, i32 46, i32 110, i32 47, i32 111, i32 56, i32 120, i32 57, i32 121, i32 60, i32 124, i32 61, i32 125, i32 58, i32 122, i32 59, i32 123, i32 62, i32 126, i32 63, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vshuff_2c: +; CHECK: [[REG2c:r[0-9]+]] = #44 +; CHECK: vshuff(v1,v0,[[REG2c]]) +define <128 x i8> @vshuff_2c(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 1, i32 2, i32 3, i32 64, i32 65, i32 66, i32 67, i32 4, i32 5, i32 6, i32 7, i32 68, i32 69, i32 70, i32 71, i32 16, i32 17, i32 18, i32 19, i32 80, i32 81, i32 82, i32 83, i32 20, i32 21, i32 22, i32 23, i32 84, i32 85, i32 86, i32 87, i32 8, i32 9, i32 10, i32 11, i32 72, i32 73, i32 74, i32 75, i32 12, i32 13, i32 14, i32 15, i32 76, i32 77, i32 78, i32 79, i32 24, i32 25, i32 26, i32 27, i32 88, i32 89, i32 90, i32 91, i32 28, i32 29, i32 30, i32 31, i32 92, i32 93, i32 94, i32 95, i32 32, i32 33, i32 34, i32 35, i32 96, i32 97, i32 98, i32 99, i32 36, i32 37, i32 38, i32 39, i32 100, i32 101, i32 102, i32 103, i32 48, i32 49, i32 50, i32 51, i32 112, i32 113, i32 114, i32 115, i32 52, i32 53, i32 54, i32 55, i32 116, i32 117, i32 118, i32 119, i32 40, i32 41, i32 42, i32 43, i32 104, i32 105, i32 106, i32 107, i32 44, i32 45, i32 46, i32 47, i32 108, i32 109, i32 110, i32 111, i32 56, i32 57, i32 58, i32 59, i32 120, i32 121, i32 122, i32 123, i32 60, i32 61, i32 62, i32 63, i32 124, i32 125, i32 126, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vshuff_2d: +; CHECK: [[REG2d:r[0-9]+]] = #45 +; CHECK: vshuff(v1,v0,[[REG2d]]) +define <128 x i8> @vshuff_2d(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 64, i32 2, i32 66, i32 1, i32 65, i32 3, i32 67, i32 4, i32 68, i32 6, i32 70, i32 5, i32 69, i32 7, i32 71, i32 16, i32 80, i32 18, i32 82, i32 17, i32 81, i32 19, i32 83, i32 20, i32 84, i32 22, i32 86, i32 21, i32 85, i32 23, i32 87, i32 8, i32 72, i32 10, i32 74, i32 9, i32 73, i32 11, i32 75, i32 12, i32 76, i32 14, i32 78, i32 13, i32 77, i32 15, i32 79, i32 24, i32 88, i32 26, i32 90, i32 25, i32 89, i32 27, i32 91, i32 28, i32 92, i32 30, i32 94, i32 29, i32 93, i32 31, i32 95, i32 32, i32 96, i32 34, i32 98, i32 33, i32 97, i32 35, i32 99, i32 36, i32 100, i32 38, i32 102, i32 37, i32 101, i32 39, i32 103, i32 48, i32 112, i32 50, i32 114, i32 49, i32 113, i32 51, i32 115, i32 52, i32 116, i32 54, i32 118, i32 53, i32 117, i32 55, i32 119, i32 40, i32 104, i32 42, i32 106, i32 41, i32 105, i32 43, i32 107, i32 44, i32 108, i32 46, i32 110, i32 45, i32 109, i32 47, i32 111, i32 56, i32 120, i32 58, i32 122, i32 57, i32 121, i32 59, i32 123, i32 60, i32 124, i32 62, i32 126, i32 61, i32 125, i32 63, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vshuff_2e: +; CHECK: [[REG2e:r[0-9]+]] = #46 +; CHECK: vshuff(v1,v0,[[REG2e]]) +define <128 x i8> @vshuff_2e(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 1, i32 64, i32 65, i32 2, i32 3, i32 66, i32 67, i32 4, i32 5, i32 68, i32 69, i32 6, i32 7, i32 70, i32 71, i32 16, i32 17, i32 80, i32 81, i32 18, i32 19, i32 82, i32 83, i32 20, i32 21, i32 84, i32 85, i32 22, i32 23, i32 86, i32 87, i32 8, i32 9, i32 72, i32 73, i32 10, i32 11, i32 74, i32 75, i32 12, i32 13, i32 76, i32 77, i32 14, i32 15, i32 78, i32 79, i32 24, i32 25, i32 88, i32 89, i32 26, i32 27, i32 90, i32 91, i32 28, i32 29, i32 92, i32 93, i32 30, i32 31, i32 94, i32 95, i32 32, i32 33, i32 96, i32 97, i32 34, i32 35, i32 98, i32 99, i32 36, i32 37, i32 100, i32 101, i32 38, i32 39, i32 102, i32 103, i32 48, i32 49, i32 112, i32 113, i32 50, i32 51, i32 114, i32 115, i32 52, i32 53, i32 116, i32 117, i32 54, i32 55, i32 118, i32 119, i32 40, i32 41, i32 104, i32 105, i32 42, i32 43, i32 106, i32 107, i32 44, i32 45, i32 108, i32 109, i32 46, i32 47, i32 110, i32 111, i32 56, i32 57, i32 120, i32 121, i32 58, i32 59, i32 122, i32 123, i32 60, i32 61, i32 124, i32 125, i32 62, i32 63, i32 126, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vshuff_2f: +; CHECK: [[REG2f:r[0-9]+]] = #47 +; CHECK: vshuff(v1,v0,[[REG2f]]) +define <128 x i8> @vshuff_2f(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 64, i32 1, i32 65, i32 2, i32 66, i32 3, i32 67, i32 4, i32 68, i32 5, i32 69, i32 6, i32 70, i32 7, i32 71, i32 16, i32 80, i32 17, i32 81, i32 18, i32 82, i32 19, i32 83, i32 20, i32 84, i32 21, i32 85, i32 22, i32 86, i32 23, i32 87, i32 8, i32 72, i32 9, i32 73, i32 10, i32 74, i32 11, i32 75, i32 12, i32 76, i32 13, i32 77, i32 14, i32 78, i32 15, i32 79, i32 24, i32 88, i32 25, i32 89, i32 26, i32 90, i32 27, i32 91, i32 28, i32 92, i32 29, i32 93, i32 30, i32 94, i32 31, i32 95, i32 32, i32 96, i32 33, i32 97, i32 34, i32 98, i32 35, i32 99, i32 36, i32 100, i32 37, i32 101, i32 38, i32 102, i32 39, i32 103, i32 48, i32 112, i32 49, i32 113, i32 50, i32 114, i32 51, i32 115, i32 52, i32 116, i32 53, i32 117, i32 54, i32 118, i32 55, i32 119, i32 40, i32 104, i32 41, i32 105, i32 42, i32 106, i32 43, i32 107, i32 44, i32 108, i32 45, i32 109, i32 46, i32 110, i32 47, i32 111, i32 56, i32 120, i32 57, i32 121, i32 58, i32 122, i32 59, i32 123, i32 60, i32 124, i32 61, i32 125, i32 62, i32 126, i32 63, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vshuff_30: +; CHECK: [[REG30:r[0-9]+]] = #48 +; CHECK: vshuff(v1,v0,[[REG30]]) +define <128 x i8> @vshuff_30(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 64, i32 65, i32 66, i32 67, i32 68, i32 69, i32 70, i32 71, i32 72, i32 73, i32 74, i32 75, i32 76, i32 77, i32 78, i32 79, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 80, i32 81, i32 82, i32 83, i32 84, i32 85, i32 86, i32 87, i32 88, i32 89, i32 90, i32 91, i32 92, i32 93, i32 94, i32 95, i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 96, i32 97, i32 98, i32 99, i32 100, i32 101, i32 102, i32 103, i32 104, i32 105, i32 106, i32 107, i32 108, i32 109, i32 110, i32 111, i32 48, i32 49, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63, i32 112, i32 113, i32 114, i32 115, i32 116, i32 117, i32 118, i32 119, i32 120, i32 121, i32 122, i32 123, i32 124, i32 125, i32 126, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vshuff_31: +; CHECK: [[REG31:r[0-9]+]] = #49 +; CHECK: vshuff(v1,v0,[[REG31]]) +define <128 x i8> @vshuff_31(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 64, i32 2, i32 66, i32 4, i32 68, i32 6, i32 70, i32 8, i32 72, i32 10, i32 74, i32 12, i32 76, i32 14, i32 78, i32 1, i32 65, i32 3, i32 67, i32 5, i32 69, i32 7, i32 71, i32 9, i32 73, i32 11, i32 75, i32 13, i32 77, i32 15, i32 79, i32 16, i32 80, i32 18, i32 82, i32 20, i32 84, i32 22, i32 86, i32 24, i32 88, i32 26, i32 90, i32 28, i32 92, i32 30, i32 94, i32 17, i32 81, i32 19, i32 83, i32 21, i32 85, i32 23, i32 87, i32 25, i32 89, i32 27, i32 91, i32 29, i32 93, i32 31, i32 95, i32 32, i32 96, i32 34, i32 98, i32 36, i32 100, i32 38, i32 102, i32 40, i32 104, i32 42, i32 106, i32 44, i32 108, i32 46, i32 110, i32 33, i32 97, i32 35, i32 99, i32 37, i32 101, i32 39, i32 103, i32 41, i32 105, i32 43, i32 107, i32 45, i32 109, i32 47, i32 111, i32 48, i32 112, i32 50, i32 114, i32 52, i32 116, i32 54, i32 118, i32 56, i32 120, i32 58, i32 122, i32 60, i32 124, i32 62, i32 126, i32 49, i32 113, i32 51, i32 115, i32 53, i32 117, i32 55, i32 119, i32 57, i32 121, i32 59, i32 123, i32 61, i32 125, i32 63, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vshuff_32: +; CHECK: [[REG32:r[0-9]+]] = #50 +; CHECK: vshuff(v1,v0,[[REG32]]) +define <128 x i8> @vshuff_32(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 1, i32 64, i32 65, i32 4, i32 5, i32 68, i32 69, i32 8, i32 9, i32 72, i32 73, i32 12, i32 13, i32 76, i32 77, i32 2, i32 3, i32 66, i32 67, i32 6, i32 7, i32 70, i32 71, i32 10, i32 11, i32 74, i32 75, i32 14, i32 15, i32 78, i32 79, i32 16, i32 17, i32 80, i32 81, i32 20, i32 21, i32 84, i32 85, i32 24, i32 25, i32 88, i32 89, i32 28, i32 29, i32 92, i32 93, i32 18, i32 19, i32 82, i32 83, i32 22, i32 23, i32 86, i32 87, i32 26, i32 27, i32 90, i32 91, i32 30, i32 31, i32 94, i32 95, i32 32, i32 33, i32 96, i32 97, i32 36, i32 37, i32 100, i32 101, i32 40, i32 41, i32 104, i32 105, i32 44, i32 45, i32 108, i32 109, i32 34, i32 35, i32 98, i32 99, i32 38, i32 39, i32 102, i32 103, i32 42, i32 43, i32 106, i32 107, i32 46, i32 47, i32 110, i32 111, i32 48, i32 49, i32 112, i32 113, i32 52, i32 53, i32 116, i32 117, i32 56, i32 57, i32 120, i32 121, i32 60, i32 61, i32 124, i32 125, i32 50, i32 51, i32 114, i32 115, i32 54, i32 55, i32 118, i32 119, i32 58, i32 59, i32 122, i32 123, i32 62, i32 63, i32 126, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vshuff_33: +; CHECK: [[REG33:r[0-9]+]] = #51 +; CHECK: vshuff(v1,v0,[[REG33]]) +define <128 x i8> @vshuff_33(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 64, i32 1, i32 65, i32 4, i32 68, i32 5, i32 69, i32 8, i32 72, i32 9, i32 73, i32 12, i32 76, i32 13, i32 77, i32 2, i32 66, i32 3, i32 67, i32 6, i32 70, i32 7, i32 71, i32 10, i32 74, i32 11, i32 75, i32 14, i32 78, i32 15, i32 79, i32 16, i32 80, i32 17, i32 81, i32 20, i32 84, i32 21, i32 85, i32 24, i32 88, i32 25, i32 89, i32 28, i32 92, i32 29, i32 93, i32 18, i32 82, i32 19, i32 83, i32 22, i32 86, i32 23, i32 87, i32 26, i32 90, i32 27, i32 91, i32 30, i32 94, i32 31, i32 95, i32 32, i32 96, i32 33, i32 97, i32 36, i32 100, i32 37, i32 101, i32 40, i32 104, i32 41, i32 105, i32 44, i32 108, i32 45, i32 109, i32 34, i32 98, i32 35, i32 99, i32 38, i32 102, i32 39, i32 103, i32 42, i32 106, i32 43, i32 107, i32 46, i32 110, i32 47, i32 111, i32 48, i32 112, i32 49, i32 113, i32 52, i32 116, i32 53, i32 117, i32 56, i32 120, i32 57, i32 121, i32 60, i32 124, i32 61, i32 125, i32 50, i32 114, i32 51, i32 115, i32 54, i32 118, i32 55, i32 119, i32 58, i32 122, i32 59, i32 123, i32 62, i32 126, i32 63, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vshuff_34: +; CHECK: [[REG34:r[0-9]+]] = #52 +; CHECK: vshuff(v1,v0,[[REG34]]) +define <128 x i8> @vshuff_34(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 1, i32 2, i32 3, i32 64, i32 65, i32 66, i32 67, i32 8, i32 9, i32 10, i32 11, i32 72, i32 73, i32 74, i32 75, i32 4, i32 5, i32 6, i32 7, i32 68, i32 69, i32 70, i32 71, i32 12, i32 13, i32 14, i32 15, i32 76, i32 77, i32 78, i32 79, i32 16, i32 17, i32 18, i32 19, i32 80, i32 81, i32 82, i32 83, i32 24, i32 25, i32 26, i32 27, i32 88, i32 89, i32 90, i32 91, i32 20, i32 21, i32 22, i32 23, i32 84, i32 85, i32 86, i32 87, i32 28, i32 29, i32 30, i32 31, i32 92, i32 93, i32 94, i32 95, i32 32, i32 33, i32 34, i32 35, i32 96, i32 97, i32 98, i32 99, i32 40, i32 41, i32 42, i32 43, i32 104, i32 105, i32 106, i32 107, i32 36, i32 37, i32 38, i32 39, i32 100, i32 101, i32 102, i32 103, i32 44, i32 45, i32 46, i32 47, i32 108, i32 109, i32 110, i32 111, i32 48, i32 49, i32 50, i32 51, i32 112, i32 113, i32 114, i32 115, i32 56, i32 57, i32 58, i32 59, i32 120, i32 121, i32 122, i32 123, i32 52, i32 53, i32 54, i32 55, i32 116, i32 117, i32 118, i32 119, i32 60, i32 61, i32 62, i32 63, i32 124, i32 125, i32 126, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vshuff_35: +; CHECK: [[REG35:r[0-9]+]] = #53 +; CHECK: vshuff(v1,v0,[[REG35]]) +define <128 x i8> @vshuff_35(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 64, i32 2, i32 66, i32 1, i32 65, i32 3, i32 67, i32 8, i32 72, i32 10, i32 74, i32 9, i32 73, i32 11, i32 75, i32 4, i32 68, i32 6, i32 70, i32 5, i32 69, i32 7, i32 71, i32 12, i32 76, i32 14, i32 78, i32 13, i32 77, i32 15, i32 79, i32 16, i32 80, i32 18, i32 82, i32 17, i32 81, i32 19, i32 83, i32 24, i32 88, i32 26, i32 90, i32 25, i32 89, i32 27, i32 91, i32 20, i32 84, i32 22, i32 86, i32 21, i32 85, i32 23, i32 87, i32 28, i32 92, i32 30, i32 94, i32 29, i32 93, i32 31, i32 95, i32 32, i32 96, i32 34, i32 98, i32 33, i32 97, i32 35, i32 99, i32 40, i32 104, i32 42, i32 106, i32 41, i32 105, i32 43, i32 107, i32 36, i32 100, i32 38, i32 102, i32 37, i32 101, i32 39, i32 103, i32 44, i32 108, i32 46, i32 110, i32 45, i32 109, i32 47, i32 111, i32 48, i32 112, i32 50, i32 114, i32 49, i32 113, i32 51, i32 115, i32 56, i32 120, i32 58, i32 122, i32 57, i32 121, i32 59, i32 123, i32 52, i32 116, i32 54, i32 118, i32 53, i32 117, i32 55, i32 119, i32 60, i32 124, i32 62, i32 126, i32 61, i32 125, i32 63, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vshuff_36: +; CHECK: [[REG36:r[0-9]+]] = #54 +; CHECK: vshuff(v1,v0,[[REG36]]) +define <128 x i8> @vshuff_36(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 1, i32 64, i32 65, i32 2, i32 3, i32 66, i32 67, i32 8, i32 9, i32 72, i32 73, i32 10, i32 11, i32 74, i32 75, i32 4, i32 5, i32 68, i32 69, i32 6, i32 7, i32 70, i32 71, i32 12, i32 13, i32 76, i32 77, i32 14, i32 15, i32 78, i32 79, i32 16, i32 17, i32 80, i32 81, i32 18, i32 19, i32 82, i32 83, i32 24, i32 25, i32 88, i32 89, i32 26, i32 27, i32 90, i32 91, i32 20, i32 21, i32 84, i32 85, i32 22, i32 23, i32 86, i32 87, i32 28, i32 29, i32 92, i32 93, i32 30, i32 31, i32 94, i32 95, i32 32, i32 33, i32 96, i32 97, i32 34, i32 35, i32 98, i32 99, i32 40, i32 41, i32 104, i32 105, i32 42, i32 43, i32 106, i32 107, i32 36, i32 37, i32 100, i32 101, i32 38, i32 39, i32 102, i32 103, i32 44, i32 45, i32 108, i32 109, i32 46, i32 47, i32 110, i32 111, i32 48, i32 49, i32 112, i32 113, i32 50, i32 51, i32 114, i32 115, i32 56, i32 57, i32 120, i32 121, i32 58, i32 59, i32 122, i32 123, i32 52, i32 53, i32 116, i32 117, i32 54, i32 55, i32 118, i32 119, i32 60, i32 61, i32 124, i32 125, i32 62, i32 63, i32 126, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vshuff_37: +; CHECK: [[REG37:r[0-9]+]] = #55 +; CHECK: vshuff(v1,v0,[[REG37]]) +define <128 x i8> @vshuff_37(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 64, i32 1, i32 65, i32 2, i32 66, i32 3, i32 67, i32 8, i32 72, i32 9, i32 73, i32 10, i32 74, i32 11, i32 75, i32 4, i32 68, i32 5, i32 69, i32 6, i32 70, i32 7, i32 71, i32 12, i32 76, i32 13, i32 77, i32 14, i32 78, i32 15, i32 79, i32 16, i32 80, i32 17, i32 81, i32 18, i32 82, i32 19, i32 83, i32 24, i32 88, i32 25, i32 89, i32 26, i32 90, i32 27, i32 91, i32 20, i32 84, i32 21, i32 85, i32 22, i32 86, i32 23, i32 87, i32 28, i32 92, i32 29, i32 93, i32 30, i32 94, i32 31, i32 95, i32 32, i32 96, i32 33, i32 97, i32 34, i32 98, i32 35, i32 99, i32 40, i32 104, i32 41, i32 105, i32 42, i32 106, i32 43, i32 107, i32 36, i32 100, i32 37, i32 101, i32 38, i32 102, i32 39, i32 103, i32 44, i32 108, i32 45, i32 109, i32 46, i32 110, i32 47, i32 111, i32 48, i32 112, i32 49, i32 113, i32 50, i32 114, i32 51, i32 115, i32 56, i32 120, i32 57, i32 121, i32 58, i32 122, i32 59, i32 123, i32 52, i32 116, i32 53, i32 117, i32 54, i32 118, i32 55, i32 119, i32 60, i32 124, i32 61, i32 125, i32 62, i32 126, i32 63, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vshuff_38: +; CHECK: [[REG38:r[0-9]+]] = #56 +; CHECK: vshuff(v1,v0,[[REG38]]) +define <128 x i8> @vshuff_38(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 64, i32 65, i32 66, i32 67, i32 68, i32 69, i32 70, i32 71, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 72, i32 73, i32 74, i32 75, i32 76, i32 77, i32 78, i32 79, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 80, i32 81, i32 82, i32 83, i32 84, i32 85, i32 86, i32 87, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 88, i32 89, i32 90, i32 91, i32 92, i32 93, i32 94, i32 95, i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 96, i32 97, i32 98, i32 99, i32 100, i32 101, i32 102, i32 103, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 104, i32 105, i32 106, i32 107, i32 108, i32 109, i32 110, i32 111, i32 48, i32 49, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 112, i32 113, i32 114, i32 115, i32 116, i32 117, i32 118, i32 119, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63, i32 120, i32 121, i32 122, i32 123, i32 124, i32 125, i32 126, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vshuff_39: +; CHECK: [[REG39:r[0-9]+]] = #57 +; CHECK: vshuff(v1,v0,[[REG39]]) +define <128 x i8> @vshuff_39(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 64, i32 2, i32 66, i32 4, i32 68, i32 6, i32 70, i32 1, i32 65, i32 3, i32 67, i32 5, i32 69, i32 7, i32 71, i32 8, i32 72, i32 10, i32 74, i32 12, i32 76, i32 14, i32 78, i32 9, i32 73, i32 11, i32 75, i32 13, i32 77, i32 15, i32 79, i32 16, i32 80, i32 18, i32 82, i32 20, i32 84, i32 22, i32 86, i32 17, i32 81, i32 19, i32 83, i32 21, i32 85, i32 23, i32 87, i32 24, i32 88, i32 26, i32 90, i32 28, i32 92, i32 30, i32 94, i32 25, i32 89, i32 27, i32 91, i32 29, i32 93, i32 31, i32 95, i32 32, i32 96, i32 34, i32 98, i32 36, i32 100, i32 38, i32 102, i32 33, i32 97, i32 35, i32 99, i32 37, i32 101, i32 39, i32 103, i32 40, i32 104, i32 42, i32 106, i32 44, i32 108, i32 46, i32 110, i32 41, i32 105, i32 43, i32 107, i32 45, i32 109, i32 47, i32 111, i32 48, i32 112, i32 50, i32 114, i32 52, i32 116, i32 54, i32 118, i32 49, i32 113, i32 51, i32 115, i32 53, i32 117, i32 55, i32 119, i32 56, i32 120, i32 58, i32 122, i32 60, i32 124, i32 62, i32 126, i32 57, i32 121, i32 59, i32 123, i32 61, i32 125, i32 63, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vshuff_3a: +; CHECK: [[REG3a:r[0-9]+]] = #58 +; CHECK: vshuff(v1,v0,[[REG3a]]) +define <128 x i8> @vshuff_3a(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 1, i32 64, i32 65, i32 4, i32 5, i32 68, i32 69, i32 2, i32 3, i32 66, i32 67, i32 6, i32 7, i32 70, i32 71, i32 8, i32 9, i32 72, i32 73, i32 12, i32 13, i32 76, i32 77, i32 10, i32 11, i32 74, i32 75, i32 14, i32 15, i32 78, i32 79, i32 16, i32 17, i32 80, i32 81, i32 20, i32 21, i32 84, i32 85, i32 18, i32 19, i32 82, i32 83, i32 22, i32 23, i32 86, i32 87, i32 24, i32 25, i32 88, i32 89, i32 28, i32 29, i32 92, i32 93, i32 26, i32 27, i32 90, i32 91, i32 30, i32 31, i32 94, i32 95, i32 32, i32 33, i32 96, i32 97, i32 36, i32 37, i32 100, i32 101, i32 34, i32 35, i32 98, i32 99, i32 38, i32 39, i32 102, i32 103, i32 40, i32 41, i32 104, i32 105, i32 44, i32 45, i32 108, i32 109, i32 42, i32 43, i32 106, i32 107, i32 46, i32 47, i32 110, i32 111, i32 48, i32 49, i32 112, i32 113, i32 52, i32 53, i32 116, i32 117, i32 50, i32 51, i32 114, i32 115, i32 54, i32 55, i32 118, i32 119, i32 56, i32 57, i32 120, i32 121, i32 60, i32 61, i32 124, i32 125, i32 58, i32 59, i32 122, i32 123, i32 62, i32 63, i32 126, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vshuff_3b: +; CHECK: [[REG3b:r[0-9]+]] = #59 +; CHECK: vshuff(v1,v0,[[REG3b]]) +define <128 x i8> @vshuff_3b(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 64, i32 1, i32 65, i32 4, i32 68, i32 5, i32 69, i32 2, i32 66, i32 3, i32 67, i32 6, i32 70, i32 7, i32 71, i32 8, i32 72, i32 9, i32 73, i32 12, i32 76, i32 13, i32 77, i32 10, i32 74, i32 11, i32 75, i32 14, i32 78, i32 15, i32 79, i32 16, i32 80, i32 17, i32 81, i32 20, i32 84, i32 21, i32 85, i32 18, i32 82, i32 19, i32 83, i32 22, i32 86, i32 23, i32 87, i32 24, i32 88, i32 25, i32 89, i32 28, i32 92, i32 29, i32 93, i32 26, i32 90, i32 27, i32 91, i32 30, i32 94, i32 31, i32 95, i32 32, i32 96, i32 33, i32 97, i32 36, i32 100, i32 37, i32 101, i32 34, i32 98, i32 35, i32 99, i32 38, i32 102, i32 39, i32 103, i32 40, i32 104, i32 41, i32 105, i32 44, i32 108, i32 45, i32 109, i32 42, i32 106, i32 43, i32 107, i32 46, i32 110, i32 47, i32 111, i32 48, i32 112, i32 49, i32 113, i32 52, i32 116, i32 53, i32 117, i32 50, i32 114, i32 51, i32 115, i32 54, i32 118, i32 55, i32 119, i32 56, i32 120, i32 57, i32 121, i32 60, i32 124, i32 61, i32 125, i32 58, i32 122, i32 59, i32 123, i32 62, i32 126, i32 63, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vshuff_3c: +; CHECK: [[REG3c:r[0-9]+]] = #60 +; CHECK: vshuff(v1,v0,[[REG3c]]) +define <128 x i8> @vshuff_3c(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 1, i32 2, i32 3, i32 64, i32 65, i32 66, i32 67, i32 4, i32 5, i32 6, i32 7, i32 68, i32 69, i32 70, i32 71, i32 8, i32 9, i32 10, i32 11, i32 72, i32 73, i32 74, i32 75, i32 12, i32 13, i32 14, i32 15, i32 76, i32 77, i32 78, i32 79, i32 16, i32 17, i32 18, i32 19, i32 80, i32 81, i32 82, i32 83, i32 20, i32 21, i32 22, i32 23, i32 84, i32 85, i32 86, i32 87, i32 24, i32 25, i32 26, i32 27, i32 88, i32 89, i32 90, i32 91, i32 28, i32 29, i32 30, i32 31, i32 92, i32 93, i32 94, i32 95, i32 32, i32 33, i32 34, i32 35, i32 96, i32 97, i32 98, i32 99, i32 36, i32 37, i32 38, i32 39, i32 100, i32 101, i32 102, i32 103, i32 40, i32 41, i32 42, i32 43, i32 104, i32 105, i32 106, i32 107, i32 44, i32 45, i32 46, i32 47, i32 108, i32 109, i32 110, i32 111, i32 48, i32 49, i32 50, i32 51, i32 112, i32 113, i32 114, i32 115, i32 52, i32 53, i32 54, i32 55, i32 116, i32 117, i32 118, i32 119, i32 56, i32 57, i32 58, i32 59, i32 120, i32 121, i32 122, i32 123, i32 60, i32 61, i32 62, i32 63, i32 124, i32 125, i32 126, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vshuff_3d: +; CHECK: [[REG3d:r[0-9]+]] = #61 +; CHECK: vshuff(v1,v0,[[REG3d]]) +define <128 x i8> @vshuff_3d(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 64, i32 2, i32 66, i32 1, i32 65, i32 3, i32 67, i32 4, i32 68, i32 6, i32 70, i32 5, i32 69, i32 7, i32 71, i32 8, i32 72, i32 10, i32 74, i32 9, i32 73, i32 11, i32 75, i32 12, i32 76, i32 14, i32 78, i32 13, i32 77, i32 15, i32 79, i32 16, i32 80, i32 18, i32 82, i32 17, i32 81, i32 19, i32 83, i32 20, i32 84, i32 22, i32 86, i32 21, i32 85, i32 23, i32 87, i32 24, i32 88, i32 26, i32 90, i32 25, i32 89, i32 27, i32 91, i32 28, i32 92, i32 30, i32 94, i32 29, i32 93, i32 31, i32 95, i32 32, i32 96, i32 34, i32 98, i32 33, i32 97, i32 35, i32 99, i32 36, i32 100, i32 38, i32 102, i32 37, i32 101, i32 39, i32 103, i32 40, i32 104, i32 42, i32 106, i32 41, i32 105, i32 43, i32 107, i32 44, i32 108, i32 46, i32 110, i32 45, i32 109, i32 47, i32 111, i32 48, i32 112, i32 50, i32 114, i32 49, i32 113, i32 51, i32 115, i32 52, i32 116, i32 54, i32 118, i32 53, i32 117, i32 55, i32 119, i32 56, i32 120, i32 58, i32 122, i32 57, i32 121, i32 59, i32 123, i32 60, i32 124, i32 62, i32 126, i32 61, i32 125, i32 63, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vshuff_3e: +; CHECK: [[REG3e:r[0-9]+]] = #62 +; CHECK: vshuff(v1,v0,[[REG3e]]) +define <128 x i8> @vshuff_3e(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 1, i32 64, i32 65, i32 2, i32 3, i32 66, i32 67, i32 4, i32 5, i32 68, i32 69, i32 6, i32 7, i32 70, i32 71, i32 8, i32 9, i32 72, i32 73, i32 10, i32 11, i32 74, i32 75, i32 12, i32 13, i32 76, i32 77, i32 14, i32 15, i32 78, i32 79, i32 16, i32 17, i32 80, i32 81, i32 18, i32 19, i32 82, i32 83, i32 20, i32 21, i32 84, i32 85, i32 22, i32 23, i32 86, i32 87, i32 24, i32 25, i32 88, i32 89, i32 26, i32 27, i32 90, i32 91, i32 28, i32 29, i32 92, i32 93, i32 30, i32 31, i32 94, i32 95, i32 32, i32 33, i32 96, i32 97, i32 34, i32 35, i32 98, i32 99, i32 36, i32 37, i32 100, i32 101, i32 38, i32 39, i32 102, i32 103, i32 40, i32 41, i32 104, i32 105, i32 42, i32 43, i32 106, i32 107, i32 44, i32 45, i32 108, i32 109, i32 46, i32 47, i32 110, i32 111, i32 48, i32 49, i32 112, i32 113, i32 50, i32 51, i32 114, i32 115, i32 52, i32 53, i32 116, i32 117, i32 54, i32 55, i32 118, i32 119, i32 56, i32 57, i32 120, i32 121, i32 58, i32 59, i32 122, i32 123, i32 60, i32 61, i32 124, i32 125, i32 62, i32 63, i32 126, i32 127> + ret <128 x i8> %p +} + +; CHECK-LABEL: vshuff_3f: +; CHECK: [[REG3f:r[0-9]+]] = #63 +; CHECK: vshuff(v1,v0,[[REG3f]]) +define <128 x i8> @vshuff_3f(<128 x i8> %v0, <128 x i8> %v1) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> < i32 0, i32 64, i32 1, i32 65, i32 2, i32 66, i32 3, i32 67, i32 4, i32 68, i32 5, i32 69, i32 6, i32 70, i32 7, i32 71, i32 8, i32 72, i32 9, i32 73, i32 10, i32 74, i32 11, i32 75, i32 12, i32 76, i32 13, i32 77, i32 14, i32 78, i32 15, i32 79, i32 16, i32 80, i32 17, i32 81, i32 18, i32 82, i32 19, i32 83, i32 20, i32 84, i32 21, i32 85, i32 22, i32 86, i32 23, i32 87, i32 24, i32 88, i32 25, i32 89, i32 26, i32 90, i32 27, i32 91, i32 28, i32 92, i32 29, i32 93, i32 30, i32 94, i32 31, i32 95, i32 32, i32 96, i32 33, i32 97, i32 34, i32 98, i32 35, i32 99, i32 36, i32 100, i32 37, i32 101, i32 38, i32 102, i32 39, i32 103, i32 40, i32 104, i32 41, i32 105, i32 42, i32 106, i32 43, i32 107, i32 44, i32 108, i32 45, i32 109, i32 46, i32 110, i32 47, i32 111, i32 48, i32 112, i32 49, i32 113, i32 50, i32 114, i32 51, i32 115, i32 52, i32 116, i32 53, i32 117, i32 54, i32 118, i32 55, i32 119, i32 56, i32 120, i32 57, i32 121, i32 58, i32 122, i32 59, i32 123, i32 60, i32 124, i32 61, i32 125, i32 62, i32 126, i32 63, i32 127> + ret <128 x i8> %p +} + +attributes #0 = { nounwind readnone "target-cpu"="hexagonv60" "target-features"="+hvx,+hvx-length64b" } diff --git a/test/CodeGen/Hexagon/autohvx/shuff-combos-128b.ll b/test/CodeGen/Hexagon/autohvx/shuff-combos-128b.ll new file mode 100644 index 00000000000..2bf503fbe1d --- /dev/null +++ b/test/CodeGen/Hexagon/autohvx/shuff-combos-128b.ll @@ -0,0 +1,237 @@ +; RUN: llc -march=hexagon < %s | FileCheck %s + +; Generator: vdeal(0x37), vdeal(0x53), vshuff(0x2f), vdeal(0x4b), vdeal(0x27), vdeal(0x43), vshuff(0x1f), vdeal(0x5b), vshuff(0x7e), vshuff(0x6c), vdeal(0x5a), vdeal(0x38), vshuff(0x16), vshuff(0x44), vdeal(0x72) +; CHECK-LABEL: test_0000: +; CHECK-DAG: [[R00:r[0-9]+]] = #66 +; CHECK-DAG: [[R01:r[0-9]+]] = #46 +; CHECK-DAG: [[R02:r[0-9]+]] = #1 +; CHECK: v[[H0:[0-9]+]]:[[L0:[0-9]+]] = vshuff(v1,v0,[[R00]]) +; CHECK: v[[H0]]:[[L0]] = vshuff(v[[H0]],v[[L0]],[[R01]]) +; CHECK: v[[H0]]:[[L0]] = vshuff(v[[H0]],v[[L0]],[[R02]]) +; CHECK-NOT: v{{[0-9:]+}} = +define <256 x i8> @test_0000(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; Generator: vshuff(0x10), vdeal(0x2e), vshuff(0x1c), vdeal(0x2a), vshuff(0x68), vshuff(0x46), vdeal(0x74), vdeal(0x42), vdeal(0x40), vdeal(0x5e), vshuff(0x0d), vshuff(0x71), vshuff(0x35), vshuff(0x39), vshuff(0x7d) +; CHECK-LABEL: test_0001: +; CHECK-DAG: [[R10:r[0-9]+]] = #24 +; CHECK-DAG: [[R11:r[0-9]+]] = #9 +; CHECK-DAG: [[R12:r[0-9]+]] = #68 +; CHECK-DAG: [[R13:r[0-9]+]] = #34 +; CHECK: v[[H1:[0-9]+]]:[[L1:[0-9]+]] = vshuff(v1,v0,[[R10]]) +; CHECK: v[[H1]]:[[L1]] = vdeal(v[[H1]],v[[L1]],[[R11]]) +; CHECK: v[[H1]]:[[L1]] = vdeal(v[[H1]],v[[L1]],[[R12]]) +; CHECK: v[[H1]]:[[L1]] = vdeal(v[[H1]],v[[L1]],[[R13]]) +; CHECK-NOT: v{{[0-9:]+}} = +define <256 x i8> @test_0001(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; Generator: vshuff(0x01), vdeal(0x25), vdeal(0x29), vdeal(0x6d), vshuff(0x58), vshuff(0x7a), vdeal(0x47), vdeal(0x49), vdeal(0x65), vshuff(0x1e), vdeal(0x1d), vshuff(0x0c), vshuff(0x08), vshuff(0x62), vdeal(0x73) +; CHECK-LABEL: test_0002: +; CHECK-DAG: [[R20:r[0-9]+]] = #18 +; CHECK-DAG: [[R21:r[0-9]+]] = #10 +; CHECK-DAG: [[R22:r[0-9]+]] = #68 +; CHECK-DAG: [[R23:r[0-9]+]] = #5 +; CHECK: v[[H2:[0-9]+]]:[[L2:[0-9]+]] = vshuff(v1,v0,[[R20]]) +; CHECK: v[[H2]]:[[L2]] = vdeal(v[[H2]],v[[L2]],[[R21]]) +; CHECK: v[[H2]]:[[L2]] = vshuff(v[[H2]],v[[L2]],[[R22]]) +; CHECK: v[[H2]]:[[L2]] = vdeal(v[[H2]],v[[L2]],[[R23]]) +; CHECK-NOT: v{{[0-9:]+}} = +define <256 x i8> @test_0002(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; Generator: vshuff(0x60), vdeal(0x36), vdeal(0x11), vdeal(0x57), vdeal(0x45), vshuff(0x03), vdeal(0x14), vdeal(0x64), vdeal(0x3c), vdeal(0x30), vshuff(0x4e), vshuff(0x55), vshuff(0x4a), vshuff(0x4f), vshuff(0x3f) +; CHECK-LABEL: test_0003: +; CHECK-DAG: [[R30:r[0-9]+]] = #21 +; CHECK-DAG: [[R31:r[0-9]+]] = #9 +; CHECK-DAG: [[R32:r[0-9]+]] = #34 +; CHECK-DAG: [[R33:r[0-9]+]] = #66 +; CHECK: v[[H3:[0-9]+]]:[[L3:[0-9]+]] = vshuff(v1,v0,[[R30]]) +; CHECK: v[[H3]]:[[L3]] = vdeal(v[[H3]],v[[L3]],[[R31]]) +; CHECK: v[[H3]]:[[L3]] = vshuff(v[[H3]],v[[L3]],[[R32]]) +; CHECK: v[[H3]]:[[L3]] = vshuff(v[[H3]],v[[L3]],[[R33]]) +; CHECK-NOT: v{{[0-9:]+}} = +define <256 x i8> @test_0003(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; Generator: vdeal(0x63), vshuff(0x6f), vdeal(0x77), vshuff(0x75), vdeal(0x3d), vshuff(0x2d), vshuff(0x00), vshuff(0x5c), vdeal(0x04), vshuff(0x79), vshuff(0x21), vdeal(0x7b), vdeal(0x66), vshuff(0x59), vdeal(0x54) +; CHECK-LABEL: test_0004: +; CHECK-DAG: [[R40:r[0-9]+]] = #38 +; CHECK-DAG: [[R41:r[0-9]+]] = #72 +; CHECK-DAG: [[R42:r[0-9]+]] = #18 +; CHECK: v[[H4:[0-9]+]]:[[L4:[0-9]+]] = vshuff(v1,v0,[[R40]]) +; CHECK: v[[H4]]:[[L4]] = vshuff(v[[H4]],v[[L4]],[[R41]]) +; CHECK: v[[H4]]:[[L4]] = vshuff(v[[H4]],v[[L4]],[[R42]]) +; CHECK-NOT: v{{[0-9:]+}} = +define <256 x i8> @test_0004(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; Generator: vshuff(0x02), vshuff(0x1a), vshuff(0x32), vdeal(0x6b), vdeal(0x12), vdeal(0x7c), vdeal(0x52), vdeal(0x0e), vshuff(0x56), vshuff(0x0b), vshuff(0x2b), vdeal(0x19), vshuff(0x48), vdeal(0x67), vdeal(0x69) +; CHECK-LABEL: test_0005: +; CHECK-DAG: [[R50:r[0-9]+]] = #9 +; CHECK-DAG: [[R51:r[0-9]+]] = #3 +; CHECK-DAG: [[R52:r[0-9]+]] = #48 +; CHECK-DAG: [[R53:r[0-9]+]] = #68 +; CHECK: v[[H5:[0-9]+]]:[[L5:[0-9]+]] = vshuff(v1,v0,[[R50]]) +; CHECK: v[[H5]]:[[L5]] = vdeal(v[[H5]],v[[L5]],[[R51]]) +; CHECK: v[[H5]]:[[L5]] = vdeal(v[[H5]],v[[L5]],[[R52]]) +; CHECK: v[[H5]]:[[L5]] = vdeal(v[[H5]],v[[L5]],[[R53]]) +; CHECK-NOT: v{{[0-9:]+}} = +define <256 x i8> @test_0005(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; Generator: vshuff(0x34), vshuff(0x07), vdeal(0x5d), vshuff(0x05), vshuff(0x50), vshuff(0x13), vdeal(0x31), vdeal(0x6e), vdeal(0x0f), vdeal(0x2c), vdeal(0x28), vdeal(0x76), vdeal(0x22), vdeal(0x3a), vdeal(0x51) +; CHECK-LABEL: test_0006: +; CHECK-DAG: [[R60:r[0-9]+]] = #85 +; CHECK-DAG: [[R61:r[0-9]+]] = #2 +; CHECK: v[[H6:[0-9]+]]:[[L6:[0-9]+]] = vdeal(v1,v0,[[R60]]) +; CHECK: v[[H6]]:[[L6]] = vshuff(v[[H6]],v[[L6]],[[R61]]) +; CHECK-NOT: v{{[0-9:]+}} = +define <256 x i8> @test_0006(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; Generator: vshuff(0x25), vshuff(0x4c), vshuff(0x72), vdeal(0x70), vshuff(0x3b), vshuff(0x26), vshuff(0x4d), vdeal(0x20), vshuff(0x7f), vdeal(0x6a), vdeal(0x78), vshuff(0x5f), vdeal(0x10), vdeal(0x71), vshuff(0x6d) +; CHECK-LABEL: test_0007: +; CHECK-DAG: [[R70:r[0-9]+]] = #74 +; CHECK-DAG: [[R71:r[0-9]+]] = #20 +; CHECK-DAG: [[R72:r[0-9]+]] = #34 +; CHECK: v[[H7:[0-9]+]]:[[L7:[0-9]+]] = vshuff(v1,v0,[[R70]]) +; CHECK: v[[H7]]:[[L7]] = vdeal(v[[H7]],v[[L7]],[[R71]]) +; CHECK: v[[H7]]:[[L7]] = vdeal(v[[H7]],v[[L7]],[[R72]]) +; CHECK-NOT: v{{[0-9:]+}} = +define <256 x i8> @test_0007(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; Generator: vshuff(0x2e), vshuff(0x40), vdeal(0x35), vdeal(0x3e), vdeal(0x06), vshuff(0x4b), vshuff(0x24), vshuff(0x09), vdeal(0x18), vshuff(0x42), vshuff(0x43), vshuff(0x41), vshuff(0x23), vdeal(0x3f), vdeal(0x39) +; CHECK-LABEL: test_0008: +; CHECK-DAG: [[R80:r[0-9]+]] = #73 +; CHECK-DAG: [[R81:r[0-9]+]] = #5 +; CHECK-DAG: [[R82:r[0-9]+]] = #48 +; CHECK-DAG: [[R83:r[0-9]+]] = #2 +; CHECK: v[[H8:[0-9]+]]:[[L8:[0-9]+]] = vshuff(v1,v0,[[R80]]) +; CHECK: v[[H8]]:[[L8]] = vdeal(v[[H8]],v[[L8]],[[R81]]) +; CHECK: v[[H8]]:[[L8]] = vshuff(v[[H8]],v[[L8]],[[R82]]) +; CHECK: v[[H8]]:[[L8]] = vshuff(v[[H8]],v[[L8]],[[R83]]) +; CHECK-NOT: v{{[0-9:]+}} = +define <256 x i8> @test_0008(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; Generator: vshuff(0x33), vshuff(0x5e), vshuff(0x2a), vdeal(0x2f), vdeal(0x1f), vshuff(0x14), vshuff(0x17), vshuff(0x1b), vdeal(0x1c), vdeal(0x15), vshuff(0x37), vshuff(0x3c), vdeal(0x4e), vdeal(0x7d), vshuff(0x61) +; CHECK-LABEL: test_0009: +; CHECK-DAG: [[R90:r[0-9]+]] = #96 +; CHECK-DAG: [[R91:r[0-9]+]] = #18 +; CHECK-DAG: [[R92:r[0-9]+]] = #5 +; CHECK: v[[H9:[0-9]+]]:[[L9:[0-9]+]] = vshuff(v1,v0,[[R90]]) +; CHECK: v[[H9]]:[[L9]] = vdeal(v[[H9]],v[[L9]],[[R91]]) +; CHECK: v[[H9]]:[[L9]] = vdeal(v[[H9]],v[[L9]],[[R92]]) +; CHECK-NOT: v{{[0-9:]+}} = +define <256 x i8> @test_0009(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; Generator: vshuff(0x12), vshuff(0x5a), vdeal(0x46), vdeal(0x01), vshuff(0x64), vshuff(0x5b), vshuff(0x6b), vdeal(0x6c), vshuff(0x27), vdeal(0x0a), vdeal(0x08), vshuff(0x29), vdeal(0x7e), vdeal(0x0d), vdeal(0x16) +; CHECK-LABEL: test_000a: +; CHECK-DAG: [[Ra0:r[0-9]+]] = #44 +; CHECK-DAG: [[Ra1:r[0-9]+]] = #6 +; CHECK-DAG: [[Ra2:r[0-9]+]] = #80 +; CHECK: v[[Ha:[0-9]+]]:[[La:[0-9]+]] = vshuff(v1,v0,[[Ra0]]) +; CHECK: v[[Ha]]:[[La]] = vdeal(v[[Ha]],v[[La]],[[Ra1]]) +; CHECK: v[[Ha]]:[[La]] = vshuff(v[[Ha]],v[[La]],[[Ra2]]) +; CHECK-NOT: v{{[0-9:]+}} = +define <256 x i8> @test_000a(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; Generator: vshuff(0x74), vshuff(0x11), vshuff(0x53), vshuff(0x66), vshuff(0x1d), vdeal(0x59), vshuff(0x63), vshuff(0x49), vdeal(0x00), vshuff(0x38), vshuff(0x45), vdeal(0x68), vshuff(0x65), vshuff(0x6e), vdeal(0x62) +; CHECK-LABEL: test_000b: +; CHECK-DAG: [[Rb0:r[0-9]+]] = #68 +; CHECK-DAG: [[Rb1:r[0-9]+]] = #5 +; CHECK-DAG: [[Rb2:r[0-9]+]] = #18 +; CHECK-DAG: [[Rb3:r[0-9]+]] = #40 +; CHECK: v[[Hb:[0-9]+]]:[[Lb:[0-9]+]] = vshuff(v1,v0,[[Rb0]]) +; CHECK: v[[Hb]]:[[Lb]] = vdeal(v[[Hb]],v[[Lb]],[[Rb1]]) +; CHECK: v[[Hb]]:[[Lb]] = vdeal(v[[Hb]],v[[Lb]],[[Rb2]]) +; CHECK: v[[Hb]]:[[Lb]] = vdeal(v[[Hb]],v[[Lb]],[[Rb3]]) +; CHECK-NOT: v{{[0-9:]+}} = +define <256 x i8> @test_000b(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; Generator: vdeal(0x60), vdeal(0x5c), vdeal(0x4f), vshuff(0x47), vshuff(0x7b), vdeal(0x4a), vdeal(0x1e), vdeal(0x5f), vdeal(0x7a), vshuff(0x36), vshuff(0x69), vshuff(0x31), vdeal(0x03), vdeal(0x1a), vdeal(0x41) +; CHECK-LABEL: test_000c: +; CHECK-DAG: [[Rc0:r[0-9]+]] = #10 +; CHECK-DAG: [[Rc1:r[0-9]+]] = #3 +; CHECK-DAG: [[Rc2:r[0-9]+]] = #84 +; CHECK: v[[Hc:[0-9]+]]:[[Lc:[0-9]+]] = vshuff(v1,v0,[[Rc0]]) +; CHECK: v[[Hc]]:[[Lc]] = vdeal(v[[Hc]],v[[Lc]],[[Rc1]]) +; CHECK: v[[Hc]]:[[Lc]] = vshuff(v[[Hc]],v[[Lc]],[[Rc2]]) +; CHECK-NOT: v{{[0-9:]+}} = +define <256 x i8> @test_000c(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; Generator: vdeal(0x58), vdeal(0x0b), vdeal(0x21), vdeal(0x7f), vshuff(0x6a), vshuff(0x78), vshuff(0x52), vshuff(0x73), vshuff(0x06), vdeal(0x2d), vdeal(0x32), vdeal(0x48), vdeal(0x75), vdeal(0x55), vshuff(0x0e) +; CHECK-LABEL: test_000d: +; CHECK-DAG: [[Rd0:r[0-9]+]] = #36 +; CHECK-DAG: [[Rd1:r[0-9]+]] = #80 +; CHECK-DAG: [[Rd2:r[0-9]+]] = #9 +; CHECK: v[[Hd:[0-9]+]]:[[Ld:[0-9]+]] = vshuff(v1,v0,[[Rd0]]) +; CHECK: v[[Hd]]:[[Ld]] = vshuff(v[[Hd]],v[[Ld]],[[Rd1]]) +; CHECK: v[[Hd]]:[[Ld]] = vdeal(v[[Hd]],v[[Ld]],[[Rd2]]) +; CHECK-NOT: v{{[0-9:]+}} = +define <256 x i8> @test_000d(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; Generator: vdeal(0x6f), vdeal(0x13), vdeal(0x07), vdeal(0x56), vshuff(0x2c), vdeal(0x0c), vdeal(0x33), vshuff(0x22), vdeal(0x02), vshuff(0x18), vdeal(0x4d), vshuff(0x51), vshuff(0x3e), vshuff(0x77), vshuff(0x30) +; CHECK-LABEL: test_000e: +; CHECK-DAG: [[Re0:r[0-9]+]] = #65 +; CHECK-DAG: [[Re1:r[0-9]+]] = #24 +; CHECK-DAG: [[Re2:r[0-9]+]] = #36 +; CHECK: v[[He:[0-9]+]]:[[Le:[0-9]+]] = vshuff(v1,v0,[[Re0]]) +; CHECK: v[[He]]:[[Le]] = vdeal(v[[He]],v[[Le]],[[Re1]]) +; CHECK: v[[He]]:[[Le]] = vdeal(v[[He]],v[[Le]],[[Re2]]) +; CHECK-NOT: v{{[0-9:]+}} = +define <256 x i8> @test_000e(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +; Generator: vdeal(0x44), vshuff(0x57), vdeal(0x5e), vdeal(0x3b), vshuff(0x3d), vshuff(0x28), vdeal(0x2b), vdeal(0x09), vdeal(0x1b), vdeal(0x29), vdeal(0x6d), vdeal(0x61), vshuff(0x54), vdeal(0x34), vshuff(0x1c) +; CHECK-LABEL: test_000f: +; CHECK-DAG: [[Rf0:r[0-9]+]] = #6 +; CHECK-DAG: [[Rf1:r[0-9]+]] = #58 +; CHECK-DAG: [[Rf2:r[0-9]+]] = #9 +; CHECK: v[[Hf:[0-9]+]]:[[Lf:[0-9]+]] = vshuff(v1,v0,[[Rf0]]) +; CHECK: v[[Hf]]:[[Lf]] = vshuff(v[[Hf]],v[[Lf]],[[Rf1]]) +; CHECK: v[[Hf]]:[[Lf]] = vdeal(v[[Hf]],v[[Lf]],[[Rf2]]) +; CHECK-NOT: v{{[0-9:]+}} = +define <256 x i8> @test_000f(<256 x i8> %v0) #0 { + %p = shufflevector <256 x i8> %v0, <256 x i8> undef, <256 x i32> + ret <256 x i8> %p +} + +attributes #0 = { nounwind readnone "target-cpu"="hexagonv60" "target-features"="+hvx,+hvx-length128b" } diff --git a/test/CodeGen/Hexagon/autohvx/shuff-combos-64b.ll b/test/CodeGen/Hexagon/autohvx/shuff-combos-64b.ll new file mode 100644 index 00000000000..47321e1e535 --- /dev/null +++ b/test/CodeGen/Hexagon/autohvx/shuff-combos-64b.ll @@ -0,0 +1,217 @@ +; RUN: llc -march=hexagon < %s | FileCheck %s + +; Generator: vdeal(0x1f), vshuff(0x32), vshuff(0x24), vshuff(0x26), vshuff(0x08), vdeal(0x3a), vshuff(0x0c), vdeal(0x0e), vdeal(0x30), vdeal(0x22), vdeal(0x14), vdeal(0x36), vdeal(0x18), vdeal(0x0a), vdeal(0x3c) +; CHECK-LABEL: test_0000: +; CHECK-DAG: [[R00:r[0-9]+]] = #49 +; CHECK-DAG: [[R01:r[0-9]+]] = #3 +; CHECK: v[[H0:[0-9]+]]:[[L0:[0-9]+]] = vshuff(v1,v0,[[R00]]) +; CHECK: v[[H0]]:[[L0]] = vdeal(v[[H0]],v[[L0]],[[R01]]) +; CHECK-NOT: v{{[0-9:]+}} = +define <128 x i8> @test_0000(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; Generator: vshuff(0x1e), vshuff(0x00), vdeal(0x12), vshuff(0x34), vshuff(0x0b), vshuff(0x2b), vdeal(0x16), vshuff(0x2e), vshuff(0x1a), vdeal(0x28), vshuff(0x2d), vdeal(0x15), vdeal(0x1d), vshuff(0x25), vshuff(0x0d) +; CHECK-LABEL: test_0001: +; CHECK-DAG: [[R10:r[0-9]+]] = #10 +; CHECK-DAG: [[R11:r[0-9]+]] = #34 +; CHECK-DAG: [[R12:r[0-9]+]] = #16 +; CHECK: v[[H1:[0-9]+]]:[[L1:[0-9]+]] = vshuff(v1,v0,[[R10]]) +; CHECK: v[[H1]]:[[L1]] = vshuff(v[[H1]],v[[L1]],[[R11]]) +; CHECK: v[[H1]]:[[L1]] = vshuff(v[[H1]],v[[L1]],[[R12]]) +; CHECK-NOT: v{{[0-9:]+}} = +define <128 x i8> @test_0001(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; Generator: vdeal(0x2c), vshuff(0x27), vshuff(0x07), vshuff(0x12), vdeal(0x04), vshuff(0x03), vshuff(0x23), vshuff(0x26), vdeal(0x06), vdeal(0x08), vdeal(0x01), vshuff(0x09), vdeal(0x11), vdeal(0x19), vshuff(0x21) +; CHECK-LABEL: test_0002: +; CHECK-DAG: [[R20:r[0-9]+]] = #5 +; CHECK-DAG: [[R21:r[0-9]+]] = #18 +; CHECK: v[[H2:[0-9]+]]:[[L2:[0-9]+]] = vdeal(v1,v0,[[R20]]) +; CHECK: v[[H2]]:[[L2]] = vshuff(v[[H2]],v[[L2]],[[R21]]) +; CHECK-NOT: v{{[0-9:]+}} = +define <128 x i8> @test_0002(<128 x i8> %v0) #0 { +; CHECK-NOT: v{{[0-9:]+}} = + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; Generator: vshuff(0x11), vshuff(0x2b), vdeal(0x3d), vdeal(0x3e), vshuff(0x02), vdeal(0x1c), vdeal(0x2f), vdeal(0x0f), vshuff(0x36), vshuff(0x38), vdeal(0x35), vshuff(0x1b), vshuff(0x3b), vdeal(0x21), vdeal(0x15) +; CHECK-LABEL: test_0003: +; CHECK-DAG: [[R30:r[0-9]+]] = #34 +; CHECK-DAG: [[R31:r[0-9]+]] = #10 +; CHECK-DAG: [[R32:r[0-9]+]] = #5 +; CHECK: v[[H3:[0-9]+]]:[[L3:[0-9]+]] = vshuff(v1,v0,[[R30]]) +; CHECK: v[[H3]]:[[L3]] = vdeal(v[[H3]],v[[L3]],[[R31]]) +; CHECK: v[[H3]]:[[L3]] = vdeal(v[[H3]],v[[L3]],[[R32]]) +; CHECK-NOT: v{{[0-9:]+}} = +define <128 x i8> @test_0003(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; Generator: vdeal(0x0a), vdeal(0x10), vdeal(0x31), vshuff(0x30), vdeal(0x00), vdeal(0x39), vdeal(0x0e), vshuff(0x37), vshuff(0x17), vshuff(0x06), vshuff(0x07), vshuff(0x09), vshuff(0x3c), vshuff(0x33), vshuff(0x33) +; CHECK-LABEL: test_0004: +; CHECK-DAG: [[R40:r[0-9]+]] = #57 +; CHECK-DAG: [[R41:r[0-9]+]] = #6 +; CHECK-DAG: [[R42:r[0-9]+]] = #1 +; CHECK: v[[H4:[0-9]+]]:[[L4:[0-9]+]] = vshuff(v1,v0,[[R40]]) +; CHECK: v[[H4]]:[[L4]] = vshuff(v[[H4]],v[[L4]],[[R41]]) +; CHECK: v[[H4]]:[[L4]] = vshuff(v[[H4]],v[[L4]],[[R42]]) +; CHECK-NOT: v{{[0-9:]+}} = +define <128 x i8> @test_0004(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; Generator: vdeal(0x1c), vshuff(0x31), vdeal(0x1f), vshuff(0x29), vdeal(0x1a), vshuff(0x2a), vshuff(0x25), vshuff(0x05), vshuff(0x04), vshuff(0x23), vdeal(0x0d), vdeal(0x20), vshuff(0x29), vdeal(0x2f), vshuff(0x1d) +; CHECK-LABEL: test_0005: +; CHECK-DAG: [[R50:r[0-9]+]] = #33 +; CHECK-DAG: [[R51:r[0-9]+]] = #12 +; CHECK-DAG: [[R52:r[0-9]+]] = #1{{$}} +; CHECK: v[[H5:[0-9]+]]:[[L5:[0-9]+]] = vshuff(v1,v0,[[R50]]) +; CHECK: v[[H5]]:[[L5]] = vshuff(v[[H5]],v[[L5]],[[R51]]) +; CHECK: v[[H5]]:[[L5]] = vshuff(v[[H5]],v[[L5]],[[R52]]) +; CHECK-NOT: v{{[0-9:]+}} = +define <128 x i8> @test_0005(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; Generator: vdeal(0x22), vshuff(0x24), vdeal(0x16), vdeal(0x18), vshuff(0x17), vdeal(0x2d), vshuff(0x38), vshuff(0x20), vshuff(0x37), vdeal(0x3f), vdeal(0x10), vdeal(0x32), vshuff(0x14), vshuff(0x13), vdeal(0x0b) +; CHECK-LABEL: test_0006: +; CHECK-DAG: [[R60:r[0-9]+]] = #3{{$}} +; CHECK-DAG: [[R61:r[0-9]+]] = #36 +; CHECK: v[[H6:[0-9]+]]:[[L6:[0-9]+]] = vdeal(v1,v0,[[R60]]) +; CHECK: v[[H6]]:[[L6]] = vshuff(v[[H6]],v[[L6]],[[R61]]) +; CHECK-NOT: v{{[0-9:]+}} = +define <128 x i8> @test_0006(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; Generator: vdeal(0x0f), vdeal(0x01), vshuff(0x3b), vdeal(0x0c), vdeal(0x3f), vdeal(0x26), vshuff(0x28), vdeal(0x3a), vdeal(0x02), vdeal(0x1b), vshuff(0x0e), vdeal(0x03), vshuff(0x3d), vshuff(0x2c), vshuff(0x15) +; CHECK-LABEL: test_0007: +; CHECK-DAG: [[R70:r[0-9]+]] = #50 +; CHECK-DAG: [[R71:r[0-9]+]] = #5{{$}} +; CHECK-DAG: [[R72:r[0-9]+]] = #8 +; CHECK: v[[H7:[0-9]+]]:[[L7:[0-9]+]] = vshuff(v1,v0,[[R70]]) +; CHECK: v[[H7]]:[[L7]] = vdeal(v[[H7]],v[[L7]],[[R71]]) +; CHECK: v[[H7]]:[[L7]] = vshuff(v[[H7]],v[[L7]],[[R72]]) +; CHECK-NOT: v{{[0-9:]+}} = +define <128 x i8> @test_0007(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; Generator: vdeal(0x1e), vdeal(0x19), vdeal(0x34), vdeal(0x07), vshuff(0x27), vdeal(0x1e), vdeal(0x21), vdeal(0x2b), vshuff(0x11), vdeal(0x35), vshuff(0x0a), vdeal(0x39), vdeal(0x0c), vdeal(0x17), vdeal(0x23) +; CHECK-LABEL: test_0008: +; CHECK-DAG: [[R80:r[0-9]+]] = #5 +; CHECK-DAG: [[R81:r[0-9]+]] = #18 +; CHECK-DAG: [[R82:r[0-9]+]] = #9 +; CHECK: v[[H8:[0-9]+]]:[[L8:[0-9]+]] = vshuff(v1,v0,[[R80]]) +; CHECK: v[[H8]]:[[L8]] = vshuff(v[[H8]],v[[L8]],[[R81]]) +; CHECK: v[[H8]]:[[L8]] = vshuff(v[[H8]],v[[L8]],[[R82]]) +; CHECK-NOT: v{{[0-9:]+}} = +define <128 x i8> @test_0008(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; Generator: vshuff(0x1d), vshuff(0x18), vdeal(0x09), vshuff(0x2a), vdeal(0x03), vdeal(0x27), vdeal(0x25), vdeal(0x13), vshuff(0x3a), vshuff(0x19), vshuff(0x06), vshuff(0x0f), vshuff(0x3c), vshuff(0x2e), vshuff(0x36) +; CHECK-LABEL: test_0009: +; CHECK-DAG: [[R90:r[0-9]+]] = #17 +; CHECK-DAG: [[R91:r[0-9]+]] = #40 +; CHECK-DAG: [[R92:r[0-9]+]] = #6 +; CHECK: v[[H9:[0-9]+]]:[[L9:[0-9]+]] = vdeal(v1,v0,[[R90]]) +; CHECK: v[[H9]]:[[L9]] = vshuff(v[[H9]],v[[L9]],[[R91]]) +; CHECK: v[[H9]]:[[L9]] = vdeal(v[[H9]],v[[L9]],[[R92]]) +; CHECK-NOT: v{{[0-9:]+}} = +define <128 x i8> @test_0009(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; Generator: vdeal(0x05), vshuff(0x10), vdeal(0x0d), vshuff(0x12), vdeal(0x08), vshuff(0x22), vdeal(0x24), vshuff(0x3e), vdeal(0x00), vshuff(0x14), vdeal(0x3b), vdeal(0x33), vshuff(0x2f), vdeal(0x13), vdeal(0x14) +; CHECK-LABEL: test_000a: +; CHECK-DAG: [[Ra0:r[0-9]+]] = #56 +; CHECK-DAG: [[Ra1:r[0-9]+]] = #13 +; CHECK-DAG: [[Ra2:r[0-9]+]] = #2 +; CHECK: v[[Ha:[0-9]+]]:[[La:[0-9]+]] = vshuff(v1,v0,[[Ra0]]) +; CHECK: v[[Ha]]:[[La]] = vdeal(v[[Ha]],v[[La]],[[Ra1]]) +; CHECK: v[[Ha]]:[[La]] = vshuff(v[[Ha]],v[[La]],[[Ra2]]) +; CHECK-NOT: v{{[0-9:]+}} = +define <128 x i8> @test_000a(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; Generator: vdeal(0x12), vshuff(0x2c), vdeal(0x2d), vshuff(0x01), vshuff(0x1f), vshuff(0x30), vdeal(0x2a), vdeal(0x0b), vdeal(0x32), vshuff(0x08), vdeal(0x1b), vdeal(0x09), vshuff(0x1c), vshuff(0x16), vdeal(0x38) +; CHECK-LABEL: test_000b: +; CHECK-DAG: [[Rb0:r[0-9]+]] = #12 +; CHECK-DAG: [[Rb1:r[0-9]+]] = #33 +; CHECK-DAG: [[Rb2:r[0-9]+]] = #18 +; CHECK: v[[Hb:[0-9]+]]:[[Lb:[0-9]+]] = vdeal(v1,v0,[[Rb0]]) +; CHECK: v[[Hb]]:[[Lb]] = vdeal(v[[Hb]],v[[Lb]],[[Rb1]]) +; CHECK: v[[Hb]]:[[Lb]] = vshuff(v[[Hb]],v[[Lb]],[[Rb2]]) +; CHECK-NOT: v{{[0-9:]+}} = +define <128 x i8> @test_000b(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; Generator: vshuff(0x31), vdeal(0x29), vshuff(0x19), vshuff(0x39), vdeal(0x17), vshuff(0x28), vshuff(0x0f), vdeal(0x23), vdeal(0x2e), vshuff(0x3d), vdeal(0x1a), vdeal(0x02), vshuff(0x3e), vshuff(0x20), vshuff(0x3f) +; CHECK-LABEL: test_000c: +; CHECK-DAG: [[Rc0:r[0-9]+]] = #12 +; CHECK-DAG: [[Rc1:r[0-9]+]] = #6 +; CHECK-DAG: [[Rc2:r[0-9]+]] = #17 +; CHECK-DAG: [[Rc3:r[0-9]+]] = #32 +; CHECK: v[[Hc:[0-9]+]]:[[Lc:[0-9]+]] = vshuff(v1,v0,[[Rc0]]) +; CHECK: v[[Hc]]:[[Lc]] = vdeal(v[[Hc]],v[[Lc]],[[Rc1]]) +; CHECK: v[[Hc]]:[[Lc]] = vdeal(v[[Hc]],v[[Lc]],[[Rc2]]) +; CHECK: v[[Hc]]:[[Lc]] = vshuff(v[[Hc]],v[[Lc]],[[Rc3]]) +; CHECK-NOT: v{{[0-9:]+}} = +define <128 x i8> @test_000c(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; Generator: vdeal(0x3c), vdeal(0x24), vdeal(0x05), vdeal(0x37), vshuff(0x21), vdeal(0x11), vdeal(0x1d), vshuff(0x00), vshuff(0x34), vshuff(0x0d), vshuff(0x3a), vshuff(0x1f), vshuff(0x03), vshuff(0x1e), vdeal(0x29) +; CHECK-LABEL: test_000d: +; CHECK-DAG: [[Rd0:r[0-9]+]] = #40 +; CHECK-DAG: [[Rd1:r[0-9]+]] = #28 +; CHECK: v[[Hd:[0-9]+]]:[[Ld:[0-9]+]] = vshuff(v1,v0,[[Rd0]]) +; CHECK: v[[Hd]]:[[Ld]] = vdeal(v[[Hd]],v[[Ld]],[[Rd1]]) +; CHECK-NOT: v{{[0-9:]+}} = +define <128 x i8> @test_000d(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; Generator: vshuff(0x18), vdeal(0x36), vdeal(0x33), vdeal(0x26), vshuff(0x04), vshuff(0x2d), vshuff(0x35), vdeal(0x34), vdeal(0x2e), vdeal(0x25), vdeal(0x28), vshuff(0x0c), vdeal(0x07), vshuff(0x35), vshuff(0x01) +; CHECK-LABEL: test_000e: +; CHECK-DAG: [[Re0:r[0-9]+]] = #58 +; CHECK: v[[He:[0-9]+]]:[[Le:[0-9]+]] = vshuff(v1,v0,[[Re0]]) +; CHECK-NOT: v{{[0-9:]+}} = +define <128 x i8> @test_000e(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +; Generator: vshuff(0x1a), vshuff(0x10), vdeal(0x2b), vshuff(0x15), vdeal(0x12), vdeal(0x30), vshuff(0x23), vshuff(0x02), vshuff(0x32), vshuff(0x08), vshuff(0x05), vdeal(0x3e), vshuff(0x39), vshuff(0x0a), vshuff(0x0e) +; CHECK-LABEL: test_000f: +; CHECK-DAG: [[Rf0:r[0-9]+]] = #44 +; CHECK-DAG: [[Rf1:r[0-9]+]] = #18 +; CHECK: v[[Hf:[0-9]+]]:[[Lf:[0-9]+]] = vshuff(v1,v0,[[Rf0]]) +; CHECK: v[[Hf]]:[[Lf]] = vshuff(v[[Hf]],v[[Lf]],[[Rf1]]) +; CHECK-NOT: v{{[0-9:]+}} = +define <128 x i8> @test_000f(<128 x i8> %v0) #0 { + %p = shufflevector <128 x i8> %v0, <128 x i8> undef, <128 x i32> + ret <128 x i8> %p +} + +attributes #0 = { nounwind readnone "target-cpu"="hexagonv60" "target-features"="+hvx,+hvx-length64b" } +