From: Bill Wendling Date: Thu, 31 Jan 2013 23:17:12 +0000 (+0000) Subject: Update the tests. X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=5e31474b9c8348e8d0404264ae6a8775e34df6ac;p=clang Update the tests. This update coincides with r174110. That change ordered the attributes alphabetically. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@174111 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/test/CodeGen/aarch64-arguments.c b/test/CodeGen/aarch64-arguments.c index 2255b8244d..b34ff93ec7 100644 --- a/test/CodeGen/aarch64-arguments.c +++ b/test/CodeGen/aarch64-arguments.c @@ -135,7 +135,7 @@ void f32(struct s32 a) {} struct s33 { float arr[3]; float a; }; void f33(struct s33 a) {} -// PCS: define void @f34(%struct.s34* sret noalias +// PCS: define void @f34(%struct.s34* noalias sret struct s34 { int a[4]; char b }; struct s34 f34(void) {} @@ -144,12 +144,12 @@ struct s35 {}; void f35(struct s35 a) {} // Check padding is added: -// PCS: @f36(i32 %x0, i32 %x1, i32 %x2, i32 %x3, i32 %x4, i32 %x5, i32 %x6, [1 x i64], %struct.s36* byval align 8 %stacked) +// PCS: @f36(i32 %x0, i32 %x1, i32 %x2, i32 %x3, i32 %x4, i32 %x5, i32 %x6, [1 x i64], %struct.s36* align 8 byval %stacked) struct s36 { long a, b; }; void f36(int x0, int x1, int x2, int x3, int x4, int x5, int x6, struct s36 stacked) {} // But only once: -// PCS: @f37(i32 %x0, i32 %x1, i32 %x2, i32 %x3, i32 %x4, i32 %x5, i32 %x6, [1 x i64], %struct.s37* byval align 8 %stacked, %struct.s37* byval align 8 %stacked2) +// PCS: @f37(i32 %x0, i32 %x1, i32 %x2, i32 %x3, i32 %x4, i32 %x5, i32 %x6, [1 x i64], %struct.s37* align 8 byval %stacked, %struct.s37* align 8 byval %stacked2) struct s37 { long a, b; }; void f37(int x0, int x1, int x2, int x3, int x4, int x5, int x6, struct s37 stacked, struct s37 stacked2) {} @@ -157,7 +157,7 @@ void f37(int x0, int x1, int x2, int x3, int x4, int x5, int x6, struct s37 stac // way which will have holes in when lowered further by LLVM. In particular [3 x // float] would be unacceptable. -// PCS: @f38(float %s0, double %d1, float %s2, float %s3, float %s4, float %s5, [2 x float], %struct.s38* byval align 4 %stacked) +// PCS: @f38(float %s0, double %d1, float %s2, float %s3, float %s4, float %s5, [2 x float], %struct.s38* align 4 byval %stacked) struct s38 { float a, b, c; }; void f38(float s0, double d1, float s2, float s3, float s4, float s5, struct s38 stacked) {} @@ -166,24 +166,24 @@ void f38(float s0, double d1, float s2, float s3, float s4, float s5, struct s38 struct s39_int { long a, b; }; struct s39_float { float a, b, c, d; }; enum s39_enum { Val1, Val2 }; -// PCS: @f39(float %s0, i32 %x0, float %s1, i32* %x1, float %s2, i32 %x2, float %s3, float %s4, i32 %x3, [3 x float], %struct.s39_float* byval align 4 %stacked, i32 %x4, i32 %x5, i32 %x6, [1 x i64], %struct.s39_int* byval align 8 %stacked2) +// PCS: @f39(float %s0, i32 %x0, float %s1, i32* %x1, float %s2, i32 %x2, float %s3, float %s4, i32 %x3, [3 x float], %struct.s39_float* align 4 byval %stacked, i32 %x4, i32 %x5, i32 %x6, [1 x i64], %struct.s39_int* align 8 byval %stacked2) void f39(float s0, int x0, float s1, int *x1, float s2, enum s39_enum x2, float s3, float s4, int x3, struct s39_float stacked, int x4, int x5, int x6, struct s39_int stacked2) {} struct s40 { __int128 a; }; -// PCS: @f40(i32 %x0, [1 x i128] %x2_3.coerce, i32 %x4, i32 %x5, i32 %x6, [1 x i64], %struct.s40* byval align 16 %stacked) +// PCS: @f40(i32 %x0, [1 x i128] %x2_3.coerce, i32 %x4, i32 %x5, i32 %x6, [1 x i64], %struct.s40* align 16 byval %stacked) void f40(int x0, struct s40 x2_3, int x4, int x5, int x6, struct s40 stacked) {} // Checking: __int128 will get properly aligned type, with padding so big struct doesn't use x7. struct s41 { int arr[5]; }; -// PCS: @f41(i32 %x0, i32 %x1, i32 %x2, i32 %x3, i32 %x4, i32 %x5, i32 %x6, [1 x i64], i128* byval align 16, %struct.s41* %stacked2) +// PCS: @f41(i32 %x0, i32 %x1, i32 %x2, i32 %x3, i32 %x4, i32 %x5, i32 %x6, [1 x i64], i128* align 16 byval, %struct.s41* %stacked2) int f41(int x0, int x1, int x2, int x3, int x4, int x5, int x6, __int128 stacked, struct s41 stacked2) {} // Checking: __int128 needing to be aligned in registers will consume correct // number. Previously padding was inserted before "stacked" because x6_7 was // "allocated" to x5 and x6 by clang. -// PCS: @f42(i32 %x0, i32 %x1, i32 %x2, i32 %x3, i32 %x4, i128 %x6_7, i128* byval align 16) +// PCS: @f42(i32 %x0, i32 %x1, i32 %x2, i32 %x3, i32 %x4, i128 %x6_7, i128* align 16 byval) void f42(int x0, int x1, int x2, int x3, int x4, __int128 x6_7, __int128 stacked) {} // Checking: __fp16 is extended to double when calling variadic functions diff --git a/test/CodeGen/arm-arguments.c b/test/CodeGen/arm-arguments.c index 026403f6e9..63ecd4c599 100644 --- a/test/CodeGen/arm-arguments.c +++ b/test/CodeGen/arm-arguments.c @@ -29,13 +29,13 @@ struct s4 { struct s4_0 { int f0; } f0; }; struct s4 f4(void) {} // APCS-GNU: define void @f5( -// APCS-GNU: struct.s5* sret noalias +// APCS-GNU: struct.s5* noalias sret // AAPCS: define arm_aapcscc i32 @f5() struct s5 { struct { } f0; int f1; }; struct s5 f5(void) {} // APCS-GNU: define void @f6( -// APCS-GNU: struct.s6* sret noalias +// APCS-GNU: struct.s6* noalias sret // AAPCS: define arm_aapcscc i32 @f6() struct s6 { int f0[1]; }; struct s6 f6(void) {} @@ -46,7 +46,7 @@ struct s7 { struct { int : 0; } f0; }; struct s7 f7(void) {} // APCS-GNU: define void @f8( -// APCS-GNU: struct.s8* sret noalias +// APCS-GNU: struct.s8* noalias sret // AAPCS: define arm_aapcscc void @f8() struct s8 { struct { int : 0; } f0[1]; }; struct s8 f8(void) {} @@ -62,7 +62,7 @@ struct s10 { int f0; int : 0; int : 0; }; struct s10 f10(void) {} // APCS-GNU: define void @f11( -// APCS-GNU: struct.s11* sret noalias +// APCS-GNU: struct.s11* noalias sret // AAPCS: define arm_aapcscc i32 @f11() struct s11 { int : 0; int f0; }; struct s11 f11(void) {} @@ -73,7 +73,7 @@ union u12 { char f0; short f1; int f2; }; union u12 f12(void) {} // APCS-GNU: define void @f13( -// APCS-GNU: struct.s13* sret noalias +// APCS-GNU: struct.s13* noalias sret // FIXME: This should return a float. // AAPCS-FIXME: darm_aapcscc efine float @f13() @@ -81,7 +81,7 @@ struct s13 { float f0; }; struct s13 f13(void) {} // APCS-GNU: define void @f14( -// APCS-GNU: union.u14* sret noalias +// APCS-GNU: union.u14* noalias sret // AAPCS: define arm_aapcscc i32 @f14() union u14 { float f0; }; union u14 f14(void) {} @@ -105,13 +105,13 @@ struct s18 { short f0; char f1 : 4; }; struct s18 f18(void) {} // APCS-GNU: define void @f19( -// APCS-GNU: struct.s19* sret noalias +// APCS-GNU: struct.s19* noalias sret // AAPCS: define arm_aapcscc i32 @f19() struct s19 { int f0; struct s8 f1; }; struct s19 f19(void) {} // APCS-GNU: define void @f20( -// APCS-GNU: struct.s20* sret noalias +// APCS-GNU: struct.s20* noalias sret // AAPCS: define arm_aapcscc i32 @f20() struct s20 { struct s8 f1; int f0; }; struct s20 f20(void) {} @@ -129,10 +129,10 @@ struct s21 f21(void) {} // APCS-GNU: define i128 @f27() // AAPCS: define arm_aapcscc i16 @f22() // AAPCS: define arm_aapcscc i32 @f23() -// AAPCS: define arm_aapcscc void @f24({{.*}} sret noalias -// AAPCS: define arm_aapcscc void @f25({{.*}} sret noalias -// AAPCS: define arm_aapcscc void @f26({{.*}} sret noalias -// AAPCS: define arm_aapcscc void @f27({{.*}} sret noalias +// AAPCS: define arm_aapcscc void @f24({{.*}} noalias sret +// AAPCS: define arm_aapcscc void @f25({{.*}} noalias sret +// AAPCS: define arm_aapcscc void @f26({{.*}} noalias sret +// AAPCS: define arm_aapcscc void @f27({{.*}} noalias sret _Complex char f22(void) {} _Complex short f23(void) {} _Complex int f24(void) {} @@ -150,8 +150,8 @@ struct s28 f28() {} struct s29 { _Complex short f0; }; struct s29 f29() {} -// APCS-GNU: define void @f30({{.*}} sret noalias -// AAPCS: define arm_aapcscc void @f30({{.*}} sret noalias +// APCS-GNU: define void @f30({{.*}} noalias sret +// AAPCS: define arm_aapcscc void @f30({{.*}} noalias sret struct s30 { _Complex int f0; }; struct s30 f30() {} diff --git a/test/CodeGen/arm-pnaclcall.c b/test/CodeGen/arm-pnaclcall.c index 009c80b0da..50259957eb 100644 --- a/test/CodeGen/arm-pnaclcall.c +++ b/test/CodeGen/arm-pnaclcall.c @@ -12,7 +12,7 @@ typedef struct { // CHECK: define i32 @f48(%struct.s1* byval %s) int __attribute__((pnaclcall)) f48(s1 s) { return s.a; } -// CHECK: define void @f49(%struct.s1* sret noalias %agg.result) +// CHECK: define void @f49(%struct.s1* noalias sret %agg.result) s1 __attribute__((pnaclcall)) f49() { s1 s; s.a = s.b = 1; return s; } union simple_union { diff --git a/test/CodeGen/arm-vector-arguments.c b/test/CodeGen/arm-vector-arguments.c index 2913fd69d3..9bdddb7269 100644 --- a/test/CodeGen/arm-vector-arguments.c +++ b/test/CodeGen/arm-vector-arguments.c @@ -9,7 +9,7 @@ #include -// CHECK: define void @f0(%struct.int8x16x2_t* sret noalias %agg.result, <16 x i8> %{{.*}}, <16 x i8> %{{.*}}) +// CHECK: define void @f0(%struct.int8x16x2_t* noalias sret %agg.result, <16 x i8> %{{.*}}, <16 x i8> %{{.*}}) int8x16x2_t f0(int8x16_t a0, int8x16_t a1) { return vzipq_s8(a0, a1); } @@ -25,7 +25,7 @@ typedef float T_float32x16 __attribute__ ((__vector_size__ (64))); T_float32x2 f1_0(T_float32x2 a0) { return a0; } // CHECK: define <4 x float> @f1_1(<4 x float> %{{.*}}) T_float32x4 f1_1(T_float32x4 a0) { return a0; } -// CHECK: define void @f1_2(<8 x float>* sret noalias %{{.*}}, <8 x float> %{{.*}}) +// CHECK: define void @f1_2(<8 x float>* noalias sret %{{.*}}, <8 x float> %{{.*}}) T_float32x8 f1_2(T_float32x8 a0) { return a0; } -// CHECK: define void @f1_3(<16 x float>* sret noalias %{{.*}}, <16 x float> %{{.*}}) +// CHECK: define void @f1_3(<16 x float>* noalias sret %{{.*}}, <16 x float> %{{.*}}) T_float32x16 f1_3(T_float32x16 a0) { return a0; } diff --git a/test/CodeGen/attr-naked.c b/test/CodeGen/attr-naked.c index 2387d288ec..7b42ef8e71 100644 --- a/test/CodeGen/attr-naked.c +++ b/test/CodeGen/attr-naked.c @@ -4,13 +4,13 @@ void t1() __attribute__((naked)); // Basic functionality check // (Note that naked needs to imply noinline to work properly.) -// CHECK: define void @t1() nounwind noinline naked { +// CHECK: define void @t1() naked noinline nounwind { void t1() { } // Make sure this doesn't explode in the verifier. // (It doesn't really make sense, but it isn't invalid.) -// CHECK: define void @t2() nounwind noinline naked { +// CHECK: define void @t2() naked noinline nounwind { __attribute((naked, always_inline)) void t2() { } diff --git a/test/CodeGen/blocks.c b/test/CodeGen/blocks.c index 7ac18703d7..5610313e9f 100644 --- a/test/CodeGen/blocks.c +++ b/test/CodeGen/blocks.c @@ -12,7 +12,7 @@ struct s0 { int a[64]; }; -// CHECK: define internal void @__f2_block_invoke(%struct.s0* sret noalias {{%.*}}, i8* {{%.*}}, %struct.s0* byval align 4 {{.*}}) +// CHECK: define internal void @__f2_block_invoke(%struct.s0* noalias sret {{%.*}}, i8* {{%.*}}, %struct.s0* align 4 byval {{.*}}) struct s0 f2(struct s0 a0) { return ^(struct s0 a1){ return a1; }(a0); } diff --git a/test/CodeGen/function-attributes.c b/test/CodeGen/function-attributes.c index 886bd8d2fb..ab3447641d 100644 --- a/test/CodeGen/function-attributes.c +++ b/test/CodeGen/function-attributes.c @@ -25,8 +25,8 @@ void f6(signed short x) { } void f7(unsigned short x) { } // CHECK: define void @f8() -// CHECK: nounwind // CHECK: alwaysinline +// CHECK: nounwind // CHECK: { void __attribute__((always_inline)) f8(void) { } @@ -56,7 +56,7 @@ int f12(int arg) { return arg ? 0 : f10_t(); } -// CHECK: define void @f13() nounwind readnone +// CHECK: define void @f13() nounwind optsize readnone void f13(void) __attribute__((pure)) __attribute__((const)); void f13(void){} diff --git a/test/CodeGen/le32-arguments.c b/test/CodeGen/le32-arguments.c index 2e2ac9c66f..2cbbc0fbea 100644 --- a/test/CodeGen/le32-arguments.c +++ b/test/CodeGen/le32-arguments.c @@ -17,7 +17,7 @@ typedef struct { int cc; } s2; // Structs should be returned sret and not simplified by the frontend -// CHECK: define void @f2(%struct.s2* sret noalias %agg.result) +// CHECK: define void @f2(%struct.s2* noalias sret %agg.result) s2 f2() { s2 foo; return foo; diff --git a/test/CodeGen/le32-regparm.c b/test/CodeGen/le32-regparm.c index 6ab5a11106..8c1ae5eb45 100644 --- a/test/CodeGen/le32-regparm.c +++ b/test/CodeGen/le32-regparm.c @@ -34,7 +34,7 @@ int main(void) { // The presence of double c means that foo* d is not passed inreg. This // behavior is different from current x86-32 behavior - // CHECK: call void @reduced(i8 signext inreg 0, {{.*}} %struct.foo* null + // CHECK: call void @reduced(i8 inreg signext 0, {{.*}} %struct.foo* null reduced(0, 0.0, 0, 0.0, 0); // CHECK: call void {{.*}}(i32 inreg 1, i32 inreg 2) bar(1,2); diff --git a/test/CodeGen/mips-vector-return.c b/test/CodeGen/mips-vector-return.c index c2aaf810a4..0bff969690 100644 --- a/test/CodeGen/mips-vector-return.c +++ b/test/CodeGen/mips-vector-return.c @@ -8,14 +8,14 @@ typedef float v4sf __attribute__ ((__vector_size__ (16))); typedef double v4df __attribute__ ((__vector_size__ (32))); typedef int v4i32 __attribute__ ((__vector_size__ (16))); -// O32: define void @test_v4sf(<4 x float>* sret noalias nocapture +// O32: define void @test_v4sf(<4 x float>* noalias nocapture sret // N64: define { i64, i64 } @test_v4sf v4sf test_v4sf(float a) { return (v4sf){0.0f, a, 0.0f, 0.0f}; } -// O32: define void @test_v4df(<4 x double>* sret noalias nocapture -// N64: define void @test_v4df(<4 x double>* sret noalias nocapture +// O32: define void @test_v4df(<4 x double>* noalias nocapture sret +// N64: define void @test_v4df(<4 x double>* noalias nocapture sret v4df test_v4df(double a) { return (v4df){0.0, a, 0.0, 0.0}; } diff --git a/test/CodeGen/mips64-nontrivial-return.cpp b/test/CodeGen/mips64-nontrivial-return.cpp index aa9cbae2c4..2164b20c18 100644 --- a/test/CodeGen/mips64-nontrivial-return.cpp +++ b/test/CodeGen/mips64-nontrivial-return.cpp @@ -10,7 +10,7 @@ class D : public B { extern D gd0; -// CHECK: _Z4foo1v(%class.D* sret noalias nocapture +// CHECK: _Z4foo1v(%class.D* noalias nocapture sret D foo1(void) { return gd0; diff --git a/test/CodeGen/mips64-padding-arg.c b/test/CodeGen/mips64-padding-arg.c index 22b7fe7781..85dc00c905 100644 --- a/test/CodeGen/mips64-padding-arg.c +++ b/test/CodeGen/mips64-padding-arg.c @@ -32,7 +32,7 @@ void foo3(int a0, long double a1) { // Insert padding after hidden argument. // -// N64: define void @foo5(%struct.S0* sret noalias %agg.result, i64, fp128 %a0) +// N64: define void @foo5(%struct.S0* noalias sret %agg.result, i64, fp128 %a0) // N64: call void @foo6(%struct.S0* sret %agg.result, i32 1, i32 2, i64 undef, fp128 %a0) // N64: declare void @foo6(%struct.S0* sret, i32, i32, i64, fp128) diff --git a/test/CodeGen/ms-declspecs.c b/test/CodeGen/ms-declspecs.c index 91862a73b0..7158e28f0e 100644 --- a/test/CodeGen/ms-declspecs.c +++ b/test/CodeGen/ms-declspecs.c @@ -8,14 +8,14 @@ union { struct S s; } u; // CHECK: @u = {{.*}}zeroinitializer, align 16 -// CHECK: define void @t3() nounwind noinline naked { +// CHECK: define void @t3() naked noinline nounwind { __declspec(naked) void t3() {} // CHECK: define void @t22() nounwind void __declspec(nothrow) t22(); void t22() {} -// CHECK: define void @t2() nounwind noinline { +// CHECK: define void @t2() noinline nounwind { __declspec(noinline) void t2() {} // CHECK: call void @f20_t() diff --git a/test/CodeGen/pragma-weak.c b/test/CodeGen/pragma-weak.c index 2efc2ebc28..13e62376e5 100644 --- a/test/CodeGen/pragma-weak.c +++ b/test/CodeGen/pragma-weak.c @@ -136,7 +136,7 @@ void __both3(void) {} void __a1(void) __attribute((noinline)); #pragma weak a1 = __a1 void __a1(void) {} -// CHECK: define void @__a1() {{.*}} noinline +// CHECK: define void @__a1() noinline // attributes introduced BEFORE a combination of #pragma weak and alias() // hold... @@ -144,11 +144,11 @@ void __a3(void) __attribute((noinline)); #pragma weak a3 = __a3 void a3(void) __attribute((alias("__a3"))); void __a3(void) {} -// CHECK: define void @__a3() {{.*}} noinline +// CHECK: define void @__a3() noinline #pragma weak xxx = __xxx __attribute((pure,noinline,const,fastcall)) void __xxx(void) { } -// CHECK: void @__xxx() {{.*}} noinline +// CHECK: void @__xxx() noinline ///////////// PR10878: Make sure we can call a weak alias void SHA512Pad(void *context) {} diff --git a/test/CodeGen/regparm-struct.c b/test/CodeGen/regparm-struct.c index b31901266e..028730ad1b 100644 --- a/test/CodeGen/regparm-struct.c +++ b/test/CodeGen/regparm-struct.c @@ -170,7 +170,7 @@ struct s13 { } y; }; __attribute__((regparm(3))) void f18(struct s13 a, int b, int c, int d); -// CHECK: declare void @f18(%struct.s13* byval align 4, i32 inreg, i32 inreg, i32 inreg) +// CHECK: declare void @f18(%struct.s13* align 4 byval, i32 inreg, i32 inreg, i32 inreg) void g18(void) { struct s13 x = {{41}}; f18(x, 42, 43, 44); diff --git a/test/CodeGen/regparm.c b/test/CodeGen/regparm.c index d628b685f9..4c3752c56a 100644 --- a/test/CodeGen/regparm.c +++ b/test/CodeGen/regparm.c @@ -20,7 +20,7 @@ void f1(int i, int j, int k) { } int main(void) { - // CHECK: call void @reduced(i8 signext inreg 0, {{.*}} %struct.foo* inreg null + // CHECK: call void @reduced(i8 inreg signext 0, {{.*}} %struct.foo* inreg null reduced(0, 0.0, 0, 0.0, 0); // CHECK: call x86_stdcallcc void {{.*}}(i32 inreg 1, i32 inreg 2) bar(1,2); diff --git a/test/CodeGen/stdcall-fastcall.c b/test/CodeGen/stdcall-fastcall.c index d518178822..89d7f5334a 100644 --- a/test/CodeGen/stdcall-fastcall.c +++ b/test/CodeGen/stdcall-fastcall.c @@ -89,7 +89,7 @@ struct S2 { void __attribute__((fastcall)) foo5(struct S2 y); void bar5(struct S2 y) { // CHECK: define void @bar5 - // CHECK: call x86_fastcallcc void @foo5(%struct.S2* byval align 4 % + // CHECK: call x86_fastcallcc void @foo5(%struct.S2* align 4 byval % foo5(y); } @@ -117,7 +117,7 @@ void bar8(struct S1 a, int b) { void __attribute__((fastcall)) foo9(struct S2 a, int b); void bar9(struct S2 a, int b) { // CHECK: define void @bar9 - // CHECK: call x86_fastcallcc void @foo9(%struct.S2* byval align 4 %{{.*}}, i32 % + // CHECK: call x86_fastcallcc void @foo9(%struct.S2* align 4 byval %{{.*}}, i32 % foo9(a, b); } diff --git a/test/CodeGen/struct-passing.c b/test/CodeGen/struct-passing.c index efb00efd53..0ef6cf009a 100644 --- a/test/CodeGen/struct-passing.c +++ b/test/CodeGen/struct-passing.c @@ -20,5 +20,5 @@ void *ps[] = { f0, f1, f2, f3, f4, f5 }; // CHECK: declare i32 @f1() nounwind readonly // CHECK: declare void @f2({{.*}} sret) // CHECK: declare void @f3({{.*}} sret) -// CHECK: declare void @f4({{.*}} byval align 4) -// CHECK: declare void @f5({{.*}} byval align 4) +// CHECK: declare void @f4({{.*}} align 4 byval) +// CHECK: declare void @f5({{.*}} align 4 byval) diff --git a/test/CodeGen/transparent-union.c b/test/CodeGen/transparent-union.c index afdb3d6090..823bcd45e1 100644 --- a/test/CodeGen/transparent-union.c +++ b/test/CodeGen/transparent-union.c @@ -11,7 +11,7 @@ typedef union { void f0(transp_t0 obj); // CHECK: define void @f1_0(i32* %a0) -// CHECK: call void @f0(%union.transp_t0* byval align 4 %{{.*}}) +// CHECK: call void @f0(%union.transp_t0* align 4 byval %{{.*}}) // CHECK: call void %{{.*}}(i8* %{{[a-z0-9]*}}) // CHECK: } void f1_0(int *a0) { diff --git a/test/CodeGen/x86_32-arguments-darwin.c b/test/CodeGen/x86_32-arguments-darwin.c index e3a9f33f01..6f67396ac8 100644 --- a/test/CodeGen/x86_32-arguments-darwin.c +++ b/test/CodeGen/x86_32-arguments-darwin.c @@ -52,7 +52,7 @@ void f8_2(struct s8 a0) {} // FIXME: llvm-gcc expands this, this may have some value for the // backend in terms of optimization but doesn't change the ABI. -// CHECK: define void @f9_2(%struct.s9* byval align 4 %a0) +// CHECK: define void @f9_2(%struct.s9* align 4 byval %a0) struct s9 { int a : 17; int b; @@ -71,7 +71,7 @@ struct s10 { // Small vectors and 1 x {i64,double} are returned in registers // CHECK: i32 @f11() -// CHECK: void @f12(<2 x i32>* sret noalias %agg.result) +// CHECK: void @f12(<2 x i32>* noalias sret %agg.result) // CHECK: i64 @f13() // CHECK: i64 @f14() // CHECK: <2 x i64> @f15() @@ -93,11 +93,11 @@ T16 f16(void) { while (1) {} } // 128-bits). // CHECK: i32 @f17() -// CHECK: void @f18(%{{.*}}* sret noalias %agg.result) -// CHECK: void @f19(%{{.*}}* sret noalias %agg.result) -// CHECK: void @f20(%{{.*}}* sret noalias %agg.result) -// CHECK: void @f21(%{{.*}}* sret noalias %agg.result) -// CHECK: void @f22(%{{.*}}* sret noalias %agg.result) +// CHECK: void @f18(%{{.*}}* noalias sret %agg.result) +// CHECK: void @f19(%{{.*}}* noalias sret %agg.result) +// CHECK: void @f20(%{{.*}}* noalias sret %agg.result) +// CHECK: void @f21(%{{.*}}* noalias sret %agg.result) +// CHECK: void @f22(%{{.*}}* noalias sret %agg.result) struct { T11 a; } f17(void) { while (1) {} } struct { T12 a; } f18(void) { while (1) {} } struct { T13 a; } f19(void) { while (1) {} } @@ -116,11 +116,11 @@ struct { struct {} a; struct { float a[1]; } b; } f25(void) { while (1) {} } // Small structures are handled recursively // CHECK: i32 @f26() -// CHECK: void @f27(%struct.s27* sret noalias %agg.result) +// CHECK: void @f27(%struct.s27* noalias sret %agg.result) struct s26 { struct { char a, b; } a; struct { char a, b; } b; } f26(void) { while (1) {} } struct s27 { struct { char a, b, c; } a; struct { char a; } b; } f27(void) { while (1) {} } -// CHECK: void @f28(%struct.s28* sret noalias %agg.result) +// CHECK: void @f28(%struct.s28* noalias sret %agg.result) struct s28 { int a; int b[]; } f28(void) { while (1) {} } // CHECK: define i16 @f29() @@ -150,10 +150,10 @@ struct s36 { struct { int : 0; } a[2][10]; char b; char c; } f36(void) { while ( // CHECK: define float @f37() struct s37 { float c[1][1]; } f37(void) { while (1) {} } -// CHECK: define void @f38(%struct.s38* sret noalias %agg.result) +// CHECK: define void @f38(%struct.s38* noalias sret %agg.result) struct s38 { char a[3]; short b; } f38(void) { while (1) {} } -// CHECK: define void @f39(%struct.s39* byval align 16 %x) +// CHECK: define void @f39(%struct.s39* align 16 byval %x) typedef int v39 __attribute((vector_size(16))); struct s39 { v39 x; }; void f39(struct s39 x) {} @@ -201,13 +201,13 @@ void f50(struct s50 a0) { } struct s51 { vvbp f0; int f1; }; void f51(struct s51 a0) { } -// CHECK: define void @f52(%struct.s52* byval align 4) +// CHECK: define void @f52(%struct.s52* align 4 byval) struct s52 { long double a; }; void f52(struct s52 x) {} -// CHECK: define void @f53(%struct.s53* byval align 4) +// CHECK: define void @f53(%struct.s53* align 4 byval) struct __attribute__((aligned(32))) s53 { int x; int y; @@ -228,22 +228,22 @@ typedef int v4i32 __attribute__((__vector_size__(16))); v4i32 f55(v4i32 arg) { return arg+arg; } // CHECK: define void @f56( -// CHECK: i8 signext %a0, %struct.s56_0* byval align 4 %a1, -// CHECK: x86_mmx %a2.coerce, %struct.s56_1* byval align 4, -// CHECK: i64 %a4.coerce, %struct.s56_2* byval align 4, -// CHECK: <4 x i32> %a6, %struct.s56_3* byval align 16 %a7, -// CHECK: <2 x double> %a8, %struct.s56_4* byval align 16 %a9, -// CHECK: <8 x i32> %a10, %struct.s56_5* byval align 4, -// CHECK: <4 x double> %a12, %struct.s56_6* byval align 4) +// CHECK: i8 signext %a0, %struct.s56_0* align 4 byval %a1, +// CHECK: x86_mmx %a2.coerce, %struct.s56_1* align 4 byval, +// CHECK: i64 %a4.coerce, %struct.s56_2* align 4 byval, +// CHECK: <4 x i32> %a6, %struct.s56_3* align 16 byval %a7, +// CHECK: <2 x double> %a8, %struct.s56_4* align 16 byval %a9, +// CHECK: <8 x i32> %a10, %struct.s56_5* align 4 byval, +// CHECK: <4 x double> %a12, %struct.s56_6* align 4 byval) // CHECK: call void (i32, ...)* @f56_0(i32 1, -// CHECK: i32 %{{[^ ]*}}, %struct.s56_0* byval align 4 %{{[^ ]*}}, -// CHECK: x86_mmx %{{[^ ]*}}, %struct.s56_1* byval align 4 %{{[^ ]*}}, -// CHECK: i64 %{{[^ ]*}}, %struct.s56_2* byval align 4 %{{[^ ]*}}, -// CHECK: <4 x i32> %{{[^ ]*}}, %struct.s56_3* byval align 16 %{{[^ ]*}}, -// CHECK: <2 x double> %{{[^ ]*}}, %struct.s56_4* byval align 16 %{{[^ ]*}}, -// CHECK: <8 x i32> {{[^ ]*}}, %struct.s56_5* byval align 4 %{{[^ ]*}}, -// CHECK: <4 x double> {{[^ ]*}}, %struct.s56_6* byval align 4 %{{[^ ]*}}) +// CHECK: i32 %{{[^ ]*}}, %struct.s56_0* align 4 byval %{{[^ ]*}}, +// CHECK: x86_mmx %{{[^ ]*}}, %struct.s56_1* align 4 byval %{{[^ ]*}}, +// CHECK: i64 %{{[^ ]*}}, %struct.s56_2* align 4 byval %{{[^ ]*}}, +// CHECK: <4 x i32> %{{[^ ]*}}, %struct.s56_3* align 16 byval %{{[^ ]*}}, +// CHECK: <2 x double> %{{[^ ]*}}, %struct.s56_4* align 16 byval %{{[^ ]*}}, +// CHECK: <8 x i32> {{[^ ]*}}, %struct.s56_5* align 4 byval %{{[^ ]*}}, +// CHECK: <4 x double> {{[^ ]*}}, %struct.s56_6* align 4 byval %{{[^ ]*}}) // CHECK: } // // [i386] clang misaligns long double in structures @@ -289,16 +289,16 @@ void f58(union u58 x) {} struct s59 { float x __attribute((aligned(8))); }; struct s59 f59() { while (1) {} } -// CHECK: define void @f60(%struct.s60* byval align 4, i32 %y) +// CHECK: define void @f60(%struct.s60* align 4 byval, i32 %y) struct s60 { int x __attribute((aligned(8))); }; void f60(struct s60 x, int y) {} -// CHECK: define void @f61(i32 %x, %struct.s61* byval align 16 %y) +// CHECK: define void @f61(i32 %x, %struct.s61* align 16 byval %y) typedef int T61 __attribute((vector_size(16))); struct s61 { T61 x; int y; }; void f61(int x, struct s61 y) {} -// CHECK: define void @f62(i32 %x, %struct.s62* byval align 4) +// CHECK: define void @f62(i32 %x, %struct.s62* align 4 byval) typedef int T62 __attribute((vector_size(16))); struct s62 { T62 x; int y; } __attribute((packed, aligned(8))); void f62(int x, struct s62 y) {} @@ -317,7 +317,7 @@ int f63(int i, ...) { return s.y; } -// CHECK: define void @f64(%struct.s64* byval align 4 %x) +// CHECK: define void @f64(%struct.s64* align 4 byval %x) struct s64 { signed char a[0]; signed char b[]; }; void f64(struct s64 x) {} @@ -341,4 +341,4 @@ T66 f66(int i, ...) { // PR14453 struct s67 { _Complex unsigned short int a; }; void f67(struct s67 x) {} -// CHECK: define void @f67(%struct.s67* byval align 4 %x) +// CHECK: define void @f67(%struct.s67* align 4 byval %x) diff --git a/test/CodeGen/x86_32-arguments-linux.c b/test/CodeGen/x86_32-arguments-linux.c index 81dcaf6af5..0ffbed8e75 100644 --- a/test/CodeGen/x86_32-arguments-linux.c +++ b/test/CodeGen/x86_32-arguments-linux.c @@ -2,22 +2,22 @@ // RUN: FileCheck < %t %s // CHECK: define void @f56( -// CHECK: i8 signext %a0, %struct.s56_0* byval align 4 %a1, -// CHECK: x86_mmx %a2.coerce, %struct.s56_1* byval align 4, -// CHECK: <1 x double> %a4, %struct.s56_2* byval align 4, -// CHECK: <4 x i32> %a6, %struct.s56_3* byval align 4, -// CHECK: <2 x double> %a8, %struct.s56_4* byval align 4, -// CHECK: <8 x i32> %a10, %struct.s56_5* byval align 4, -// CHECK: <4 x double> %a12, %struct.s56_6* byval align 4) +// CHECK: i8 signext %a0, %struct.s56_0* align 4 byval %a1, +// CHECK: x86_mmx %a2.coerce, %struct.s56_1* align 4 byval, +// CHECK: <1 x double> %a4, %struct.s56_2* align 4 byval, +// CHECK: <4 x i32> %a6, %struct.s56_3* align 4 byval, +// CHECK: <2 x double> %a8, %struct.s56_4* align 4 byval, +// CHECK: <8 x i32> %a10, %struct.s56_5* align 4 byval, +// CHECK: <4 x double> %a12, %struct.s56_6* align 4 byval) // CHECK: call void (i32, ...)* @f56_0(i32 1, -// CHECK: i32 %{{.*}}, %struct.s56_0* byval align 4 %{{[^ ]*}}, -// CHECK: x86_mmx %{{[^ ]*}}, %struct.s56_1* byval align 4 %{{[^ ]*}}, -// CHECK: <1 x double> %{{[^ ]*}}, %struct.s56_2* byval align 4 %{{[^ ]*}}, -// CHECK: <4 x i32> %{{[^ ]*}}, %struct.s56_3* byval align 4 %{{[^ ]*}}, -// CHECK: <2 x double> %{{[^ ]*}}, %struct.s56_4* byval align 4 %{{[^ ]*}}, -// CHECK: <8 x i32> %{{[^ ]*}}, %struct.s56_5* byval align 4 %{{[^ ]*}}, -// CHECK: <4 x double> %{{[^ ]*}}, %struct.s56_6* byval align 4 %{{[^ ]*}}) +// CHECK: i32 %{{.*}}, %struct.s56_0* align 4 byval %{{[^ ]*}}, +// CHECK: x86_mmx %{{[^ ]*}}, %struct.s56_1* align 4 byval %{{[^ ]*}}, +// CHECK: <1 x double> %{{[^ ]*}}, %struct.s56_2* align 4 byval %{{[^ ]*}}, +// CHECK: <4 x i32> %{{[^ ]*}}, %struct.s56_3* align 4 byval %{{[^ ]*}}, +// CHECK: <2 x double> %{{[^ ]*}}, %struct.s56_4* align 4 byval %{{[^ ]*}}, +// CHECK: <8 x i32> %{{[^ ]*}}, %struct.s56_5* align 4 byval %{{[^ ]*}}, +// CHECK: <4 x double> %{{[^ ]*}}, %struct.s56_6* align 4 byval %{{[^ ]*}}) // CHECK: } // // [i386] clang misaligns long double in structures diff --git a/test/CodeGen/x86_32-arguments-realign.c b/test/CodeGen/x86_32-arguments-realign.c index b08862ee43..8dca6c53f0 100644 --- a/test/CodeGen/x86_32-arguments-realign.c +++ b/test/CodeGen/x86_32-arguments-realign.c @@ -1,7 +1,7 @@ // RUN: %clang_cc1 -w -fblocks -triple i386-apple-darwin9 -emit-llvm -o %t %s // RUN: FileCheck < %t %s -// CHECK: define void @f0(%struct.s0* byval align 4) +// CHECK: define void @f0(%struct.s0* align 4 byval) // CHECK: call void @llvm.memcpy.p0i8.p0i8.i32(i8* %{{.*}}, i8* %{{.*}}, i32 16, i32 4, i1 false) // CHECK: } struct s0 { long double a; }; diff --git a/test/CodeGen/x86_64-arguments-nacl.c b/test/CodeGen/x86_64-arguments-nacl.c index c5ae36085d..8015928306 100644 --- a/test/CodeGen/x86_64-arguments-nacl.c +++ b/test/CodeGen/x86_64-arguments-nacl.c @@ -61,14 +61,14 @@ void f12_1(struct s12 a0) {} // Check that sret parameter is accounted for when checking available integer // registers. -// CHECK: define void @f13(%struct.s13_0* sret noalias %agg.result, i32 %a, i32 %b, i32 %c, i32 %d, {{.*}}* byval align 8 %e, i32 %f) +// CHECK: define void @f13(%struct.s13_0* noalias sret %agg.result, i32 %a, i32 %b, i32 %c, i32 %d, {{.*}}* align 8 byval %e, i32 %f) struct s13_0 { long long f0[3]; }; struct s13_1 { long long f0[2]; }; struct s13_0 f13(int a, int b, int c, int d, struct s13_1 e, int f) { while (1) {} } -// CHECK: define void @f20(%struct.s20* byval align 32 %x) +// CHECK: define void @f20(%struct.s20* align 32 byval %x) struct __attribute__((aligned(32))) s20 { int x; int y; @@ -99,7 +99,7 @@ typedef struct { // CHECK: define i32 @f48(%struct.s1* byval %s) int __attribute__((pnaclcall)) f48(s1 s) { return s.a; } -// CHECK: define void @f49(%struct.s1* sret noalias %agg.result) +// CHECK: define void @f49(%struct.s1* noalias sret %agg.result) s1 __attribute__((pnaclcall)) f49() { s1 s; s.a = s.b = 1; return s; } union simple_union { diff --git a/test/CodeGen/x86_64-arguments.c b/test/CodeGen/x86_64-arguments.c index 120277b373..c8ef5eb996 100644 --- a/test/CodeGen/x86_64-arguments.c +++ b/test/CodeGen/x86_64-arguments.c @@ -43,8 +43,8 @@ void f7(e7 a0) { // Test merging/passing of upper eightbyte with X87 class. // -// CHECK: define void @f8_1(%union.u8* sret noalias %agg.result) -// CHECK: define void @f8_2(%union.u8* byval align 16 %a0) +// CHECK: define void @f8_1(%union.u8* noalias sret %agg.result) +// CHECK: define void @f8_2(%union.u8* align 16 byval %a0) union u8 { long double a; int b; @@ -59,7 +59,7 @@ struct s9 { int a; int b; int : 0; } f9(void) { while (1) {} } struct s10 { int a; int b; int : 0; }; void f10(struct s10 a0) {} -// CHECK: define void @f11(%union.anon* sret noalias %agg.result) +// CHECK: define void @f11(%union.anon* noalias sret %agg.result) union { long double a; float b; } f11() { while (1) {} } // CHECK: define i32 @f12_0() @@ -70,7 +70,7 @@ void f12_1(struct s12 a0) {} // Check that sret parameter is accounted for when checking available integer // registers. -// CHECK: define void @f13(%struct.s13_0* sret noalias %agg.result, i32 %a, i32 %b, i32 %c, i32 %d, {{.*}}* byval align 8 %e, i32 %f) +// CHECK: define void @f13(%struct.s13_0* noalias sret %agg.result, i32 %a, i32 %b, i32 %c, i32 %d, {{.*}}* align 8 byval %e, i32 %f) struct s13_0 { long long f0[3]; }; struct s13_1 { long long f0[2]; }; @@ -100,13 +100,13 @@ void f18(int a, struct f18_s0 f18_arg1) { while (1) {} } // Check byval alignment. -// CHECK: define void @f19(%struct.s19* byval align 16 %x) +// CHECK: define void @f19(%struct.s19* align 16 byval %x) struct s19 { long double a; }; void f19(struct s19 x) {} -// CHECK: define void @f20(%struct.s20* byval align 32 %x) +// CHECK: define void @f20(%struct.s20* align 32 byval %x) struct __attribute__((aligned(32))) s20 { int x; int y; @@ -245,7 +245,7 @@ typedef unsigned long v1i64_2 __attribute__((__vector_size__(8))); v1i64_2 f35(v1i64_2 arg) { return arg+arg; } // rdar://9122143 -// CHECK: declare void @func(%struct._str* byval align 16) +// CHECK: declare void @func(%struct._str* align 16 byval) typedef struct _str { union { long double a; @@ -266,8 +266,8 @@ v2i32 f36(v2i32 arg) { return arg; } // AVX: declare void @f38(<8 x float>) // AVX: declare void @f37(<8 x float>) -// CHECK: declare void @f38(%struct.s256* byval align 32) -// CHECK: declare void @f37(<8 x float>* byval align 32) +// CHECK: declare void @f38(%struct.s256* align 32 byval) +// CHECK: declare void @f37(<8 x float>* align 32 byval) typedef float __m256 __attribute__ ((__vector_size__ (32))); typedef struct { __m256 m; @@ -283,7 +283,7 @@ void f39() { f38(x38); f37(x37); } // The two next tests make sure that the struct below is passed // in the same way regardless of avx being used -// CHECK: declare void @func40(%struct.t128* byval align 16) +// CHECK: declare void @func40(%struct.t128* align 16 byval) typedef float __m128 __attribute__ ((__vector_size__ (16))); typedef struct t128 { __m128 m; @@ -295,7 +295,7 @@ void func41(two128 s) { func40(s); } -// CHECK: declare void @func42(%struct.t128_2* byval align 16) +// CHECK: declare void @func42(%struct.t128_2* align 16 byval) typedef struct xxx { __m128 array[2]; } Atwo128; @@ -341,7 +341,7 @@ void test45() { f45(x45); } // Make sure we use byval to pass 64-bit vectors in memory; the LLVM call // lowering can't handle this case correctly because it runs after legalization. // CHECK: @test46 -// CHECK: call void @f46({{.*}}<2 x float>* byval align 8 {{.*}}, <2 x float>* byval align 8 {{.*}}) +// CHECK: call void @f46({{.*}}<2 x float>* align 8 byval {{.*}}, <2 x float>* align 8 byval {{.*}}) typedef float v46 __attribute((vector_size(8))); void f46(v46,v46,v46,v46,v46,v46,v46,v46,v46,v46); void test46() { v46 x = {1,2}; f46(x,x,x,x,x,x,x,x,x,x); } diff --git a/test/CodeGenCXX/lambda-expressions.cpp b/test/CodeGenCXX/lambda-expressions.cpp index 54ee57aef9..ce20399c57 100644 --- a/test/CodeGenCXX/lambda-expressions.cpp +++ b/test/CodeGenCXX/lambda-expressions.cpp @@ -91,7 +91,7 @@ void staticarrayref(){ }(); } -// CHECK: define internal void @"_ZZ1hvEN3$_88__invokeEv"(%struct.A* sret noalias %agg.result) +// CHECK: define internal void @"_ZZ1hvEN3$_88__invokeEv"(%struct.A* noalias sret %agg.result) // CHECK-NOT: = // CHECK: call void @"_ZZ1hvENK3$_8clEv"(%struct.A* sret %agg.result, // CHECK-NEXT: ret void diff --git a/test/CodeGenCXX/noinline-template.cpp b/test/CodeGenCXX/noinline-template.cpp index 6ee3935bc0..9559fde906 100644 --- a/test/CodeGenCXX/noinline-template.cpp +++ b/test/CodeGenCXX/noinline-template.cpp @@ -3,7 +3,7 @@ // This was a problem in Sema, but only shows up as noinline missing // in CodeGen. -// CHECK: define linkonce_odr void @_ZN6VectorIiE13growStorageByEv(%struct.Vector* %this) nounwind noinline +// CHECK: define linkonce_odr void @_ZN6VectorIiE13growStorageByEv(%struct.Vector* %this) noinline nounwind template struct Vector { void growStorageBy(); diff --git a/test/CodeGenCXX/regparm.cpp b/test/CodeGenCXX/regparm.cpp index 2196c798bf..5fa00e74fd 100644 --- a/test/CodeGenCXX/regparm.cpp +++ b/test/CodeGenCXX/regparm.cpp @@ -32,7 +32,7 @@ struct S3 { } a; }; __attribute((regparm(2))) void foo4(S3 a, int b); -// CHECK: declare void @_Z4foo42S3i(%struct.S3* byval align 4, i32 inreg) +// CHECK: declare void @_Z4foo42S3i(%struct.S3* align 4 byval, i32 inreg) void bar3(S3 a, int b) { foo4(a, b); } diff --git a/test/CodeGenCXX/temporaries.cpp b/test/CodeGenCXX/temporaries.cpp index 1335a35bc4..a369c2e369 100644 --- a/test/CodeGenCXX/temporaries.cpp +++ b/test/CodeGenCXX/temporaries.cpp @@ -395,7 +395,7 @@ namespace Elision { // CHECK-NEXT: call void @_ZN7Elision1AD1Ev([[A]]* [[I]]) } - // CHECK: define void @_ZN7Elision5test2Ev([[A]]* sret noalias + // CHECK: define void @_ZN7Elision5test2Ev([[A]]* noalias sret A test2() { // CHECK: call void @_ZN7Elision3fooEv() // CHECK-NEXT: call void @_ZN7Elision1AC1Ev([[A]]* [[RET:%.*]]) @@ -403,7 +403,7 @@ namespace Elision { return (foo(), A()); } - // CHECK: define void @_ZN7Elision5test3EiNS_1AE([[A]]* sret noalias + // CHECK: define void @_ZN7Elision5test3EiNS_1AE([[A]]* noalias sret A test3(int v, A x) { if (v < 5) // CHECK: call void @_ZN7Elision1AC1Ev([[A]]* [[RET:%.*]]) @@ -444,7 +444,7 @@ namespace Elision { } // rdar://problem/8433352 - // CHECK: define void @_ZN7Elision5test5Ev([[A]]* sret noalias + // CHECK: define void @_ZN7Elision5test5Ev([[A]]* noalias sret struct B { A a; B(); }; A test5() { // CHECK: [[AT0:%.*]] = alloca [[A]], align 8 diff --git a/test/CodeGenCXX/x86_32-arguments.cpp b/test/CodeGenCXX/x86_32-arguments.cpp index 1e6fbb7cd7..3e6ed8ff08 100644 --- a/test/CodeGenCXX/x86_32-arguments.cpp +++ b/test/CodeGenCXX/x86_32-arguments.cpp @@ -6,7 +6,7 @@ struct S { short s; }; -// CHECK: define void @_Z1fv(%struct.S* sret noalias % +// CHECK: define void @_Z1fv(%struct.S* noalias sret % S f() { return S(); } // CHECK: define void @_Z1f1S(%struct.S*) void f(S) { } @@ -18,7 +18,7 @@ public: double c; }; -// CHECK: define void @_Z1gv(%class.C* sret noalias % +// CHECK: define void @_Z1gv(%class.C* noalias sret % C g() { return C(); } // CHECK: define void @_Z1f1C(%class.C*) @@ -31,7 +31,7 @@ void f(C) { } // CHECK: define void @_ZThn4_N18BasicAliasAnalysis13getModRefInfoE8CallSite // ... -// CHECK: %struct.CallSite* byval align 4 %CS) +// CHECK: %struct.CallSite* align 4 byval %CS) struct CallSite { unsigned Ptr; CallSite(unsigned XX) : Ptr(XX) {} @@ -89,7 +89,7 @@ struct s5 { s5(); int &x; }; s5 f5() { return s5(); } // CHECK: define i32 @_Z4f6_0M2s6i(i32 %a) -// CHECK: define i64 @_Z4f6_1M2s6FivE({ i32, i32 }* byval align 4) +// CHECK: define i64 @_Z4f6_1M2s6FivE({ i32, i32 }* align 4 byval) // FIXME: It would be nice to avoid byval on the previous case. struct s6 {}; typedef int s6::* s6_mdp; @@ -103,13 +103,13 @@ struct s7_1 { double x; }; struct s7 : s7_0, s7_1 { }; s7 f7() { return s7(); } -// CHECK: define void @_Z2f8v(%struct.s8* sret noalias %agg.result) +// CHECK: define void @_Z2f8v(%struct.s8* noalias sret %agg.result) struct s8_0 { }; struct s8_1 { double x; }; struct s8 { s8_0 a; s8_1 b; }; s8 f8() { return s8(); } -// CHECK: define void @_Z2f9v(%struct.s9* sret noalias %agg.result) +// CHECK: define void @_Z2f9v(%struct.s9* noalias sret %agg.result) struct s9_0 { unsigned : 0; }; struct s9_1 { double x; }; struct s9 { s9_0 a; s9_1 b; }; diff --git a/test/CodeGenCXX/x86_64-arguments.cpp b/test/CodeGenCXX/x86_64-arguments.cpp index 79f6f9cb12..0d07a7f7aa 100644 --- a/test/CodeGenCXX/x86_64-arguments.cpp +++ b/test/CodeGenCXX/x86_64-arguments.cpp @@ -124,7 +124,7 @@ namespace test7 { // Check that the StringRef is passed byval instead of expanded // (which would split it between registers and memory). // rdar://problem/9686430 - // CHECK: define void @_ZN5test71xENS_1AES0_llNS_9StringRefE({{.*}} byval align 8) + // CHECK: define void @_ZN5test71xENS_1AES0_llNS_9StringRefE({{.*}} align 8 byval) // And a couple extra related tests: A y(A, long double, long, long, StringRef) { return A(); } @@ -132,12 +132,12 @@ namespace test7 { struct StringDouble {char * ptr; double d;}; A z(A, A, A, A, A, StringDouble) { return A(); } A zz(A, A, A, A, StringDouble) { return A(); } - // CHECK: define void @_ZN5test71zENS_1AES0_S0_S0_S0_NS_12StringDoubleE({{.*}} byval align 8) + // CHECK: define void @_ZN5test71zENS_1AES0_S0_S0_S0_NS_12StringDoubleE({{.*}} align 8 byval) // CHECK: define void @_ZN5test72zzENS_1AES0_S0_S0_NS_12StringDoubleE({{.*}} i8* } namespace test8 { - // CHECK: declare void @_ZN5test83fooENS_1BE(%"class.test8::B"* byval align 8) + // CHECK: declare void @_ZN5test83fooENS_1BE(%"class.test8::B"* align 8 byval) class A { char big[17]; }; @@ -161,17 +161,17 @@ namespace test9 { // CHECK: define void @_ZN5test93fooEPNS_1SEPNS_1TE([[S:%.*]]*, [[T:%.*]]*) void foo(S*, T*) {} - // CHECK: define void @_ZN5test91aEiiiiNS_1TEPv([[S]]* sret noalias {{%.*}}, i32, i32, i32, i32, [[T]]* byval align 8, i8*) + // CHECK: define void @_ZN5test91aEiiiiNS_1TEPv([[S]]* noalias sret {{%.*}}, i32, i32, i32, i32, [[T]]* align 8 byval, i8*) S a(int, int, int, int, T, void*) { return S(); } - // CHECK: define [[S]]* @_ZN5test91bEPNS_1SEiiiiNS_1TEPv([[S]]* {{%.*}}, i32, i32, i32, i32, [[T:%.*]]* byval align 8, i8*) + // CHECK: define [[S]]* @_ZN5test91bEPNS_1SEiiiiNS_1TEPv([[S]]* {{%.*}}, i32, i32, i32, i32, [[T:%.*]]* align 8 byval, i8*) S* b(S* sret, int, int, int, int, T, void*) { return sret; } - // CHECK: define void @_ZN5test91cEiiiNS_1TEPv([[S]]* sret noalias {{%.*}}, i32, i32, i32, i8* {{%.*}}, i8* {{%.*}}, i8*) + // CHECK: define void @_ZN5test91cEiiiNS_1TEPv([[S]]* noalias sret {{%.*}}, i32, i32, i32, i8* {{%.*}}, i8* {{%.*}}, i8*) S c(int, int, int, T, void*) { return S(); }