From: Diana Picus <diana.picus@linaro.org>
Date: Thu, 28 Mar 2019 10:57:29 +0000 (+0000)
Subject: [ARM GlobalISel] Run regbankselect test for Thumb. NFCI
X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=5dc7f24f6a47c18b2b0434f7c0f73c41976deca2;p=llvm

[ARM GlobalISel] Run regbankselect test for Thumb. NFCI

This should just work, since ARM mode and Thumb2 mode are at the same
level of support now and should map the same to GPR and FPR.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357159 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/test/CodeGen/ARM/GlobalISel/arm-regbankselect.mir b/test/CodeGen/ARM/GlobalISel/arm-regbankselect.mir
index c218df33ab6..50712854340 100644
--- a/test/CodeGen/ARM/GlobalISel/arm-regbankselect.mir
+++ b/test/CodeGen/ARM/GlobalISel/arm-regbankselect.mir
@@ -1,4 +1,5 @@
 # RUN: llc -mtriple arm-- -run-pass=regbankselect %s -o - | FileCheck %s
+# RUN: llc -mtriple thumbv7-- -run-pass=regbankselect %s -o - | FileCheck %s
 --- |
   define void @test_add_s32() { ret void }
   define void @test_sub_s32() { ret void }
@@ -83,7 +84,7 @@
   define void @test_soft_fp_s64() #0 { ret void }
 
   attributes #0 = { "target-features"="+vfp2"}
-  attributes #1 = { "target-features"="+hwdiv-arm" }
+  attributes #1 = { "target-features"="+hwdiv-arm,+hwdiv" }
   attributes #2 = { "target-features"="+vfp4"}
   attributes #3 = { "target-features"="+v5t"}
 ...