From: Simon Pilgrim <llvm-dev@redking.me.uk>
Date: Tue, 28 Nov 2017 23:12:12 +0000 (+0000)
Subject: [X86] Add CLFLUSHOPT schedule tests
X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=5bf4f121f499a44c90cb6ff01798549be8777d03;p=llvm

[X86] Add CLFLUSHOPT schedule tests

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319250 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/test/CodeGen/X86/clflushopt-schedule.ll b/test/CodeGen/X86/clflushopt-schedule.ll
new file mode 100644
index 00000000000..57f9ee1b25e
--- /dev/null
+++ b/test/CodeGen/X86/clflushopt-schedule.ll
@@ -0,0 +1,36 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=x86-64 -mattr=+clflushopt | FileCheck %s --check-prefix=CHECK --check-prefix=GENERIC
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=goldmont | FileCheck %s --check-prefix=CHECK --check-prefix=GLM
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=skylake | FileCheck %s --check-prefix=CHECK --check-prefix=SKYLAKE
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=skx | FileCheck %s --check-prefix=CHECK --check-prefix=SKX
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=znver1 | FileCheck %s --check-prefix=CHECK --check-prefix=ZNVER1
+
+define void @clflushopt(i8* %p) nounwind {
+; GENERIC-LABEL: clflushopt:
+; GENERIC:       # BB#0:
+; GENERIC-NEXT:    clflushopt (%rdi) # sched: [5:1.00]
+; GENERIC-NEXT:    retq # sched: [1:1.00]
+;
+; GLM-LABEL: clflushopt:
+; GLM:       # BB#0:
+; GLM-NEXT:    clflushopt (%rdi)
+; GLM-NEXT:    retq # sched: [4:1.00]
+;
+; SKYLAKE-LABEL: clflushopt:
+; SKYLAKE:       # BB#0:
+; SKYLAKE-NEXT:    clflushopt (%rdi) # sched: [2:1.00]
+; SKYLAKE-NEXT:    retq # sched: [7:1.00]
+;
+; SKX-LABEL: clflushopt:
+; SKX:       # BB#0:
+; SKX-NEXT:    clflushopt (%rdi) # sched: [2:1.00]
+; SKX-NEXT:    retq # sched: [7:1.00]
+;
+; ZNVER1-LABEL: clflushopt:
+; ZNVER1:       # BB#0:
+; ZNVER1-NEXT:    clflushopt (%rdi)
+; ZNVER1-NEXT:    retq # sched: [1:0.50]
+  tail call void @llvm.x86.clflushopt(i8* %p)
+  ret void
+}
+declare void @llvm.x86.clflushopt(i8*) nounwind