From: Craig Topper <craig.topper@intel.com>
Date: Mon, 28 Aug 2017 04:29:08 +0000 (+0000)
Subject: [X86] Add an early out to combineLoopMAddPattern and combineLoopSADPattern when SSE2... 
X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=5aa44202c0aefc73529159c88a4ac5aa75eabefc;p=llvm

[X86] Add an early out to combineLoopMAddPattern and combineLoopSADPattern when SSE2 is disabled.

Without this the madd.ll and sad.ll test cases both throw assertions if you run them with SSE2 disabled.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311872 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp
index ecc8ff0b1af..c9afea2d163 100644
--- a/lib/Target/X86/X86ISelLowering.cpp
+++ b/lib/Target/X86/X86ISelLowering.cpp
@@ -35230,6 +35230,9 @@ static SDValue combineAddOrSubToADCOrSBB(SDNode *N, SelectionDAG &DAG) {
 
 static SDValue combineLoopMAddPattern(SDNode *N, SelectionDAG &DAG,
                                       const X86Subtarget &Subtarget) {
+  if (!Subtarget.hasSSE2())
+    return SDValue();
+
   SDValue MulOp = N->getOperand(0);
   SDValue Phi = N->getOperand(1);
 
@@ -35275,6 +35278,9 @@ static SDValue combineLoopMAddPattern(SDNode *N, SelectionDAG &DAG,
 
 static SDValue combineLoopSADPattern(SDNode *N, SelectionDAG &DAG,
                                      const X86Subtarget &Subtarget) {
+  if (!Subtarget.hasSSE2())
+    return SDValue();
+
   SDLoc DL(N);
   EVT VT = N->getValueType(0);
   SDValue Op0 = N->getOperand(0);