From: Simon Pilgrim <llvm-dev@redking.me.uk>
Date: Sun, 10 Dec 2017 00:40:37 +0000 (+0000)
Subject: [X86] Tag PIC setup instruction as jump scheduler class
X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=52430834f40227dd218591de63e44066de7f4600;p=llvm

[X86] Tag PIC setup instruction as jump scheduler class

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@320276 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/Target/X86/X86InstrCompiler.td b/lib/Target/X86/X86InstrCompiler.td
index d45c8f2c120..95a18d3f0bf 100644
--- a/lib/Target/X86/X86InstrCompiler.td
+++ b/lib/Target/X86/X86InstrCompiler.td
@@ -32,9 +32,10 @@ def GetLo8XForm : SDNodeXForm<imm, [{
 // PIC base construction.  This expands to code that looks like this:
 //     call  $next_inst
 //     popl %destreg"
-let hasSideEffects = 0, isNotDuplicable = 1, Uses = [ESP, SSP] in
+let hasSideEffects = 0, isNotDuplicable = 1, Uses = [ESP, SSP],
+    SchedRW = [WriteJump] in
   def MOVPC32r : Ii32<0xE8, Pseudo, (outs GR32:$reg), (ins i32imm:$label),
-                      "", []>;
+                      "", [], IIC_CALL_RI>;
 
 
 // ADJCALLSTACKDOWN/UP implicitly use/def ESP because they may be expanded into