From: Ahmed Bougacha <ahmed.bougacha@gmail.com>
Date: Fri, 20 Jan 2017 01:37:24 +0000 (+0000)
Subject: [AArch64][GlobalISel] Widen scalar int->fp conversions.
X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=51348febc6a4166a60761385c2280d8c01d036ad;p=llvm

[AArch64][GlobalISel] Widen scalar int->fp conversions.

It's incorrect to ignore the higher bits of the integer source.
Teach the legalizer how to widen it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292563 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/CodeGen/GlobalISel/LegalizerHelper.cpp b/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
index 5f23d253f56..f77d807a69d 100644
--- a/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
+++ b/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
@@ -273,6 +273,28 @@ LegalizerHelper::widenScalar(MachineInstr &MI, unsigned TypeIdx, LLT WideTy) {
     MI.eraseFromParent();
     return Legalized;
   }
+  case TargetOpcode::G_SITOFP:
+  case TargetOpcode::G_UITOFP: {
+    if (TypeIdx != 1)
+      return UnableToLegalize;
+
+    unsigned Src = MI.getOperand(1).getReg();
+    unsigned SrcExt = MRI.createGenericVirtualRegister(WideTy);
+
+    if (MI.getOpcode() == TargetOpcode::G_SITOFP) {
+      MIRBuilder.buildSExt(SrcExt, Src);
+    } else {
+      assert(MI.getOpcode() == TargetOpcode::G_UITOFP && "Unexpected conv op");
+      MIRBuilder.buildZExt(SrcExt, Src);
+    }
+
+    MIRBuilder.buildInstr(MI.getOpcode())
+        .addDef(MI.getOperand(0).getReg())
+        .addUse(SrcExt);
+
+    MI.eraseFromParent();
+    return Legalized;
+  }
   case TargetOpcode::G_LOAD: {
     assert(alignTo(MRI.getType(MI.getOperand(0).getReg()).getSizeInBits(), 8) ==
                WideTy.getSizeInBits() &&
diff --git a/lib/Target/AArch64/AArch64LegalizerInfo.cpp b/lib/Target/AArch64/AArch64LegalizerInfo.cpp
index 48838f28b4b..dad390b752c 100644
--- a/lib/Target/AArch64/AArch64LegalizerInfo.cpp
+++ b/lib/Target/AArch64/AArch64LegalizerInfo.cpp
@@ -141,12 +141,18 @@ AArch64LegalizerInfo::AArch64LegalizerInfo() {
     setAction({G_TRUNC, 1, Ty}, Legal);
 
   // Conversions
-  for (auto Ty : { s1, s8, s16, s32, s64 }) {
+  for (auto Ty : { s32, s64 }) {
     setAction({G_FPTOSI, 0, Ty}, Legal);
     setAction({G_FPTOUI, 0, Ty}, Legal);
     setAction({G_SITOFP, 1, Ty}, Legal);
     setAction({G_UITOFP, 1, Ty}, Legal);
   }
+  for (auto Ty : { s1, s8, s16 }) {
+    setAction({G_FPTOSI, 0, Ty}, Legal);
+    setAction({G_FPTOUI, 0, Ty}, Legal);
+    setAction({G_SITOFP, 1, Ty}, WidenScalar);
+    setAction({G_UITOFP, 1, Ty}, WidenScalar);
+  }
 
   for (auto Ty : { s32, s64 }) {
     setAction({G_FPTOSI, 1, Ty}, Legal);
diff --git a/test/CodeGen/AArch64/GlobalISel/legalize-itofp.mir b/test/CodeGen/AArch64/GlobalISel/legalize-itofp.mir
index 176a7afefce..70ffc3ea3ac 100644
--- a/test/CodeGen/AArch64/GlobalISel/legalize-itofp.mir
+++ b/test/CodeGen/AArch64/GlobalISel/legalize-itofp.mir
@@ -130,7 +130,8 @@ body: |
     %1:_(s1) = G_TRUNC %0
 
     ; CHECK-LABEL: name: test_sitofp_s32_s1
-    ; CHECK: %2(s32) = G_SITOFP %1
+    ; CHECK: %3(s32) = G_SEXT %1
+    ; CHECK: %2(s32) = G_SITOFP %3
     %2:_(s32) = G_SITOFP %1
 ...
 
@@ -143,7 +144,8 @@ body: |
     %1:_(s1) = G_TRUNC %0
 
     ; CHECK-LABEL: name: test_uitofp_s32_s1
-    ; CHECK: %2(s32) = G_UITOFP %1
+    ; CHECK: %3(s32) = G_ZEXT %1
+    ; CHECK: %2(s32) = G_UITOFP %3
     %2:_(s32) = G_UITOFP %1
 ...
 
@@ -156,7 +158,8 @@ body: |
     %1:_(s8) = G_TRUNC %0
 
     ; CHECK-LABEL: name: test_sitofp_s64_s8
-    ; CHECK: %2(s64) = G_SITOFP %1
+    ; CHECK: %3(s32) = G_SEXT %1
+    ; CHECK: %2(s64) = G_SITOFP %3
     %2:_(s64) = G_SITOFP %1
 ...
 
@@ -169,7 +172,8 @@ body: |
     %1:_(s8) = G_TRUNC %0
 
     ; CHECK-LABEL: name: test_uitofp_s64_s8
-    ; CHECK: %2(s64) = G_UITOFP %1
+    ; CHECK: %3(s32) = G_ZEXT %1
+    ; CHECK: %2(s64) = G_UITOFP %3
     %2:_(s64) = G_UITOFP %1
 ...
 
@@ -182,7 +186,8 @@ body: |
     %1:_(s16) = G_TRUNC %0
 
     ; CHECK-LABEL: name: test_sitofp_s32_s16
-    ; CHECK: %2(s32) = G_SITOFP %1
+    ; CHECK: %3(s32) = G_SEXT %1
+    ; CHECK: %2(s32) = G_SITOFP %3
     %2:_(s32) = G_SITOFP %1
 ...
 
@@ -195,6 +200,7 @@ body: |
     %1:_(s16) = G_TRUNC %0
 
     ; CHECK-LABEL: name: test_uitofp_s32_s16
-    ; CHECK: %2(s32) = G_UITOFP %1
+    ; CHECK: %3(s32) = G_ZEXT %1
+    ; CHECK: %2(s32) = G_UITOFP %3
     %2:_(s32) = G_UITOFP %1
 ...