From: Ivan Maidanski Date: Mon, 7 Jan 2013 16:17:49 +0000 (+0400) Subject: Define double-wide ordered loads/stores for x86 X-Git-Tag: libatomic_ops-7_4_0~48^2~25 X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=508c8004527bbd143ae2f97d10c5997ae5b7845a;p=libatomic_ops Define double-wide ordered loads/stores for x86 * src/Makefile.am (atomic_ops/sysdeps/loadstore/ordered_loads_only.h, atomic_ops/sysdeps/loadstore/ordered_stores_only.h): Generate primitives for AO_double_t as well (from the template). * src/atomic_ops/sysdeps/gcc/x86.h: Move include of ordered_except_wr.h (together with the comment) to the end of the file to be after inclusion of double_atomic_load_store.h (because the former uses the primitives defined the latter). * src/atomic_ops/sysdeps/msftc/x86.h: Likewise. * src/atomic_ops/sysdeps/sunc/x86.h: Likewise. * src/atomic_ops/sysdeps/loadstore/ordered_loads_only.h: Regenerate. * src/atomic_ops/sysdeps/loadstore/ordered_stores_only.h: Likewise. --- diff --git a/src/Makefile.am b/src/Makefile.am index eaa580c..f4a66bc 100644 --- a/src/Makefile.am +++ b/src/Makefile.am @@ -107,6 +107,7 @@ atomic_ops/sysdeps/loadstore/ordered_loads_only.h: \ sed -e s:XSIZE:short:g -e s:XCTYPE:unsigned/**/short:g $? >> $@ sed -e s:XSIZE:int:g -e s:XCTYPE:unsigned:g $? >> $@ sed -e s:XSIZE_::g -e s:XCTYPE:AO_t:g $? >> $@ + sed -e s:XSIZE:double:g -e s:XCTYPE:AO_double_t:g $? >> $@ atomic_ops/sysdeps/loadstore/ordered_stores_only.h: \ atomic_ops/sysdeps/loadstore/ordered_stores_only.template @@ -114,6 +115,7 @@ atomic_ops/sysdeps/loadstore/ordered_stores_only.h: \ sed -e s:XSIZE:short:g -e s:XCTYPE:unsigned/**/short:g $? >> $@ sed -e s:XSIZE:int:g -e s:XCTYPE:unsigned:g $? >> $@ sed -e s:XSIZE_::g -e s:XCTYPE:AO_t:g $? >> $@ + sed -e s:XSIZE:double:g -e s:XCTYPE:AO_double_t:g $? >> $@ atomic_ops/sysdeps/loadstore/acquire_release_volatile.h: \ atomic_ops/sysdeps/loadstore/acquire_release_volatile.template diff --git a/src/atomic_ops/sysdeps/gcc/x86.h b/src/atomic_ops/sysdeps/gcc/x86.h index 6f9953d..60bdfb3 100644 --- a/src/atomic_ops/sysdeps/gcc/x86.h +++ b/src/atomic_ops/sysdeps/gcc/x86.h @@ -23,15 +23,6 @@ #include "../all_aligned_atomic_load_store.h" -/* Real X86 implementations, except for some old 32-bit WinChips, */ -/* appear to enforce ordering between memory operations, EXCEPT that */ -/* a later read can pass earlier writes, presumably due to the visible */ -/* presence of store buffers. */ -/* We ignore both the WinChips and the fact that the official specs */ -/* seem to be much weaker (and arguably too weak to be usable). */ - -#include "../ordered_except_wr.h" - #include "../test_and_set_t_is_char.h" #if defined(__x86_64__) && !defined(AO_USE_PENTIUM4_INSTRS) @@ -341,3 +332,11 @@ AO_fetch_compare_and_swap_full(volatile AO_t *addr, AO_t old_val, # endif /* AO_WEAK_DOUBLE_CAS_EMULATION && !AO_CMPXCHG16B_AVAILABLE */ #endif /* x86_64 && !ILP32 */ + +/* Real X86 implementations, except for some old 32-bit WinChips, */ +/* appear to enforce ordering between memory operations, EXCEPT that */ +/* a later read can pass earlier writes, presumably due to the visible */ +/* presence of store buffers. */ +/* We ignore both the WinChips and the fact that the official specs */ +/* seem to be much weaker (and arguably too weak to be usable). */ +#include "../ordered_except_wr.h" diff --git a/src/atomic_ops/sysdeps/loadstore/ordered_loads_only.h b/src/atomic_ops/sysdeps/loadstore/ordered_loads_only.h index ae8baa9..7852194 100644 --- a/src/atomic_ops/sysdeps/loadstore/ordered_loads_only.h +++ b/src/atomic_ops/sysdeps/loadstore/ordered_loads_only.h @@ -142,3 +142,39 @@ # define AO_load_acquire(addr) AO_load_read(addr) # define AO_HAVE_load_acquire #endif /* AO_HAVE_load */ +/* + * Copyright (c) 2003 by Hewlett-Packard Company. All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ + +#ifdef AO_HAVE_double_load + AO_INLINE AO_double_t + AO_double_load_read(const volatile AO_double_t *addr) + { + AO_double_t result = AO_double_load(addr); + + AO_compiler_barrier(); + return result; + } +# define AO_HAVE_double_load_read + +# define AO_double_load_acquire(addr) AO_double_load_read(addr) +# define AO_HAVE_double_load_acquire +#endif /* AO_HAVE_double_load */ diff --git a/src/atomic_ops/sysdeps/loadstore/ordered_stores_only.h b/src/atomic_ops/sysdeps/loadstore/ordered_stores_only.h index 1fe145b..df1986e 100644 --- a/src/atomic_ops/sysdeps/loadstore/ordered_stores_only.h +++ b/src/atomic_ops/sysdeps/loadstore/ordered_stores_only.h @@ -134,3 +134,37 @@ # define AO_store_release(addr, val) AO_store_write(addr, val) # define AO_HAVE_store_release #endif /* AO_HAVE_store */ +/* + * Copyright (c) 2003 by Hewlett-Packard Company. All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ + +#if defined(AO_HAVE_double_store) + AO_INLINE void + AO_double_store_write(volatile AO_double_t *addr, AO_double_t val) + { + AO_compiler_barrier(); + AO_double_store(addr, val); + } +# define AO_HAVE_double_store_write + +# define AO_double_store_release(addr, val) AO_double_store_write(addr, val) +# define AO_HAVE_double_store_release +#endif /* AO_HAVE_double_store */ diff --git a/src/atomic_ops/sysdeps/msftc/x86.h b/src/atomic_ops/sysdeps/msftc/x86.h index 3d31c32..7c2995a 100644 --- a/src/atomic_ops/sysdeps/msftc/x86.h +++ b/src/atomic_ops/sysdeps/msftc/x86.h @@ -26,15 +26,6 @@ #include "../all_aligned_atomic_load_store.h" -/* Real X86 implementations, except for some old WinChips, appear */ -/* to enforce ordering between memory operations, EXCEPT that a later */ -/* read can pass earlier writes, presumably due to the visible */ -/* presence of store buffers. */ -/* We ignore both the WinChips, and the fact that the official specs */ -/* seem to be much weaker (and arguably too weak to be usable). */ - -#include "../ordered_except_wr.h" - #include "../test_and_set_t_is_char.h" #if defined(AO_ASSUME_VISTA) && !defined(AO_ASSUME_WINDOWS98) @@ -142,3 +133,11 @@ AO_test_and_set_full(volatile AO_TS_t *addr) #endif /* AO_ASSUME_VISTA */ #define AO_T_IS_INT + +/* Real X86 implementations, except for some old WinChips, appear */ +/* to enforce ordering between memory operations, EXCEPT that a later */ +/* read can pass earlier writes, presumably due to the visible */ +/* presence of store buffers. */ +/* We ignore both the WinChips, and the fact that the official specs */ +/* seem to be much weaker (and arguably too weak to be usable). */ +#include "../ordered_except_wr.h" diff --git a/src/atomic_ops/sysdeps/sunc/x86.h b/src/atomic_ops/sysdeps/sunc/x86.h index a7468bb..006d53e 100644 --- a/src/atomic_ops/sysdeps/sunc/x86.h +++ b/src/atomic_ops/sysdeps/sunc/x86.h @@ -20,15 +20,6 @@ #include "../all_aligned_atomic_load_store.h" -/* Real X86 implementations, except for some old 32-bit WinChips, */ -/* appear to enforce ordering between memory operations, EXCEPT that */ -/* a later read can pass earlier writes, presumably due to the visible */ -/* presence of store buffers. */ -/* We ignore both the WinChips and the fact that the official specs */ -/* seem to be much weaker (and arguably too weak to be usable). */ - -#include "../ordered_except_wr.h" - #include "../test_and_set_t_is_char.h" #if !defined(AO_USE_PENTIUM4_INSTRS) && !defined(__i386) @@ -231,3 +222,11 @@ AO_fetch_compare_and_swap_full(volatile AO_t *addr, AO_t old_val, # endif /* !AO_CMPXCHG16B_AVAILABLE */ #endif /* x64 */ + +/* Real X86 implementations, except for some old 32-bit WinChips, */ +/* appear to enforce ordering between memory operations, EXCEPT that */ +/* a later read can pass earlier writes, presumably due to the visible */ +/* presence of store buffers. */ +/* We ignore both the WinChips and the fact that the official specs */ +/* seem to be much weaker (and arguably too weak to be usable). */ +#include "../ordered_except_wr.h"