From: Ivan Grokhotkov <ivan@espressif.com>
Date: Wed, 24 Aug 2016 08:25:04 +0000 (+0800)
Subject: components/bootloader: fix enabling cache for APP CPU
X-Git-Tag: v0.9~82^2
X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=4d1084120c72a49481c97ee22bc4885cd2686a5a;p=esp-idf

components/bootloader: fix enabling cache for APP CPU

This is a workaround for a hardware bug with cache initialization.
Only two lines of code related to DPORT_APP_CACHE_MMU_IA_CLR were added around mmu_init(1); call,
and two lines at the end of comment block.
I reformatted surrounding lines to use spaces for indentation, like the rest of the code in this file does.
---

diff --git a/components/bootloader/src/main/bootloader_start.c b/components/bootloader/src/main/bootloader_start.c
index 5c2a186812..b9df64012a 100644
--- a/components/bootloader/src/main/bootloader_start.c
+++ b/components/bootloader/src/main/bootloader_start.c
@@ -92,23 +92,28 @@ void IRAM_ATTR call_start_cpu0()
     //Clear bss
     memset(&_bss_start, 0, (&_bss_end - &_bss_start) * sizeof(_bss_start));
 
-	/* completely reset MMU for both CPUs
-	   (in case serial bootloader was running) */
-	Cache_Read_Disable(0);
-	Cache_Read_Disable(1);
-	Cache_Flush(0);
-	Cache_Flush(1);
-	mmu_init(0);
-	mmu_init(1);
-	/* (above steps probably unnecessary for most serial bootloader
-	   usage, all that's absolutely needed is that we unmask DROM0
-	   cache on the following two lines - normal ROM boot exits with
-	   DROM0 cache unmasked, but serial bootloader exits with it
-	   masked. However can't hurt to be thorough and reset
-	   everything.)
-	*/
-	REG_CLR_BIT(PRO_CACHE_CTRL1_REG, DPORT_PRO_CACHE_MASK_DROM0);
-	REG_CLR_BIT(APP_CACHE_CTRL1_REG, DPORT_APP_CACHE_MASK_DROM0);
+    /* completely reset MMU for both CPUs
+       (in case serial bootloader was running) */
+    Cache_Read_Disable(0);
+    Cache_Read_Disable(1);
+    Cache_Flush(0);
+    Cache_Flush(1);
+    mmu_init(0);
+    REG_SET_BIT(APP_CACHE_CTRL1_REG, DPORT_APP_CACHE_MMU_IA_CLR);
+    mmu_init(1);
+    REG_CLR_BIT(APP_CACHE_CTRL1_REG, DPORT_APP_CACHE_MMU_IA_CLR);
+    /* (above steps probably unnecessary for most serial bootloader
+       usage, all that's absolutely needed is that we unmask DROM0
+       cache on the following two lines - normal ROM boot exits with
+       DROM0 cache unmasked, but serial bootloader exits with it
+       masked. However can't hurt to be thorough and reset
+       everything.)
+
+       The lines which manipulate DPORT_APP_CACHE_MMU_IA_CLR bit are
+       necessary to work around a hardware bug.
+    */
+    REG_CLR_BIT(PRO_CACHE_CTRL1_REG, DPORT_PRO_CACHE_MASK_DROM0);
+    REG_CLR_BIT(APP_CACHE_CTRL1_REG, DPORT_APP_CACHE_MASK_DROM0);
 
     bootloader_main();
 }