From: Chris Lattner Date: Wed, 25 Dec 2002 05:09:59 +0000 (+0000) Subject: Add FP instr prefix byte support X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=4c299f5da1013cd36563a82f188c731b2758074d;p=llvm Add FP instr prefix byte support Add Pseudo instr class git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5152 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/Target/X86/X86InstrInfo.h b/lib/Target/X86/X86InstrInfo.h index aa364f30156..def97757ce8 100644 --- a/lib/Target/X86/X86InstrInfo.h +++ b/lib/Target/X86/X86InstrInfo.h @@ -20,33 +20,38 @@ namespace X86II { // instructions. // + // PseudoFrm - This represents an instruction that is a pseudo instruction + // or one that has not been implemented yet. It is illegal to code generate + // it, but tolerated for intermediate implementation stages. + Pseudo = 0, + /// Raw - This form is for instructions that don't have any operands, so /// they are just a fixed opcode value, like 'leave'. - RawFrm = 0, + RawFrm = 1, /// AddRegFrm - This form is used for instructions like 'push r32' that have /// their one register operand added to their opcode. - AddRegFrm = 1, + AddRegFrm = 2, /// MRMDestReg - This form is used for instructions that use the Mod/RM byte /// to specify a destination, which in this case is a register. /// - MRMDestReg = 2, + MRMDestReg = 3, /// MRMDestMem - This form is used for instructions that use the Mod/RM byte /// to specify a destination, which in this case is memory. /// - MRMDestMem = 3, + MRMDestMem = 4, /// MRMSrcReg - This form is used for instructions that use the Mod/RM byte /// to specify a source, which in this case is a register. /// - MRMSrcReg = 4, + MRMSrcReg = 5, /// MRMSrcMem - This form is used for instructions that use the Mod/RM byte /// to specify a source, which in this case is memory. /// - MRMSrcMem = 5, + MRMSrcMem = 6, /// MRMS[0-7][rm] - These forms are used to represent instructions that use /// a Mod/RM byte, and use the middle field to hold extended opcode @@ -69,28 +74,38 @@ namespace X86II { /// Void - Set if this instruction produces no value Void = 1 << 5, - // TB - TwoByte - Set if this instruction has a two byte opcode, which - // starts with a 0x0F byte before the real opcode. - TB = 1 << 6, - - // FIXME: There are several more two byte opcode escapes: D8-DF - // Handle this. - // OpSize - Set if this instruction requires an operand size prefix (0x66), // which most often indicates that the instruction operates on 16 bit data // instead of 32 bit data. - OpSize = 1 << 7, - - // This three-bit field describes the size of a memory operand. - // I'm just being paranoid not using the zero value; there's - // probably no reason you couldn't use it. - Arg8 = 0x1 << 8, - Arg16 = 0x2 << 8, - Arg32 = 0x3 << 8, - Arg64 = 0x4 << 8, - Arg80 = 0x5 << 8, - Arg128 = 0x6 << 8, - ArgMask = 0x7 << 8, + OpSize = 1 << 6, + + // Op0Mask - There are several prefix bytes that are used to form two byte + // opcodes. These are currently 0x0F, and 0xD8-0xDF. This mask is used to + // obtain the setting of this field. If no bits in this field is set, there + // is no prefix byte for obtaining a multibyte opcode. + // + Op0Mask = 0xF << 7, + + // TB - TwoByte - Set if this instruction has a two byte opcode, which + // starts with a 0x0F byte before the real opcode. + TB = 1 << 7, + + // D8-DF - These escape opcodes are used by the floating point unit. These + // values must remain sequential. + D8 = 2 << 7, D9 = 3 << 7, DA = 4 << 7, DB = 5 << 7, + DC = 6 << 7, DD = 7 << 7, DE = 8 << 7, DF = 9 << 7, + + // This three-bit field describes the size of a memory operand. Zero is + // unused so that we can tell if we forgot to set a value. + Arg8 = 1 << 11, + Arg16 = 2 << 11, + Arg32 = 3 << 11, + ArgF32 = 4 << 11, + ArgF64 = 5 << 11, + ArgF80 = 6 << 11, + ArgMask = 7 << 11, + + // Bits 14 -> 31 are unused }; }