From: Sanjay Patel <spatel@rotateright.com>
Date: Mon, 21 Jan 2019 22:12:35 +0000 (+0000)
Subject: [x86] add another test for xor with undefs; NFC
X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=4b96e4b486d2a92e8f7820f6efa2c2aa0023bb66;p=llvm

[x86] add another test for xor with undefs; NFC


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351764 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/test/CodeGen/X86/vector-partial-undef.ll b/test/CodeGen/X86/vector-partial-undef.ll
index 3e9092418b6..1cd3415d082 100644
--- a/test/CodeGen/X86/vector-partial-undef.ll
+++ b/test/CodeGen/X86/vector-partial-undef.ll
@@ -23,6 +23,25 @@ define <4 x i64> @xor_insert_insert(<2 x i64> %x, <2 x i64> %y) {
   ret <4 x i64> %r
 }
 
+define <4 x i64> @xor_insert_insert_high_half(<2 x i64> %x, <2 x i64> %y) {
+; SSE-LABEL: xor_insert_insert_high_half:
+; SSE:       # %bb.0:
+; SSE-NEXT:    xorps %xmm0, %xmm1
+; SSE-NEXT:    xorps %xmm0, %xmm0
+; SSE-NEXT:    retq
+;
+; AVX-LABEL: xor_insert_insert_high_half:
+; AVX:       # %bb.0:
+; AVX-NEXT:    vinsertf128 $1, %xmm0, %ymm0, %ymm0
+; AVX-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm1
+; AVX-NEXT:    vxorps %ymm1, %ymm0, %ymm0
+; AVX-NEXT:    retq
+  %xw = shufflevector <2 x i64> %x, <2 x i64> undef, <4 x i32> <i32 undef, i32 undef, i32 0, i32 1>
+  %yw = shufflevector <2 x i64> %y, <2 x i64> undef, <4 x i32> <i32 undef, i32 undef, i32 0, i32 1>
+  %r = xor <4 x i64> %xw, %yw
+  ret <4 x i64> %r
+}
+
 ; All elements of the add are undefined:
 ;  x[0] , x[1] , x[2] , x[3],  u ,   u  ,   u  ,  u
 ; +  u  ,   u  ,   u  ,   u , 42 ,  43  ,  44  , 45